1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the auto-upgrade helper functions. 11 // This is where deprecated IR intrinsics and other IR features are updated to 12 // current specifications. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "llvm/IR/AutoUpgrade.h" 17 #include "llvm/ADT/StringSwitch.h" 18 #include "llvm/IR/Constants.h" 19 #include "llvm/IR/DIBuilder.h" 20 #include "llvm/IR/DebugInfo.h" 21 #include "llvm/IR/DiagnosticInfo.h" 22 #include "llvm/IR/Function.h" 23 #include "llvm/IR/IRBuilder.h" 24 #include "llvm/IR/Instruction.h" 25 #include "llvm/IR/IntrinsicInst.h" 26 #include "llvm/IR/LLVMContext.h" 27 #include "llvm/IR/Module.h" 28 #include "llvm/IR/Verifier.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Support/Regex.h" 31 #include <cstring> 32 using namespace llvm; 33 34 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 35 36 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 37 // changed their type from v4f32 to v2i64. 38 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 39 Function *&NewFn) { 40 // Check whether this is an old version of the function, which received 41 // v4f32 arguments. 42 Type *Arg0Type = F->getFunctionType()->getParamType(0); 43 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 44 return false; 45 46 // Yes, it's old, replace it with new version. 47 rename(F); 48 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 49 return true; 50 } 51 52 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 53 // arguments have changed their type from i32 to i8. 54 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 55 Function *&NewFn) { 56 // Check that the last argument is an i32. 57 Type *LastArgType = F->getFunctionType()->getParamType( 58 F->getFunctionType()->getNumParams() - 1); 59 if (!LastArgType->isIntegerTy(32)) 60 return false; 61 62 // Move this function aside and map down. 63 rename(F); 64 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 65 return true; 66 } 67 68 // Upgrade the declaration of fp compare intrinsics that change return type 69 // from scalar to vXi1 mask. 70 static bool UpgradeX86MaskedFPCompare(Function *F, Intrinsic::ID IID, 71 Function *&NewFn) { 72 // Check if the return type is a vector. 73 if (F->getReturnType()->isVectorTy()) 74 return false; 75 76 rename(F); 77 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 78 return true; 79 } 80 81 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 82 // All of the intrinsics matches below should be marked with which llvm 83 // version started autoupgrading them. At some point in the future we would 84 // like to use this information to remove upgrade code for some older 85 // intrinsics. It is currently undecided how we will determine that future 86 // point. 87 if (Name=="ssse3.pabs.b.128" || // Added in 6.0 88 Name=="ssse3.pabs.w.128" || // Added in 6.0 89 Name=="ssse3.pabs.d.128" || // Added in 6.0 90 Name.startswith("fma.vfmsub.") || // Added in 7.0 91 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 92 Name.startswith("fma.vfnmadd.") || // Added in 7.0 93 Name.startswith("fma.vfnmsub.") || // Added in 7.0 94 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 95 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 96 Name.startswith("avx512.kunpck") || //added in 6.0 97 Name.startswith("avx2.pabs.") || // Added in 6.0 98 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 99 Name.startswith("avx512.broadcastm") || // Added in 6.0 100 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 101 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 102 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 103 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 104 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 105 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 106 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 107 Name.startswith("avx.vperm2f128.") || // Added in 6.0 108 Name == "avx2.vperm2i128" || // Added in 6.0 109 Name == "sse.add.ss" || // Added in 4.0 110 Name == "sse2.add.sd" || // Added in 4.0 111 Name == "sse.sub.ss" || // Added in 4.0 112 Name == "sse2.sub.sd" || // Added in 4.0 113 Name == "sse.mul.ss" || // Added in 4.0 114 Name == "sse2.mul.sd" || // Added in 4.0 115 Name == "sse.div.ss" || // Added in 4.0 116 Name == "sse2.div.sd" || // Added in 4.0 117 Name == "sse41.pmaxsb" || // Added in 3.9 118 Name == "sse2.pmaxs.w" || // Added in 3.9 119 Name == "sse41.pmaxsd" || // Added in 3.9 120 Name == "sse2.pmaxu.b" || // Added in 3.9 121 Name == "sse41.pmaxuw" || // Added in 3.9 122 Name == "sse41.pmaxud" || // Added in 3.9 123 Name == "sse41.pminsb" || // Added in 3.9 124 Name == "sse2.pmins.w" || // Added in 3.9 125 Name == "sse41.pminsd" || // Added in 3.9 126 Name == "sse2.pminu.b" || // Added in 3.9 127 Name == "sse41.pminuw" || // Added in 3.9 128 Name == "sse41.pminud" || // Added in 3.9 129 Name == "avx512.kand.w" || // Added in 7.0 130 Name == "avx512.kandn.w" || // Added in 7.0 131 Name == "avx512.knot.w" || // Added in 7.0 132 Name == "avx512.kor.w" || // Added in 7.0 133 Name == "avx512.kxor.w" || // Added in 7.0 134 Name == "avx512.kxnor.w" || // Added in 7.0 135 Name == "avx512.kortestc.w" || // Added in 7.0 136 Name == "avx512.kortestz.w" || // Added in 7.0 137 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 138 Name.startswith("avx2.pmax") || // Added in 3.9 139 Name.startswith("avx2.pmin") || // Added in 3.9 140 Name.startswith("avx512.mask.pmax") || // Added in 4.0 141 Name.startswith("avx512.mask.pmin") || // Added in 4.0 142 Name.startswith("avx2.vbroadcast") || // Added in 3.8 143 Name.startswith("avx2.pbroadcast") || // Added in 3.8 144 Name.startswith("avx.vpermil.") || // Added in 3.1 145 Name.startswith("sse2.pshuf") || // Added in 3.9 146 Name.startswith("avx512.pbroadcast") || // Added in 3.9 147 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 148 Name.startswith("avx512.mask.movddup") || // Added in 3.9 149 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 150 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 151 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 152 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 153 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 154 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 155 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 156 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 157 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 158 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 159 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 160 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 161 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 162 Name.startswith("avx512.mask.pand.") || // Added in 3.9 163 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 164 Name.startswith("avx512.mask.por.") || // Added in 3.9 165 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 166 Name.startswith("avx512.mask.and.") || // Added in 3.9 167 Name.startswith("avx512.mask.andn.") || // Added in 3.9 168 Name.startswith("avx512.mask.or.") || // Added in 3.9 169 Name.startswith("avx512.mask.xor.") || // Added in 3.9 170 Name.startswith("avx512.mask.padd.") || // Added in 4.0 171 Name.startswith("avx512.mask.psub.") || // Added in 4.0 172 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 173 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 174 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 175 Name == "avx512.mask.cvtudq2ps.128" || // Added in 7.0 176 Name == "avx512.mask.cvtudq2ps.256" || // Added in 7.0 177 Name == "avx512.mask.cvtqq2pd.128" || // Added in 7.0 178 Name == "avx512.mask.cvtqq2pd.256" || // Added in 7.0 179 Name == "avx512.mask.cvtuqq2pd.128" || // Added in 7.0 180 Name == "avx512.mask.cvtuqq2pd.256" || // Added in 7.0 181 Name == "avx512.mask.cvtdq2ps.128" || // Added in 7.0 182 Name == "avx512.mask.cvtdq2ps.256" || // Added in 7.0 183 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 184 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 185 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 186 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 187 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 188 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 189 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 190 Name == "avx512.cvtusi2sd" || // Added in 7.0 191 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 192 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 193 Name == "sse2.pmulu.dq" || // Added in 7.0 194 Name == "sse41.pmuldq" || // Added in 7.0 195 Name == "avx2.pmulu.dq" || // Added in 7.0 196 Name == "avx2.pmul.dq" || // Added in 7.0 197 Name == "avx512.pmulu.dq.512" || // Added in 7.0 198 Name == "avx512.pmul.dq.512" || // Added in 7.0 199 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 200 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 201 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 202 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 203 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 204 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 205 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 206 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 207 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 208 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 209 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 210 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 211 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 212 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 213 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 214 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 215 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 216 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 217 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 218 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 219 Name == "avx512.mask.add.pd.128" || // Added in 4.0 220 Name == "avx512.mask.add.pd.256" || // Added in 4.0 221 Name == "avx512.mask.add.ps.128" || // Added in 4.0 222 Name == "avx512.mask.add.ps.256" || // Added in 4.0 223 Name == "avx512.mask.div.pd.128" || // Added in 4.0 224 Name == "avx512.mask.div.pd.256" || // Added in 4.0 225 Name == "avx512.mask.div.ps.128" || // Added in 4.0 226 Name == "avx512.mask.div.ps.256" || // Added in 4.0 227 Name == "avx512.mask.mul.pd.128" || // Added in 4.0 228 Name == "avx512.mask.mul.pd.256" || // Added in 4.0 229 Name == "avx512.mask.mul.ps.128" || // Added in 4.0 230 Name == "avx512.mask.mul.ps.256" || // Added in 4.0 231 Name == "avx512.mask.sub.pd.128" || // Added in 4.0 232 Name == "avx512.mask.sub.pd.256" || // Added in 4.0 233 Name == "avx512.mask.sub.ps.128" || // Added in 4.0 234 Name == "avx512.mask.sub.ps.256" || // Added in 4.0 235 Name == "avx512.mask.max.pd.128" || // Added in 5.0 236 Name == "avx512.mask.max.pd.256" || // Added in 5.0 237 Name == "avx512.mask.max.ps.128" || // Added in 5.0 238 Name == "avx512.mask.max.ps.256" || // Added in 5.0 239 Name == "avx512.mask.min.pd.128" || // Added in 5.0 240 Name == "avx512.mask.min.pd.256" || // Added in 5.0 241 Name == "avx512.mask.min.ps.128" || // Added in 5.0 242 Name == "avx512.mask.min.ps.256" || // Added in 5.0 243 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 244 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 245 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 246 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 247 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 248 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 249 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 250 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 251 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 252 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 253 Name.startswith("avx512.mask.pslli") || // Added in 4.0 254 Name.startswith("avx512.mask.psrai") || // Added in 4.0 255 Name.startswith("avx512.mask.psrli") || // Added in 4.0 256 Name.startswith("avx512.mask.psllv") || // Added in 4.0 257 Name.startswith("avx512.mask.psrav") || // Added in 4.0 258 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 259 Name.startswith("sse41.pmovsx") || // Added in 3.8 260 Name.startswith("sse41.pmovzx") || // Added in 3.9 261 Name.startswith("avx2.pmovsx") || // Added in 3.9 262 Name.startswith("avx2.pmovzx") || // Added in 3.9 263 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 264 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 265 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 266 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 267 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 268 Name == "sse.cvtsi2ss" || // Added in 7.0 269 Name == "sse.cvtsi642ss" || // Added in 7.0 270 Name == "sse2.cvtsi2sd" || // Added in 7.0 271 Name == "sse2.cvtsi642sd" || // Added in 7.0 272 Name == "sse2.cvtss2sd" || // Added in 7.0 273 Name == "sse2.cvtdq2pd" || // Added in 3.9 274 Name == "sse2.cvtdq2ps" || // Added in 7.0 275 Name == "sse2.cvtps2pd" || // Added in 3.9 276 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 277 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 278 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 279 Name.startswith("avx.vinsertf128.") || // Added in 3.7 280 Name == "avx2.vinserti128" || // Added in 3.7 281 Name.startswith("avx512.mask.insert") || // Added in 4.0 282 Name.startswith("avx.vextractf128.") || // Added in 3.7 283 Name == "avx2.vextracti128" || // Added in 3.7 284 Name.startswith("avx512.mask.vextract") || // Added in 4.0 285 Name.startswith("sse4a.movnt.") || // Added in 3.9 286 Name.startswith("avx.movnt.") || // Added in 3.2 287 Name.startswith("avx512.storent.") || // Added in 3.9 288 Name == "sse41.movntdqa" || // Added in 5.0 289 Name == "avx2.movntdqa" || // Added in 5.0 290 Name == "avx512.movntdqa" || // Added in 5.0 291 Name == "sse2.storel.dq" || // Added in 3.9 292 Name.startswith("sse.storeu.") || // Added in 3.9 293 Name.startswith("sse2.storeu.") || // Added in 3.9 294 Name.startswith("avx.storeu.") || // Added in 3.9 295 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 296 Name.startswith("avx512.mask.store.p") || // Added in 3.9 297 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 298 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 299 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 300 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 301 Name == "avx512.mask.store.ss" || // Added in 7.0 302 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 303 Name.startswith("avx512.mask.load.") || // Added in 3.9 304 Name == "sse42.crc32.64.8" || // Added in 3.4 305 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 306 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 307 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 308 Name.startswith("avx512.mask.valign.") || // Added in 4.0 309 Name.startswith("sse2.psll.dq") || // Added in 3.7 310 Name.startswith("sse2.psrl.dq") || // Added in 3.7 311 Name.startswith("avx2.psll.dq") || // Added in 3.7 312 Name.startswith("avx2.psrl.dq") || // Added in 3.7 313 Name.startswith("avx512.psll.dq") || // Added in 3.9 314 Name.startswith("avx512.psrl.dq") || // Added in 3.9 315 Name == "sse41.pblendw" || // Added in 3.7 316 Name.startswith("sse41.blendp") || // Added in 3.7 317 Name.startswith("avx.blend.p") || // Added in 3.7 318 Name == "avx2.pblendw" || // Added in 3.7 319 Name.startswith("avx2.pblendd.") || // Added in 3.7 320 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 321 Name == "avx2.vbroadcasti128" || // Added in 3.7 322 Name.startswith("avx512.mask.broadcastf") || // Added in 6.0 323 Name.startswith("avx512.mask.broadcasti") || // Added in 6.0 324 Name == "xop.vpcmov" || // Added in 3.8 325 Name == "xop.vpcmov.256" || // Added in 5.0 326 Name.startswith("avx512.mask.move.s") || // Added in 4.0 327 Name.startswith("avx512.cvtmask2") || // Added in 5.0 328 (Name.startswith("xop.vpcom") && // Added in 3.2 329 F->arg_size() == 2) || 330 Name.startswith("avx512.ptestm") || //Added in 6.0 331 Name.startswith("avx512.ptestnm") || //Added in 6.0 332 Name.startswith("sse2.pavg") || // Added in 6.0 333 Name.startswith("avx2.pavg") || // Added in 6.0 334 Name.startswith("avx512.mask.pavg")) // Added in 6.0 335 return true; 336 337 return false; 338 } 339 340 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 341 Function *&NewFn) { 342 // Only handle intrinsics that start with "x86.". 343 if (!Name.startswith("x86.")) 344 return false; 345 // Remove "x86." prefix. 346 Name = Name.substr(4); 347 348 if (ShouldUpgradeX86Intrinsic(F, Name)) { 349 NewFn = nullptr; 350 return true; 351 } 352 353 // SSE4.1 ptest functions may have an old signature. 354 if (Name.startswith("sse41.ptest")) { // Added in 3.2 355 if (Name.substr(11) == "c") 356 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 357 if (Name.substr(11) == "z") 358 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 359 if (Name.substr(11) == "nzc") 360 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 361 } 362 // Several blend and other instructions with masks used the wrong number of 363 // bits. 364 if (Name == "sse41.insertps") // Added in 3.6 365 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 366 NewFn); 367 if (Name == "sse41.dppd") // Added in 3.6 368 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 369 NewFn); 370 if (Name == "sse41.dpps") // Added in 3.6 371 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 372 NewFn); 373 if (Name == "sse41.mpsadbw") // Added in 3.6 374 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 375 NewFn); 376 if (Name == "avx.dp.ps.256") // Added in 3.6 377 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 378 NewFn); 379 if (Name == "avx2.mpsadbw") // Added in 3.6 380 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 381 NewFn); 382 if (Name == "avx512.mask.cmp.pd.128") // Added in 7.0 383 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_128, 384 NewFn); 385 if (Name == "avx512.mask.cmp.pd.256") // Added in 7.0 386 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_256, 387 NewFn); 388 if (Name == "avx512.mask.cmp.pd.512") // Added in 7.0 389 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_512, 390 NewFn); 391 if (Name == "avx512.mask.cmp.ps.128") // Added in 7.0 392 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_128, 393 NewFn); 394 if (Name == "avx512.mask.cmp.ps.256") // Added in 7.0 395 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_256, 396 NewFn); 397 if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0 398 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_512, 399 NewFn); 400 401 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 402 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 403 rename(F); 404 NewFn = Intrinsic::getDeclaration(F->getParent(), 405 Intrinsic::x86_xop_vfrcz_ss); 406 return true; 407 } 408 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 409 rename(F); 410 NewFn = Intrinsic::getDeclaration(F->getParent(), 411 Intrinsic::x86_xop_vfrcz_sd); 412 return true; 413 } 414 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 415 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 416 auto Idx = F->getFunctionType()->getParamType(2); 417 if (Idx->isFPOrFPVectorTy()) { 418 rename(F); 419 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 420 unsigned EltSize = Idx->getScalarSizeInBits(); 421 Intrinsic::ID Permil2ID; 422 if (EltSize == 64 && IdxSize == 128) 423 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 424 else if (EltSize == 32 && IdxSize == 128) 425 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 426 else if (EltSize == 64 && IdxSize == 256) 427 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 428 else 429 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 430 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 431 return true; 432 } 433 } 434 435 return false; 436 } 437 438 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 439 assert(F && "Illegal to upgrade a non-existent Function."); 440 441 // Quickly eliminate it, if it's not a candidate. 442 StringRef Name = F->getName(); 443 if (Name.size() <= 8 || !Name.startswith("llvm.")) 444 return false; 445 Name = Name.substr(5); // Strip off "llvm." 446 447 switch (Name[0]) { 448 default: break; 449 case 'a': { 450 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 451 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 452 F->arg_begin()->getType()); 453 return true; 454 } 455 if (Name.startswith("arm.neon.vclz")) { 456 Type* args[2] = { 457 F->arg_begin()->getType(), 458 Type::getInt1Ty(F->getContext()) 459 }; 460 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 461 // the end of the name. Change name from llvm.arm.neon.vclz.* to 462 // llvm.ctlz.* 463 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 464 NewFn = Function::Create(fType, F->getLinkage(), 465 "llvm.ctlz." + Name.substr(14), F->getParent()); 466 return true; 467 } 468 if (Name.startswith("arm.neon.vcnt")) { 469 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 470 F->arg_begin()->getType()); 471 return true; 472 } 473 Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 474 if (vldRegex.match(Name)) { 475 auto fArgs = F->getFunctionType()->params(); 476 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 477 // Can't use Intrinsic::getDeclaration here as the return types might 478 // then only be structurally equal. 479 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 480 NewFn = Function::Create(fType, F->getLinkage(), 481 "llvm." + Name + ".p0i8", F->getParent()); 482 return true; 483 } 484 Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 485 if (vstRegex.match(Name)) { 486 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 487 Intrinsic::arm_neon_vst2, 488 Intrinsic::arm_neon_vst3, 489 Intrinsic::arm_neon_vst4}; 490 491 static const Intrinsic::ID StoreLaneInts[] = { 492 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 493 Intrinsic::arm_neon_vst4lane 494 }; 495 496 auto fArgs = F->getFunctionType()->params(); 497 Type *Tys[] = {fArgs[0], fArgs[1]}; 498 if (Name.find("lane") == StringRef::npos) 499 NewFn = Intrinsic::getDeclaration(F->getParent(), 500 StoreInts[fArgs.size() - 3], Tys); 501 else 502 NewFn = Intrinsic::getDeclaration(F->getParent(), 503 StoreLaneInts[fArgs.size() - 5], Tys); 504 return true; 505 } 506 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 507 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 508 return true; 509 } 510 break; 511 } 512 513 case 'c': { 514 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 515 rename(F); 516 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 517 F->arg_begin()->getType()); 518 return true; 519 } 520 if (Name.startswith("cttz.") && F->arg_size() == 1) { 521 rename(F); 522 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 523 F->arg_begin()->getType()); 524 return true; 525 } 526 break; 527 } 528 case 'd': { 529 if (Name == "dbg.value" && F->arg_size() == 4) { 530 rename(F); 531 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 532 return true; 533 } 534 break; 535 } 536 case 'i': 537 case 'l': { 538 bool IsLifetimeStart = Name.startswith("lifetime.start"); 539 if (IsLifetimeStart || Name.startswith("invariant.start")) { 540 Intrinsic::ID ID = IsLifetimeStart ? 541 Intrinsic::lifetime_start : Intrinsic::invariant_start; 542 auto Args = F->getFunctionType()->params(); 543 Type* ObjectPtr[1] = {Args[1]}; 544 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 545 rename(F); 546 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 547 return true; 548 } 549 } 550 551 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 552 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 553 Intrinsic::ID ID = IsLifetimeEnd ? 554 Intrinsic::lifetime_end : Intrinsic::invariant_end; 555 556 auto Args = F->getFunctionType()->params(); 557 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 558 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 559 rename(F); 560 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 561 return true; 562 } 563 } 564 if (Name.startswith("invariant.group.barrier")) { 565 // Rename invariant.group.barrier to launder.invariant.group 566 auto Args = F->getFunctionType()->params(); 567 Type* ObjectPtr[1] = {Args[0]}; 568 rename(F); 569 NewFn = Intrinsic::getDeclaration(F->getParent(), 570 Intrinsic::launder_invariant_group, ObjectPtr); 571 return true; 572 573 } 574 575 break; 576 } 577 case 'm': { 578 if (Name.startswith("masked.load.")) { 579 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 580 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 581 rename(F); 582 NewFn = Intrinsic::getDeclaration(F->getParent(), 583 Intrinsic::masked_load, 584 Tys); 585 return true; 586 } 587 } 588 if (Name.startswith("masked.store.")) { 589 auto Args = F->getFunctionType()->params(); 590 Type *Tys[] = { Args[0], Args[1] }; 591 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 592 rename(F); 593 NewFn = Intrinsic::getDeclaration(F->getParent(), 594 Intrinsic::masked_store, 595 Tys); 596 return true; 597 } 598 } 599 // Renaming gather/scatter intrinsics with no address space overloading 600 // to the new overload which includes an address space 601 if (Name.startswith("masked.gather.")) { 602 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 603 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 604 rename(F); 605 NewFn = Intrinsic::getDeclaration(F->getParent(), 606 Intrinsic::masked_gather, Tys); 607 return true; 608 } 609 } 610 if (Name.startswith("masked.scatter.")) { 611 auto Args = F->getFunctionType()->params(); 612 Type *Tys[] = {Args[0], Args[1]}; 613 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 614 rename(F); 615 NewFn = Intrinsic::getDeclaration(F->getParent(), 616 Intrinsic::masked_scatter, Tys); 617 return true; 618 } 619 } 620 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 621 // alignment parameter to embedding the alignment as an attribute of 622 // the pointer args. 623 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 624 rename(F); 625 // Get the types of dest, src, and len 626 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 627 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 628 ParamTypes); 629 return true; 630 } 631 if (Name.startswith("memmove.") && F->arg_size() == 5) { 632 rename(F); 633 // Get the types of dest, src, and len 634 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 635 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 636 ParamTypes); 637 return true; 638 } 639 if (Name.startswith("memset.") && F->arg_size() == 5) { 640 rename(F); 641 // Get the types of dest, and len 642 const auto *FT = F->getFunctionType(); 643 Type *ParamTypes[2] = { 644 FT->getParamType(0), // Dest 645 FT->getParamType(2) // len 646 }; 647 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 648 ParamTypes); 649 return true; 650 } 651 break; 652 } 653 case 'n': { 654 if (Name.startswith("nvvm.")) { 655 Name = Name.substr(5); 656 657 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 658 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 659 .Cases("brev32", "brev64", Intrinsic::bitreverse) 660 .Case("clz.i", Intrinsic::ctlz) 661 .Case("popc.i", Intrinsic::ctpop) 662 .Default(Intrinsic::not_intrinsic); 663 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 664 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 665 {F->getReturnType()}); 666 return true; 667 } 668 669 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 670 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 671 // 672 // TODO: We could add lohi.i2d. 673 bool Expand = StringSwitch<bool>(Name) 674 .Cases("abs.i", "abs.ll", true) 675 .Cases("clz.ll", "popc.ll", "h2f", true) 676 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 677 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 678 .Default(false); 679 if (Expand) { 680 NewFn = nullptr; 681 return true; 682 } 683 } 684 break; 685 } 686 case 'o': 687 // We only need to change the name to match the mangling including the 688 // address space. 689 if (Name.startswith("objectsize.")) { 690 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 691 if (F->arg_size() == 2 || 692 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 693 rename(F); 694 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 695 Tys); 696 return true; 697 } 698 } 699 break; 700 701 case 's': 702 if (Name == "stackprotectorcheck") { 703 NewFn = nullptr; 704 return true; 705 } 706 break; 707 708 case 'x': 709 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 710 return true; 711 } 712 // Remangle our intrinsic since we upgrade the mangling 713 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 714 if (Result != None) { 715 NewFn = Result.getValue(); 716 return true; 717 } 718 719 // This may not belong here. This function is effectively being overloaded 720 // to both detect an intrinsic which needs upgrading, and to provide the 721 // upgraded form of the intrinsic. We should perhaps have two separate 722 // functions for this. 723 return false; 724 } 725 726 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 727 NewFn = nullptr; 728 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 729 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 730 731 // Upgrade intrinsic attributes. This does not change the function. 732 if (NewFn) 733 F = NewFn; 734 if (Intrinsic::ID id = F->getIntrinsicID()) 735 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 736 return Upgraded; 737 } 738 739 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 740 // Nothing to do yet. 741 return false; 742 } 743 744 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 745 // to byte shuffles. 746 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 747 Value *Op, unsigned Shift) { 748 Type *ResultTy = Op->getType(); 749 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 750 751 // Bitcast from a 64-bit element type to a byte element type. 752 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 753 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 754 755 // We'll be shuffling in zeroes. 756 Value *Res = Constant::getNullValue(VecTy); 757 758 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 759 // we'll just return the zero vector. 760 if (Shift < 16) { 761 uint32_t Idxs[64]; 762 // 256/512-bit version is split into 2/4 16-byte lanes. 763 for (unsigned l = 0; l != NumElts; l += 16) 764 for (unsigned i = 0; i != 16; ++i) { 765 unsigned Idx = NumElts + i - Shift; 766 if (Idx < NumElts) 767 Idx -= NumElts - 16; // end of lane, switch operand. 768 Idxs[l + i] = Idx + l; 769 } 770 771 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 772 } 773 774 // Bitcast back to a 64-bit element type. 775 return Builder.CreateBitCast(Res, ResultTy, "cast"); 776 } 777 778 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 779 // to byte shuffles. 780 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 781 unsigned Shift) { 782 Type *ResultTy = Op->getType(); 783 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 784 785 // Bitcast from a 64-bit element type to a byte element type. 786 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 787 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 788 789 // We'll be shuffling in zeroes. 790 Value *Res = Constant::getNullValue(VecTy); 791 792 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 793 // we'll just return the zero vector. 794 if (Shift < 16) { 795 uint32_t Idxs[64]; 796 // 256/512-bit version is split into 2/4 16-byte lanes. 797 for (unsigned l = 0; l != NumElts; l += 16) 798 for (unsigned i = 0; i != 16; ++i) { 799 unsigned Idx = i + Shift; 800 if (Idx >= 16) 801 Idx += NumElts - 16; // end of lane, switch operand. 802 Idxs[l + i] = Idx + l; 803 } 804 805 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 806 } 807 808 // Bitcast back to a 64-bit element type. 809 return Builder.CreateBitCast(Res, ResultTy, "cast"); 810 } 811 812 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 813 unsigned NumElts) { 814 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 815 cast<IntegerType>(Mask->getType())->getBitWidth()); 816 Mask = Builder.CreateBitCast(Mask, MaskTy); 817 818 // If we have less than 8 elements, then the starting mask was an i8 and 819 // we need to extract down to the right number of elements. 820 if (NumElts < 8) { 821 uint32_t Indices[4]; 822 for (unsigned i = 0; i != NumElts; ++i) 823 Indices[i] = i; 824 Mask = Builder.CreateShuffleVector(Mask, Mask, 825 makeArrayRef(Indices, NumElts), 826 "extract"); 827 } 828 829 return Mask; 830 } 831 832 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 833 Value *Op0, Value *Op1) { 834 // If the mask is all ones just emit the align operation. 835 if (const auto *C = dyn_cast<Constant>(Mask)) 836 if (C->isAllOnesValue()) 837 return Op0; 838 839 Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements()); 840 return Builder.CreateSelect(Mask, Op0, Op1); 841 } 842 843 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 844 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 845 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 846 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 847 Value *Op1, Value *Shift, 848 Value *Passthru, Value *Mask, 849 bool IsVALIGN) { 850 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 851 852 unsigned NumElts = Op0->getType()->getVectorNumElements(); 853 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 854 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 855 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 856 857 // Mask the immediate for VALIGN. 858 if (IsVALIGN) 859 ShiftVal &= (NumElts - 1); 860 861 // If palignr is shifting the pair of vectors more than the size of two 862 // lanes, emit zero. 863 if (ShiftVal >= 32) 864 return llvm::Constant::getNullValue(Op0->getType()); 865 866 // If palignr is shifting the pair of input vectors more than one lane, 867 // but less than two lanes, convert to shifting in zeroes. 868 if (ShiftVal > 16) { 869 ShiftVal -= 16; 870 Op1 = Op0; 871 Op0 = llvm::Constant::getNullValue(Op0->getType()); 872 } 873 874 uint32_t Indices[64]; 875 // 256-bit palignr operates on 128-bit lanes so we need to handle that 876 for (unsigned l = 0; l < NumElts; l += 16) { 877 for (unsigned i = 0; i != 16; ++i) { 878 unsigned Idx = ShiftVal + i; 879 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 880 Idx += NumElts - 16; // End of lane, switch operand. 881 Indices[l + i] = Idx + l; 882 } 883 } 884 885 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 886 makeArrayRef(Indices, NumElts), 887 "palignr"); 888 889 return EmitX86Select(Builder, Mask, Align, Passthru); 890 } 891 892 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 893 Value *Ptr, Value *Data, Value *Mask, 894 bool Aligned) { 895 // Cast the pointer to the right type. 896 Ptr = Builder.CreateBitCast(Ptr, 897 llvm::PointerType::getUnqual(Data->getType())); 898 unsigned Align = 899 Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; 900 901 // If the mask is all ones just emit a regular store. 902 if (const auto *C = dyn_cast<Constant>(Mask)) 903 if (C->isAllOnesValue()) 904 return Builder.CreateAlignedStore(Data, Ptr, Align); 905 906 // Convert the mask from an integer type to a vector of i1. 907 unsigned NumElts = Data->getType()->getVectorNumElements(); 908 Mask = getX86MaskVec(Builder, Mask, NumElts); 909 return Builder.CreateMaskedStore(Data, Ptr, Align, Mask); 910 } 911 912 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 913 Value *Ptr, Value *Passthru, Value *Mask, 914 bool Aligned) { 915 // Cast the pointer to the right type. 916 Ptr = Builder.CreateBitCast(Ptr, 917 llvm::PointerType::getUnqual(Passthru->getType())); 918 unsigned Align = 919 Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1; 920 921 // If the mask is all ones just emit a regular store. 922 if (const auto *C = dyn_cast<Constant>(Mask)) 923 if (C->isAllOnesValue()) 924 return Builder.CreateAlignedLoad(Ptr, Align); 925 926 // Convert the mask from an integer type to a vector of i1. 927 unsigned NumElts = Passthru->getType()->getVectorNumElements(); 928 Mask = getX86MaskVec(Builder, Mask, NumElts); 929 return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru); 930 } 931 932 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 933 Value *Op0 = CI.getArgOperand(0); 934 llvm::Type *Ty = Op0->getType(); 935 Value *Zero = llvm::Constant::getNullValue(Ty); 936 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 937 Value *Neg = Builder.CreateNeg(Op0); 938 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 939 940 if (CI.getNumArgOperands() == 3) 941 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 942 943 return Res; 944 } 945 946 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 947 ICmpInst::Predicate Pred) { 948 Value *Op0 = CI.getArgOperand(0); 949 Value *Op1 = CI.getArgOperand(1); 950 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 951 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 952 953 if (CI.getNumArgOperands() == 4) 954 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 955 956 return Res; 957 } 958 959 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 960 Type *Ty = CI.getType(); 961 962 // Arguments have a vXi32 type so cast to vXi64. 963 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 964 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 965 966 if (IsSigned) { 967 // Shift left then arithmetic shift right. 968 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 969 LHS = Builder.CreateShl(LHS, ShiftAmt); 970 LHS = Builder.CreateAShr(LHS, ShiftAmt); 971 RHS = Builder.CreateShl(RHS, ShiftAmt); 972 RHS = Builder.CreateAShr(RHS, ShiftAmt); 973 } else { 974 // Clear the upper bits. 975 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 976 LHS = Builder.CreateAnd(LHS, Mask); 977 RHS = Builder.CreateAnd(RHS, Mask); 978 } 979 980 Value *Res = Builder.CreateMul(LHS, RHS); 981 982 if (CI.getNumArgOperands() == 4) 983 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 984 985 return Res; 986 } 987 988 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 989 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder,Value *Vec, Value *Mask, 990 unsigned NumElts) { 991 if (Mask) { 992 const auto *C = dyn_cast<Constant>(Mask); 993 if (!C || !C->isAllOnesValue()) 994 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 995 } 996 997 if (NumElts < 8) { 998 uint32_t Indices[8]; 999 for (unsigned i = 0; i != NumElts; ++i) 1000 Indices[i] = i; 1001 for (unsigned i = NumElts; i != 8; ++i) 1002 Indices[i] = NumElts + i % NumElts; 1003 Vec = Builder.CreateShuffleVector(Vec, 1004 Constant::getNullValue(Vec->getType()), 1005 Indices); 1006 } 1007 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1008 } 1009 1010 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1011 unsigned CC, bool Signed) { 1012 Value *Op0 = CI.getArgOperand(0); 1013 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1014 1015 Value *Cmp; 1016 if (CC == 3) { 1017 Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1018 } else if (CC == 7) { 1019 Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1020 } else { 1021 ICmpInst::Predicate Pred; 1022 switch (CC) { 1023 default: llvm_unreachable("Unknown condition code"); 1024 case 0: Pred = ICmpInst::ICMP_EQ; break; 1025 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1026 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1027 case 4: Pred = ICmpInst::ICMP_NE; break; 1028 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1029 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1030 } 1031 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1032 } 1033 1034 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1035 1036 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask, NumElts); 1037 } 1038 1039 // Replace a masked intrinsic with an older unmasked intrinsic. 1040 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1041 Intrinsic::ID IID) { 1042 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1043 Value *Rep = Builder.CreateCall(Intrin, 1044 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1045 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1046 } 1047 1048 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1049 Value* A = CI.getArgOperand(0); 1050 Value* B = CI.getArgOperand(1); 1051 Value* Src = CI.getArgOperand(2); 1052 Value* Mask = CI.getArgOperand(3); 1053 1054 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1055 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1056 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1057 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1058 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1059 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1060 } 1061 1062 1063 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1064 Value* Op = CI.getArgOperand(0); 1065 Type* ReturnOp = CI.getType(); 1066 unsigned NumElts = CI.getType()->getVectorNumElements(); 1067 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1068 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1069 } 1070 1071 // Replace intrinsic with unmasked version and a select. 1072 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1073 CallInst &CI, Value *&Rep) { 1074 Name = Name.substr(12); // Remove avx512.mask. 1075 1076 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1077 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1078 Intrinsic::ID IID; 1079 if (Name.startswith("max.p")) { 1080 if (VecWidth == 128 && EltWidth == 32) 1081 IID = Intrinsic::x86_sse_max_ps; 1082 else if (VecWidth == 128 && EltWidth == 64) 1083 IID = Intrinsic::x86_sse2_max_pd; 1084 else if (VecWidth == 256 && EltWidth == 32) 1085 IID = Intrinsic::x86_avx_max_ps_256; 1086 else if (VecWidth == 256 && EltWidth == 64) 1087 IID = Intrinsic::x86_avx_max_pd_256; 1088 else 1089 llvm_unreachable("Unexpected intrinsic"); 1090 } else if (Name.startswith("min.p")) { 1091 if (VecWidth == 128 && EltWidth == 32) 1092 IID = Intrinsic::x86_sse_min_ps; 1093 else if (VecWidth == 128 && EltWidth == 64) 1094 IID = Intrinsic::x86_sse2_min_pd; 1095 else if (VecWidth == 256 && EltWidth == 32) 1096 IID = Intrinsic::x86_avx_min_ps_256; 1097 else if (VecWidth == 256 && EltWidth == 64) 1098 IID = Intrinsic::x86_avx_min_pd_256; 1099 else 1100 llvm_unreachable("Unexpected intrinsic"); 1101 } else if (Name.startswith("pshuf.b.")) { 1102 if (VecWidth == 128) 1103 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1104 else if (VecWidth == 256) 1105 IID = Intrinsic::x86_avx2_pshuf_b; 1106 else if (VecWidth == 512) 1107 IID = Intrinsic::x86_avx512_pshuf_b_512; 1108 else 1109 llvm_unreachable("Unexpected intrinsic"); 1110 } else if (Name.startswith("pmul.hr.sw.")) { 1111 if (VecWidth == 128) 1112 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1113 else if (VecWidth == 256) 1114 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1115 else if (VecWidth == 512) 1116 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1117 else 1118 llvm_unreachable("Unexpected intrinsic"); 1119 } else if (Name.startswith("pmulh.w.")) { 1120 if (VecWidth == 128) 1121 IID = Intrinsic::x86_sse2_pmulh_w; 1122 else if (VecWidth == 256) 1123 IID = Intrinsic::x86_avx2_pmulh_w; 1124 else if (VecWidth == 512) 1125 IID = Intrinsic::x86_avx512_pmulh_w_512; 1126 else 1127 llvm_unreachable("Unexpected intrinsic"); 1128 } else if (Name.startswith("pmulhu.w.")) { 1129 if (VecWidth == 128) 1130 IID = Intrinsic::x86_sse2_pmulhu_w; 1131 else if (VecWidth == 256) 1132 IID = Intrinsic::x86_avx2_pmulhu_w; 1133 else if (VecWidth == 512) 1134 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1135 else 1136 llvm_unreachable("Unexpected intrinsic"); 1137 } else if (Name.startswith("pmaddw.d.")) { 1138 if (VecWidth == 128) 1139 IID = Intrinsic::x86_sse2_pmadd_wd; 1140 else if (VecWidth == 256) 1141 IID = Intrinsic::x86_avx2_pmadd_wd; 1142 else if (VecWidth == 512) 1143 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1144 else 1145 llvm_unreachable("Unexpected intrinsic"); 1146 } else if (Name.startswith("pmaddubs.w.")) { 1147 if (VecWidth == 128) 1148 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1149 else if (VecWidth == 256) 1150 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1151 else if (VecWidth == 512) 1152 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1153 else 1154 llvm_unreachable("Unexpected intrinsic"); 1155 } else if (Name.startswith("packsswb.")) { 1156 if (VecWidth == 128) 1157 IID = Intrinsic::x86_sse2_packsswb_128; 1158 else if (VecWidth == 256) 1159 IID = Intrinsic::x86_avx2_packsswb; 1160 else if (VecWidth == 512) 1161 IID = Intrinsic::x86_avx512_packsswb_512; 1162 else 1163 llvm_unreachable("Unexpected intrinsic"); 1164 } else if (Name.startswith("packssdw.")) { 1165 if (VecWidth == 128) 1166 IID = Intrinsic::x86_sse2_packssdw_128; 1167 else if (VecWidth == 256) 1168 IID = Intrinsic::x86_avx2_packssdw; 1169 else if (VecWidth == 512) 1170 IID = Intrinsic::x86_avx512_packssdw_512; 1171 else 1172 llvm_unreachable("Unexpected intrinsic"); 1173 } else if (Name.startswith("packuswb.")) { 1174 if (VecWidth == 128) 1175 IID = Intrinsic::x86_sse2_packuswb_128; 1176 else if (VecWidth == 256) 1177 IID = Intrinsic::x86_avx2_packuswb; 1178 else if (VecWidth == 512) 1179 IID = Intrinsic::x86_avx512_packuswb_512; 1180 else 1181 llvm_unreachable("Unexpected intrinsic"); 1182 } else if (Name.startswith("packusdw.")) { 1183 if (VecWidth == 128) 1184 IID = Intrinsic::x86_sse41_packusdw; 1185 else if (VecWidth == 256) 1186 IID = Intrinsic::x86_avx2_packusdw; 1187 else if (VecWidth == 512) 1188 IID = Intrinsic::x86_avx512_packusdw_512; 1189 else 1190 llvm_unreachable("Unexpected intrinsic"); 1191 } else if (Name.startswith("vpermilvar.")) { 1192 if (VecWidth == 128 && EltWidth == 32) 1193 IID = Intrinsic::x86_avx_vpermilvar_ps; 1194 else if (VecWidth == 128 && EltWidth == 64) 1195 IID = Intrinsic::x86_avx_vpermilvar_pd; 1196 else if (VecWidth == 256 && EltWidth == 32) 1197 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1198 else if (VecWidth == 256 && EltWidth == 64) 1199 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1200 else if (VecWidth == 512 && EltWidth == 32) 1201 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1202 else if (VecWidth == 512 && EltWidth == 64) 1203 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1204 else 1205 llvm_unreachable("Unexpected intrinsic"); 1206 } else if (Name == "cvtpd2dq.256") { 1207 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1208 } else if (Name == "cvtpd2ps.256") { 1209 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1210 } else if (Name == "cvttpd2dq.256") { 1211 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1212 } else if (Name == "cvttps2dq.128") { 1213 IID = Intrinsic::x86_sse2_cvttps2dq; 1214 } else if (Name == "cvttps2dq.256") { 1215 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1216 } else if (Name.startswith("permvar.")) { 1217 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1218 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1219 IID = Intrinsic::x86_avx2_permps; 1220 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1221 IID = Intrinsic::x86_avx2_permd; 1222 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1223 IID = Intrinsic::x86_avx512_permvar_df_256; 1224 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1225 IID = Intrinsic::x86_avx512_permvar_di_256; 1226 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1227 IID = Intrinsic::x86_avx512_permvar_sf_512; 1228 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1229 IID = Intrinsic::x86_avx512_permvar_si_512; 1230 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1231 IID = Intrinsic::x86_avx512_permvar_df_512; 1232 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1233 IID = Intrinsic::x86_avx512_permvar_di_512; 1234 else if (VecWidth == 128 && EltWidth == 16) 1235 IID = Intrinsic::x86_avx512_permvar_hi_128; 1236 else if (VecWidth == 256 && EltWidth == 16) 1237 IID = Intrinsic::x86_avx512_permvar_hi_256; 1238 else if (VecWidth == 512 && EltWidth == 16) 1239 IID = Intrinsic::x86_avx512_permvar_hi_512; 1240 else if (VecWidth == 128 && EltWidth == 8) 1241 IID = Intrinsic::x86_avx512_permvar_qi_128; 1242 else if (VecWidth == 256 && EltWidth == 8) 1243 IID = Intrinsic::x86_avx512_permvar_qi_256; 1244 else if (VecWidth == 512 && EltWidth == 8) 1245 IID = Intrinsic::x86_avx512_permvar_qi_512; 1246 else 1247 llvm_unreachable("Unexpected intrinsic"); 1248 } else 1249 return false; 1250 1251 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1252 CI.arg_operands().end()); 1253 Args.pop_back(); 1254 Args.pop_back(); 1255 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1256 Args); 1257 unsigned NumArgs = CI.getNumArgOperands(); 1258 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1259 CI.getArgOperand(NumArgs - 2)); 1260 return true; 1261 } 1262 1263 /// Upgrade comment in call to inline asm that represents an objc retain release 1264 /// marker. 1265 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1266 size_t Pos; 1267 if (AsmStr->find("mov\tfp") == 0 && 1268 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1269 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1270 AsmStr->replace(Pos, 1, ";"); 1271 } 1272 return; 1273 } 1274 1275 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1276 /// provided to seamlessly integrate with existing context. 1277 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1278 Function *F = CI->getCalledFunction(); 1279 LLVMContext &C = CI->getContext(); 1280 IRBuilder<> Builder(C); 1281 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1282 1283 assert(F && "Intrinsic call is not direct?"); 1284 1285 if (!NewFn) { 1286 // Get the Function's name. 1287 StringRef Name = F->getName(); 1288 1289 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1290 Name = Name.substr(5); 1291 1292 bool IsX86 = Name.startswith("x86."); 1293 if (IsX86) 1294 Name = Name.substr(4); 1295 bool IsNVVM = Name.startswith("nvvm."); 1296 if (IsNVVM) 1297 Name = Name.substr(5); 1298 1299 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1300 Module *M = F->getParent(); 1301 SmallVector<Metadata *, 1> Elts; 1302 Elts.push_back( 1303 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1304 MDNode *Node = MDNode::get(C, Elts); 1305 1306 Value *Arg0 = CI->getArgOperand(0); 1307 Value *Arg1 = CI->getArgOperand(1); 1308 1309 // Nontemporal (unaligned) store of the 0'th element of the float/double 1310 // vector. 1311 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1312 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1313 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1314 Value *Extract = 1315 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1316 1317 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1); 1318 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1319 1320 // Remove intrinsic. 1321 CI->eraseFromParent(); 1322 return; 1323 } 1324 1325 if (IsX86 && (Name.startswith("avx.movnt.") || 1326 Name.startswith("avx512.storent."))) { 1327 Module *M = F->getParent(); 1328 SmallVector<Metadata *, 1> Elts; 1329 Elts.push_back( 1330 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1331 MDNode *Node = MDNode::get(C, Elts); 1332 1333 Value *Arg0 = CI->getArgOperand(0); 1334 Value *Arg1 = CI->getArgOperand(1); 1335 1336 // Convert the type of the pointer to a pointer to the stored type. 1337 Value *BC = Builder.CreateBitCast(Arg0, 1338 PointerType::getUnqual(Arg1->getType()), 1339 "cast"); 1340 VectorType *VTy = cast<VectorType>(Arg1->getType()); 1341 StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC, 1342 VTy->getBitWidth() / 8); 1343 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1344 1345 // Remove intrinsic. 1346 CI->eraseFromParent(); 1347 return; 1348 } 1349 1350 if (IsX86 && Name == "sse2.storel.dq") { 1351 Value *Arg0 = CI->getArgOperand(0); 1352 Value *Arg1 = CI->getArgOperand(1); 1353 1354 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 1355 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1356 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1357 Value *BC = Builder.CreateBitCast(Arg0, 1358 PointerType::getUnqual(Elt->getType()), 1359 "cast"); 1360 Builder.CreateAlignedStore(Elt, BC, 1); 1361 1362 // Remove intrinsic. 1363 CI->eraseFromParent(); 1364 return; 1365 } 1366 1367 if (IsX86 && (Name.startswith("sse.storeu.") || 1368 Name.startswith("sse2.storeu.") || 1369 Name.startswith("avx.storeu."))) { 1370 Value *Arg0 = CI->getArgOperand(0); 1371 Value *Arg1 = CI->getArgOperand(1); 1372 1373 Arg0 = Builder.CreateBitCast(Arg0, 1374 PointerType::getUnqual(Arg1->getType()), 1375 "cast"); 1376 Builder.CreateAlignedStore(Arg1, Arg0, 1); 1377 1378 // Remove intrinsic. 1379 CI->eraseFromParent(); 1380 return; 1381 } 1382 1383 if (IsX86 && Name == "avx512.mask.store.ss") { 1384 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1385 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1386 Mask, false); 1387 1388 // Remove intrinsic. 1389 CI->eraseFromParent(); 1390 return; 1391 } 1392 1393 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1394 // "avx512.mask.storeu." or "avx512.mask.store." 1395 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1396 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1397 CI->getArgOperand(2), Aligned); 1398 1399 // Remove intrinsic. 1400 CI->eraseFromParent(); 1401 return; 1402 } 1403 1404 Value *Rep; 1405 // Upgrade packed integer vector compare intrinsics to compare instructions. 1406 if (IsX86 && (Name.startswith("sse2.pcmp") || 1407 Name.startswith("avx2.pcmp"))) { 1408 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1409 bool CmpEq = Name[9] == 'e'; 1410 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1411 CI->getArgOperand(0), CI->getArgOperand(1)); 1412 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1413 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1414 Type *ExtTy = Type::getInt32Ty(C); 1415 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1416 ExtTy = Type::getInt64Ty(C); 1417 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1418 ExtTy->getPrimitiveSizeInBits(); 1419 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1420 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1421 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1422 Name.startswith("avx512.ptestnm"))) { 1423 Value *Op0 = CI->getArgOperand(0); 1424 Value *Op1 = CI->getArgOperand(1); 1425 Value *Mask = CI->getArgOperand(2); 1426 Rep = Builder.CreateAnd(Op0, Op1); 1427 llvm::Type *Ty = Op0->getType(); 1428 Value *Zero = llvm::Constant::getNullValue(Ty); 1429 ICmpInst::Predicate Pred = 1430 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1431 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1432 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1433 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask, NumElts); 1434 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1435 unsigned NumElts = 1436 CI->getArgOperand(1)->getType()->getVectorNumElements(); 1437 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1438 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1439 CI->getArgOperand(1)); 1440 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1441 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1442 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1443 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1444 uint32_t Indices[64]; 1445 for (unsigned i = 0; i != NumElts; ++i) 1446 Indices[i] = i; 1447 1448 // First extract half of each vector. This gives better codegen than 1449 // doing it in a single shuffle. 1450 LHS = Builder.CreateShuffleVector(LHS, LHS, 1451 makeArrayRef(Indices, NumElts / 2)); 1452 RHS = Builder.CreateShuffleVector(RHS, RHS, 1453 makeArrayRef(Indices, NumElts / 2)); 1454 // Concat the vectors. 1455 // NOTE: Operands have to be swapped to match intrinsic definition. 1456 Rep = Builder.CreateShuffleVector(RHS, LHS, 1457 makeArrayRef(Indices, NumElts)); 1458 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1459 } else if (IsX86 && Name == "avx512.kand.w") { 1460 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1461 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1462 Rep = Builder.CreateAnd(LHS, RHS); 1463 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1464 } else if (IsX86 && Name == "avx512.kandn.w") { 1465 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1466 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1467 LHS = Builder.CreateNot(LHS); 1468 Rep = Builder.CreateAnd(LHS, RHS); 1469 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1470 } else if (IsX86 && Name == "avx512.kor.w") { 1471 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1472 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1473 Rep = Builder.CreateOr(LHS, RHS); 1474 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1475 } else if (IsX86 && Name == "avx512.kxor.w") { 1476 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1477 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1478 Rep = Builder.CreateXor(LHS, RHS); 1479 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1480 } else if (IsX86 && Name == "avx512.kxnor.w") { 1481 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1482 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1483 LHS = Builder.CreateNot(LHS); 1484 Rep = Builder.CreateXor(LHS, RHS); 1485 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1486 } else if (IsX86 && Name == "avx512.knot.w") { 1487 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1488 Rep = Builder.CreateNot(Rep); 1489 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1490 } else if (IsX86 && 1491 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1492 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1493 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1494 Rep = Builder.CreateOr(LHS, RHS); 1495 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1496 Value *C; 1497 if (Name[14] == 'c') 1498 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1499 else 1500 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1501 Rep = Builder.CreateICmpEQ(Rep, C); 1502 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1503 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd")) { 1504 Type *I32Ty = Type::getInt32Ty(C); 1505 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1506 ConstantInt::get(I32Ty, 0)); 1507 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1508 ConstantInt::get(I32Ty, 0)); 1509 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1510 Builder.CreateFAdd(Elt0, Elt1), 1511 ConstantInt::get(I32Ty, 0)); 1512 } else if (IsX86 && (Name == "sse.sub.ss" || Name == "sse2.sub.sd")) { 1513 Type *I32Ty = Type::getInt32Ty(C); 1514 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1515 ConstantInt::get(I32Ty, 0)); 1516 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1517 ConstantInt::get(I32Ty, 0)); 1518 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1519 Builder.CreateFSub(Elt0, Elt1), 1520 ConstantInt::get(I32Ty, 0)); 1521 } else if (IsX86 && (Name == "sse.mul.ss" || Name == "sse2.mul.sd")) { 1522 Type *I32Ty = Type::getInt32Ty(C); 1523 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1524 ConstantInt::get(I32Ty, 0)); 1525 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1526 ConstantInt::get(I32Ty, 0)); 1527 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1528 Builder.CreateFMul(Elt0, Elt1), 1529 ConstantInt::get(I32Ty, 0)); 1530 } else if (IsX86 && (Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1531 Type *I32Ty = Type::getInt32Ty(C); 1532 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1533 ConstantInt::get(I32Ty, 0)); 1534 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1535 ConstantInt::get(I32Ty, 0)); 1536 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1537 Builder.CreateFDiv(Elt0, Elt1), 1538 ConstantInt::get(I32Ty, 0)); 1539 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1540 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1541 bool CmpEq = Name[16] == 'e'; 1542 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1543 } else if (IsX86 && Name.startswith("avx512.mask.cmp")) { 1544 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1545 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 1546 } else if (IsX86 && Name.startswith("avx512.mask.ucmp")) { 1547 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1548 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 1549 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 1550 Name.startswith("avx512.cvtw2mask.") || 1551 Name.startswith("avx512.cvtd2mask.") || 1552 Name.startswith("avx512.cvtq2mask."))) { 1553 Value *Op = CI->getArgOperand(0); 1554 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 1555 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 1556 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr, 1557 Op->getType()->getVectorNumElements()); 1558 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 1559 Name == "ssse3.pabs.w.128" || 1560 Name == "ssse3.pabs.d.128" || 1561 Name.startswith("avx2.pabs") || 1562 Name.startswith("avx512.mask.pabs"))) { 1563 Rep = upgradeAbs(Builder, *CI); 1564 } else if (IsX86 && (Name == "sse41.pmaxsb" || 1565 Name == "sse2.pmaxs.w" || 1566 Name == "sse41.pmaxsd" || 1567 Name.startswith("avx2.pmaxs") || 1568 Name.startswith("avx512.mask.pmaxs"))) { 1569 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 1570 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 1571 Name == "sse41.pmaxuw" || 1572 Name == "sse41.pmaxud" || 1573 Name.startswith("avx2.pmaxu") || 1574 Name.startswith("avx512.mask.pmaxu"))) { 1575 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 1576 } else if (IsX86 && (Name == "sse41.pminsb" || 1577 Name == "sse2.pmins.w" || 1578 Name == "sse41.pminsd" || 1579 Name.startswith("avx2.pmins") || 1580 Name.startswith("avx512.mask.pmins"))) { 1581 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 1582 } else if (IsX86 && (Name == "sse2.pminu.b" || 1583 Name == "sse41.pminuw" || 1584 Name == "sse41.pminud" || 1585 Name.startswith("avx2.pminu") || 1586 Name.startswith("avx512.mask.pminu"))) { 1587 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 1588 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 1589 Name == "avx2.pmulu.dq" || 1590 Name == "avx512.pmulu.dq.512" || 1591 Name.startswith("avx512.mask.pmulu.dq."))) { 1592 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 1593 } else if (IsX86 && (Name == "sse41.pmuldq" || 1594 Name == "avx2.pmul.dq" || 1595 Name == "avx512.pmul.dq.512" || 1596 Name.startswith("avx512.mask.pmul.dq."))) { 1597 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 1598 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 1599 Name == "sse2.cvtsi2sd" || 1600 Name == "sse.cvtsi642ss" || 1601 Name == "sse2.cvtsi642sd")) { 1602 Rep = Builder.CreateSIToFP(CI->getArgOperand(1), 1603 CI->getType()->getVectorElementType()); 1604 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1605 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 1606 Rep = Builder.CreateUIToFP(CI->getArgOperand(1), 1607 CI->getType()->getVectorElementType()); 1608 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1609 } else if (IsX86 && Name == "sse2.cvtss2sd") { 1610 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 1611 Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType()); 1612 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1613 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 1614 Name == "sse2.cvtdq2ps" || 1615 Name == "avx.cvtdq2.pd.256" || 1616 Name == "avx.cvtdq2.ps.256" || 1617 Name.startswith("avx512.mask.cvtdq2pd.") || 1618 Name.startswith("avx512.mask.cvtudq2pd.") || 1619 Name == "avx512.mask.cvtdq2ps.128" || 1620 Name == "avx512.mask.cvtdq2ps.256" || 1621 Name == "avx512.mask.cvtudq2ps.128" || 1622 Name == "avx512.mask.cvtudq2ps.256" || 1623 Name == "avx512.mask.cvtqq2pd.128" || 1624 Name == "avx512.mask.cvtqq2pd.256" || 1625 Name == "avx512.mask.cvtuqq2pd.128" || 1626 Name == "avx512.mask.cvtuqq2pd.256" || 1627 Name == "sse2.cvtps2pd" || 1628 Name == "avx.cvt.ps2.pd.256" || 1629 Name == "avx512.mask.cvtps2pd.128" || 1630 Name == "avx512.mask.cvtps2pd.256")) { 1631 Type *DstTy = CI->getType(); 1632 Rep = CI->getArgOperand(0); 1633 1634 unsigned NumDstElts = DstTy->getVectorNumElements(); 1635 if (NumDstElts < Rep->getType()->getVectorNumElements()) { 1636 assert(NumDstElts == 2 && "Unexpected vector size"); 1637 uint32_t ShuffleMask[2] = { 0, 1 }; 1638 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 1639 } 1640 1641 bool IsPS2PD = (StringRef::npos != Name.find("ps2")); 1642 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 1643 if (IsPS2PD) 1644 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 1645 else if (IsUnsigned) 1646 Rep = Builder.CreateUIToFP(Rep, DstTy, "cvt"); 1647 else 1648 Rep = Builder.CreateSIToFP(Rep, DstTy, "cvt"); 1649 1650 if (CI->getNumArgOperands() == 3) 1651 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1652 CI->getArgOperand(1)); 1653 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 1654 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 1655 CI->getArgOperand(1), CI->getArgOperand(2), 1656 /*Aligned*/false); 1657 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 1658 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 1659 CI->getArgOperand(1),CI->getArgOperand(2), 1660 /*Aligned*/true); 1661 } else if (IsX86 && Name.startswith("xop.vpcom")) { 1662 Intrinsic::ID intID; 1663 if (Name.endswith("ub")) 1664 intID = Intrinsic::x86_xop_vpcomub; 1665 else if (Name.endswith("uw")) 1666 intID = Intrinsic::x86_xop_vpcomuw; 1667 else if (Name.endswith("ud")) 1668 intID = Intrinsic::x86_xop_vpcomud; 1669 else if (Name.endswith("uq")) 1670 intID = Intrinsic::x86_xop_vpcomuq; 1671 else if (Name.endswith("b")) 1672 intID = Intrinsic::x86_xop_vpcomb; 1673 else if (Name.endswith("w")) 1674 intID = Intrinsic::x86_xop_vpcomw; 1675 else if (Name.endswith("d")) 1676 intID = Intrinsic::x86_xop_vpcomd; 1677 else if (Name.endswith("q")) 1678 intID = Intrinsic::x86_xop_vpcomq; 1679 else 1680 llvm_unreachable("Unknown suffix"); 1681 1682 Name = Name.substr(9); // strip off "xop.vpcom" 1683 unsigned Imm; 1684 if (Name.startswith("lt")) 1685 Imm = 0; 1686 else if (Name.startswith("le")) 1687 Imm = 1; 1688 else if (Name.startswith("gt")) 1689 Imm = 2; 1690 else if (Name.startswith("ge")) 1691 Imm = 3; 1692 else if (Name.startswith("eq")) 1693 Imm = 4; 1694 else if (Name.startswith("ne")) 1695 Imm = 5; 1696 else if (Name.startswith("false")) 1697 Imm = 6; 1698 else if (Name.startswith("true")) 1699 Imm = 7; 1700 else 1701 llvm_unreachable("Unknown condition"); 1702 1703 Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID); 1704 Rep = 1705 Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1), 1706 Builder.getInt8(Imm)}); 1707 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 1708 Value *Sel = CI->getArgOperand(2); 1709 Value *NotSel = Builder.CreateNot(Sel); 1710 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 1711 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 1712 Rep = Builder.CreateOr(Sel0, Sel1); 1713 } else if (IsX86 && Name == "sse42.crc32.64.8") { 1714 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 1715 Intrinsic::x86_sse42_crc32_32_8); 1716 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 1717 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 1718 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 1719 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 1720 Name.startswith("avx512.vbroadcast.s"))) { 1721 // Replace broadcasts with a series of insertelements. 1722 Type *VecTy = CI->getType(); 1723 Type *EltTy = VecTy->getVectorElementType(); 1724 unsigned EltNum = VecTy->getVectorNumElements(); 1725 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 1726 EltTy->getPointerTo()); 1727 Value *Load = Builder.CreateLoad(EltTy, Cast); 1728 Type *I32Ty = Type::getInt32Ty(C); 1729 Rep = UndefValue::get(VecTy); 1730 for (unsigned I = 0; I < EltNum; ++I) 1731 Rep = Builder.CreateInsertElement(Rep, Load, 1732 ConstantInt::get(I32Ty, I)); 1733 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 1734 Name.startswith("sse41.pmovzx") || 1735 Name.startswith("avx2.pmovsx") || 1736 Name.startswith("avx2.pmovzx") || 1737 Name.startswith("avx512.mask.pmovsx") || 1738 Name.startswith("avx512.mask.pmovzx"))) { 1739 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 1740 VectorType *DstTy = cast<VectorType>(CI->getType()); 1741 unsigned NumDstElts = DstTy->getNumElements(); 1742 1743 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 1744 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 1745 for (unsigned i = 0; i != NumDstElts; ++i) 1746 ShuffleMask[i] = i; 1747 1748 Value *SV = Builder.CreateShuffleVector( 1749 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 1750 1751 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 1752 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 1753 : Builder.CreateZExt(SV, DstTy); 1754 // If there are 3 arguments, it's a masked intrinsic so we need a select. 1755 if (CI->getNumArgOperands() == 3) 1756 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1757 CI->getArgOperand(1)); 1758 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 1759 Name == "avx2.vbroadcasti128")) { 1760 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 1761 Type *EltTy = CI->getType()->getVectorElementType(); 1762 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 1763 Type *VT = VectorType::get(EltTy, NumSrcElts); 1764 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 1765 PointerType::getUnqual(VT)); 1766 Value *Load = Builder.CreateAlignedLoad(Op, 1); 1767 if (NumSrcElts == 2) 1768 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 1769 { 0, 1, 0, 1 }); 1770 else 1771 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 1772 { 0, 1, 2, 3, 0, 1, 2, 3 }); 1773 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 1774 Name.startswith("avx512.mask.shuf.f"))) { 1775 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1776 Type *VT = CI->getType(); 1777 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 1778 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 1779 unsigned ControlBitsMask = NumLanes - 1; 1780 unsigned NumControlBits = NumLanes / 2; 1781 SmallVector<uint32_t, 8> ShuffleMask(0); 1782 1783 for (unsigned l = 0; l != NumLanes; ++l) { 1784 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 1785 // We actually need the other source. 1786 if (l >= NumLanes / 2) 1787 LaneMask += NumLanes; 1788 for (unsigned i = 0; i != NumElementsInLane; ++i) 1789 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 1790 } 1791 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 1792 CI->getArgOperand(1), ShuffleMask); 1793 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 1794 CI->getArgOperand(3)); 1795 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 1796 Name.startswith("avx512.mask.broadcasti"))) { 1797 unsigned NumSrcElts = 1798 CI->getArgOperand(0)->getType()->getVectorNumElements(); 1799 unsigned NumDstElts = CI->getType()->getVectorNumElements(); 1800 1801 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 1802 for (unsigned i = 0; i != NumDstElts; ++i) 1803 ShuffleMask[i] = i % NumSrcElts; 1804 1805 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 1806 CI->getArgOperand(0), 1807 ShuffleMask); 1808 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1809 CI->getArgOperand(1)); 1810 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 1811 Name.startswith("avx2.vbroadcast") || 1812 Name.startswith("avx512.pbroadcast") || 1813 Name.startswith("avx512.mask.broadcast.s"))) { 1814 // Replace vp?broadcasts with a vector shuffle. 1815 Value *Op = CI->getArgOperand(0); 1816 unsigned NumElts = CI->getType()->getVectorNumElements(); 1817 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); 1818 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 1819 Constant::getNullValue(MaskTy)); 1820 1821 if (CI->getNumArgOperands() == 3) 1822 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1823 CI->getArgOperand(1)); 1824 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 1825 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 1826 CI->getArgOperand(1), 1827 CI->getArgOperand(2), 1828 CI->getArgOperand(3), 1829 CI->getArgOperand(4), 1830 false); 1831 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 1832 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 1833 CI->getArgOperand(1), 1834 CI->getArgOperand(2), 1835 CI->getArgOperand(3), 1836 CI->getArgOperand(4), 1837 true); 1838 } else if (IsX86 && (Name == "sse2.psll.dq" || 1839 Name == "avx2.psll.dq")) { 1840 // 128/256-bit shift left specified in bits. 1841 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1842 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 1843 Shift / 8); // Shift is in bits. 1844 } else if (IsX86 && (Name == "sse2.psrl.dq" || 1845 Name == "avx2.psrl.dq")) { 1846 // 128/256-bit shift right specified in bits. 1847 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1848 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 1849 Shift / 8); // Shift is in bits. 1850 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 1851 Name == "avx2.psll.dq.bs" || 1852 Name == "avx512.psll.dq.512")) { 1853 // 128/256/512-bit shift left specified in bytes. 1854 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1855 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 1856 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 1857 Name == "avx2.psrl.dq.bs" || 1858 Name == "avx512.psrl.dq.512")) { 1859 // 128/256/512-bit shift right specified in bytes. 1860 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1861 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 1862 } else if (IsX86 && (Name == "sse41.pblendw" || 1863 Name.startswith("sse41.blendp") || 1864 Name.startswith("avx.blend.p") || 1865 Name == "avx2.pblendw" || 1866 Name.startswith("avx2.pblendd."))) { 1867 Value *Op0 = CI->getArgOperand(0); 1868 Value *Op1 = CI->getArgOperand(1); 1869 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1870 VectorType *VecTy = cast<VectorType>(CI->getType()); 1871 unsigned NumElts = VecTy->getNumElements(); 1872 1873 SmallVector<uint32_t, 16> Idxs(NumElts); 1874 for (unsigned i = 0; i != NumElts; ++i) 1875 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 1876 1877 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 1878 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 1879 Name == "avx2.vinserti128" || 1880 Name.startswith("avx512.mask.insert"))) { 1881 Value *Op0 = CI->getArgOperand(0); 1882 Value *Op1 = CI->getArgOperand(1); 1883 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1884 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 1885 unsigned SrcNumElts = Op1->getType()->getVectorNumElements(); 1886 unsigned Scale = DstNumElts / SrcNumElts; 1887 1888 // Mask off the high bits of the immediate value; hardware ignores those. 1889 Imm = Imm % Scale; 1890 1891 // Extend the second operand into a vector the size of the destination. 1892 Value *UndefV = UndefValue::get(Op1->getType()); 1893 SmallVector<uint32_t, 8> Idxs(DstNumElts); 1894 for (unsigned i = 0; i != SrcNumElts; ++i) 1895 Idxs[i] = i; 1896 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 1897 Idxs[i] = SrcNumElts; 1898 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 1899 1900 // Insert the second operand into the first operand. 1901 1902 // Note that there is no guarantee that instruction lowering will actually 1903 // produce a vinsertf128 instruction for the created shuffles. In 1904 // particular, the 0 immediate case involves no lane changes, so it can 1905 // be handled as a blend. 1906 1907 // Example of shuffle mask for 32-bit elements: 1908 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 1909 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 1910 1911 // First fill with identify mask. 1912 for (unsigned i = 0; i != DstNumElts; ++i) 1913 Idxs[i] = i; 1914 // Then replace the elements where we need to insert. 1915 for (unsigned i = 0; i != SrcNumElts; ++i) 1916 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 1917 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 1918 1919 // If the intrinsic has a mask operand, handle that. 1920 if (CI->getNumArgOperands() == 5) 1921 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 1922 CI->getArgOperand(3)); 1923 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 1924 Name == "avx2.vextracti128" || 1925 Name.startswith("avx512.mask.vextract"))) { 1926 Value *Op0 = CI->getArgOperand(0); 1927 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1928 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 1929 unsigned SrcNumElts = Op0->getType()->getVectorNumElements(); 1930 unsigned Scale = SrcNumElts / DstNumElts; 1931 1932 // Mask off the high bits of the immediate value; hardware ignores those. 1933 Imm = Imm % Scale; 1934 1935 // Get indexes for the subvector of the input vector. 1936 SmallVector<uint32_t, 8> Idxs(DstNumElts); 1937 for (unsigned i = 0; i != DstNumElts; ++i) { 1938 Idxs[i] = i + (Imm * DstNumElts); 1939 } 1940 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 1941 1942 // If the intrinsic has a mask operand, handle that. 1943 if (CI->getNumArgOperands() == 4) 1944 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 1945 CI->getArgOperand(2)); 1946 } else if (!IsX86 && Name == "stackprotectorcheck") { 1947 Rep = nullptr; 1948 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 1949 Name.startswith("avx512.mask.perm.di."))) { 1950 Value *Op0 = CI->getArgOperand(0); 1951 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1952 VectorType *VecTy = cast<VectorType>(CI->getType()); 1953 unsigned NumElts = VecTy->getNumElements(); 1954 1955 SmallVector<uint32_t, 8> Idxs(NumElts); 1956 for (unsigned i = 0; i != NumElts; ++i) 1957 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 1958 1959 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 1960 1961 if (CI->getNumArgOperands() == 4) 1962 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 1963 CI->getArgOperand(2)); 1964 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 1965 Name == "avx2.vperm2i128")) { 1966 // The immediate permute control byte looks like this: 1967 // [1:0] - select 128 bits from sources for low half of destination 1968 // [2] - ignore 1969 // [3] - zero low half of destination 1970 // [5:4] - select 128 bits from sources for high half of destination 1971 // [6] - ignore 1972 // [7] - zero high half of destination 1973 1974 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1975 1976 unsigned NumElts = CI->getType()->getVectorNumElements(); 1977 unsigned HalfSize = NumElts / 2; 1978 SmallVector<uint32_t, 8> ShuffleMask(NumElts); 1979 1980 // Determine which operand(s) are actually in use for this instruction. 1981 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 1982 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 1983 1984 // If needed, replace operands based on zero mask. 1985 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 1986 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 1987 1988 // Permute low half of result. 1989 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 1990 for (unsigned i = 0; i < HalfSize; ++i) 1991 ShuffleMask[i] = StartIndex + i; 1992 1993 // Permute high half of result. 1994 StartIndex = (Imm & 0x10) ? HalfSize : 0; 1995 for (unsigned i = 0; i < HalfSize; ++i) 1996 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 1997 1998 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 1999 2000 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2001 Name == "sse2.pshuf.d" || 2002 Name.startswith("avx512.mask.vpermil.p") || 2003 Name.startswith("avx512.mask.pshuf.d."))) { 2004 Value *Op0 = CI->getArgOperand(0); 2005 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2006 VectorType *VecTy = cast<VectorType>(CI->getType()); 2007 unsigned NumElts = VecTy->getNumElements(); 2008 // Calculate the size of each index in the immediate. 2009 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2010 unsigned IdxMask = ((1 << IdxSize) - 1); 2011 2012 SmallVector<uint32_t, 8> Idxs(NumElts); 2013 // Lookup the bits for this element, wrapping around the immediate every 2014 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2015 // to offset by the first index of each group. 2016 for (unsigned i = 0; i != NumElts; ++i) 2017 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2018 2019 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2020 2021 if (CI->getNumArgOperands() == 4) 2022 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2023 CI->getArgOperand(2)); 2024 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2025 Name.startswith("avx512.mask.pshufl.w."))) { 2026 Value *Op0 = CI->getArgOperand(0); 2027 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2028 unsigned NumElts = CI->getType()->getVectorNumElements(); 2029 2030 SmallVector<uint32_t, 16> Idxs(NumElts); 2031 for (unsigned l = 0; l != NumElts; l += 8) { 2032 for (unsigned i = 0; i != 4; ++i) 2033 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2034 for (unsigned i = 4; i != 8; ++i) 2035 Idxs[i + l] = i + l; 2036 } 2037 2038 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2039 2040 if (CI->getNumArgOperands() == 4) 2041 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2042 CI->getArgOperand(2)); 2043 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2044 Name.startswith("avx512.mask.pshufh.w."))) { 2045 Value *Op0 = CI->getArgOperand(0); 2046 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2047 unsigned NumElts = CI->getType()->getVectorNumElements(); 2048 2049 SmallVector<uint32_t, 16> Idxs(NumElts); 2050 for (unsigned l = 0; l != NumElts; l += 8) { 2051 for (unsigned i = 0; i != 4; ++i) 2052 Idxs[i + l] = i + l; 2053 for (unsigned i = 0; i != 4; ++i) 2054 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2055 } 2056 2057 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2058 2059 if (CI->getNumArgOperands() == 4) 2060 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2061 CI->getArgOperand(2)); 2062 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2063 Value *Op0 = CI->getArgOperand(0); 2064 Value *Op1 = CI->getArgOperand(1); 2065 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2066 unsigned NumElts = CI->getType()->getVectorNumElements(); 2067 2068 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2069 unsigned HalfLaneElts = NumLaneElts / 2; 2070 2071 SmallVector<uint32_t, 16> Idxs(NumElts); 2072 for (unsigned i = 0; i != NumElts; ++i) { 2073 // Base index is the starting element of the lane. 2074 Idxs[i] = i - (i % NumLaneElts); 2075 // If we are half way through the lane switch to the other source. 2076 if ((i % NumLaneElts) >= HalfLaneElts) 2077 Idxs[i] += NumElts; 2078 // Now select the specific element. By adding HalfLaneElts bits from 2079 // the immediate. Wrapping around the immediate every 8-bits. 2080 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2081 } 2082 2083 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2084 2085 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2086 CI->getArgOperand(3)); 2087 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2088 Name.startswith("avx512.mask.movshdup") || 2089 Name.startswith("avx512.mask.movsldup"))) { 2090 Value *Op0 = CI->getArgOperand(0); 2091 unsigned NumElts = CI->getType()->getVectorNumElements(); 2092 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2093 2094 unsigned Offset = 0; 2095 if (Name.startswith("avx512.mask.movshdup.")) 2096 Offset = 1; 2097 2098 SmallVector<uint32_t, 16> Idxs(NumElts); 2099 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2100 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2101 Idxs[i + l + 0] = i + l + Offset; 2102 Idxs[i + l + 1] = i + l + Offset; 2103 } 2104 2105 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2106 2107 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2108 CI->getArgOperand(1)); 2109 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2110 Name.startswith("avx512.mask.unpckl."))) { 2111 Value *Op0 = CI->getArgOperand(0); 2112 Value *Op1 = CI->getArgOperand(1); 2113 int NumElts = CI->getType()->getVectorNumElements(); 2114 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2115 2116 SmallVector<uint32_t, 64> Idxs(NumElts); 2117 for (int l = 0; l != NumElts; l += NumLaneElts) 2118 for (int i = 0; i != NumLaneElts; ++i) 2119 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2120 2121 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2122 2123 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2124 CI->getArgOperand(2)); 2125 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2126 Name.startswith("avx512.mask.unpckh."))) { 2127 Value *Op0 = CI->getArgOperand(0); 2128 Value *Op1 = CI->getArgOperand(1); 2129 int NumElts = CI->getType()->getVectorNumElements(); 2130 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2131 2132 SmallVector<uint32_t, 64> Idxs(NumElts); 2133 for (int l = 0; l != NumElts; l += NumLaneElts) 2134 for (int i = 0; i != NumLaneElts; ++i) 2135 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2136 2137 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2138 2139 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2140 CI->getArgOperand(2)); 2141 } else if (IsX86 && Name.startswith("avx512.mask.pand.")) { 2142 Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1)); 2143 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2144 CI->getArgOperand(2)); 2145 } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) { 2146 Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)), 2147 CI->getArgOperand(1)); 2148 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2149 CI->getArgOperand(2)); 2150 } else if (IsX86 && Name.startswith("avx512.mask.por.")) { 2151 Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1)); 2152 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2153 CI->getArgOperand(2)); 2154 } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) { 2155 Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1)); 2156 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2157 CI->getArgOperand(2)); 2158 } else if (IsX86 && Name.startswith("avx512.mask.and.")) { 2159 VectorType *FTy = cast<VectorType>(CI->getType()); 2160 VectorType *ITy = VectorType::getInteger(FTy); 2161 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2162 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2163 Rep = Builder.CreateBitCast(Rep, FTy); 2164 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2165 CI->getArgOperand(2)); 2166 } else if (IsX86 && Name.startswith("avx512.mask.andn.")) { 2167 VectorType *FTy = cast<VectorType>(CI->getType()); 2168 VectorType *ITy = VectorType::getInteger(FTy); 2169 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2170 Rep = Builder.CreateAnd(Rep, 2171 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2172 Rep = Builder.CreateBitCast(Rep, FTy); 2173 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2174 CI->getArgOperand(2)); 2175 } else if (IsX86 && Name.startswith("avx512.mask.or.")) { 2176 VectorType *FTy = cast<VectorType>(CI->getType()); 2177 VectorType *ITy = VectorType::getInteger(FTy); 2178 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2179 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2180 Rep = Builder.CreateBitCast(Rep, FTy); 2181 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2182 CI->getArgOperand(2)); 2183 } else if (IsX86 && Name.startswith("avx512.mask.xor.")) { 2184 VectorType *FTy = cast<VectorType>(CI->getType()); 2185 VectorType *ITy = VectorType::getInteger(FTy); 2186 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2187 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2188 Rep = Builder.CreateBitCast(Rep, FTy); 2189 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2190 CI->getArgOperand(2)); 2191 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2192 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2193 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2194 CI->getArgOperand(2)); 2195 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2196 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2197 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2198 CI->getArgOperand(2)); 2199 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2200 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2201 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2202 CI->getArgOperand(2)); 2203 } else if (IsX86 && (Name.startswith("avx512.mask.add.p"))) { 2204 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2205 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2206 CI->getArgOperand(2)); 2207 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2208 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2209 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2210 CI->getArgOperand(2)); 2211 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2212 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2213 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2214 CI->getArgOperand(2)); 2215 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2216 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2217 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2218 CI->getArgOperand(2)); 2219 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2220 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2221 Intrinsic::ctlz, 2222 CI->getType()), 2223 { CI->getArgOperand(0), Builder.getInt1(false) }); 2224 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2225 CI->getArgOperand(1)); 2226 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2227 bool IsImmediate = Name[16] == 'i' || 2228 (Name.size() > 18 && Name[18] == 'i'); 2229 bool IsVariable = Name[16] == 'v'; 2230 char Size = Name[16] == '.' ? Name[17] : 2231 Name[17] == '.' ? Name[18] : 2232 Name[18] == '.' ? Name[19] : 2233 Name[20]; 2234 2235 Intrinsic::ID IID; 2236 if (IsVariable && Name[17] != '.') { 2237 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2238 IID = Intrinsic::x86_avx2_psllv_q; 2239 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2240 IID = Intrinsic::x86_avx2_psllv_q_256; 2241 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2242 IID = Intrinsic::x86_avx2_psllv_d; 2243 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2244 IID = Intrinsic::x86_avx2_psllv_d_256; 2245 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2246 IID = Intrinsic::x86_avx512_psllv_w_128; 2247 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2248 IID = Intrinsic::x86_avx512_psllv_w_256; 2249 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2250 IID = Intrinsic::x86_avx512_psllv_w_512; 2251 else 2252 llvm_unreachable("Unexpected size"); 2253 } else if (Name.endswith(".128")) { 2254 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2255 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2256 : Intrinsic::x86_sse2_psll_d; 2257 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2258 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2259 : Intrinsic::x86_sse2_psll_q; 2260 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2261 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2262 : Intrinsic::x86_sse2_psll_w; 2263 else 2264 llvm_unreachable("Unexpected size"); 2265 } else if (Name.endswith(".256")) { 2266 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2267 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2268 : Intrinsic::x86_avx2_psll_d; 2269 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2270 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2271 : Intrinsic::x86_avx2_psll_q; 2272 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2273 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2274 : Intrinsic::x86_avx2_psll_w; 2275 else 2276 llvm_unreachable("Unexpected size"); 2277 } else { 2278 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2279 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2280 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2281 Intrinsic::x86_avx512_psll_d_512; 2282 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2283 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2284 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2285 Intrinsic::x86_avx512_psll_q_512; 2286 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2287 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2288 : Intrinsic::x86_avx512_psll_w_512; 2289 else 2290 llvm_unreachable("Unexpected size"); 2291 } 2292 2293 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2294 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2295 bool IsImmediate = Name[16] == 'i' || 2296 (Name.size() > 18 && Name[18] == 'i'); 2297 bool IsVariable = Name[16] == 'v'; 2298 char Size = Name[16] == '.' ? Name[17] : 2299 Name[17] == '.' ? Name[18] : 2300 Name[18] == '.' ? Name[19] : 2301 Name[20]; 2302 2303 Intrinsic::ID IID; 2304 if (IsVariable && Name[17] != '.') { 2305 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2306 IID = Intrinsic::x86_avx2_psrlv_q; 2307 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2308 IID = Intrinsic::x86_avx2_psrlv_q_256; 2309 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2310 IID = Intrinsic::x86_avx2_psrlv_d; 2311 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2312 IID = Intrinsic::x86_avx2_psrlv_d_256; 2313 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2314 IID = Intrinsic::x86_avx512_psrlv_w_128; 2315 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2316 IID = Intrinsic::x86_avx512_psrlv_w_256; 2317 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2318 IID = Intrinsic::x86_avx512_psrlv_w_512; 2319 else 2320 llvm_unreachable("Unexpected size"); 2321 } else if (Name.endswith(".128")) { 2322 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2323 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2324 : Intrinsic::x86_sse2_psrl_d; 2325 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2326 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2327 : Intrinsic::x86_sse2_psrl_q; 2328 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2329 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2330 : Intrinsic::x86_sse2_psrl_w; 2331 else 2332 llvm_unreachable("Unexpected size"); 2333 } else if (Name.endswith(".256")) { 2334 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2335 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2336 : Intrinsic::x86_avx2_psrl_d; 2337 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2338 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2339 : Intrinsic::x86_avx2_psrl_q; 2340 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2341 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2342 : Intrinsic::x86_avx2_psrl_w; 2343 else 2344 llvm_unreachable("Unexpected size"); 2345 } else { 2346 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2347 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2348 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2349 Intrinsic::x86_avx512_psrl_d_512; 2350 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2351 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2352 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2353 Intrinsic::x86_avx512_psrl_q_512; 2354 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 2355 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 2356 : Intrinsic::x86_avx512_psrl_w_512; 2357 else 2358 llvm_unreachable("Unexpected size"); 2359 } 2360 2361 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2362 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 2363 bool IsImmediate = Name[16] == 'i' || 2364 (Name.size() > 18 && Name[18] == 'i'); 2365 bool IsVariable = Name[16] == 'v'; 2366 char Size = Name[16] == '.' ? Name[17] : 2367 Name[17] == '.' ? Name[18] : 2368 Name[18] == '.' ? Name[19] : 2369 Name[20]; 2370 2371 Intrinsic::ID IID; 2372 if (IsVariable && Name[17] != '.') { 2373 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 2374 IID = Intrinsic::x86_avx2_psrav_d; 2375 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 2376 IID = Intrinsic::x86_avx2_psrav_d_256; 2377 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 2378 IID = Intrinsic::x86_avx512_psrav_w_128; 2379 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 2380 IID = Intrinsic::x86_avx512_psrav_w_256; 2381 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 2382 IID = Intrinsic::x86_avx512_psrav_w_512; 2383 else 2384 llvm_unreachable("Unexpected size"); 2385 } else if (Name.endswith(".128")) { 2386 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 2387 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 2388 : Intrinsic::x86_sse2_psra_d; 2389 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 2390 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 2391 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 2392 Intrinsic::x86_avx512_psra_q_128; 2393 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 2394 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 2395 : Intrinsic::x86_sse2_psra_w; 2396 else 2397 llvm_unreachable("Unexpected size"); 2398 } else if (Name.endswith(".256")) { 2399 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 2400 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 2401 : Intrinsic::x86_avx2_psra_d; 2402 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 2403 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 2404 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 2405 Intrinsic::x86_avx512_psra_q_256; 2406 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 2407 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 2408 : Intrinsic::x86_avx2_psra_w; 2409 else 2410 llvm_unreachable("Unexpected size"); 2411 } else { 2412 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 2413 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 2414 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 2415 Intrinsic::x86_avx512_psra_d_512; 2416 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 2417 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 2418 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 2419 Intrinsic::x86_avx512_psra_q_512; 2420 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 2421 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 2422 : Intrinsic::x86_avx512_psra_w_512; 2423 else 2424 llvm_unreachable("Unexpected size"); 2425 } 2426 2427 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2428 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 2429 Rep = upgradeMaskedMove(Builder, *CI); 2430 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 2431 Rep = UpgradeMaskToInt(Builder, *CI); 2432 } else if (IsX86 && Name.endswith(".movntdqa")) { 2433 Module *M = F->getParent(); 2434 MDNode *Node = MDNode::get( 2435 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 2436 2437 Value *Ptr = CI->getArgOperand(0); 2438 VectorType *VTy = cast<VectorType>(CI->getType()); 2439 2440 // Convert the type of the pointer to a pointer to the stored type. 2441 Value *BC = 2442 Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast"); 2443 LoadInst *LI = Builder.CreateAlignedLoad(BC, VTy->getBitWidth() / 8); 2444 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 2445 Rep = LI; 2446 } else if (IsX86 && 2447 (Name.startswith("sse2.pavg") || Name.startswith("avx2.pavg") || 2448 Name.startswith("avx512.mask.pavg"))) { 2449 // llvm.x86.sse2.pavg.b/w, llvm.x86.avx2.pavg.b/w, 2450 // llvm.x86.avx512.mask.pavg.b/w 2451 Value *A = CI->getArgOperand(0); 2452 Value *B = CI->getArgOperand(1); 2453 VectorType *ZextType = VectorType::getExtendedElementVectorType( 2454 cast<VectorType>(A->getType())); 2455 Value *ExtendedA = Builder.CreateZExt(A, ZextType); 2456 Value *ExtendedB = Builder.CreateZExt(B, ZextType); 2457 Value *Sum = Builder.CreateAdd(ExtendedA, ExtendedB); 2458 Value *AddOne = Builder.CreateAdd(Sum, ConstantInt::get(ZextType, 1)); 2459 Value *ShiftR = Builder.CreateLShr(AddOne, ConstantInt::get(ZextType, 1)); 2460 Rep = Builder.CreateTrunc(ShiftR, A->getType()); 2461 if (CI->getNumArgOperands() > 2) { 2462 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2463 CI->getArgOperand(2)); 2464 } 2465 } else if (IsX86 && Name.startswith("fma.vfmsub")) { 2466 // Handle FMSUB and FSUBADD. 2467 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2468 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2469 Intrinsic::ID IID; 2470 if (Name[10] == '.' && Name[11] == 'p') { 2471 // Packed FMSUB 2472 if (VecWidth == 128 && EltWidth == 32) 2473 IID = Intrinsic::x86_fma_vfmadd_ps; 2474 else if (VecWidth == 128 && EltWidth == 64) 2475 IID = Intrinsic::x86_fma_vfmadd_pd; 2476 else if (VecWidth == 256 && EltWidth == 32) 2477 IID = Intrinsic::x86_fma_vfmadd_ps_256; 2478 else if (VecWidth == 256 && EltWidth == 64) 2479 IID = Intrinsic::x86_fma_vfmadd_pd_256; 2480 else 2481 llvm_unreachable("Unexpected intrinsic"); 2482 } else if (Name[10] == '.' && Name[11] == 's') { 2483 // Scalar FMSUB 2484 if (EltWidth == 32) 2485 IID = Intrinsic::x86_fma_vfmadd_ss; 2486 else if (EltWidth == 64) 2487 IID = Intrinsic::x86_fma_vfmadd_sd; 2488 else 2489 llvm_unreachable("Unexpected intrinsic"); 2490 } else { 2491 // FMSUBADD 2492 if (VecWidth == 128 && EltWidth == 32) 2493 IID = Intrinsic::x86_fma_vfmaddsub_ps; 2494 else if (VecWidth == 128 && EltWidth == 64) 2495 IID = Intrinsic::x86_fma_vfmaddsub_pd; 2496 else if (VecWidth == 256 && EltWidth == 32) 2497 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 2498 else if (VecWidth == 256 && EltWidth == 64) 2499 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 2500 else 2501 llvm_unreachable("Unexpected intrinsic"); 2502 } 2503 Value *Arg2 = Builder.CreateFNeg(CI->getArgOperand(2)); 2504 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), Arg2 }; 2505 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2506 Ops); 2507 } else if (IsX86 && (Name.startswith("fma.vfnmadd.") || 2508 Name.startswith("fma.vfnmsub."))) { 2509 Value *Arg0 = CI->getArgOperand(0); 2510 Value *Arg1 = CI->getArgOperand(1); 2511 Value *Arg2 = CI->getArgOperand(2); 2512 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2513 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2514 Intrinsic::ID IID; 2515 if (Name[12] == 'p') { 2516 // Packed FNMADD/FNSUB 2517 Arg0 = Builder.CreateFNeg(Arg0); 2518 if (VecWidth == 128 && EltWidth == 32) 2519 IID = Intrinsic::x86_fma_vfmadd_ps; 2520 else if (VecWidth == 128 && EltWidth == 64) 2521 IID = Intrinsic::x86_fma_vfmadd_pd; 2522 else if (VecWidth == 256 && EltWidth == 32) 2523 IID = Intrinsic::x86_fma_vfmadd_ps_256; 2524 else if (VecWidth == 256 && EltWidth == 64) 2525 IID = Intrinsic::x86_fma_vfmadd_pd_256; 2526 else 2527 llvm_unreachable("Unexpected intrinsic"); 2528 } else { 2529 // Scalar FNMADD/FNMSUB 2530 Arg1 = Builder.CreateFNeg(Arg1); // Arg0 is passthru so invert Arg1. 2531 if (EltWidth == 32) 2532 IID = Intrinsic::x86_fma_vfmadd_ss; 2533 else if (EltWidth == 64) 2534 IID = Intrinsic::x86_fma_vfmadd_sd; 2535 else 2536 llvm_unreachable("Unexpected intrinsic"); 2537 } 2538 // Invert for FNMSUB. 2539 if (Name[8] == 's') 2540 Arg2 = Builder.CreateFNeg(Arg2); 2541 Value *Ops[] = { Arg0, Arg1, Arg2 }; 2542 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2543 Ops); 2544 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 2545 Name.startswith("avx512.maskz.pternlog."))) { 2546 bool ZeroMask = Name[11] == 'z'; 2547 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2548 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2549 Intrinsic::ID IID; 2550 if (VecWidth == 128 && EltWidth == 32) 2551 IID = Intrinsic::x86_avx512_pternlog_d_128; 2552 else if (VecWidth == 256 && EltWidth == 32) 2553 IID = Intrinsic::x86_avx512_pternlog_d_256; 2554 else if (VecWidth == 512 && EltWidth == 32) 2555 IID = Intrinsic::x86_avx512_pternlog_d_512; 2556 else if (VecWidth == 128 && EltWidth == 64) 2557 IID = Intrinsic::x86_avx512_pternlog_q_128; 2558 else if (VecWidth == 256 && EltWidth == 64) 2559 IID = Intrinsic::x86_avx512_pternlog_q_256; 2560 else if (VecWidth == 512 && EltWidth == 64) 2561 IID = Intrinsic::x86_avx512_pternlog_q_512; 2562 else 2563 llvm_unreachable("Unexpected intrinsic"); 2564 2565 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 2566 CI->getArgOperand(2), CI->getArgOperand(3) }; 2567 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2568 Args); 2569 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 2570 : CI->getArgOperand(0); 2571 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 2572 } else if (IsX86 && Name.startswith("avx512.mask.") && 2573 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 2574 // Rep will be updated by the call in the condition. 2575 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 2576 Value *Arg = CI->getArgOperand(0); 2577 Value *Neg = Builder.CreateNeg(Arg, "neg"); 2578 Value *Cmp = Builder.CreateICmpSGE( 2579 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 2580 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 2581 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 2582 Name == "max.ui" || Name == "max.ull")) { 2583 Value *Arg0 = CI->getArgOperand(0); 2584 Value *Arg1 = CI->getArgOperand(1); 2585 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 2586 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 2587 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 2588 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 2589 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 2590 Name == "min.ui" || Name == "min.ull")) { 2591 Value *Arg0 = CI->getArgOperand(0); 2592 Value *Arg1 = CI->getArgOperand(1); 2593 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 2594 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 2595 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 2596 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 2597 } else if (IsNVVM && Name == "clz.ll") { 2598 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 2599 Value *Arg = CI->getArgOperand(0); 2600 Value *Ctlz = Builder.CreateCall( 2601 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 2602 {Arg->getType()}), 2603 {Arg, Builder.getFalse()}, "ctlz"); 2604 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 2605 } else if (IsNVVM && Name == "popc.ll") { 2606 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 2607 // i64. 2608 Value *Arg = CI->getArgOperand(0); 2609 Value *Popc = Builder.CreateCall( 2610 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 2611 {Arg->getType()}), 2612 Arg, "ctpop"); 2613 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 2614 } else if (IsNVVM && Name == "h2f") { 2615 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 2616 F->getParent(), Intrinsic::convert_from_fp16, 2617 {Builder.getFloatTy()}), 2618 CI->getArgOperand(0), "h2f"); 2619 } else { 2620 llvm_unreachable("Unknown function for CallInst upgrade."); 2621 } 2622 2623 if (Rep) 2624 CI->replaceAllUsesWith(Rep); 2625 CI->eraseFromParent(); 2626 return; 2627 } 2628 2629 const auto &DefaultCase = [&NewFn, &CI]() -> void { 2630 // Handle generic mangling change, but nothing else 2631 assert( 2632 (CI->getCalledFunction()->getName() != NewFn->getName()) && 2633 "Unknown function for CallInst upgrade and isn't just a name change"); 2634 CI->setCalledFunction(NewFn); 2635 }; 2636 CallInst *NewCall = nullptr; 2637 switch (NewFn->getIntrinsicID()) { 2638 default: { 2639 DefaultCase(); 2640 return; 2641 } 2642 2643 case Intrinsic::arm_neon_vld1: 2644 case Intrinsic::arm_neon_vld2: 2645 case Intrinsic::arm_neon_vld3: 2646 case Intrinsic::arm_neon_vld4: 2647 case Intrinsic::arm_neon_vld2lane: 2648 case Intrinsic::arm_neon_vld3lane: 2649 case Intrinsic::arm_neon_vld4lane: 2650 case Intrinsic::arm_neon_vst1: 2651 case Intrinsic::arm_neon_vst2: 2652 case Intrinsic::arm_neon_vst3: 2653 case Intrinsic::arm_neon_vst4: 2654 case Intrinsic::arm_neon_vst2lane: 2655 case Intrinsic::arm_neon_vst3lane: 2656 case Intrinsic::arm_neon_vst4lane: { 2657 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2658 CI->arg_operands().end()); 2659 NewCall = Builder.CreateCall(NewFn, Args); 2660 break; 2661 } 2662 2663 case Intrinsic::bitreverse: 2664 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 2665 break; 2666 2667 case Intrinsic::ctlz: 2668 case Intrinsic::cttz: 2669 assert(CI->getNumArgOperands() == 1 && 2670 "Mismatch between function args and call args"); 2671 NewCall = 2672 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 2673 break; 2674 2675 case Intrinsic::objectsize: { 2676 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 2677 ? Builder.getFalse() 2678 : CI->getArgOperand(2); 2679 NewCall = Builder.CreateCall( 2680 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize}); 2681 break; 2682 } 2683 2684 case Intrinsic::ctpop: 2685 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 2686 break; 2687 2688 case Intrinsic::convert_from_fp16: 2689 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 2690 break; 2691 2692 case Intrinsic::dbg_value: 2693 // Upgrade from the old version that had an extra offset argument. 2694 assert(CI->getNumArgOperands() == 4); 2695 // Drop nonzero offsets instead of attempting to upgrade them. 2696 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 2697 if (Offset->isZeroValue()) { 2698 NewCall = Builder.CreateCall( 2699 NewFn, 2700 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 2701 break; 2702 } 2703 CI->eraseFromParent(); 2704 return; 2705 2706 case Intrinsic::x86_xop_vfrcz_ss: 2707 case Intrinsic::x86_xop_vfrcz_sd: 2708 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 2709 break; 2710 2711 case Intrinsic::x86_xop_vpermil2pd: 2712 case Intrinsic::x86_xop_vpermil2ps: 2713 case Intrinsic::x86_xop_vpermil2pd_256: 2714 case Intrinsic::x86_xop_vpermil2ps_256: { 2715 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2716 CI->arg_operands().end()); 2717 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 2718 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 2719 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 2720 NewCall = Builder.CreateCall(NewFn, Args); 2721 break; 2722 } 2723 2724 case Intrinsic::x86_sse41_ptestc: 2725 case Intrinsic::x86_sse41_ptestz: 2726 case Intrinsic::x86_sse41_ptestnzc: { 2727 // The arguments for these intrinsics used to be v4f32, and changed 2728 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 2729 // So, the only thing required is a bitcast for both arguments. 2730 // First, check the arguments have the old type. 2731 Value *Arg0 = CI->getArgOperand(0); 2732 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 2733 return; 2734 2735 // Old intrinsic, add bitcasts 2736 Value *Arg1 = CI->getArgOperand(1); 2737 2738 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 2739 2740 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 2741 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 2742 2743 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 2744 break; 2745 } 2746 2747 case Intrinsic::x86_sse41_insertps: 2748 case Intrinsic::x86_sse41_dppd: 2749 case Intrinsic::x86_sse41_dpps: 2750 case Intrinsic::x86_sse41_mpsadbw: 2751 case Intrinsic::x86_avx_dp_ps_256: 2752 case Intrinsic::x86_avx2_mpsadbw: { 2753 // Need to truncate the last argument from i32 to i8 -- this argument models 2754 // an inherently 8-bit immediate operand to these x86 instructions. 2755 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2756 CI->arg_operands().end()); 2757 2758 // Replace the last argument with a trunc. 2759 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 2760 NewCall = Builder.CreateCall(NewFn, Args); 2761 break; 2762 } 2763 2764 case Intrinsic::x86_avx512_mask_cmp_pd_128: 2765 case Intrinsic::x86_avx512_mask_cmp_pd_256: 2766 case Intrinsic::x86_avx512_mask_cmp_pd_512: 2767 case Intrinsic::x86_avx512_mask_cmp_ps_128: 2768 case Intrinsic::x86_avx512_mask_cmp_ps_256: 2769 case Intrinsic::x86_avx512_mask_cmp_ps_512: { 2770 SmallVector<Value *, 4> Args; 2771 Args.push_back(CI->getArgOperand(0)); 2772 Args.push_back(CI->getArgOperand(1)); 2773 Args.push_back(CI->getArgOperand(2)); 2774 if (CI->getNumArgOperands() == 5) 2775 Args.push_back(CI->getArgOperand(4)); 2776 2777 NewCall = Builder.CreateCall(NewFn, Args); 2778 unsigned NumElts = Args[0]->getType()->getVectorNumElements(); 2779 Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall, CI->getArgOperand(3), 2780 NumElts); 2781 2782 std::string Name = CI->getName(); 2783 if (!Name.empty()) { 2784 CI->setName(Name + ".old"); 2785 NewCall->setName(Name); 2786 } 2787 CI->replaceAllUsesWith(Res); 2788 CI->eraseFromParent(); 2789 return; 2790 } 2791 2792 case Intrinsic::thread_pointer: { 2793 NewCall = Builder.CreateCall(NewFn, {}); 2794 break; 2795 } 2796 2797 case Intrinsic::invariant_start: 2798 case Intrinsic::invariant_end: 2799 case Intrinsic::masked_load: 2800 case Intrinsic::masked_store: 2801 case Intrinsic::masked_gather: 2802 case Intrinsic::masked_scatter: { 2803 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2804 CI->arg_operands().end()); 2805 NewCall = Builder.CreateCall(NewFn, Args); 2806 break; 2807 } 2808 2809 case Intrinsic::memcpy: 2810 case Intrinsic::memmove: 2811 case Intrinsic::memset: { 2812 // We have to make sure that the call signature is what we're expecting. 2813 // We only want to change the old signatures by removing the alignment arg: 2814 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 2815 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 2816 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 2817 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 2818 // Note: i8*'s in the above can be any pointer type 2819 if (CI->getNumArgOperands() != 5) { 2820 DefaultCase(); 2821 return; 2822 } 2823 // Remove alignment argument (3), and add alignment attributes to the 2824 // dest/src pointers. 2825 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 2826 CI->getArgOperand(2), CI->getArgOperand(4)}; 2827 NewCall = Builder.CreateCall(NewFn, Args); 2828 auto *MemCI = cast<MemIntrinsic>(NewCall); 2829 // All mem intrinsics support dest alignment. 2830 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 2831 MemCI->setDestAlignment(Align->getZExtValue()); 2832 // Memcpy/Memmove also support source alignment. 2833 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 2834 MTI->setSourceAlignment(Align->getZExtValue()); 2835 break; 2836 } 2837 } 2838 assert(NewCall && "Should have either set this variable or returned through " 2839 "the default case"); 2840 std::string Name = CI->getName(); 2841 if (!Name.empty()) { 2842 CI->setName(Name + ".old"); 2843 NewCall->setName(Name); 2844 } 2845 CI->replaceAllUsesWith(NewCall); 2846 CI->eraseFromParent(); 2847 } 2848 2849 void llvm::UpgradeCallsToIntrinsic(Function *F) { 2850 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 2851 2852 // Check if this function should be upgraded and get the replacement function 2853 // if there is one. 2854 Function *NewFn; 2855 if (UpgradeIntrinsicFunction(F, NewFn)) { 2856 // Replace all users of the old function with the new function or new 2857 // instructions. This is not a range loop because the call is deleted. 2858 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 2859 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 2860 UpgradeIntrinsicCall(CI, NewFn); 2861 2862 // Remove old function, no longer used, from the module. 2863 F->eraseFromParent(); 2864 } 2865 } 2866 2867 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 2868 // Check if the tag uses struct-path aware TBAA format. 2869 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 2870 return &MD; 2871 2872 auto &Context = MD.getContext(); 2873 if (MD.getNumOperands() == 3) { 2874 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 2875 MDNode *ScalarType = MDNode::get(Context, Elts); 2876 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 2877 Metadata *Elts2[] = {ScalarType, ScalarType, 2878 ConstantAsMetadata::get( 2879 Constant::getNullValue(Type::getInt64Ty(Context))), 2880 MD.getOperand(2)}; 2881 return MDNode::get(Context, Elts2); 2882 } 2883 // Create a MDNode <MD, MD, offset 0> 2884 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 2885 Type::getInt64Ty(Context)))}; 2886 return MDNode::get(Context, Elts); 2887 } 2888 2889 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 2890 Instruction *&Temp) { 2891 if (Opc != Instruction::BitCast) 2892 return nullptr; 2893 2894 Temp = nullptr; 2895 Type *SrcTy = V->getType(); 2896 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 2897 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 2898 LLVMContext &Context = V->getContext(); 2899 2900 // We have no information about target data layout, so we assume that 2901 // the maximum pointer size is 64bit. 2902 Type *MidTy = Type::getInt64Ty(Context); 2903 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 2904 2905 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 2906 } 2907 2908 return nullptr; 2909 } 2910 2911 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 2912 if (Opc != Instruction::BitCast) 2913 return nullptr; 2914 2915 Type *SrcTy = C->getType(); 2916 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 2917 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 2918 LLVMContext &Context = C->getContext(); 2919 2920 // We have no information about target data layout, so we assume that 2921 // the maximum pointer size is 64bit. 2922 Type *MidTy = Type::getInt64Ty(Context); 2923 2924 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 2925 DestTy); 2926 } 2927 2928 return nullptr; 2929 } 2930 2931 /// Check the debug info version number, if it is out-dated, drop the debug 2932 /// info. Return true if module is modified. 2933 bool llvm::UpgradeDebugInfo(Module &M) { 2934 unsigned Version = getDebugMetadataVersionFromModule(M); 2935 if (Version == DEBUG_METADATA_VERSION) { 2936 bool BrokenDebugInfo = false; 2937 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 2938 report_fatal_error("Broken module found, compilation aborted!"); 2939 if (!BrokenDebugInfo) 2940 // Everything is ok. 2941 return false; 2942 else { 2943 // Diagnose malformed debug info. 2944 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 2945 M.getContext().diagnose(Diag); 2946 } 2947 } 2948 bool Modified = StripDebugInfo(M); 2949 if (Modified && Version != DEBUG_METADATA_VERSION) { 2950 // Diagnose a version mismatch. 2951 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 2952 M.getContext().diagnose(DiagVersion); 2953 } 2954 return Modified; 2955 } 2956 2957 bool llvm::UpgradeRetainReleaseMarker(Module &M) { 2958 bool Changed = false; 2959 NamedMDNode *ModRetainReleaseMarker = 2960 M.getNamedMetadata("clang.arc.retainAutoreleasedReturnValueMarker"); 2961 if (ModRetainReleaseMarker) { 2962 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 2963 if (Op) { 2964 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 2965 if (ID) { 2966 SmallVector<StringRef, 4> ValueComp; 2967 ID->getString().split(ValueComp, "#"); 2968 if (ValueComp.size() == 2) { 2969 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 2970 Metadata *Ops[1] = {MDString::get(M.getContext(), NewValue)}; 2971 ModRetainReleaseMarker->setOperand(0, 2972 MDNode::get(M.getContext(), Ops)); 2973 Changed = true; 2974 } 2975 } 2976 } 2977 } 2978 return Changed; 2979 } 2980 2981 bool llvm::UpgradeModuleFlags(Module &M) { 2982 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 2983 if (!ModFlags) 2984 return false; 2985 2986 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 2987 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 2988 MDNode *Op = ModFlags->getOperand(I); 2989 if (Op->getNumOperands() != 3) 2990 continue; 2991 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 2992 if (!ID) 2993 continue; 2994 if (ID->getString() == "Objective-C Image Info Version") 2995 HasObjCFlag = true; 2996 if (ID->getString() == "Objective-C Class Properties") 2997 HasClassProperties = true; 2998 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 2999 // field was Error and now they are Max. 3000 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 3001 if (auto *Behavior = 3002 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 3003 if (Behavior->getLimitedValue() == Module::Error) { 3004 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 3005 Metadata *Ops[3] = { 3006 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 3007 MDString::get(M.getContext(), ID->getString()), 3008 Op->getOperand(2)}; 3009 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 3010 Changed = true; 3011 } 3012 } 3013 } 3014 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 3015 // section name so that llvm-lto will not complain about mismatching 3016 // module flags that is functionally the same. 3017 if (ID->getString() == "Objective-C Image Info Section") { 3018 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 3019 SmallVector<StringRef, 4> ValueComp; 3020 Value->getString().split(ValueComp, " "); 3021 if (ValueComp.size() != 1) { 3022 std::string NewValue; 3023 for (auto &S : ValueComp) 3024 NewValue += S.str(); 3025 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 3026 MDString::get(M.getContext(), NewValue)}; 3027 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 3028 Changed = true; 3029 } 3030 } 3031 } 3032 } 3033 3034 // "Objective-C Class Properties" is recently added for Objective-C. We 3035 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 3036 // flag of value 0, so we can correclty downgrade this flag when trying to 3037 // link an ObjC bitcode without this module flag with an ObjC bitcode with 3038 // this module flag. 3039 if (HasObjCFlag && !HasClassProperties) { 3040 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 3041 (uint32_t)0); 3042 Changed = true; 3043 } 3044 3045 return Changed; 3046 } 3047 3048 void llvm::UpgradeSectionAttributes(Module &M) { 3049 auto TrimSpaces = [](StringRef Section) -> std::string { 3050 SmallVector<StringRef, 5> Components; 3051 Section.split(Components, ','); 3052 3053 SmallString<32> Buffer; 3054 raw_svector_ostream OS(Buffer); 3055 3056 for (auto Component : Components) 3057 OS << ',' << Component.trim(); 3058 3059 return OS.str().substr(1); 3060 }; 3061 3062 for (auto &GV : M.globals()) { 3063 if (!GV.hasSection()) 3064 continue; 3065 3066 StringRef Section = GV.getSection(); 3067 3068 if (!Section.startswith("__DATA, __objc_catlist")) 3069 continue; 3070 3071 // __DATA, __objc_catlist, regular, no_dead_strip 3072 // __DATA,__objc_catlist,regular,no_dead_strip 3073 GV.setSection(TrimSpaces(Section)); 3074 } 3075 } 3076 3077 static bool isOldLoopArgument(Metadata *MD) { 3078 auto *T = dyn_cast_or_null<MDTuple>(MD); 3079 if (!T) 3080 return false; 3081 if (T->getNumOperands() < 1) 3082 return false; 3083 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 3084 if (!S) 3085 return false; 3086 return S->getString().startswith("llvm.vectorizer."); 3087 } 3088 3089 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 3090 StringRef OldPrefix = "llvm.vectorizer."; 3091 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 3092 3093 if (OldTag == "llvm.vectorizer.unroll") 3094 return MDString::get(C, "llvm.loop.interleave.count"); 3095 3096 return MDString::get( 3097 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 3098 .str()); 3099 } 3100 3101 static Metadata *upgradeLoopArgument(Metadata *MD) { 3102 auto *T = dyn_cast_or_null<MDTuple>(MD); 3103 if (!T) 3104 return MD; 3105 if (T->getNumOperands() < 1) 3106 return MD; 3107 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 3108 if (!OldTag) 3109 return MD; 3110 if (!OldTag->getString().startswith("llvm.vectorizer.")) 3111 return MD; 3112 3113 // This has an old tag. Upgrade it. 3114 SmallVector<Metadata *, 8> Ops; 3115 Ops.reserve(T->getNumOperands()); 3116 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 3117 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 3118 Ops.push_back(T->getOperand(I)); 3119 3120 return MDTuple::get(T->getContext(), Ops); 3121 } 3122 3123 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 3124 auto *T = dyn_cast<MDTuple>(&N); 3125 if (!T) 3126 return &N; 3127 3128 if (none_of(T->operands(), isOldLoopArgument)) 3129 return &N; 3130 3131 SmallVector<Metadata *, 8> Ops; 3132 Ops.reserve(T->getNumOperands()); 3133 for (Metadata *MD : T->operands()) 3134 Ops.push_back(upgradeLoopArgument(MD)); 3135 3136 return MDTuple::get(T->getContext(), Ops); 3137 } 3138