1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the auto-upgrade helper functions. 10 // This is where deprecated IR intrinsics and other IR features are updated to 11 // current specifications. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/IR/AutoUpgrade.h" 16 #include "llvm/ADT/StringSwitch.h" 17 #include "llvm/IR/Constants.h" 18 #include "llvm/IR/DIBuilder.h" 19 #include "llvm/IR/DebugInfo.h" 20 #include "llvm/IR/DiagnosticInfo.h" 21 #include "llvm/IR/Function.h" 22 #include "llvm/IR/IRBuilder.h" 23 #include "llvm/IR/Instruction.h" 24 #include "llvm/IR/IntrinsicInst.h" 25 #include "llvm/IR/IntrinsicsAArch64.h" 26 #include "llvm/IR/IntrinsicsARM.h" 27 #include "llvm/IR/IntrinsicsX86.h" 28 #include "llvm/IR/LLVMContext.h" 29 #include "llvm/IR/Module.h" 30 #include "llvm/IR/Verifier.h" 31 #include "llvm/Support/ErrorHandling.h" 32 #include "llvm/Support/Regex.h" 33 #include <cstring> 34 using namespace llvm; 35 36 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 37 38 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 39 // changed their type from v4f32 to v2i64. 40 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 41 Function *&NewFn) { 42 // Check whether this is an old version of the function, which received 43 // v4f32 arguments. 44 Type *Arg0Type = F->getFunctionType()->getParamType(0); 45 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 46 return false; 47 48 // Yes, it's old, replace it with new version. 49 rename(F); 50 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 51 return true; 52 } 53 54 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 55 // arguments have changed their type from i32 to i8. 56 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 57 Function *&NewFn) { 58 // Check that the last argument is an i32. 59 Type *LastArgType = F->getFunctionType()->getParamType( 60 F->getFunctionType()->getNumParams() - 1); 61 if (!LastArgType->isIntegerTy(32)) 62 return false; 63 64 // Move this function aside and map down. 65 rename(F); 66 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 67 return true; 68 } 69 70 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 71 // All of the intrinsics matches below should be marked with which llvm 72 // version started autoupgrading them. At some point in the future we would 73 // like to use this information to remove upgrade code for some older 74 // intrinsics. It is currently undecided how we will determine that future 75 // point. 76 if (Name == "addcarryx.u32" || // Added in 8.0 77 Name == "addcarryx.u64" || // Added in 8.0 78 Name == "addcarry.u32" || // Added in 8.0 79 Name == "addcarry.u64" || // Added in 8.0 80 Name == "subborrow.u32" || // Added in 8.0 81 Name == "subborrow.u64" || // Added in 8.0 82 Name.startswith("sse2.padds.") || // Added in 8.0 83 Name.startswith("sse2.psubs.") || // Added in 8.0 84 Name.startswith("sse2.paddus.") || // Added in 8.0 85 Name.startswith("sse2.psubus.") || // Added in 8.0 86 Name.startswith("avx2.padds.") || // Added in 8.0 87 Name.startswith("avx2.psubs.") || // Added in 8.0 88 Name.startswith("avx2.paddus.") || // Added in 8.0 89 Name.startswith("avx2.psubus.") || // Added in 8.0 90 Name.startswith("avx512.padds.") || // Added in 8.0 91 Name.startswith("avx512.psubs.") || // Added in 8.0 92 Name.startswith("avx512.mask.padds.") || // Added in 8.0 93 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 94 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 95 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 96 Name=="ssse3.pabs.b.128" || // Added in 6.0 97 Name=="ssse3.pabs.w.128" || // Added in 6.0 98 Name=="ssse3.pabs.d.128" || // Added in 6.0 99 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 100 Name.startswith("fma.vfmadd.") || // Added in 7.0 101 Name.startswith("fma.vfmsub.") || // Added in 7.0 102 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 103 Name.startswith("fma.vfnmadd.") || // Added in 7.0 104 Name.startswith("fma.vfnmsub.") || // Added in 7.0 105 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 106 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 107 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 108 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 109 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 110 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 111 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 112 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 113 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 114 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 115 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 116 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 117 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 118 Name.startswith("avx512.kunpck") || //added in 6.0 119 Name.startswith("avx2.pabs.") || // Added in 6.0 120 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 121 Name.startswith("avx512.broadcastm") || // Added in 6.0 122 Name == "sse.sqrt.ss" || // Added in 7.0 123 Name == "sse2.sqrt.sd" || // Added in 7.0 124 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 125 Name.startswith("avx.sqrt.p") || // Added in 7.0 126 Name.startswith("sse2.sqrt.p") || // Added in 7.0 127 Name.startswith("sse.sqrt.p") || // Added in 7.0 128 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 129 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 130 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 131 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 132 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 133 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 134 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 135 Name.startswith("avx.vperm2f128.") || // Added in 6.0 136 Name == "avx2.vperm2i128" || // Added in 6.0 137 Name == "sse.add.ss" || // Added in 4.0 138 Name == "sse2.add.sd" || // Added in 4.0 139 Name == "sse.sub.ss" || // Added in 4.0 140 Name == "sse2.sub.sd" || // Added in 4.0 141 Name == "sse.mul.ss" || // Added in 4.0 142 Name == "sse2.mul.sd" || // Added in 4.0 143 Name == "sse.div.ss" || // Added in 4.0 144 Name == "sse2.div.sd" || // Added in 4.0 145 Name == "sse41.pmaxsb" || // Added in 3.9 146 Name == "sse2.pmaxs.w" || // Added in 3.9 147 Name == "sse41.pmaxsd" || // Added in 3.9 148 Name == "sse2.pmaxu.b" || // Added in 3.9 149 Name == "sse41.pmaxuw" || // Added in 3.9 150 Name == "sse41.pmaxud" || // Added in 3.9 151 Name == "sse41.pminsb" || // Added in 3.9 152 Name == "sse2.pmins.w" || // Added in 3.9 153 Name == "sse41.pminsd" || // Added in 3.9 154 Name == "sse2.pminu.b" || // Added in 3.9 155 Name == "sse41.pminuw" || // Added in 3.9 156 Name == "sse41.pminud" || // Added in 3.9 157 Name == "avx512.kand.w" || // Added in 7.0 158 Name == "avx512.kandn.w" || // Added in 7.0 159 Name == "avx512.knot.w" || // Added in 7.0 160 Name == "avx512.kor.w" || // Added in 7.0 161 Name == "avx512.kxor.w" || // Added in 7.0 162 Name == "avx512.kxnor.w" || // Added in 7.0 163 Name == "avx512.kortestc.w" || // Added in 7.0 164 Name == "avx512.kortestz.w" || // Added in 7.0 165 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 166 Name.startswith("avx2.pmax") || // Added in 3.9 167 Name.startswith("avx2.pmin") || // Added in 3.9 168 Name.startswith("avx512.mask.pmax") || // Added in 4.0 169 Name.startswith("avx512.mask.pmin") || // Added in 4.0 170 Name.startswith("avx2.vbroadcast") || // Added in 3.8 171 Name.startswith("avx2.pbroadcast") || // Added in 3.8 172 Name.startswith("avx.vpermil.") || // Added in 3.1 173 Name.startswith("sse2.pshuf") || // Added in 3.9 174 Name.startswith("avx512.pbroadcast") || // Added in 3.9 175 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 176 Name.startswith("avx512.mask.movddup") || // Added in 3.9 177 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 178 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 179 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 180 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 181 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 182 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 183 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 184 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 185 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 186 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 187 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 188 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 189 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 190 Name.startswith("avx512.mask.pand.") || // Added in 3.9 191 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 192 Name.startswith("avx512.mask.por.") || // Added in 3.9 193 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 194 Name.startswith("avx512.mask.and.") || // Added in 3.9 195 Name.startswith("avx512.mask.andn.") || // Added in 3.9 196 Name.startswith("avx512.mask.or.") || // Added in 3.9 197 Name.startswith("avx512.mask.xor.") || // Added in 3.9 198 Name.startswith("avx512.mask.padd.") || // Added in 4.0 199 Name.startswith("avx512.mask.psub.") || // Added in 4.0 200 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 201 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 202 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 203 Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0 204 Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0 205 Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0 206 Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0 207 Name == "avx512.mask.vcvtph2ps.128" || // Added in 11.0 208 Name == "avx512.mask.vcvtph2ps.256" || // Added in 11.0 209 Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0 210 Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0 211 Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0 212 Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0 213 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 214 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 215 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 216 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 217 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 218 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 219 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 220 Name == "avx512.cvtusi2sd" || // Added in 7.0 221 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 222 Name == "sse2.pmulu.dq" || // Added in 7.0 223 Name == "sse41.pmuldq" || // Added in 7.0 224 Name == "avx2.pmulu.dq" || // Added in 7.0 225 Name == "avx2.pmul.dq" || // Added in 7.0 226 Name == "avx512.pmulu.dq.512" || // Added in 7.0 227 Name == "avx512.pmul.dq.512" || // Added in 7.0 228 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 229 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 230 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 231 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 232 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 233 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 234 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 235 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 236 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 237 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 238 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 239 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 240 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 241 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 242 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 243 Name.startswith("avx512.mask.cmp.p") || // Added in 7.0 244 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 245 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 246 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 247 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 248 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 249 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 250 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 251 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 252 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 253 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 254 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 255 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 256 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 257 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 258 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 259 Name.startswith("avx512.mask.pslli") || // Added in 4.0 260 Name.startswith("avx512.mask.psrai") || // Added in 4.0 261 Name.startswith("avx512.mask.psrli") || // Added in 4.0 262 Name.startswith("avx512.mask.psllv") || // Added in 4.0 263 Name.startswith("avx512.mask.psrav") || // Added in 4.0 264 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 265 Name.startswith("sse41.pmovsx") || // Added in 3.8 266 Name.startswith("sse41.pmovzx") || // Added in 3.9 267 Name.startswith("avx2.pmovsx") || // Added in 3.9 268 Name.startswith("avx2.pmovzx") || // Added in 3.9 269 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 270 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 271 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 272 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 273 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 274 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 275 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 276 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 277 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 278 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 279 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 280 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 281 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 282 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 283 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 284 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 285 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 286 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 287 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 289 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 290 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 291 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 292 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 293 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 294 Name.startswith("avx512.vpshld.") || // Added in 8.0 295 Name.startswith("avx512.vpshrd.") || // Added in 8.0 296 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 297 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 298 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 299 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 300 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 301 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 302 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 303 Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0 304 Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0 305 Name.startswith("avx512.mask.conflict.") || // Added in 9.0 306 Name == "avx512.mask.pmov.qd.256" || // Added in 9.0 307 Name == "avx512.mask.pmov.qd.512" || // Added in 9.0 308 Name == "avx512.mask.pmov.wb.256" || // Added in 9.0 309 Name == "avx512.mask.pmov.wb.512" || // Added in 9.0 310 Name == "sse.cvtsi2ss" || // Added in 7.0 311 Name == "sse.cvtsi642ss" || // Added in 7.0 312 Name == "sse2.cvtsi2sd" || // Added in 7.0 313 Name == "sse2.cvtsi642sd" || // Added in 7.0 314 Name == "sse2.cvtss2sd" || // Added in 7.0 315 Name == "sse2.cvtdq2pd" || // Added in 3.9 316 Name == "sse2.cvtdq2ps" || // Added in 7.0 317 Name == "sse2.cvtps2pd" || // Added in 3.9 318 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 319 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 320 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 321 Name.startswith("vcvtph2ps.") || // Added in 11.0 322 Name.startswith("avx.vinsertf128.") || // Added in 3.7 323 Name == "avx2.vinserti128" || // Added in 3.7 324 Name.startswith("avx512.mask.insert") || // Added in 4.0 325 Name.startswith("avx.vextractf128.") || // Added in 3.7 326 Name == "avx2.vextracti128" || // Added in 3.7 327 Name.startswith("avx512.mask.vextract") || // Added in 4.0 328 Name.startswith("sse4a.movnt.") || // Added in 3.9 329 Name.startswith("avx.movnt.") || // Added in 3.2 330 Name.startswith("avx512.storent.") || // Added in 3.9 331 Name == "sse41.movntdqa" || // Added in 5.0 332 Name == "avx2.movntdqa" || // Added in 5.0 333 Name == "avx512.movntdqa" || // Added in 5.0 334 Name == "sse2.storel.dq" || // Added in 3.9 335 Name.startswith("sse.storeu.") || // Added in 3.9 336 Name.startswith("sse2.storeu.") || // Added in 3.9 337 Name.startswith("avx.storeu.") || // Added in 3.9 338 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 339 Name.startswith("avx512.mask.store.p") || // Added in 3.9 340 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 341 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 342 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 343 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 344 Name == "avx512.mask.store.ss" || // Added in 7.0 345 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 346 Name.startswith("avx512.mask.load.") || // Added in 3.9 347 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 348 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 349 Name.startswith("avx512.mask.expand.b") || // Added in 9.0 350 Name.startswith("avx512.mask.expand.w") || // Added in 9.0 351 Name.startswith("avx512.mask.expand.d") || // Added in 9.0 352 Name.startswith("avx512.mask.expand.q") || // Added in 9.0 353 Name.startswith("avx512.mask.expand.p") || // Added in 9.0 354 Name.startswith("avx512.mask.compress.b") || // Added in 9.0 355 Name.startswith("avx512.mask.compress.w") || // Added in 9.0 356 Name.startswith("avx512.mask.compress.d") || // Added in 9.0 357 Name.startswith("avx512.mask.compress.q") || // Added in 9.0 358 Name.startswith("avx512.mask.compress.p") || // Added in 9.0 359 Name == "sse42.crc32.64.8" || // Added in 3.4 360 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 361 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 362 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 363 Name.startswith("avx512.mask.valign.") || // Added in 4.0 364 Name.startswith("sse2.psll.dq") || // Added in 3.7 365 Name.startswith("sse2.psrl.dq") || // Added in 3.7 366 Name.startswith("avx2.psll.dq") || // Added in 3.7 367 Name.startswith("avx2.psrl.dq") || // Added in 3.7 368 Name.startswith("avx512.psll.dq") || // Added in 3.9 369 Name.startswith("avx512.psrl.dq") || // Added in 3.9 370 Name == "sse41.pblendw" || // Added in 3.7 371 Name.startswith("sse41.blendp") || // Added in 3.7 372 Name.startswith("avx.blend.p") || // Added in 3.7 373 Name == "avx2.pblendw" || // Added in 3.7 374 Name.startswith("avx2.pblendd.") || // Added in 3.7 375 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 376 Name == "avx2.vbroadcasti128" || // Added in 3.7 377 Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0 378 Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0 379 Name.startswith("avx512.mask.broadcastf32x8.") || // Added in 6.0 380 Name.startswith("avx512.mask.broadcastf64x4.") || // Added in 6.0 381 Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0 382 Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0 383 Name.startswith("avx512.mask.broadcasti32x8.") || // Added in 6.0 384 Name.startswith("avx512.mask.broadcasti64x4.") || // Added in 6.0 385 Name == "xop.vpcmov" || // Added in 3.8 386 Name == "xop.vpcmov.256" || // Added in 5.0 387 Name.startswith("avx512.mask.move.s") || // Added in 4.0 388 Name.startswith("avx512.cvtmask2") || // Added in 5.0 389 Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0 390 Name.startswith("xop.vprot") || // Added in 8.0 391 Name.startswith("avx512.prol") || // Added in 8.0 392 Name.startswith("avx512.pror") || // Added in 8.0 393 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 394 Name.startswith("avx512.mask.pror.") || // Added in 8.0 395 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 396 Name.startswith("avx512.mask.prol.") || // Added in 8.0 397 Name.startswith("avx512.ptestm") || //Added in 6.0 398 Name.startswith("avx512.ptestnm") || //Added in 6.0 399 Name.startswith("avx512.mask.pavg")) // Added in 6.0 400 return true; 401 402 return false; 403 } 404 405 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 406 Function *&NewFn) { 407 // Only handle intrinsics that start with "x86.". 408 if (!Name.startswith("x86.")) 409 return false; 410 // Remove "x86." prefix. 411 Name = Name.substr(4); 412 413 if (ShouldUpgradeX86Intrinsic(F, Name)) { 414 NewFn = nullptr; 415 return true; 416 } 417 418 if (Name == "rdtscp") { // Added in 8.0 419 // If this intrinsic has 0 operands, it's the new version. 420 if (F->getFunctionType()->getNumParams() == 0) 421 return false; 422 423 rename(F); 424 NewFn = Intrinsic::getDeclaration(F->getParent(), 425 Intrinsic::x86_rdtscp); 426 return true; 427 } 428 429 // SSE4.1 ptest functions may have an old signature. 430 if (Name.startswith("sse41.ptest")) { // Added in 3.2 431 if (Name.substr(11) == "c") 432 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 433 if (Name.substr(11) == "z") 434 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 435 if (Name.substr(11) == "nzc") 436 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 437 } 438 // Several blend and other instructions with masks used the wrong number of 439 // bits. 440 if (Name == "sse41.insertps") // Added in 3.6 441 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 442 NewFn); 443 if (Name == "sse41.dppd") // Added in 3.6 444 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 445 NewFn); 446 if (Name == "sse41.dpps") // Added in 3.6 447 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 448 NewFn); 449 if (Name == "sse41.mpsadbw") // Added in 3.6 450 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 451 NewFn); 452 if (Name == "avx.dp.ps.256") // Added in 3.6 453 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 454 NewFn); 455 if (Name == "avx2.mpsadbw") // Added in 3.6 456 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 457 NewFn); 458 459 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 460 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 461 rename(F); 462 NewFn = Intrinsic::getDeclaration(F->getParent(), 463 Intrinsic::x86_xop_vfrcz_ss); 464 return true; 465 } 466 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 467 rename(F); 468 NewFn = Intrinsic::getDeclaration(F->getParent(), 469 Intrinsic::x86_xop_vfrcz_sd); 470 return true; 471 } 472 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 473 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 474 auto Idx = F->getFunctionType()->getParamType(2); 475 if (Idx->isFPOrFPVectorTy()) { 476 rename(F); 477 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 478 unsigned EltSize = Idx->getScalarSizeInBits(); 479 Intrinsic::ID Permil2ID; 480 if (EltSize == 64 && IdxSize == 128) 481 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 482 else if (EltSize == 32 && IdxSize == 128) 483 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 484 else if (EltSize == 64 && IdxSize == 256) 485 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 486 else 487 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 488 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 489 return true; 490 } 491 } 492 493 if (Name == "seh.recoverfp") { 494 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp); 495 return true; 496 } 497 498 return false; 499 } 500 501 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 502 assert(F && "Illegal to upgrade a non-existent Function."); 503 504 // Quickly eliminate it, if it's not a candidate. 505 StringRef Name = F->getName(); 506 if (Name.size() <= 8 || !Name.startswith("llvm.")) 507 return false; 508 Name = Name.substr(5); // Strip off "llvm." 509 510 switch (Name[0]) { 511 default: break; 512 case 'a': { 513 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 514 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 515 F->arg_begin()->getType()); 516 return true; 517 } 518 if (Name.startswith("arm.neon.vclz")) { 519 Type* args[2] = { 520 F->arg_begin()->getType(), 521 Type::getInt1Ty(F->getContext()) 522 }; 523 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 524 // the end of the name. Change name from llvm.arm.neon.vclz.* to 525 // llvm.ctlz.* 526 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 527 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 528 "llvm.ctlz." + Name.substr(14), F->getParent()); 529 return true; 530 } 531 if (Name.startswith("arm.neon.vcnt")) { 532 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 533 F->arg_begin()->getType()); 534 return true; 535 } 536 static const Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 537 if (vldRegex.match(Name)) { 538 auto fArgs = F->getFunctionType()->params(); 539 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 540 // Can't use Intrinsic::getDeclaration here as the return types might 541 // then only be structurally equal. 542 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 543 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 544 "llvm." + Name + ".p0i8", F->getParent()); 545 return true; 546 } 547 static const Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 548 if (vstRegex.match(Name)) { 549 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 550 Intrinsic::arm_neon_vst2, 551 Intrinsic::arm_neon_vst3, 552 Intrinsic::arm_neon_vst4}; 553 554 static const Intrinsic::ID StoreLaneInts[] = { 555 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 556 Intrinsic::arm_neon_vst4lane 557 }; 558 559 auto fArgs = F->getFunctionType()->params(); 560 Type *Tys[] = {fArgs[0], fArgs[1]}; 561 if (Name.find("lane") == StringRef::npos) 562 NewFn = Intrinsic::getDeclaration(F->getParent(), 563 StoreInts[fArgs.size() - 3], Tys); 564 else 565 NewFn = Intrinsic::getDeclaration(F->getParent(), 566 StoreLaneInts[fArgs.size() - 5], Tys); 567 return true; 568 } 569 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 570 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 571 return true; 572 } 573 if (Name.startswith("arm.neon.vqadds.")) { 574 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sadd_sat, 575 F->arg_begin()->getType()); 576 return true; 577 } 578 if (Name.startswith("arm.neon.vqaddu.")) { 579 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::uadd_sat, 580 F->arg_begin()->getType()); 581 return true; 582 } 583 if (Name.startswith("arm.neon.vqsubs.")) { 584 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ssub_sat, 585 F->arg_begin()->getType()); 586 return true; 587 } 588 if (Name.startswith("arm.neon.vqsubu.")) { 589 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::usub_sat, 590 F->arg_begin()->getType()); 591 return true; 592 } 593 if (Name.startswith("aarch64.neon.addp")) { 594 if (F->arg_size() != 2) 595 break; // Invalid IR. 596 VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); 597 if (Ty && Ty->getElementType()->isFloatingPointTy()) { 598 NewFn = Intrinsic::getDeclaration(F->getParent(), 599 Intrinsic::aarch64_neon_faddp, Ty); 600 return true; 601 } 602 } 603 break; 604 } 605 606 case 'c': { 607 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 608 rename(F); 609 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 610 F->arg_begin()->getType()); 611 return true; 612 } 613 if (Name.startswith("cttz.") && F->arg_size() == 1) { 614 rename(F); 615 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 616 F->arg_begin()->getType()); 617 return true; 618 } 619 break; 620 } 621 case 'd': { 622 if (Name == "dbg.value" && F->arg_size() == 4) { 623 rename(F); 624 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 625 return true; 626 } 627 break; 628 } 629 case 'e': { 630 SmallVector<StringRef, 2> Groups; 631 static const Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+"); 632 if (R.match(Name, &Groups)) { 633 Intrinsic::ID ID = Intrinsic::not_intrinsic; 634 if (Groups[1] == "fadd") 635 ID = Intrinsic::experimental_vector_reduce_v2_fadd; 636 if (Groups[1] == "fmul") 637 ID = Intrinsic::experimental_vector_reduce_v2_fmul; 638 639 if (ID != Intrinsic::not_intrinsic) { 640 rename(F); 641 auto Args = F->getFunctionType()->params(); 642 Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]}; 643 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys); 644 return true; 645 } 646 } 647 break; 648 } 649 case 'i': 650 case 'l': { 651 bool IsLifetimeStart = Name.startswith("lifetime.start"); 652 if (IsLifetimeStart || Name.startswith("invariant.start")) { 653 Intrinsic::ID ID = IsLifetimeStart ? 654 Intrinsic::lifetime_start : Intrinsic::invariant_start; 655 auto Args = F->getFunctionType()->params(); 656 Type* ObjectPtr[1] = {Args[1]}; 657 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 658 rename(F); 659 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 660 return true; 661 } 662 } 663 664 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 665 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 666 Intrinsic::ID ID = IsLifetimeEnd ? 667 Intrinsic::lifetime_end : Intrinsic::invariant_end; 668 669 auto Args = F->getFunctionType()->params(); 670 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 671 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 672 rename(F); 673 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 674 return true; 675 } 676 } 677 if (Name.startswith("invariant.group.barrier")) { 678 // Rename invariant.group.barrier to launder.invariant.group 679 auto Args = F->getFunctionType()->params(); 680 Type* ObjectPtr[1] = {Args[0]}; 681 rename(F); 682 NewFn = Intrinsic::getDeclaration(F->getParent(), 683 Intrinsic::launder_invariant_group, ObjectPtr); 684 return true; 685 686 } 687 688 break; 689 } 690 case 'm': { 691 if (Name.startswith("masked.load.")) { 692 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 693 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 694 rename(F); 695 NewFn = Intrinsic::getDeclaration(F->getParent(), 696 Intrinsic::masked_load, 697 Tys); 698 return true; 699 } 700 } 701 if (Name.startswith("masked.store.")) { 702 auto Args = F->getFunctionType()->params(); 703 Type *Tys[] = { Args[0], Args[1] }; 704 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 705 rename(F); 706 NewFn = Intrinsic::getDeclaration(F->getParent(), 707 Intrinsic::masked_store, 708 Tys); 709 return true; 710 } 711 } 712 // Renaming gather/scatter intrinsics with no address space overloading 713 // to the new overload which includes an address space 714 if (Name.startswith("masked.gather.")) { 715 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 716 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 717 rename(F); 718 NewFn = Intrinsic::getDeclaration(F->getParent(), 719 Intrinsic::masked_gather, Tys); 720 return true; 721 } 722 } 723 if (Name.startswith("masked.scatter.")) { 724 auto Args = F->getFunctionType()->params(); 725 Type *Tys[] = {Args[0], Args[1]}; 726 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 727 rename(F); 728 NewFn = Intrinsic::getDeclaration(F->getParent(), 729 Intrinsic::masked_scatter, Tys); 730 return true; 731 } 732 } 733 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 734 // alignment parameter to embedding the alignment as an attribute of 735 // the pointer args. 736 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 737 rename(F); 738 // Get the types of dest, src, and len 739 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 740 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 741 ParamTypes); 742 return true; 743 } 744 if (Name.startswith("memmove.") && F->arg_size() == 5) { 745 rename(F); 746 // Get the types of dest, src, and len 747 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 748 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 749 ParamTypes); 750 return true; 751 } 752 if (Name.startswith("memset.") && F->arg_size() == 5) { 753 rename(F); 754 // Get the types of dest, and len 755 const auto *FT = F->getFunctionType(); 756 Type *ParamTypes[2] = { 757 FT->getParamType(0), // Dest 758 FT->getParamType(2) // len 759 }; 760 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 761 ParamTypes); 762 return true; 763 } 764 break; 765 } 766 case 'n': { 767 if (Name.startswith("nvvm.")) { 768 Name = Name.substr(5); 769 770 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 771 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 772 .Cases("brev32", "brev64", Intrinsic::bitreverse) 773 .Case("clz.i", Intrinsic::ctlz) 774 .Case("popc.i", Intrinsic::ctpop) 775 .Default(Intrinsic::not_intrinsic); 776 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 777 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 778 {F->getReturnType()}); 779 return true; 780 } 781 782 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 783 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 784 // 785 // TODO: We could add lohi.i2d. 786 bool Expand = StringSwitch<bool>(Name) 787 .Cases("abs.i", "abs.ll", true) 788 .Cases("clz.ll", "popc.ll", "h2f", true) 789 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 790 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 791 .StartsWith("atomic.load.add.f32.p", true) 792 .StartsWith("atomic.load.add.f64.p", true) 793 .Default(false); 794 if (Expand) { 795 NewFn = nullptr; 796 return true; 797 } 798 } 799 break; 800 } 801 case 'o': 802 // We only need to change the name to match the mangling including the 803 // address space. 804 if (Name.startswith("objectsize.")) { 805 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 806 if (F->arg_size() == 2 || F->arg_size() == 3 || 807 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 808 rename(F); 809 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 810 Tys); 811 return true; 812 } 813 } 814 break; 815 816 case 'p': 817 if (Name == "prefetch") { 818 // Handle address space overloading. 819 Type *Tys[] = {F->arg_begin()->getType()}; 820 if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { 821 rename(F); 822 NewFn = 823 Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); 824 return true; 825 } 826 } 827 break; 828 829 case 's': 830 if (Name == "stackprotectorcheck") { 831 NewFn = nullptr; 832 return true; 833 } 834 break; 835 836 case 'x': 837 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 838 return true; 839 } 840 // Remangle our intrinsic since we upgrade the mangling 841 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 842 if (Result != None) { 843 NewFn = Result.getValue(); 844 return true; 845 } 846 847 // This may not belong here. This function is effectively being overloaded 848 // to both detect an intrinsic which needs upgrading, and to provide the 849 // upgraded form of the intrinsic. We should perhaps have two separate 850 // functions for this. 851 return false; 852 } 853 854 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 855 NewFn = nullptr; 856 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 857 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 858 859 // Upgrade intrinsic attributes. This does not change the function. 860 if (NewFn) 861 F = NewFn; 862 if (Intrinsic::ID id = F->getIntrinsicID()) 863 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 864 return Upgraded; 865 } 866 867 GlobalVariable *llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 868 if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" || 869 GV->getName() == "llvm.global_dtors")) || 870 !GV->hasInitializer()) 871 return nullptr; 872 ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType()); 873 if (!ATy) 874 return nullptr; 875 StructType *STy = dyn_cast<StructType>(ATy->getElementType()); 876 if (!STy || STy->getNumElements() != 2) 877 return nullptr; 878 879 LLVMContext &C = GV->getContext(); 880 IRBuilder<> IRB(C); 881 auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1), 882 IRB.getInt8PtrTy()); 883 Constant *Init = GV->getInitializer(); 884 unsigned N = Init->getNumOperands(); 885 std::vector<Constant *> NewCtors(N); 886 for (unsigned i = 0; i != N; ++i) { 887 auto Ctor = cast<Constant>(Init->getOperand(i)); 888 NewCtors[i] = ConstantStruct::get( 889 EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1), 890 Constant::getNullValue(IRB.getInt8PtrTy())); 891 } 892 Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors); 893 894 return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(), 895 NewInit, GV->getName()); 896 } 897 898 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 899 // to byte shuffles. 900 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 901 Value *Op, unsigned Shift) { 902 auto *ResultTy = cast<VectorType>(Op->getType()); 903 unsigned NumElts = ResultTy->getNumElements() * 8; 904 905 // Bitcast from a 64-bit element type to a byte element type. 906 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 907 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 908 909 // We'll be shuffling in zeroes. 910 Value *Res = Constant::getNullValue(VecTy); 911 912 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 913 // we'll just return the zero vector. 914 if (Shift < 16) { 915 int Idxs[64]; 916 // 256/512-bit version is split into 2/4 16-byte lanes. 917 for (unsigned l = 0; l != NumElts; l += 16) 918 for (unsigned i = 0; i != 16; ++i) { 919 unsigned Idx = NumElts + i - Shift; 920 if (Idx < NumElts) 921 Idx -= NumElts - 16; // end of lane, switch operand. 922 Idxs[l + i] = Idx + l; 923 } 924 925 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 926 } 927 928 // Bitcast back to a 64-bit element type. 929 return Builder.CreateBitCast(Res, ResultTy, "cast"); 930 } 931 932 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 933 // to byte shuffles. 934 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 935 unsigned Shift) { 936 auto *ResultTy = cast<VectorType>(Op->getType()); 937 unsigned NumElts = ResultTy->getNumElements() * 8; 938 939 // Bitcast from a 64-bit element type to a byte element type. 940 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 941 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 942 943 // We'll be shuffling in zeroes. 944 Value *Res = Constant::getNullValue(VecTy); 945 946 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 947 // we'll just return the zero vector. 948 if (Shift < 16) { 949 int Idxs[64]; 950 // 256/512-bit version is split into 2/4 16-byte lanes. 951 for (unsigned l = 0; l != NumElts; l += 16) 952 for (unsigned i = 0; i != 16; ++i) { 953 unsigned Idx = i + Shift; 954 if (Idx >= 16) 955 Idx += NumElts - 16; // end of lane, switch operand. 956 Idxs[l + i] = Idx + l; 957 } 958 959 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 960 } 961 962 // Bitcast back to a 64-bit element type. 963 return Builder.CreateBitCast(Res, ResultTy, "cast"); 964 } 965 966 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 967 unsigned NumElts) { 968 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 969 cast<IntegerType>(Mask->getType())->getBitWidth()); 970 Mask = Builder.CreateBitCast(Mask, MaskTy); 971 972 // If we have less than 8 elements, then the starting mask was an i8 and 973 // we need to extract down to the right number of elements. 974 if (NumElts < 8) { 975 int Indices[4]; 976 for (unsigned i = 0; i != NumElts; ++i) 977 Indices[i] = i; 978 Mask = Builder.CreateShuffleVector(Mask, Mask, 979 makeArrayRef(Indices, NumElts), 980 "extract"); 981 } 982 983 return Mask; 984 } 985 986 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 987 Value *Op0, Value *Op1) { 988 // If the mask is all ones just emit the first operation. 989 if (const auto *C = dyn_cast<Constant>(Mask)) 990 if (C->isAllOnesValue()) 991 return Op0; 992 993 Mask = getX86MaskVec(Builder, Mask, 994 cast<VectorType>(Op0->getType())->getNumElements()); 995 return Builder.CreateSelect(Mask, Op0, Op1); 996 } 997 998 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 999 Value *Op0, Value *Op1) { 1000 // If the mask is all ones just emit the first operation. 1001 if (const auto *C = dyn_cast<Constant>(Mask)) 1002 if (C->isAllOnesValue()) 1003 return Op0; 1004 1005 llvm::VectorType *MaskTy = 1006 llvm::VectorType::get(Builder.getInt1Ty(), 1007 Mask->getType()->getIntegerBitWidth()); 1008 Mask = Builder.CreateBitCast(Mask, MaskTy); 1009 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 1010 return Builder.CreateSelect(Mask, Op0, Op1); 1011 } 1012 1013 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 1014 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 1015 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 1016 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 1017 Value *Op1, Value *Shift, 1018 Value *Passthru, Value *Mask, 1019 bool IsVALIGN) { 1020 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 1021 1022 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1023 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 1024 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 1025 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 1026 1027 // Mask the immediate for VALIGN. 1028 if (IsVALIGN) 1029 ShiftVal &= (NumElts - 1); 1030 1031 // If palignr is shifting the pair of vectors more than the size of two 1032 // lanes, emit zero. 1033 if (ShiftVal >= 32) 1034 return llvm::Constant::getNullValue(Op0->getType()); 1035 1036 // If palignr is shifting the pair of input vectors more than one lane, 1037 // but less than two lanes, convert to shifting in zeroes. 1038 if (ShiftVal > 16) { 1039 ShiftVal -= 16; 1040 Op1 = Op0; 1041 Op0 = llvm::Constant::getNullValue(Op0->getType()); 1042 } 1043 1044 int Indices[64]; 1045 // 256-bit palignr operates on 128-bit lanes so we need to handle that 1046 for (unsigned l = 0; l < NumElts; l += 16) { 1047 for (unsigned i = 0; i != 16; ++i) { 1048 unsigned Idx = ShiftVal + i; 1049 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 1050 Idx += NumElts - 16; // End of lane, switch operand. 1051 Indices[l + i] = Idx + l; 1052 } 1053 } 1054 1055 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 1056 makeArrayRef(Indices, NumElts), 1057 "palignr"); 1058 1059 return EmitX86Select(Builder, Mask, Align, Passthru); 1060 } 1061 1062 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 1063 bool ZeroMask, bool IndexForm) { 1064 Type *Ty = CI.getType(); 1065 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 1066 unsigned EltWidth = Ty->getScalarSizeInBits(); 1067 bool IsFloat = Ty->isFPOrFPVectorTy(); 1068 Intrinsic::ID IID; 1069 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 1070 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 1071 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 1072 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 1073 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 1074 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 1075 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 1076 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 1077 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1078 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 1079 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1080 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 1081 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1082 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 1083 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1084 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 1085 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1086 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 1087 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1088 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 1089 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1090 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 1091 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1092 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 1093 else if (VecWidth == 128 && EltWidth == 16) 1094 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 1095 else if (VecWidth == 256 && EltWidth == 16) 1096 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 1097 else if (VecWidth == 512 && EltWidth == 16) 1098 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 1099 else if (VecWidth == 128 && EltWidth == 8) 1100 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 1101 else if (VecWidth == 256 && EltWidth == 8) 1102 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 1103 else if (VecWidth == 512 && EltWidth == 8) 1104 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 1105 else 1106 llvm_unreachable("Unexpected intrinsic"); 1107 1108 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 1109 CI.getArgOperand(2) }; 1110 1111 // If this isn't index form we need to swap operand 0 and 1. 1112 if (!IndexForm) 1113 std::swap(Args[0], Args[1]); 1114 1115 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1116 Args); 1117 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 1118 : Builder.CreateBitCast(CI.getArgOperand(1), 1119 Ty); 1120 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1121 } 1122 1123 static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1124 bool IsSigned, bool IsAddition) { 1125 Type *Ty = CI.getType(); 1126 Value *Op0 = CI.getOperand(0); 1127 Value *Op1 = CI.getOperand(1); 1128 1129 Intrinsic::ID IID = 1130 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 1131 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 1132 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1133 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1134 1135 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1136 Value *VecSrc = CI.getOperand(2); 1137 Value *Mask = CI.getOperand(3); 1138 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1139 } 1140 return Res; 1141 } 1142 1143 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1144 bool IsRotateRight) { 1145 Type *Ty = CI.getType(); 1146 Value *Src = CI.getArgOperand(0); 1147 Value *Amt = CI.getArgOperand(1); 1148 1149 // Amount may be scalar immediate, in which case create a splat vector. 1150 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1151 // we only care about the lowest log2 bits anyway. 1152 if (Amt->getType() != Ty) { 1153 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1154 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1155 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1156 } 1157 1158 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1159 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1160 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1161 1162 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1163 Value *VecSrc = CI.getOperand(2); 1164 Value *Mask = CI.getOperand(3); 1165 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1166 } 1167 return Res; 1168 } 1169 1170 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, 1171 bool IsSigned) { 1172 Type *Ty = CI.getType(); 1173 Value *LHS = CI.getArgOperand(0); 1174 Value *RHS = CI.getArgOperand(1); 1175 1176 CmpInst::Predicate Pred; 1177 switch (Imm) { 1178 case 0x0: 1179 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 1180 break; 1181 case 0x1: 1182 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 1183 break; 1184 case 0x2: 1185 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 1186 break; 1187 case 0x3: 1188 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 1189 break; 1190 case 0x4: 1191 Pred = ICmpInst::ICMP_EQ; 1192 break; 1193 case 0x5: 1194 Pred = ICmpInst::ICMP_NE; 1195 break; 1196 case 0x6: 1197 return Constant::getNullValue(Ty); // FALSE 1198 case 0x7: 1199 return Constant::getAllOnesValue(Ty); // TRUE 1200 default: 1201 llvm_unreachable("Unknown XOP vpcom/vpcomu predicate"); 1202 } 1203 1204 Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS); 1205 Value *Ext = Builder.CreateSExt(Cmp, Ty); 1206 return Ext; 1207 } 1208 1209 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1210 bool IsShiftRight, bool ZeroMask) { 1211 Type *Ty = CI.getType(); 1212 Value *Op0 = CI.getArgOperand(0); 1213 Value *Op1 = CI.getArgOperand(1); 1214 Value *Amt = CI.getArgOperand(2); 1215 1216 if (IsShiftRight) 1217 std::swap(Op0, Op1); 1218 1219 // Amount may be scalar immediate, in which case create a splat vector. 1220 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1221 // we only care about the lowest log2 bits anyway. 1222 if (Amt->getType() != Ty) { 1223 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1224 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1225 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1226 } 1227 1228 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1229 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1230 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1231 1232 unsigned NumArgs = CI.getNumArgOperands(); 1233 if (NumArgs >= 4) { // For masked intrinsics. 1234 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1235 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1236 CI.getArgOperand(0); 1237 Value *Mask = CI.getOperand(NumArgs - 1); 1238 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1239 } 1240 return Res; 1241 } 1242 1243 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1244 Value *Ptr, Value *Data, Value *Mask, 1245 bool Aligned) { 1246 // Cast the pointer to the right type. 1247 Ptr = Builder.CreateBitCast(Ptr, 1248 llvm::PointerType::getUnqual(Data->getType())); 1249 const Align Alignment = 1250 Aligned 1251 ? Align(Data->getType()->getPrimitiveSizeInBits().getFixedSize() / 8) 1252 : Align(1); 1253 1254 // If the mask is all ones just emit a regular store. 1255 if (const auto *C = dyn_cast<Constant>(Mask)) 1256 if (C->isAllOnesValue()) 1257 return Builder.CreateAlignedStore(Data, Ptr, Alignment); 1258 1259 // Convert the mask from an integer type to a vector of i1. 1260 unsigned NumElts = cast<VectorType>(Data->getType())->getNumElements(); 1261 Mask = getX86MaskVec(Builder, Mask, NumElts); 1262 return Builder.CreateMaskedStore(Data, Ptr, Alignment, Mask); 1263 } 1264 1265 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1266 Value *Ptr, Value *Passthru, Value *Mask, 1267 bool Aligned) { 1268 Type *ValTy = Passthru->getType(); 1269 // Cast the pointer to the right type. 1270 Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); 1271 const Align Alignment = 1272 Aligned 1273 ? Align(Passthru->getType()->getPrimitiveSizeInBits().getFixedSize() / 1274 8) 1275 : Align(1); 1276 1277 // If the mask is all ones just emit a regular store. 1278 if (const auto *C = dyn_cast<Constant>(Mask)) 1279 if (C->isAllOnesValue()) 1280 return Builder.CreateAlignedLoad(ValTy, Ptr, Alignment); 1281 1282 // Convert the mask from an integer type to a vector of i1. 1283 unsigned NumElts = cast<VectorType>(Passthru->getType())->getNumElements(); 1284 Mask = getX86MaskVec(Builder, Mask, NumElts); 1285 return Builder.CreateMaskedLoad(Ptr, Alignment, Mask, Passthru); 1286 } 1287 1288 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1289 Value *Op0 = CI.getArgOperand(0); 1290 llvm::Type *Ty = Op0->getType(); 1291 Value *Zero = llvm::Constant::getNullValue(Ty); 1292 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 1293 Value *Neg = Builder.CreateNeg(Op0); 1294 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 1295 1296 if (CI.getNumArgOperands() == 3) 1297 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1298 1299 return Res; 1300 } 1301 1302 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1303 ICmpInst::Predicate Pred) { 1304 Value *Op0 = CI.getArgOperand(0); 1305 Value *Op1 = CI.getArgOperand(1); 1306 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1307 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1308 1309 if (CI.getNumArgOperands() == 4) 1310 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1311 1312 return Res; 1313 } 1314 1315 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1316 Type *Ty = CI.getType(); 1317 1318 // Arguments have a vXi32 type so cast to vXi64. 1319 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1320 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1321 1322 if (IsSigned) { 1323 // Shift left then arithmetic shift right. 1324 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1325 LHS = Builder.CreateShl(LHS, ShiftAmt); 1326 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1327 RHS = Builder.CreateShl(RHS, ShiftAmt); 1328 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1329 } else { 1330 // Clear the upper bits. 1331 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1332 LHS = Builder.CreateAnd(LHS, Mask); 1333 RHS = Builder.CreateAnd(RHS, Mask); 1334 } 1335 1336 Value *Res = Builder.CreateMul(LHS, RHS); 1337 1338 if (CI.getNumArgOperands() == 4) 1339 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1340 1341 return Res; 1342 } 1343 1344 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1345 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1346 Value *Mask) { 1347 unsigned NumElts = cast<VectorType>(Vec->getType())->getNumElements(); 1348 if (Mask) { 1349 const auto *C = dyn_cast<Constant>(Mask); 1350 if (!C || !C->isAllOnesValue()) 1351 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1352 } 1353 1354 if (NumElts < 8) { 1355 int Indices[8]; 1356 for (unsigned i = 0; i != NumElts; ++i) 1357 Indices[i] = i; 1358 for (unsigned i = NumElts; i != 8; ++i) 1359 Indices[i] = NumElts + i % NumElts; 1360 Vec = Builder.CreateShuffleVector(Vec, 1361 Constant::getNullValue(Vec->getType()), 1362 Indices); 1363 } 1364 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1365 } 1366 1367 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1368 unsigned CC, bool Signed) { 1369 Value *Op0 = CI.getArgOperand(0); 1370 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1371 1372 Value *Cmp; 1373 if (CC == 3) { 1374 Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1375 } else if (CC == 7) { 1376 Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1377 } else { 1378 ICmpInst::Predicate Pred; 1379 switch (CC) { 1380 default: llvm_unreachable("Unknown condition code"); 1381 case 0: Pred = ICmpInst::ICMP_EQ; break; 1382 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1383 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1384 case 4: Pred = ICmpInst::ICMP_NE; break; 1385 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1386 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1387 } 1388 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1389 } 1390 1391 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1392 1393 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1394 } 1395 1396 // Replace a masked intrinsic with an older unmasked intrinsic. 1397 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1398 Intrinsic::ID IID) { 1399 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1400 Value *Rep = Builder.CreateCall(Intrin, 1401 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1402 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1403 } 1404 1405 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1406 Value* A = CI.getArgOperand(0); 1407 Value* B = CI.getArgOperand(1); 1408 Value* Src = CI.getArgOperand(2); 1409 Value* Mask = CI.getArgOperand(3); 1410 1411 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1412 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1413 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1414 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1415 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1416 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1417 } 1418 1419 1420 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1421 Value* Op = CI.getArgOperand(0); 1422 Type* ReturnOp = CI.getType(); 1423 unsigned NumElts = cast<VectorType>(CI.getType())->getNumElements(); 1424 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1425 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1426 } 1427 1428 // Replace intrinsic with unmasked version and a select. 1429 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1430 CallInst &CI, Value *&Rep) { 1431 Name = Name.substr(12); // Remove avx512.mask. 1432 1433 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1434 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1435 Intrinsic::ID IID; 1436 if (Name.startswith("max.p")) { 1437 if (VecWidth == 128 && EltWidth == 32) 1438 IID = Intrinsic::x86_sse_max_ps; 1439 else if (VecWidth == 128 && EltWidth == 64) 1440 IID = Intrinsic::x86_sse2_max_pd; 1441 else if (VecWidth == 256 && EltWidth == 32) 1442 IID = Intrinsic::x86_avx_max_ps_256; 1443 else if (VecWidth == 256 && EltWidth == 64) 1444 IID = Intrinsic::x86_avx_max_pd_256; 1445 else 1446 llvm_unreachable("Unexpected intrinsic"); 1447 } else if (Name.startswith("min.p")) { 1448 if (VecWidth == 128 && EltWidth == 32) 1449 IID = Intrinsic::x86_sse_min_ps; 1450 else if (VecWidth == 128 && EltWidth == 64) 1451 IID = Intrinsic::x86_sse2_min_pd; 1452 else if (VecWidth == 256 && EltWidth == 32) 1453 IID = Intrinsic::x86_avx_min_ps_256; 1454 else if (VecWidth == 256 && EltWidth == 64) 1455 IID = Intrinsic::x86_avx_min_pd_256; 1456 else 1457 llvm_unreachable("Unexpected intrinsic"); 1458 } else if (Name.startswith("pshuf.b.")) { 1459 if (VecWidth == 128) 1460 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1461 else if (VecWidth == 256) 1462 IID = Intrinsic::x86_avx2_pshuf_b; 1463 else if (VecWidth == 512) 1464 IID = Intrinsic::x86_avx512_pshuf_b_512; 1465 else 1466 llvm_unreachable("Unexpected intrinsic"); 1467 } else if (Name.startswith("pmul.hr.sw.")) { 1468 if (VecWidth == 128) 1469 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1470 else if (VecWidth == 256) 1471 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1472 else if (VecWidth == 512) 1473 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1474 else 1475 llvm_unreachable("Unexpected intrinsic"); 1476 } else if (Name.startswith("pmulh.w.")) { 1477 if (VecWidth == 128) 1478 IID = Intrinsic::x86_sse2_pmulh_w; 1479 else if (VecWidth == 256) 1480 IID = Intrinsic::x86_avx2_pmulh_w; 1481 else if (VecWidth == 512) 1482 IID = Intrinsic::x86_avx512_pmulh_w_512; 1483 else 1484 llvm_unreachable("Unexpected intrinsic"); 1485 } else if (Name.startswith("pmulhu.w.")) { 1486 if (VecWidth == 128) 1487 IID = Intrinsic::x86_sse2_pmulhu_w; 1488 else if (VecWidth == 256) 1489 IID = Intrinsic::x86_avx2_pmulhu_w; 1490 else if (VecWidth == 512) 1491 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1492 else 1493 llvm_unreachable("Unexpected intrinsic"); 1494 } else if (Name.startswith("pmaddw.d.")) { 1495 if (VecWidth == 128) 1496 IID = Intrinsic::x86_sse2_pmadd_wd; 1497 else if (VecWidth == 256) 1498 IID = Intrinsic::x86_avx2_pmadd_wd; 1499 else if (VecWidth == 512) 1500 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1501 else 1502 llvm_unreachable("Unexpected intrinsic"); 1503 } else if (Name.startswith("pmaddubs.w.")) { 1504 if (VecWidth == 128) 1505 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1506 else if (VecWidth == 256) 1507 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1508 else if (VecWidth == 512) 1509 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1510 else 1511 llvm_unreachable("Unexpected intrinsic"); 1512 } else if (Name.startswith("packsswb.")) { 1513 if (VecWidth == 128) 1514 IID = Intrinsic::x86_sse2_packsswb_128; 1515 else if (VecWidth == 256) 1516 IID = Intrinsic::x86_avx2_packsswb; 1517 else if (VecWidth == 512) 1518 IID = Intrinsic::x86_avx512_packsswb_512; 1519 else 1520 llvm_unreachable("Unexpected intrinsic"); 1521 } else if (Name.startswith("packssdw.")) { 1522 if (VecWidth == 128) 1523 IID = Intrinsic::x86_sse2_packssdw_128; 1524 else if (VecWidth == 256) 1525 IID = Intrinsic::x86_avx2_packssdw; 1526 else if (VecWidth == 512) 1527 IID = Intrinsic::x86_avx512_packssdw_512; 1528 else 1529 llvm_unreachable("Unexpected intrinsic"); 1530 } else if (Name.startswith("packuswb.")) { 1531 if (VecWidth == 128) 1532 IID = Intrinsic::x86_sse2_packuswb_128; 1533 else if (VecWidth == 256) 1534 IID = Intrinsic::x86_avx2_packuswb; 1535 else if (VecWidth == 512) 1536 IID = Intrinsic::x86_avx512_packuswb_512; 1537 else 1538 llvm_unreachable("Unexpected intrinsic"); 1539 } else if (Name.startswith("packusdw.")) { 1540 if (VecWidth == 128) 1541 IID = Intrinsic::x86_sse41_packusdw; 1542 else if (VecWidth == 256) 1543 IID = Intrinsic::x86_avx2_packusdw; 1544 else if (VecWidth == 512) 1545 IID = Intrinsic::x86_avx512_packusdw_512; 1546 else 1547 llvm_unreachable("Unexpected intrinsic"); 1548 } else if (Name.startswith("vpermilvar.")) { 1549 if (VecWidth == 128 && EltWidth == 32) 1550 IID = Intrinsic::x86_avx_vpermilvar_ps; 1551 else if (VecWidth == 128 && EltWidth == 64) 1552 IID = Intrinsic::x86_avx_vpermilvar_pd; 1553 else if (VecWidth == 256 && EltWidth == 32) 1554 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1555 else if (VecWidth == 256 && EltWidth == 64) 1556 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1557 else if (VecWidth == 512 && EltWidth == 32) 1558 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1559 else if (VecWidth == 512 && EltWidth == 64) 1560 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1561 else 1562 llvm_unreachable("Unexpected intrinsic"); 1563 } else if (Name == "cvtpd2dq.256") { 1564 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1565 } else if (Name == "cvtpd2ps.256") { 1566 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1567 } else if (Name == "cvttpd2dq.256") { 1568 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1569 } else if (Name == "cvttps2dq.128") { 1570 IID = Intrinsic::x86_sse2_cvttps2dq; 1571 } else if (Name == "cvttps2dq.256") { 1572 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1573 } else if (Name.startswith("permvar.")) { 1574 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1575 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1576 IID = Intrinsic::x86_avx2_permps; 1577 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1578 IID = Intrinsic::x86_avx2_permd; 1579 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1580 IID = Intrinsic::x86_avx512_permvar_df_256; 1581 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1582 IID = Intrinsic::x86_avx512_permvar_di_256; 1583 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1584 IID = Intrinsic::x86_avx512_permvar_sf_512; 1585 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1586 IID = Intrinsic::x86_avx512_permvar_si_512; 1587 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1588 IID = Intrinsic::x86_avx512_permvar_df_512; 1589 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1590 IID = Intrinsic::x86_avx512_permvar_di_512; 1591 else if (VecWidth == 128 && EltWidth == 16) 1592 IID = Intrinsic::x86_avx512_permvar_hi_128; 1593 else if (VecWidth == 256 && EltWidth == 16) 1594 IID = Intrinsic::x86_avx512_permvar_hi_256; 1595 else if (VecWidth == 512 && EltWidth == 16) 1596 IID = Intrinsic::x86_avx512_permvar_hi_512; 1597 else if (VecWidth == 128 && EltWidth == 8) 1598 IID = Intrinsic::x86_avx512_permvar_qi_128; 1599 else if (VecWidth == 256 && EltWidth == 8) 1600 IID = Intrinsic::x86_avx512_permvar_qi_256; 1601 else if (VecWidth == 512 && EltWidth == 8) 1602 IID = Intrinsic::x86_avx512_permvar_qi_512; 1603 else 1604 llvm_unreachable("Unexpected intrinsic"); 1605 } else if (Name.startswith("dbpsadbw.")) { 1606 if (VecWidth == 128) 1607 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1608 else if (VecWidth == 256) 1609 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1610 else if (VecWidth == 512) 1611 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1612 else 1613 llvm_unreachable("Unexpected intrinsic"); 1614 } else if (Name.startswith("pmultishift.qb.")) { 1615 if (VecWidth == 128) 1616 IID = Intrinsic::x86_avx512_pmultishift_qb_128; 1617 else if (VecWidth == 256) 1618 IID = Intrinsic::x86_avx512_pmultishift_qb_256; 1619 else if (VecWidth == 512) 1620 IID = Intrinsic::x86_avx512_pmultishift_qb_512; 1621 else 1622 llvm_unreachable("Unexpected intrinsic"); 1623 } else if (Name.startswith("conflict.")) { 1624 if (Name[9] == 'd' && VecWidth == 128) 1625 IID = Intrinsic::x86_avx512_conflict_d_128; 1626 else if (Name[9] == 'd' && VecWidth == 256) 1627 IID = Intrinsic::x86_avx512_conflict_d_256; 1628 else if (Name[9] == 'd' && VecWidth == 512) 1629 IID = Intrinsic::x86_avx512_conflict_d_512; 1630 else if (Name[9] == 'q' && VecWidth == 128) 1631 IID = Intrinsic::x86_avx512_conflict_q_128; 1632 else if (Name[9] == 'q' && VecWidth == 256) 1633 IID = Intrinsic::x86_avx512_conflict_q_256; 1634 else if (Name[9] == 'q' && VecWidth == 512) 1635 IID = Intrinsic::x86_avx512_conflict_q_512; 1636 else 1637 llvm_unreachable("Unexpected intrinsic"); 1638 } else if (Name.startswith("pavg.")) { 1639 if (Name[5] == 'b' && VecWidth == 128) 1640 IID = Intrinsic::x86_sse2_pavg_b; 1641 else if (Name[5] == 'b' && VecWidth == 256) 1642 IID = Intrinsic::x86_avx2_pavg_b; 1643 else if (Name[5] == 'b' && VecWidth == 512) 1644 IID = Intrinsic::x86_avx512_pavg_b_512; 1645 else if (Name[5] == 'w' && VecWidth == 128) 1646 IID = Intrinsic::x86_sse2_pavg_w; 1647 else if (Name[5] == 'w' && VecWidth == 256) 1648 IID = Intrinsic::x86_avx2_pavg_w; 1649 else if (Name[5] == 'w' && VecWidth == 512) 1650 IID = Intrinsic::x86_avx512_pavg_w_512; 1651 else 1652 llvm_unreachable("Unexpected intrinsic"); 1653 } else 1654 return false; 1655 1656 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1657 CI.arg_operands().end()); 1658 Args.pop_back(); 1659 Args.pop_back(); 1660 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1661 Args); 1662 unsigned NumArgs = CI.getNumArgOperands(); 1663 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1664 CI.getArgOperand(NumArgs - 2)); 1665 return true; 1666 } 1667 1668 /// Upgrade comment in call to inline asm that represents an objc retain release 1669 /// marker. 1670 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1671 size_t Pos; 1672 if (AsmStr->find("mov\tfp") == 0 && 1673 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1674 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1675 AsmStr->replace(Pos, 1, ";"); 1676 } 1677 return; 1678 } 1679 1680 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1681 /// provided to seamlessly integrate with existing context. 1682 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1683 Function *F = CI->getCalledFunction(); 1684 LLVMContext &C = CI->getContext(); 1685 IRBuilder<> Builder(C); 1686 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1687 1688 assert(F && "Intrinsic call is not direct?"); 1689 1690 if (!NewFn) { 1691 // Get the Function's name. 1692 StringRef Name = F->getName(); 1693 1694 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1695 Name = Name.substr(5); 1696 1697 bool IsX86 = Name.startswith("x86."); 1698 if (IsX86) 1699 Name = Name.substr(4); 1700 bool IsNVVM = Name.startswith("nvvm."); 1701 if (IsNVVM) 1702 Name = Name.substr(5); 1703 1704 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1705 Module *M = F->getParent(); 1706 SmallVector<Metadata *, 1> Elts; 1707 Elts.push_back( 1708 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1709 MDNode *Node = MDNode::get(C, Elts); 1710 1711 Value *Arg0 = CI->getArgOperand(0); 1712 Value *Arg1 = CI->getArgOperand(1); 1713 1714 // Nontemporal (unaligned) store of the 0'th element of the float/double 1715 // vector. 1716 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1717 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1718 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1719 Value *Extract = 1720 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1721 1722 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, Align(1)); 1723 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1724 1725 // Remove intrinsic. 1726 CI->eraseFromParent(); 1727 return; 1728 } 1729 1730 if (IsX86 && (Name.startswith("avx.movnt.") || 1731 Name.startswith("avx512.storent."))) { 1732 Module *M = F->getParent(); 1733 SmallVector<Metadata *, 1> Elts; 1734 Elts.push_back( 1735 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1736 MDNode *Node = MDNode::get(C, Elts); 1737 1738 Value *Arg0 = CI->getArgOperand(0); 1739 Value *Arg1 = CI->getArgOperand(1); 1740 1741 // Convert the type of the pointer to a pointer to the stored type. 1742 Value *BC = Builder.CreateBitCast(Arg0, 1743 PointerType::getUnqual(Arg1->getType()), 1744 "cast"); 1745 StoreInst *SI = Builder.CreateAlignedStore( 1746 Arg1, BC, 1747 Align(Arg1->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 1748 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1749 1750 // Remove intrinsic. 1751 CI->eraseFromParent(); 1752 return; 1753 } 1754 1755 if (IsX86 && Name == "sse2.storel.dq") { 1756 Value *Arg0 = CI->getArgOperand(0); 1757 Value *Arg1 = CI->getArgOperand(1); 1758 1759 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 1760 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1761 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1762 Value *BC = Builder.CreateBitCast(Arg0, 1763 PointerType::getUnqual(Elt->getType()), 1764 "cast"); 1765 Builder.CreateAlignedStore(Elt, BC, Align(1)); 1766 1767 // Remove intrinsic. 1768 CI->eraseFromParent(); 1769 return; 1770 } 1771 1772 if (IsX86 && (Name.startswith("sse.storeu.") || 1773 Name.startswith("sse2.storeu.") || 1774 Name.startswith("avx.storeu."))) { 1775 Value *Arg0 = CI->getArgOperand(0); 1776 Value *Arg1 = CI->getArgOperand(1); 1777 1778 Arg0 = Builder.CreateBitCast(Arg0, 1779 PointerType::getUnqual(Arg1->getType()), 1780 "cast"); 1781 Builder.CreateAlignedStore(Arg1, Arg0, Align(1)); 1782 1783 // Remove intrinsic. 1784 CI->eraseFromParent(); 1785 return; 1786 } 1787 1788 if (IsX86 && Name == "avx512.mask.store.ss") { 1789 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1790 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1791 Mask, false); 1792 1793 // Remove intrinsic. 1794 CI->eraseFromParent(); 1795 return; 1796 } 1797 1798 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1799 // "avx512.mask.storeu." or "avx512.mask.store." 1800 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1801 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1802 CI->getArgOperand(2), Aligned); 1803 1804 // Remove intrinsic. 1805 CI->eraseFromParent(); 1806 return; 1807 } 1808 1809 Value *Rep; 1810 // Upgrade packed integer vector compare intrinsics to compare instructions. 1811 if (IsX86 && (Name.startswith("sse2.pcmp") || 1812 Name.startswith("avx2.pcmp"))) { 1813 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1814 bool CmpEq = Name[9] == 'e'; 1815 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1816 CI->getArgOperand(0), CI->getArgOperand(1)); 1817 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1818 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1819 Type *ExtTy = Type::getInt32Ty(C); 1820 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1821 ExtTy = Type::getInt64Ty(C); 1822 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1823 ExtTy->getPrimitiveSizeInBits(); 1824 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1825 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1826 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1827 Name == "sse2.sqrt.sd")) { 1828 Value *Vec = CI->getArgOperand(0); 1829 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1830 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1831 Intrinsic::sqrt, Elt0->getType()); 1832 Elt0 = Builder.CreateCall(Intr, Elt0); 1833 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1834 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1835 Name.startswith("sse2.sqrt.p") || 1836 Name.startswith("sse.sqrt.p"))) { 1837 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1838 Intrinsic::sqrt, 1839 CI->getType()), 1840 {CI->getArgOperand(0)}); 1841 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1842 if (CI->getNumArgOperands() == 4 && 1843 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1844 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1845 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1846 : Intrinsic::x86_avx512_sqrt_pd_512; 1847 1848 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1849 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1850 IID), Args); 1851 } else { 1852 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1853 Intrinsic::sqrt, 1854 CI->getType()), 1855 {CI->getArgOperand(0)}); 1856 } 1857 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1858 CI->getArgOperand(1)); 1859 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1860 Name.startswith("avx512.ptestnm"))) { 1861 Value *Op0 = CI->getArgOperand(0); 1862 Value *Op1 = CI->getArgOperand(1); 1863 Value *Mask = CI->getArgOperand(2); 1864 Rep = Builder.CreateAnd(Op0, Op1); 1865 llvm::Type *Ty = Op0->getType(); 1866 Value *Zero = llvm::Constant::getNullValue(Ty); 1867 ICmpInst::Predicate Pred = 1868 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1869 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1870 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1871 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1872 unsigned NumElts = 1873 cast<VectorType>(CI->getArgOperand(1)->getType())->getNumElements(); 1874 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1875 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1876 CI->getArgOperand(1)); 1877 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1878 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1879 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1880 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1881 int Indices[64]; 1882 for (unsigned i = 0; i != NumElts; ++i) 1883 Indices[i] = i; 1884 1885 // First extract half of each vector. This gives better codegen than 1886 // doing it in a single shuffle. 1887 LHS = Builder.CreateShuffleVector(LHS, LHS, 1888 makeArrayRef(Indices, NumElts / 2)); 1889 RHS = Builder.CreateShuffleVector(RHS, RHS, 1890 makeArrayRef(Indices, NumElts / 2)); 1891 // Concat the vectors. 1892 // NOTE: Operands have to be swapped to match intrinsic definition. 1893 Rep = Builder.CreateShuffleVector(RHS, LHS, 1894 makeArrayRef(Indices, NumElts)); 1895 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1896 } else if (IsX86 && Name == "avx512.kand.w") { 1897 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1898 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1899 Rep = Builder.CreateAnd(LHS, RHS); 1900 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1901 } else if (IsX86 && Name == "avx512.kandn.w") { 1902 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1903 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1904 LHS = Builder.CreateNot(LHS); 1905 Rep = Builder.CreateAnd(LHS, RHS); 1906 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1907 } else if (IsX86 && Name == "avx512.kor.w") { 1908 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1909 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1910 Rep = Builder.CreateOr(LHS, RHS); 1911 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1912 } else if (IsX86 && Name == "avx512.kxor.w") { 1913 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1914 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1915 Rep = Builder.CreateXor(LHS, RHS); 1916 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1917 } else if (IsX86 && Name == "avx512.kxnor.w") { 1918 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1919 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1920 LHS = Builder.CreateNot(LHS); 1921 Rep = Builder.CreateXor(LHS, RHS); 1922 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1923 } else if (IsX86 && Name == "avx512.knot.w") { 1924 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1925 Rep = Builder.CreateNot(Rep); 1926 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1927 } else if (IsX86 && 1928 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1929 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1930 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1931 Rep = Builder.CreateOr(LHS, RHS); 1932 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1933 Value *C; 1934 if (Name[14] == 'c') 1935 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1936 else 1937 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1938 Rep = Builder.CreateICmpEQ(Rep, C); 1939 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1940 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 1941 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 1942 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 1943 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1944 Type *I32Ty = Type::getInt32Ty(C); 1945 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1946 ConstantInt::get(I32Ty, 0)); 1947 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1948 ConstantInt::get(I32Ty, 0)); 1949 Value *EltOp; 1950 if (Name.contains(".add.")) 1951 EltOp = Builder.CreateFAdd(Elt0, Elt1); 1952 else if (Name.contains(".sub.")) 1953 EltOp = Builder.CreateFSub(Elt0, Elt1); 1954 else if (Name.contains(".mul.")) 1955 EltOp = Builder.CreateFMul(Elt0, Elt1); 1956 else 1957 EltOp = Builder.CreateFDiv(Elt0, Elt1); 1958 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 1959 ConstantInt::get(I32Ty, 0)); 1960 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1961 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1962 bool CmpEq = Name[16] == 'e'; 1963 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1964 } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) { 1965 Type *OpTy = CI->getArgOperand(0)->getType(); 1966 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1967 Intrinsic::ID IID; 1968 switch (VecWidth) { 1969 default: llvm_unreachable("Unexpected intrinsic"); 1970 case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break; 1971 case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break; 1972 case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break; 1973 } 1974 1975 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1976 { CI->getOperand(0), CI->getArgOperand(1) }); 1977 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1978 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 1979 Type *OpTy = CI->getArgOperand(0)->getType(); 1980 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1981 unsigned EltWidth = OpTy->getScalarSizeInBits(); 1982 Intrinsic::ID IID; 1983 if (VecWidth == 128 && EltWidth == 32) 1984 IID = Intrinsic::x86_avx512_fpclass_ps_128; 1985 else if (VecWidth == 256 && EltWidth == 32) 1986 IID = Intrinsic::x86_avx512_fpclass_ps_256; 1987 else if (VecWidth == 512 && EltWidth == 32) 1988 IID = Intrinsic::x86_avx512_fpclass_ps_512; 1989 else if (VecWidth == 128 && EltWidth == 64) 1990 IID = Intrinsic::x86_avx512_fpclass_pd_128; 1991 else if (VecWidth == 256 && EltWidth == 64) 1992 IID = Intrinsic::x86_avx512_fpclass_pd_256; 1993 else if (VecWidth == 512 && EltWidth == 64) 1994 IID = Intrinsic::x86_avx512_fpclass_pd_512; 1995 else 1996 llvm_unreachable("Unexpected intrinsic"); 1997 1998 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1999 { CI->getOperand(0), CI->getArgOperand(1) }); 2000 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 2001 } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) { 2002 Type *OpTy = CI->getArgOperand(0)->getType(); 2003 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2004 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2005 Intrinsic::ID IID; 2006 if (VecWidth == 128 && EltWidth == 32) 2007 IID = Intrinsic::x86_avx512_cmp_ps_128; 2008 else if (VecWidth == 256 && EltWidth == 32) 2009 IID = Intrinsic::x86_avx512_cmp_ps_256; 2010 else if (VecWidth == 512 && EltWidth == 32) 2011 IID = Intrinsic::x86_avx512_cmp_ps_512; 2012 else if (VecWidth == 128 && EltWidth == 64) 2013 IID = Intrinsic::x86_avx512_cmp_pd_128; 2014 else if (VecWidth == 256 && EltWidth == 64) 2015 IID = Intrinsic::x86_avx512_cmp_pd_256; 2016 else if (VecWidth == 512 && EltWidth == 64) 2017 IID = Intrinsic::x86_avx512_cmp_pd_512; 2018 else 2019 llvm_unreachable("Unexpected intrinsic"); 2020 2021 SmallVector<Value *, 4> Args; 2022 Args.push_back(CI->getArgOperand(0)); 2023 Args.push_back(CI->getArgOperand(1)); 2024 Args.push_back(CI->getArgOperand(2)); 2025 if (CI->getNumArgOperands() == 5) 2026 Args.push_back(CI->getArgOperand(4)); 2027 2028 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2029 Args); 2030 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3)); 2031 } else if (IsX86 && Name.startswith("avx512.mask.cmp.") && 2032 Name[16] != 'p') { 2033 // Integer compare intrinsics. 2034 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2035 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 2036 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 2037 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2038 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 2039 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 2040 Name.startswith("avx512.cvtw2mask.") || 2041 Name.startswith("avx512.cvtd2mask.") || 2042 Name.startswith("avx512.cvtq2mask."))) { 2043 Value *Op = CI->getArgOperand(0); 2044 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 2045 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 2046 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 2047 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 2048 Name == "ssse3.pabs.w.128" || 2049 Name == "ssse3.pabs.d.128" || 2050 Name.startswith("avx2.pabs") || 2051 Name.startswith("avx512.mask.pabs"))) { 2052 Rep = upgradeAbs(Builder, *CI); 2053 } else if (IsX86 && (Name == "sse41.pmaxsb" || 2054 Name == "sse2.pmaxs.w" || 2055 Name == "sse41.pmaxsd" || 2056 Name.startswith("avx2.pmaxs") || 2057 Name.startswith("avx512.mask.pmaxs"))) { 2058 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 2059 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 2060 Name == "sse41.pmaxuw" || 2061 Name == "sse41.pmaxud" || 2062 Name.startswith("avx2.pmaxu") || 2063 Name.startswith("avx512.mask.pmaxu"))) { 2064 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 2065 } else if (IsX86 && (Name == "sse41.pminsb" || 2066 Name == "sse2.pmins.w" || 2067 Name == "sse41.pminsd" || 2068 Name.startswith("avx2.pmins") || 2069 Name.startswith("avx512.mask.pmins"))) { 2070 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 2071 } else if (IsX86 && (Name == "sse2.pminu.b" || 2072 Name == "sse41.pminuw" || 2073 Name == "sse41.pminud" || 2074 Name.startswith("avx2.pminu") || 2075 Name.startswith("avx512.mask.pminu"))) { 2076 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 2077 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 2078 Name == "avx2.pmulu.dq" || 2079 Name == "avx512.pmulu.dq.512" || 2080 Name.startswith("avx512.mask.pmulu.dq."))) { 2081 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 2082 } else if (IsX86 && (Name == "sse41.pmuldq" || 2083 Name == "avx2.pmul.dq" || 2084 Name == "avx512.pmul.dq.512" || 2085 Name.startswith("avx512.mask.pmul.dq."))) { 2086 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 2087 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 2088 Name == "sse2.cvtsi2sd" || 2089 Name == "sse.cvtsi642ss" || 2090 Name == "sse2.cvtsi642sd")) { 2091 Rep = Builder.CreateSIToFP( 2092 CI->getArgOperand(1), 2093 cast<VectorType>(CI->getType())->getElementType()); 2094 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2095 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 2096 Rep = Builder.CreateUIToFP( 2097 CI->getArgOperand(1), 2098 cast<VectorType>(CI->getType())->getElementType()); 2099 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2100 } else if (IsX86 && Name == "sse2.cvtss2sd") { 2101 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 2102 Rep = Builder.CreateFPExt( 2103 Rep, cast<VectorType>(CI->getType())->getElementType()); 2104 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2105 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 2106 Name == "sse2.cvtdq2ps" || 2107 Name == "avx.cvtdq2.pd.256" || 2108 Name == "avx.cvtdq2.ps.256" || 2109 Name.startswith("avx512.mask.cvtdq2pd.") || 2110 Name.startswith("avx512.mask.cvtudq2pd.") || 2111 Name.startswith("avx512.mask.cvtdq2ps.") || 2112 Name.startswith("avx512.mask.cvtudq2ps.") || 2113 Name.startswith("avx512.mask.cvtqq2pd.") || 2114 Name.startswith("avx512.mask.cvtuqq2pd.") || 2115 Name == "avx512.mask.cvtqq2ps.256" || 2116 Name == "avx512.mask.cvtqq2ps.512" || 2117 Name == "avx512.mask.cvtuqq2ps.256" || 2118 Name == "avx512.mask.cvtuqq2ps.512" || 2119 Name == "sse2.cvtps2pd" || 2120 Name == "avx.cvt.ps2.pd.256" || 2121 Name == "avx512.mask.cvtps2pd.128" || 2122 Name == "avx512.mask.cvtps2pd.256")) { 2123 auto *DstTy = cast<VectorType>(CI->getType()); 2124 Rep = CI->getArgOperand(0); 2125 auto *SrcTy = cast<VectorType>(Rep->getType()); 2126 2127 unsigned NumDstElts = DstTy->getNumElements(); 2128 if (NumDstElts < SrcTy->getNumElements()) { 2129 assert(NumDstElts == 2 && "Unexpected vector size"); 2130 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1}); 2131 } 2132 2133 bool IsPS2PD = SrcTy->getElementType()->isFloatTy(); 2134 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 2135 if (IsPS2PD) 2136 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 2137 else if (CI->getNumArgOperands() == 4 && 2138 (!isa<ConstantInt>(CI->getArgOperand(3)) || 2139 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 2140 Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round 2141 : Intrinsic::x86_avx512_sitofp_round; 2142 Function *F = Intrinsic::getDeclaration(CI->getModule(), IID, 2143 { DstTy, SrcTy }); 2144 Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) }); 2145 } else { 2146 Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt") 2147 : Builder.CreateSIToFP(Rep, DstTy, "cvt"); 2148 } 2149 2150 if (CI->getNumArgOperands() >= 3) 2151 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2152 CI->getArgOperand(1)); 2153 } else if (IsX86 && (Name.startswith("avx512.mask.vcvtph2ps.") || 2154 Name.startswith("vcvtph2ps."))) { 2155 auto *DstTy = cast<VectorType>(CI->getType()); 2156 Rep = CI->getArgOperand(0); 2157 auto *SrcTy = cast<VectorType>(Rep->getType()); 2158 unsigned NumDstElts = DstTy->getNumElements(); 2159 if (NumDstElts != SrcTy->getNumElements()) { 2160 assert(NumDstElts == 4 && "Unexpected vector size"); 2161 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1, 2, 3}); 2162 } 2163 Rep = Builder.CreateBitCast( 2164 Rep, VectorType::get(Type::getHalfTy(C), NumDstElts)); 2165 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtph2ps"); 2166 if (CI->getNumArgOperands() >= 3) 2167 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2168 CI->getArgOperand(1)); 2169 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 2170 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2171 CI->getArgOperand(1), CI->getArgOperand(2), 2172 /*Aligned*/false); 2173 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 2174 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2175 CI->getArgOperand(1),CI->getArgOperand(2), 2176 /*Aligned*/true); 2177 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 2178 auto *ResultTy = cast<VectorType>(CI->getType()); 2179 Type *PtrTy = ResultTy->getElementType(); 2180 2181 // Cast the pointer to element type. 2182 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2183 llvm::PointerType::getUnqual(PtrTy)); 2184 2185 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2186 ResultTy->getNumElements()); 2187 2188 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 2189 Intrinsic::masked_expandload, 2190 ResultTy); 2191 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 2192 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 2193 auto *ResultTy = cast<VectorType>(CI->getArgOperand(1)->getType()); 2194 Type *PtrTy = ResultTy->getElementType(); 2195 2196 // Cast the pointer to element type. 2197 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2198 llvm::PointerType::getUnqual(PtrTy)); 2199 2200 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2201 ResultTy->getNumElements()); 2202 2203 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 2204 Intrinsic::masked_compressstore, 2205 ResultTy); 2206 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 2207 } else if (IsX86 && (Name.startswith("avx512.mask.compress.") || 2208 Name.startswith("avx512.mask.expand."))) { 2209 auto *ResultTy = cast<VectorType>(CI->getType()); 2210 2211 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2212 ResultTy->getNumElements()); 2213 2214 bool IsCompress = Name[12] == 'c'; 2215 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 2216 : Intrinsic::x86_avx512_mask_expand; 2217 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); 2218 Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1), 2219 MaskVec }); 2220 } else if (IsX86 && Name.startswith("xop.vpcom")) { 2221 bool IsSigned; 2222 if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") || 2223 Name.endswith("uq")) 2224 IsSigned = false; 2225 else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") || 2226 Name.endswith("q")) 2227 IsSigned = true; 2228 else 2229 llvm_unreachable("Unknown suffix"); 2230 2231 unsigned Imm; 2232 if (CI->getNumArgOperands() == 3) { 2233 Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2234 } else { 2235 Name = Name.substr(9); // strip off "xop.vpcom" 2236 if (Name.startswith("lt")) 2237 Imm = 0; 2238 else if (Name.startswith("le")) 2239 Imm = 1; 2240 else if (Name.startswith("gt")) 2241 Imm = 2; 2242 else if (Name.startswith("ge")) 2243 Imm = 3; 2244 else if (Name.startswith("eq")) 2245 Imm = 4; 2246 else if (Name.startswith("ne")) 2247 Imm = 5; 2248 else if (Name.startswith("false")) 2249 Imm = 6; 2250 else if (Name.startswith("true")) 2251 Imm = 7; 2252 else 2253 llvm_unreachable("Unknown condition"); 2254 } 2255 2256 Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned); 2257 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2258 Value *Sel = CI->getArgOperand(2); 2259 Value *NotSel = Builder.CreateNot(Sel); 2260 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2261 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2262 Rep = Builder.CreateOr(Sel0, Sel1); 2263 } else if (IsX86 && (Name.startswith("xop.vprot") || 2264 Name.startswith("avx512.prol") || 2265 Name.startswith("avx512.mask.prol"))) { 2266 Rep = upgradeX86Rotate(Builder, *CI, false); 2267 } else if (IsX86 && (Name.startswith("avx512.pror") || 2268 Name.startswith("avx512.mask.pror"))) { 2269 Rep = upgradeX86Rotate(Builder, *CI, true); 2270 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2271 Name.startswith("avx512.mask.vpshld") || 2272 Name.startswith("avx512.maskz.vpshld"))) { 2273 bool ZeroMask = Name[11] == 'z'; 2274 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2275 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2276 Name.startswith("avx512.mask.vpshrd") || 2277 Name.startswith("avx512.maskz.vpshrd"))) { 2278 bool ZeroMask = Name[11] == 'z'; 2279 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2280 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2281 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2282 Intrinsic::x86_sse42_crc32_32_8); 2283 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2284 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2285 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2286 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2287 Name.startswith("avx512.vbroadcast.s"))) { 2288 // Replace broadcasts with a series of insertelements. 2289 auto *VecTy = cast<VectorType>(CI->getType()); 2290 Type *EltTy = VecTy->getElementType(); 2291 unsigned EltNum = VecTy->getNumElements(); 2292 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2293 EltTy->getPointerTo()); 2294 Value *Load = Builder.CreateLoad(EltTy, Cast); 2295 Type *I32Ty = Type::getInt32Ty(C); 2296 Rep = UndefValue::get(VecTy); 2297 for (unsigned I = 0; I < EltNum; ++I) 2298 Rep = Builder.CreateInsertElement(Rep, Load, 2299 ConstantInt::get(I32Ty, I)); 2300 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2301 Name.startswith("sse41.pmovzx") || 2302 Name.startswith("avx2.pmovsx") || 2303 Name.startswith("avx2.pmovzx") || 2304 Name.startswith("avx512.mask.pmovsx") || 2305 Name.startswith("avx512.mask.pmovzx"))) { 2306 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 2307 VectorType *DstTy = cast<VectorType>(CI->getType()); 2308 unsigned NumDstElts = DstTy->getNumElements(); 2309 2310 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2311 SmallVector<int, 8> ShuffleMask(NumDstElts); 2312 for (unsigned i = 0; i != NumDstElts; ++i) 2313 ShuffleMask[i] = i; 2314 2315 Value *SV = Builder.CreateShuffleVector( 2316 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2317 2318 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2319 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2320 : Builder.CreateZExt(SV, DstTy); 2321 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2322 if (CI->getNumArgOperands() == 3) 2323 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2324 CI->getArgOperand(1)); 2325 } else if (Name == "avx512.mask.pmov.qd.256" || 2326 Name == "avx512.mask.pmov.qd.512" || 2327 Name == "avx512.mask.pmov.wb.256" || 2328 Name == "avx512.mask.pmov.wb.512") { 2329 Type *Ty = CI->getArgOperand(1)->getType(); 2330 Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty); 2331 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2332 CI->getArgOperand(1)); 2333 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2334 Name == "avx2.vbroadcasti128")) { 2335 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2336 Type *EltTy = cast<VectorType>(CI->getType())->getElementType(); 2337 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2338 Type *VT = VectorType::get(EltTy, NumSrcElts); 2339 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2340 PointerType::getUnqual(VT)); 2341 Value *Load = Builder.CreateAlignedLoad(VT, Op, Align(1)); 2342 if (NumSrcElts == 2) 2343 Rep = Builder.CreateShuffleVector( 2344 Load, UndefValue::get(Load->getType()), ArrayRef<int>{0, 1, 0, 1}); 2345 else 2346 Rep = 2347 Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2348 ArrayRef<int>{0, 1, 2, 3, 0, 1, 2, 3}); 2349 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2350 Name.startswith("avx512.mask.shuf.f"))) { 2351 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2352 Type *VT = CI->getType(); 2353 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2354 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2355 unsigned ControlBitsMask = NumLanes - 1; 2356 unsigned NumControlBits = NumLanes / 2; 2357 SmallVector<int, 8> ShuffleMask(0); 2358 2359 for (unsigned l = 0; l != NumLanes; ++l) { 2360 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2361 // We actually need the other source. 2362 if (l >= NumLanes / 2) 2363 LaneMask += NumLanes; 2364 for (unsigned i = 0; i != NumElementsInLane; ++i) 2365 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2366 } 2367 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2368 CI->getArgOperand(1), ShuffleMask); 2369 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2370 CI->getArgOperand(3)); 2371 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2372 Name.startswith("avx512.mask.broadcasti"))) { 2373 unsigned NumSrcElts = 2374 cast<VectorType>(CI->getArgOperand(0)->getType())->getNumElements(); 2375 unsigned NumDstElts = cast<VectorType>(CI->getType())->getNumElements(); 2376 2377 SmallVector<int, 8> ShuffleMask(NumDstElts); 2378 for (unsigned i = 0; i != NumDstElts; ++i) 2379 ShuffleMask[i] = i % NumSrcElts; 2380 2381 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2382 CI->getArgOperand(0), 2383 ShuffleMask); 2384 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2385 CI->getArgOperand(1)); 2386 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2387 Name.startswith("avx2.vbroadcast") || 2388 Name.startswith("avx512.pbroadcast") || 2389 Name.startswith("avx512.mask.broadcast.s"))) { 2390 // Replace vp?broadcasts with a vector shuffle. 2391 Value *Op = CI->getArgOperand(0); 2392 ElementCount EC = cast<VectorType>(CI->getType())->getElementCount(); 2393 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), EC); 2394 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2395 Constant::getNullValue(MaskTy)); 2396 2397 if (CI->getNumArgOperands() == 3) 2398 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2399 CI->getArgOperand(1)); 2400 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2401 Name.startswith("sse2.psubs.") || 2402 Name.startswith("avx2.padds.") || 2403 Name.startswith("avx2.psubs.") || 2404 Name.startswith("avx512.padds.") || 2405 Name.startswith("avx512.psubs.") || 2406 Name.startswith("avx512.mask.padds.") || 2407 Name.startswith("avx512.mask.psubs."))) { 2408 bool IsAdd = Name.contains(".padds"); 2409 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); 2410 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2411 Name.startswith("sse2.psubus.") || 2412 Name.startswith("avx2.paddus.") || 2413 Name.startswith("avx2.psubus.") || 2414 Name.startswith("avx512.mask.paddus.") || 2415 Name.startswith("avx512.mask.psubus."))) { 2416 bool IsAdd = Name.contains(".paddus"); 2417 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); 2418 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2419 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2420 CI->getArgOperand(1), 2421 CI->getArgOperand(2), 2422 CI->getArgOperand(3), 2423 CI->getArgOperand(4), 2424 false); 2425 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2426 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2427 CI->getArgOperand(1), 2428 CI->getArgOperand(2), 2429 CI->getArgOperand(3), 2430 CI->getArgOperand(4), 2431 true); 2432 } else if (IsX86 && (Name == "sse2.psll.dq" || 2433 Name == "avx2.psll.dq")) { 2434 // 128/256-bit shift left specified in bits. 2435 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2436 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2437 Shift / 8); // Shift is in bits. 2438 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2439 Name == "avx2.psrl.dq")) { 2440 // 128/256-bit shift right specified in bits. 2441 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2442 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2443 Shift / 8); // Shift is in bits. 2444 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2445 Name == "avx2.psll.dq.bs" || 2446 Name == "avx512.psll.dq.512")) { 2447 // 128/256/512-bit shift left specified in bytes. 2448 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2449 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2450 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2451 Name == "avx2.psrl.dq.bs" || 2452 Name == "avx512.psrl.dq.512")) { 2453 // 128/256/512-bit shift right specified in bytes. 2454 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2455 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2456 } else if (IsX86 && (Name == "sse41.pblendw" || 2457 Name.startswith("sse41.blendp") || 2458 Name.startswith("avx.blend.p") || 2459 Name == "avx2.pblendw" || 2460 Name.startswith("avx2.pblendd."))) { 2461 Value *Op0 = CI->getArgOperand(0); 2462 Value *Op1 = CI->getArgOperand(1); 2463 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2464 VectorType *VecTy = cast<VectorType>(CI->getType()); 2465 unsigned NumElts = VecTy->getNumElements(); 2466 2467 SmallVector<int, 16> Idxs(NumElts); 2468 for (unsigned i = 0; i != NumElts; ++i) 2469 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2470 2471 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2472 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2473 Name == "avx2.vinserti128" || 2474 Name.startswith("avx512.mask.insert"))) { 2475 Value *Op0 = CI->getArgOperand(0); 2476 Value *Op1 = CI->getArgOperand(1); 2477 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2478 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2479 unsigned SrcNumElts = cast<VectorType>(Op1->getType())->getNumElements(); 2480 unsigned Scale = DstNumElts / SrcNumElts; 2481 2482 // Mask off the high bits of the immediate value; hardware ignores those. 2483 Imm = Imm % Scale; 2484 2485 // Extend the second operand into a vector the size of the destination. 2486 Value *UndefV = UndefValue::get(Op1->getType()); 2487 SmallVector<int, 8> Idxs(DstNumElts); 2488 for (unsigned i = 0; i != SrcNumElts; ++i) 2489 Idxs[i] = i; 2490 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2491 Idxs[i] = SrcNumElts; 2492 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2493 2494 // Insert the second operand into the first operand. 2495 2496 // Note that there is no guarantee that instruction lowering will actually 2497 // produce a vinsertf128 instruction for the created shuffles. In 2498 // particular, the 0 immediate case involves no lane changes, so it can 2499 // be handled as a blend. 2500 2501 // Example of shuffle mask for 32-bit elements: 2502 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2503 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2504 2505 // First fill with identify mask. 2506 for (unsigned i = 0; i != DstNumElts; ++i) 2507 Idxs[i] = i; 2508 // Then replace the elements where we need to insert. 2509 for (unsigned i = 0; i != SrcNumElts; ++i) 2510 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2511 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2512 2513 // If the intrinsic has a mask operand, handle that. 2514 if (CI->getNumArgOperands() == 5) 2515 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2516 CI->getArgOperand(3)); 2517 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2518 Name == "avx2.vextracti128" || 2519 Name.startswith("avx512.mask.vextract"))) { 2520 Value *Op0 = CI->getArgOperand(0); 2521 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2522 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2523 unsigned SrcNumElts = cast<VectorType>(Op0->getType())->getNumElements(); 2524 unsigned Scale = SrcNumElts / DstNumElts; 2525 2526 // Mask off the high bits of the immediate value; hardware ignores those. 2527 Imm = Imm % Scale; 2528 2529 // Get indexes for the subvector of the input vector. 2530 SmallVector<int, 8> Idxs(DstNumElts); 2531 for (unsigned i = 0; i != DstNumElts; ++i) { 2532 Idxs[i] = i + (Imm * DstNumElts); 2533 } 2534 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2535 2536 // If the intrinsic has a mask operand, handle that. 2537 if (CI->getNumArgOperands() == 4) 2538 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2539 CI->getArgOperand(2)); 2540 } else if (!IsX86 && Name == "stackprotectorcheck") { 2541 Rep = nullptr; 2542 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2543 Name.startswith("avx512.mask.perm.di."))) { 2544 Value *Op0 = CI->getArgOperand(0); 2545 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2546 VectorType *VecTy = cast<VectorType>(CI->getType()); 2547 unsigned NumElts = VecTy->getNumElements(); 2548 2549 SmallVector<int, 8> Idxs(NumElts); 2550 for (unsigned i = 0; i != NumElts; ++i) 2551 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2552 2553 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2554 2555 if (CI->getNumArgOperands() == 4) 2556 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2557 CI->getArgOperand(2)); 2558 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2559 Name == "avx2.vperm2i128")) { 2560 // The immediate permute control byte looks like this: 2561 // [1:0] - select 128 bits from sources for low half of destination 2562 // [2] - ignore 2563 // [3] - zero low half of destination 2564 // [5:4] - select 128 bits from sources for high half of destination 2565 // [6] - ignore 2566 // [7] - zero high half of destination 2567 2568 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2569 2570 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2571 unsigned HalfSize = NumElts / 2; 2572 SmallVector<int, 8> ShuffleMask(NumElts); 2573 2574 // Determine which operand(s) are actually in use for this instruction. 2575 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2576 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2577 2578 // If needed, replace operands based on zero mask. 2579 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2580 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2581 2582 // Permute low half of result. 2583 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2584 for (unsigned i = 0; i < HalfSize; ++i) 2585 ShuffleMask[i] = StartIndex + i; 2586 2587 // Permute high half of result. 2588 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2589 for (unsigned i = 0; i < HalfSize; ++i) 2590 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2591 2592 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2593 2594 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2595 Name == "sse2.pshuf.d" || 2596 Name.startswith("avx512.mask.vpermil.p") || 2597 Name.startswith("avx512.mask.pshuf.d."))) { 2598 Value *Op0 = CI->getArgOperand(0); 2599 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2600 VectorType *VecTy = cast<VectorType>(CI->getType()); 2601 unsigned NumElts = VecTy->getNumElements(); 2602 // Calculate the size of each index in the immediate. 2603 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2604 unsigned IdxMask = ((1 << IdxSize) - 1); 2605 2606 SmallVector<int, 8> Idxs(NumElts); 2607 // Lookup the bits for this element, wrapping around the immediate every 2608 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2609 // to offset by the first index of each group. 2610 for (unsigned i = 0; i != NumElts; ++i) 2611 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2612 2613 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2614 2615 if (CI->getNumArgOperands() == 4) 2616 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2617 CI->getArgOperand(2)); 2618 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2619 Name.startswith("avx512.mask.pshufl.w."))) { 2620 Value *Op0 = CI->getArgOperand(0); 2621 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2622 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2623 2624 SmallVector<int, 16> Idxs(NumElts); 2625 for (unsigned l = 0; l != NumElts; l += 8) { 2626 for (unsigned i = 0; i != 4; ++i) 2627 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2628 for (unsigned i = 4; i != 8; ++i) 2629 Idxs[i + l] = i + l; 2630 } 2631 2632 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2633 2634 if (CI->getNumArgOperands() == 4) 2635 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2636 CI->getArgOperand(2)); 2637 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2638 Name.startswith("avx512.mask.pshufh.w."))) { 2639 Value *Op0 = CI->getArgOperand(0); 2640 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2641 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2642 2643 SmallVector<int, 16> Idxs(NumElts); 2644 for (unsigned l = 0; l != NumElts; l += 8) { 2645 for (unsigned i = 0; i != 4; ++i) 2646 Idxs[i + l] = i + l; 2647 for (unsigned i = 0; i != 4; ++i) 2648 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2649 } 2650 2651 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2652 2653 if (CI->getNumArgOperands() == 4) 2654 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2655 CI->getArgOperand(2)); 2656 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2657 Value *Op0 = CI->getArgOperand(0); 2658 Value *Op1 = CI->getArgOperand(1); 2659 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2660 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2661 2662 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2663 unsigned HalfLaneElts = NumLaneElts / 2; 2664 2665 SmallVector<int, 16> Idxs(NumElts); 2666 for (unsigned i = 0; i != NumElts; ++i) { 2667 // Base index is the starting element of the lane. 2668 Idxs[i] = i - (i % NumLaneElts); 2669 // If we are half way through the lane switch to the other source. 2670 if ((i % NumLaneElts) >= HalfLaneElts) 2671 Idxs[i] += NumElts; 2672 // Now select the specific element. By adding HalfLaneElts bits from 2673 // the immediate. Wrapping around the immediate every 8-bits. 2674 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2675 } 2676 2677 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2678 2679 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2680 CI->getArgOperand(3)); 2681 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2682 Name.startswith("avx512.mask.movshdup") || 2683 Name.startswith("avx512.mask.movsldup"))) { 2684 Value *Op0 = CI->getArgOperand(0); 2685 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2686 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2687 2688 unsigned Offset = 0; 2689 if (Name.startswith("avx512.mask.movshdup.")) 2690 Offset = 1; 2691 2692 SmallVector<int, 16> Idxs(NumElts); 2693 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2694 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2695 Idxs[i + l + 0] = i + l + Offset; 2696 Idxs[i + l + 1] = i + l + Offset; 2697 } 2698 2699 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2700 2701 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2702 CI->getArgOperand(1)); 2703 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2704 Name.startswith("avx512.mask.unpckl."))) { 2705 Value *Op0 = CI->getArgOperand(0); 2706 Value *Op1 = CI->getArgOperand(1); 2707 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2708 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2709 2710 SmallVector<int, 64> Idxs(NumElts); 2711 for (int l = 0; l != NumElts; l += NumLaneElts) 2712 for (int i = 0; i != NumLaneElts; ++i) 2713 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2714 2715 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2716 2717 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2718 CI->getArgOperand(2)); 2719 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2720 Name.startswith("avx512.mask.unpckh."))) { 2721 Value *Op0 = CI->getArgOperand(0); 2722 Value *Op1 = CI->getArgOperand(1); 2723 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2724 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2725 2726 SmallVector<int, 64> Idxs(NumElts); 2727 for (int l = 0; l != NumElts; l += NumLaneElts) 2728 for (int i = 0; i != NumLaneElts; ++i) 2729 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2730 2731 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2732 2733 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2734 CI->getArgOperand(2)); 2735 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2736 Name.startswith("avx512.mask.pand."))) { 2737 VectorType *FTy = cast<VectorType>(CI->getType()); 2738 VectorType *ITy = VectorType::getInteger(FTy); 2739 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2740 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2741 Rep = Builder.CreateBitCast(Rep, FTy); 2742 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2743 CI->getArgOperand(2)); 2744 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2745 Name.startswith("avx512.mask.pandn."))) { 2746 VectorType *FTy = cast<VectorType>(CI->getType()); 2747 VectorType *ITy = VectorType::getInteger(FTy); 2748 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2749 Rep = Builder.CreateAnd(Rep, 2750 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2751 Rep = Builder.CreateBitCast(Rep, FTy); 2752 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2753 CI->getArgOperand(2)); 2754 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2755 Name.startswith("avx512.mask.por."))) { 2756 VectorType *FTy = cast<VectorType>(CI->getType()); 2757 VectorType *ITy = VectorType::getInteger(FTy); 2758 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2759 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2760 Rep = Builder.CreateBitCast(Rep, FTy); 2761 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2762 CI->getArgOperand(2)); 2763 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2764 Name.startswith("avx512.mask.pxor."))) { 2765 VectorType *FTy = cast<VectorType>(CI->getType()); 2766 VectorType *ITy = VectorType::getInteger(FTy); 2767 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2768 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2769 Rep = Builder.CreateBitCast(Rep, FTy); 2770 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2771 CI->getArgOperand(2)); 2772 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2773 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2774 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2775 CI->getArgOperand(2)); 2776 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2777 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2778 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2779 CI->getArgOperand(2)); 2780 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2781 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2782 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2783 CI->getArgOperand(2)); 2784 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2785 if (Name.endswith(".512")) { 2786 Intrinsic::ID IID; 2787 if (Name[17] == 's') 2788 IID = Intrinsic::x86_avx512_add_ps_512; 2789 else 2790 IID = Intrinsic::x86_avx512_add_pd_512; 2791 2792 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2793 { CI->getArgOperand(0), CI->getArgOperand(1), 2794 CI->getArgOperand(4) }); 2795 } else { 2796 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2797 } 2798 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2799 CI->getArgOperand(2)); 2800 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2801 if (Name.endswith(".512")) { 2802 Intrinsic::ID IID; 2803 if (Name[17] == 's') 2804 IID = Intrinsic::x86_avx512_div_ps_512; 2805 else 2806 IID = Intrinsic::x86_avx512_div_pd_512; 2807 2808 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2809 { CI->getArgOperand(0), CI->getArgOperand(1), 2810 CI->getArgOperand(4) }); 2811 } else { 2812 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2813 } 2814 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2815 CI->getArgOperand(2)); 2816 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2817 if (Name.endswith(".512")) { 2818 Intrinsic::ID IID; 2819 if (Name[17] == 's') 2820 IID = Intrinsic::x86_avx512_mul_ps_512; 2821 else 2822 IID = Intrinsic::x86_avx512_mul_pd_512; 2823 2824 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2825 { CI->getArgOperand(0), CI->getArgOperand(1), 2826 CI->getArgOperand(4) }); 2827 } else { 2828 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2829 } 2830 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2831 CI->getArgOperand(2)); 2832 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2833 if (Name.endswith(".512")) { 2834 Intrinsic::ID IID; 2835 if (Name[17] == 's') 2836 IID = Intrinsic::x86_avx512_sub_ps_512; 2837 else 2838 IID = Intrinsic::x86_avx512_sub_pd_512; 2839 2840 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2841 { CI->getArgOperand(0), CI->getArgOperand(1), 2842 CI->getArgOperand(4) }); 2843 } else { 2844 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2845 } 2846 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2847 CI->getArgOperand(2)); 2848 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2849 Name.startswith("avx512.mask.min.p")) && 2850 Name.drop_front(18) == ".512") { 2851 bool IsDouble = Name[17] == 'd'; 2852 bool IsMin = Name[13] == 'i'; 2853 static const Intrinsic::ID MinMaxTbl[2][2] = { 2854 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2855 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2856 }; 2857 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2858 2859 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2860 { CI->getArgOperand(0), CI->getArgOperand(1), 2861 CI->getArgOperand(4) }); 2862 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2863 CI->getArgOperand(2)); 2864 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2865 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2866 Intrinsic::ctlz, 2867 CI->getType()), 2868 { CI->getArgOperand(0), Builder.getInt1(false) }); 2869 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2870 CI->getArgOperand(1)); 2871 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2872 bool IsImmediate = Name[16] == 'i' || 2873 (Name.size() > 18 && Name[18] == 'i'); 2874 bool IsVariable = Name[16] == 'v'; 2875 char Size = Name[16] == '.' ? Name[17] : 2876 Name[17] == '.' ? Name[18] : 2877 Name[18] == '.' ? Name[19] : 2878 Name[20]; 2879 2880 Intrinsic::ID IID; 2881 if (IsVariable && Name[17] != '.') { 2882 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2883 IID = Intrinsic::x86_avx2_psllv_q; 2884 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2885 IID = Intrinsic::x86_avx2_psllv_q_256; 2886 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2887 IID = Intrinsic::x86_avx2_psllv_d; 2888 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2889 IID = Intrinsic::x86_avx2_psllv_d_256; 2890 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2891 IID = Intrinsic::x86_avx512_psllv_w_128; 2892 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2893 IID = Intrinsic::x86_avx512_psllv_w_256; 2894 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2895 IID = Intrinsic::x86_avx512_psllv_w_512; 2896 else 2897 llvm_unreachable("Unexpected size"); 2898 } else if (Name.endswith(".128")) { 2899 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2900 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2901 : Intrinsic::x86_sse2_psll_d; 2902 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2903 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2904 : Intrinsic::x86_sse2_psll_q; 2905 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2906 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2907 : Intrinsic::x86_sse2_psll_w; 2908 else 2909 llvm_unreachable("Unexpected size"); 2910 } else if (Name.endswith(".256")) { 2911 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2912 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2913 : Intrinsic::x86_avx2_psll_d; 2914 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2915 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2916 : Intrinsic::x86_avx2_psll_q; 2917 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2918 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2919 : Intrinsic::x86_avx2_psll_w; 2920 else 2921 llvm_unreachable("Unexpected size"); 2922 } else { 2923 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2924 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2925 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2926 Intrinsic::x86_avx512_psll_d_512; 2927 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2928 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2929 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2930 Intrinsic::x86_avx512_psll_q_512; 2931 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2932 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2933 : Intrinsic::x86_avx512_psll_w_512; 2934 else 2935 llvm_unreachable("Unexpected size"); 2936 } 2937 2938 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2939 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2940 bool IsImmediate = Name[16] == 'i' || 2941 (Name.size() > 18 && Name[18] == 'i'); 2942 bool IsVariable = Name[16] == 'v'; 2943 char Size = Name[16] == '.' ? Name[17] : 2944 Name[17] == '.' ? Name[18] : 2945 Name[18] == '.' ? Name[19] : 2946 Name[20]; 2947 2948 Intrinsic::ID IID; 2949 if (IsVariable && Name[17] != '.') { 2950 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2951 IID = Intrinsic::x86_avx2_psrlv_q; 2952 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2953 IID = Intrinsic::x86_avx2_psrlv_q_256; 2954 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2955 IID = Intrinsic::x86_avx2_psrlv_d; 2956 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2957 IID = Intrinsic::x86_avx2_psrlv_d_256; 2958 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2959 IID = Intrinsic::x86_avx512_psrlv_w_128; 2960 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2961 IID = Intrinsic::x86_avx512_psrlv_w_256; 2962 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2963 IID = Intrinsic::x86_avx512_psrlv_w_512; 2964 else 2965 llvm_unreachable("Unexpected size"); 2966 } else if (Name.endswith(".128")) { 2967 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2968 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2969 : Intrinsic::x86_sse2_psrl_d; 2970 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2971 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2972 : Intrinsic::x86_sse2_psrl_q; 2973 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2974 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2975 : Intrinsic::x86_sse2_psrl_w; 2976 else 2977 llvm_unreachable("Unexpected size"); 2978 } else if (Name.endswith(".256")) { 2979 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2980 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2981 : Intrinsic::x86_avx2_psrl_d; 2982 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2983 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2984 : Intrinsic::x86_avx2_psrl_q; 2985 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2986 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2987 : Intrinsic::x86_avx2_psrl_w; 2988 else 2989 llvm_unreachable("Unexpected size"); 2990 } else { 2991 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2992 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2993 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2994 Intrinsic::x86_avx512_psrl_d_512; 2995 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2996 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2997 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2998 Intrinsic::x86_avx512_psrl_q_512; 2999 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 3000 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 3001 : Intrinsic::x86_avx512_psrl_w_512; 3002 else 3003 llvm_unreachable("Unexpected size"); 3004 } 3005 3006 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3007 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 3008 bool IsImmediate = Name[16] == 'i' || 3009 (Name.size() > 18 && Name[18] == 'i'); 3010 bool IsVariable = Name[16] == 'v'; 3011 char Size = Name[16] == '.' ? Name[17] : 3012 Name[17] == '.' ? Name[18] : 3013 Name[18] == '.' ? Name[19] : 3014 Name[20]; 3015 3016 Intrinsic::ID IID; 3017 if (IsVariable && Name[17] != '.') { 3018 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 3019 IID = Intrinsic::x86_avx2_psrav_d; 3020 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 3021 IID = Intrinsic::x86_avx2_psrav_d_256; 3022 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 3023 IID = Intrinsic::x86_avx512_psrav_w_128; 3024 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 3025 IID = Intrinsic::x86_avx512_psrav_w_256; 3026 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 3027 IID = Intrinsic::x86_avx512_psrav_w_512; 3028 else 3029 llvm_unreachable("Unexpected size"); 3030 } else if (Name.endswith(".128")) { 3031 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 3032 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 3033 : Intrinsic::x86_sse2_psra_d; 3034 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 3035 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 3036 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 3037 Intrinsic::x86_avx512_psra_q_128; 3038 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 3039 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 3040 : Intrinsic::x86_sse2_psra_w; 3041 else 3042 llvm_unreachable("Unexpected size"); 3043 } else if (Name.endswith(".256")) { 3044 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 3045 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 3046 : Intrinsic::x86_avx2_psra_d; 3047 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 3048 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 3049 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 3050 Intrinsic::x86_avx512_psra_q_256; 3051 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 3052 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 3053 : Intrinsic::x86_avx2_psra_w; 3054 else 3055 llvm_unreachable("Unexpected size"); 3056 } else { 3057 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 3058 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 3059 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 3060 Intrinsic::x86_avx512_psra_d_512; 3061 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 3062 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 3063 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 3064 Intrinsic::x86_avx512_psra_q_512; 3065 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 3066 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 3067 : Intrinsic::x86_avx512_psra_w_512; 3068 else 3069 llvm_unreachable("Unexpected size"); 3070 } 3071 3072 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3073 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 3074 Rep = upgradeMaskedMove(Builder, *CI); 3075 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 3076 Rep = UpgradeMaskToInt(Builder, *CI); 3077 } else if (IsX86 && Name.endswith(".movntdqa")) { 3078 Module *M = F->getParent(); 3079 MDNode *Node = MDNode::get( 3080 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 3081 3082 Value *Ptr = CI->getArgOperand(0); 3083 3084 // Convert the type of the pointer to a pointer to the stored type. 3085 Value *BC = Builder.CreateBitCast( 3086 Ptr, PointerType::getUnqual(CI->getType()), "cast"); 3087 LoadInst *LI = Builder.CreateAlignedLoad( 3088 CI->getType(), BC, 3089 Align(CI->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 3090 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 3091 Rep = LI; 3092 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 3093 Name.startswith("fma.vfmsub.") || 3094 Name.startswith("fma.vfnmadd.") || 3095 Name.startswith("fma.vfnmsub."))) { 3096 bool NegMul = Name[6] == 'n'; 3097 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 3098 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 3099 3100 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3101 CI->getArgOperand(2) }; 3102 3103 if (IsScalar) { 3104 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3105 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3106 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3107 } 3108 3109 if (NegMul && !IsScalar) 3110 Ops[0] = Builder.CreateFNeg(Ops[0]); 3111 if (NegMul && IsScalar) 3112 Ops[1] = Builder.CreateFNeg(Ops[1]); 3113 if (NegAcc) 3114 Ops[2] = Builder.CreateFNeg(Ops[2]); 3115 3116 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3117 Intrinsic::fma, 3118 Ops[0]->getType()), 3119 Ops); 3120 3121 if (IsScalar) 3122 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 3123 (uint64_t)0); 3124 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 3125 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3126 CI->getArgOperand(2) }; 3127 3128 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3129 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3130 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3131 3132 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3133 Intrinsic::fma, 3134 Ops[0]->getType()), 3135 Ops); 3136 3137 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 3138 Rep, (uint64_t)0); 3139 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 3140 Name.startswith("avx512.maskz.vfmadd.s") || 3141 Name.startswith("avx512.mask3.vfmadd.s") || 3142 Name.startswith("avx512.mask3.vfmsub.s") || 3143 Name.startswith("avx512.mask3.vfnmsub.s"))) { 3144 bool IsMask3 = Name[11] == '3'; 3145 bool IsMaskZ = Name[11] == 'z'; 3146 // Drop the "avx512.mask." to make it easier. 3147 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3148 bool NegMul = Name[2] == 'n'; 3149 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3150 3151 Value *A = CI->getArgOperand(0); 3152 Value *B = CI->getArgOperand(1); 3153 Value *C = CI->getArgOperand(2); 3154 3155 if (NegMul && (IsMask3 || IsMaskZ)) 3156 A = Builder.CreateFNeg(A); 3157 if (NegMul && !(IsMask3 || IsMaskZ)) 3158 B = Builder.CreateFNeg(B); 3159 if (NegAcc) 3160 C = Builder.CreateFNeg(C); 3161 3162 A = Builder.CreateExtractElement(A, (uint64_t)0); 3163 B = Builder.CreateExtractElement(B, (uint64_t)0); 3164 C = Builder.CreateExtractElement(C, (uint64_t)0); 3165 3166 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 3167 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 3168 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 3169 3170 Intrinsic::ID IID; 3171 if (Name.back() == 'd') 3172 IID = Intrinsic::x86_avx512_vfmadd_f64; 3173 else 3174 IID = Intrinsic::x86_avx512_vfmadd_f32; 3175 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 3176 Rep = Builder.CreateCall(FMA, Ops); 3177 } else { 3178 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3179 Intrinsic::fma, 3180 A->getType()); 3181 Rep = Builder.CreateCall(FMA, { A, B, C }); 3182 } 3183 3184 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 3185 IsMask3 ? C : A; 3186 3187 // For Mask3 with NegAcc, we need to create a new extractelement that 3188 // avoids the negation above. 3189 if (NegAcc && IsMask3) 3190 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 3191 (uint64_t)0); 3192 3193 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 3194 Rep, PassThru); 3195 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 3196 Rep, (uint64_t)0); 3197 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 3198 Name.startswith("avx512.mask.vfnmadd.p") || 3199 Name.startswith("avx512.mask.vfnmsub.p") || 3200 Name.startswith("avx512.mask3.vfmadd.p") || 3201 Name.startswith("avx512.mask3.vfmsub.p") || 3202 Name.startswith("avx512.mask3.vfnmsub.p") || 3203 Name.startswith("avx512.maskz.vfmadd.p"))) { 3204 bool IsMask3 = Name[11] == '3'; 3205 bool IsMaskZ = Name[11] == 'z'; 3206 // Drop the "avx512.mask." to make it easier. 3207 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3208 bool NegMul = Name[2] == 'n'; 3209 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3210 3211 Value *A = CI->getArgOperand(0); 3212 Value *B = CI->getArgOperand(1); 3213 Value *C = CI->getArgOperand(2); 3214 3215 if (NegMul && (IsMask3 || IsMaskZ)) 3216 A = Builder.CreateFNeg(A); 3217 if (NegMul && !(IsMask3 || IsMaskZ)) 3218 B = Builder.CreateFNeg(B); 3219 if (NegAcc) 3220 C = Builder.CreateFNeg(C); 3221 3222 if (CI->getNumArgOperands() == 5 && 3223 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3224 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3225 Intrinsic::ID IID; 3226 // Check the character before ".512" in string. 3227 if (Name[Name.size()-5] == 's') 3228 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 3229 else 3230 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 3231 3232 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3233 { A, B, C, CI->getArgOperand(4) }); 3234 } else { 3235 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3236 Intrinsic::fma, 3237 A->getType()); 3238 Rep = Builder.CreateCall(FMA, { A, B, C }); 3239 } 3240 3241 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3242 IsMask3 ? CI->getArgOperand(2) : 3243 CI->getArgOperand(0); 3244 3245 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3246 } else if (IsX86 && Name.startswith("fma.vfmsubadd.p")) { 3247 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3248 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3249 Intrinsic::ID IID; 3250 if (VecWidth == 128 && EltWidth == 32) 3251 IID = Intrinsic::x86_fma_vfmaddsub_ps; 3252 else if (VecWidth == 256 && EltWidth == 32) 3253 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 3254 else if (VecWidth == 128 && EltWidth == 64) 3255 IID = Intrinsic::x86_fma_vfmaddsub_pd; 3256 else if (VecWidth == 256 && EltWidth == 64) 3257 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 3258 else 3259 llvm_unreachable("Unexpected intrinsic"); 3260 3261 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3262 CI->getArgOperand(2) }; 3263 Ops[2] = Builder.CreateFNeg(Ops[2]); 3264 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3265 Ops); 3266 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3267 Name.startswith("avx512.mask3.vfmaddsub.p") || 3268 Name.startswith("avx512.maskz.vfmaddsub.p") || 3269 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3270 bool IsMask3 = Name[11] == '3'; 3271 bool IsMaskZ = Name[11] == 'z'; 3272 // Drop the "avx512.mask." to make it easier. 3273 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3274 bool IsSubAdd = Name[3] == 's'; 3275 if (CI->getNumArgOperands() == 5) { 3276 Intrinsic::ID IID; 3277 // Check the character before ".512" in string. 3278 if (Name[Name.size()-5] == 's') 3279 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3280 else 3281 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3282 3283 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3284 CI->getArgOperand(2), CI->getArgOperand(4) }; 3285 if (IsSubAdd) 3286 Ops[2] = Builder.CreateFNeg(Ops[2]); 3287 3288 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3289 Ops); 3290 } else { 3291 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 3292 3293 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3294 CI->getArgOperand(2) }; 3295 3296 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3297 Ops[0]->getType()); 3298 Value *Odd = Builder.CreateCall(FMA, Ops); 3299 Ops[2] = Builder.CreateFNeg(Ops[2]); 3300 Value *Even = Builder.CreateCall(FMA, Ops); 3301 3302 if (IsSubAdd) 3303 std::swap(Even, Odd); 3304 3305 SmallVector<int, 32> Idxs(NumElts); 3306 for (int i = 0; i != NumElts; ++i) 3307 Idxs[i] = i + (i % 2) * NumElts; 3308 3309 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3310 } 3311 3312 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3313 IsMask3 ? CI->getArgOperand(2) : 3314 CI->getArgOperand(0); 3315 3316 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3317 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3318 Name.startswith("avx512.maskz.pternlog."))) { 3319 bool ZeroMask = Name[11] == 'z'; 3320 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3321 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3322 Intrinsic::ID IID; 3323 if (VecWidth == 128 && EltWidth == 32) 3324 IID = Intrinsic::x86_avx512_pternlog_d_128; 3325 else if (VecWidth == 256 && EltWidth == 32) 3326 IID = Intrinsic::x86_avx512_pternlog_d_256; 3327 else if (VecWidth == 512 && EltWidth == 32) 3328 IID = Intrinsic::x86_avx512_pternlog_d_512; 3329 else if (VecWidth == 128 && EltWidth == 64) 3330 IID = Intrinsic::x86_avx512_pternlog_q_128; 3331 else if (VecWidth == 256 && EltWidth == 64) 3332 IID = Intrinsic::x86_avx512_pternlog_q_256; 3333 else if (VecWidth == 512 && EltWidth == 64) 3334 IID = Intrinsic::x86_avx512_pternlog_q_512; 3335 else 3336 llvm_unreachable("Unexpected intrinsic"); 3337 3338 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3339 CI->getArgOperand(2), CI->getArgOperand(3) }; 3340 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3341 Args); 3342 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3343 : CI->getArgOperand(0); 3344 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3345 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3346 Name.startswith("avx512.maskz.vpmadd52"))) { 3347 bool ZeroMask = Name[11] == 'z'; 3348 bool High = Name[20] == 'h' || Name[21] == 'h'; 3349 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3350 Intrinsic::ID IID; 3351 if (VecWidth == 128 && !High) 3352 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3353 else if (VecWidth == 256 && !High) 3354 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3355 else if (VecWidth == 512 && !High) 3356 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3357 else if (VecWidth == 128 && High) 3358 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3359 else if (VecWidth == 256 && High) 3360 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3361 else if (VecWidth == 512 && High) 3362 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3363 else 3364 llvm_unreachable("Unexpected intrinsic"); 3365 3366 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3367 CI->getArgOperand(2) }; 3368 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3369 Args); 3370 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3371 : CI->getArgOperand(0); 3372 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3373 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3374 Name.startswith("avx512.mask.vpermt2var.") || 3375 Name.startswith("avx512.maskz.vpermt2var."))) { 3376 bool ZeroMask = Name[11] == 'z'; 3377 bool IndexForm = Name[17] == 'i'; 3378 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3379 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3380 Name.startswith("avx512.maskz.vpdpbusd.") || 3381 Name.startswith("avx512.mask.vpdpbusds.") || 3382 Name.startswith("avx512.maskz.vpdpbusds."))) { 3383 bool ZeroMask = Name[11] == 'z'; 3384 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3385 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3386 Intrinsic::ID IID; 3387 if (VecWidth == 128 && !IsSaturating) 3388 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3389 else if (VecWidth == 256 && !IsSaturating) 3390 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3391 else if (VecWidth == 512 && !IsSaturating) 3392 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3393 else if (VecWidth == 128 && IsSaturating) 3394 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3395 else if (VecWidth == 256 && IsSaturating) 3396 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3397 else if (VecWidth == 512 && IsSaturating) 3398 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3399 else 3400 llvm_unreachable("Unexpected intrinsic"); 3401 3402 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3403 CI->getArgOperand(2) }; 3404 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3405 Args); 3406 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3407 : CI->getArgOperand(0); 3408 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3409 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3410 Name.startswith("avx512.maskz.vpdpwssd.") || 3411 Name.startswith("avx512.mask.vpdpwssds.") || 3412 Name.startswith("avx512.maskz.vpdpwssds."))) { 3413 bool ZeroMask = Name[11] == 'z'; 3414 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3415 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3416 Intrinsic::ID IID; 3417 if (VecWidth == 128 && !IsSaturating) 3418 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3419 else if (VecWidth == 256 && !IsSaturating) 3420 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3421 else if (VecWidth == 512 && !IsSaturating) 3422 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3423 else if (VecWidth == 128 && IsSaturating) 3424 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3425 else if (VecWidth == 256 && IsSaturating) 3426 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3427 else if (VecWidth == 512 && IsSaturating) 3428 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3429 else 3430 llvm_unreachable("Unexpected intrinsic"); 3431 3432 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3433 CI->getArgOperand(2) }; 3434 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3435 Args); 3436 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3437 : CI->getArgOperand(0); 3438 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3439 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3440 Name == "addcarry.u32" || Name == "addcarry.u64" || 3441 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3442 Intrinsic::ID IID; 3443 if (Name[0] == 'a' && Name.back() == '2') 3444 IID = Intrinsic::x86_addcarry_32; 3445 else if (Name[0] == 'a' && Name.back() == '4') 3446 IID = Intrinsic::x86_addcarry_64; 3447 else if (Name[0] == 's' && Name.back() == '2') 3448 IID = Intrinsic::x86_subborrow_32; 3449 else if (Name[0] == 's' && Name.back() == '4') 3450 IID = Intrinsic::x86_subborrow_64; 3451 else 3452 llvm_unreachable("Unexpected intrinsic"); 3453 3454 // Make a call with 3 operands. 3455 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3456 CI->getArgOperand(2)}; 3457 Value *NewCall = Builder.CreateCall( 3458 Intrinsic::getDeclaration(CI->getModule(), IID), 3459 Args); 3460 3461 // Extract the second result and store it. 3462 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3463 // Cast the pointer to the right type. 3464 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3465 llvm::PointerType::getUnqual(Data->getType())); 3466 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3467 // Replace the original call result with the first result of the new call. 3468 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3469 3470 CI->replaceAllUsesWith(CF); 3471 Rep = nullptr; 3472 } else if (IsX86 && Name.startswith("avx512.mask.") && 3473 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3474 // Rep will be updated by the call in the condition. 3475 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3476 Value *Arg = CI->getArgOperand(0); 3477 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3478 Value *Cmp = Builder.CreateICmpSGE( 3479 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3480 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3481 } else if (IsNVVM && (Name.startswith("atomic.load.add.f32.p") || 3482 Name.startswith("atomic.load.add.f64.p"))) { 3483 Value *Ptr = CI->getArgOperand(0); 3484 Value *Val = CI->getArgOperand(1); 3485 Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, 3486 AtomicOrdering::SequentiallyConsistent); 3487 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3488 Name == "max.ui" || Name == "max.ull")) { 3489 Value *Arg0 = CI->getArgOperand(0); 3490 Value *Arg1 = CI->getArgOperand(1); 3491 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3492 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3493 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3494 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3495 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3496 Name == "min.ui" || Name == "min.ull")) { 3497 Value *Arg0 = CI->getArgOperand(0); 3498 Value *Arg1 = CI->getArgOperand(1); 3499 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3500 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3501 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3502 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3503 } else if (IsNVVM && Name == "clz.ll") { 3504 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3505 Value *Arg = CI->getArgOperand(0); 3506 Value *Ctlz = Builder.CreateCall( 3507 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3508 {Arg->getType()}), 3509 {Arg, Builder.getFalse()}, "ctlz"); 3510 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3511 } else if (IsNVVM && Name == "popc.ll") { 3512 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3513 // i64. 3514 Value *Arg = CI->getArgOperand(0); 3515 Value *Popc = Builder.CreateCall( 3516 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3517 {Arg->getType()}), 3518 Arg, "ctpop"); 3519 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3520 } else if (IsNVVM && Name == "h2f") { 3521 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3522 F->getParent(), Intrinsic::convert_from_fp16, 3523 {Builder.getFloatTy()}), 3524 CI->getArgOperand(0), "h2f"); 3525 } else { 3526 llvm_unreachable("Unknown function for CallInst upgrade."); 3527 } 3528 3529 if (Rep) 3530 CI->replaceAllUsesWith(Rep); 3531 CI->eraseFromParent(); 3532 return; 3533 } 3534 3535 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3536 // Handle generic mangling change, but nothing else 3537 assert( 3538 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3539 "Unknown function for CallInst upgrade and isn't just a name change"); 3540 CI->setCalledFunction(NewFn); 3541 }; 3542 CallInst *NewCall = nullptr; 3543 switch (NewFn->getIntrinsicID()) { 3544 default: { 3545 DefaultCase(); 3546 return; 3547 } 3548 case Intrinsic::experimental_vector_reduce_v2_fmul: { 3549 SmallVector<Value *, 2> Args; 3550 if (CI->isFast()) 3551 Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0)); 3552 else 3553 Args.push_back(CI->getOperand(0)); 3554 Args.push_back(CI->getOperand(1)); 3555 NewCall = Builder.CreateCall(NewFn, Args); 3556 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3557 break; 3558 } 3559 case Intrinsic::experimental_vector_reduce_v2_fadd: { 3560 SmallVector<Value *, 2> Args; 3561 if (CI->isFast()) 3562 Args.push_back(Constant::getNullValue(CI->getOperand(0)->getType())); 3563 else 3564 Args.push_back(CI->getOperand(0)); 3565 Args.push_back(CI->getOperand(1)); 3566 NewCall = Builder.CreateCall(NewFn, Args); 3567 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3568 break; 3569 } 3570 case Intrinsic::arm_neon_vld1: 3571 case Intrinsic::arm_neon_vld2: 3572 case Intrinsic::arm_neon_vld3: 3573 case Intrinsic::arm_neon_vld4: 3574 case Intrinsic::arm_neon_vld2lane: 3575 case Intrinsic::arm_neon_vld3lane: 3576 case Intrinsic::arm_neon_vld4lane: 3577 case Intrinsic::arm_neon_vst1: 3578 case Intrinsic::arm_neon_vst2: 3579 case Intrinsic::arm_neon_vst3: 3580 case Intrinsic::arm_neon_vst4: 3581 case Intrinsic::arm_neon_vst2lane: 3582 case Intrinsic::arm_neon_vst3lane: 3583 case Intrinsic::arm_neon_vst4lane: { 3584 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3585 CI->arg_operands().end()); 3586 NewCall = Builder.CreateCall(NewFn, Args); 3587 break; 3588 } 3589 3590 case Intrinsic::bitreverse: 3591 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3592 break; 3593 3594 case Intrinsic::ctlz: 3595 case Intrinsic::cttz: 3596 assert(CI->getNumArgOperands() == 1 && 3597 "Mismatch between function args and call args"); 3598 NewCall = 3599 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3600 break; 3601 3602 case Intrinsic::objectsize: { 3603 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3604 ? Builder.getFalse() 3605 : CI->getArgOperand(2); 3606 Value *Dynamic = 3607 CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3); 3608 NewCall = Builder.CreateCall( 3609 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic}); 3610 break; 3611 } 3612 3613 case Intrinsic::ctpop: 3614 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3615 break; 3616 3617 case Intrinsic::convert_from_fp16: 3618 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3619 break; 3620 3621 case Intrinsic::dbg_value: 3622 // Upgrade from the old version that had an extra offset argument. 3623 assert(CI->getNumArgOperands() == 4); 3624 // Drop nonzero offsets instead of attempting to upgrade them. 3625 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3626 if (Offset->isZeroValue()) { 3627 NewCall = Builder.CreateCall( 3628 NewFn, 3629 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3630 break; 3631 } 3632 CI->eraseFromParent(); 3633 return; 3634 3635 case Intrinsic::x86_xop_vfrcz_ss: 3636 case Intrinsic::x86_xop_vfrcz_sd: 3637 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3638 break; 3639 3640 case Intrinsic::x86_xop_vpermil2pd: 3641 case Intrinsic::x86_xop_vpermil2ps: 3642 case Intrinsic::x86_xop_vpermil2pd_256: 3643 case Intrinsic::x86_xop_vpermil2ps_256: { 3644 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3645 CI->arg_operands().end()); 3646 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3647 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3648 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3649 NewCall = Builder.CreateCall(NewFn, Args); 3650 break; 3651 } 3652 3653 case Intrinsic::x86_sse41_ptestc: 3654 case Intrinsic::x86_sse41_ptestz: 3655 case Intrinsic::x86_sse41_ptestnzc: { 3656 // The arguments for these intrinsics used to be v4f32, and changed 3657 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3658 // So, the only thing required is a bitcast for both arguments. 3659 // First, check the arguments have the old type. 3660 Value *Arg0 = CI->getArgOperand(0); 3661 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 3662 return; 3663 3664 // Old intrinsic, add bitcasts 3665 Value *Arg1 = CI->getArgOperand(1); 3666 3667 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 3668 3669 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3670 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3671 3672 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3673 break; 3674 } 3675 3676 case Intrinsic::x86_rdtscp: { 3677 // This used to take 1 arguments. If we have no arguments, it is already 3678 // upgraded. 3679 if (CI->getNumOperands() == 0) 3680 return; 3681 3682 NewCall = Builder.CreateCall(NewFn); 3683 // Extract the second result and store it. 3684 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3685 // Cast the pointer to the right type. 3686 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3687 llvm::PointerType::getUnqual(Data->getType())); 3688 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3689 // Replace the original call result with the first result of the new call. 3690 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3691 3692 std::string Name = std::string(CI->getName()); 3693 if (!Name.empty()) { 3694 CI->setName(Name + ".old"); 3695 NewCall->setName(Name); 3696 } 3697 CI->replaceAllUsesWith(TSC); 3698 CI->eraseFromParent(); 3699 return; 3700 } 3701 3702 case Intrinsic::x86_sse41_insertps: 3703 case Intrinsic::x86_sse41_dppd: 3704 case Intrinsic::x86_sse41_dpps: 3705 case Intrinsic::x86_sse41_mpsadbw: 3706 case Intrinsic::x86_avx_dp_ps_256: 3707 case Intrinsic::x86_avx2_mpsadbw: { 3708 // Need to truncate the last argument from i32 to i8 -- this argument models 3709 // an inherently 8-bit immediate operand to these x86 instructions. 3710 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3711 CI->arg_operands().end()); 3712 3713 // Replace the last argument with a trunc. 3714 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3715 NewCall = Builder.CreateCall(NewFn, Args); 3716 break; 3717 } 3718 3719 case Intrinsic::thread_pointer: { 3720 NewCall = Builder.CreateCall(NewFn, {}); 3721 break; 3722 } 3723 3724 case Intrinsic::invariant_start: 3725 case Intrinsic::invariant_end: 3726 case Intrinsic::masked_load: 3727 case Intrinsic::masked_store: 3728 case Intrinsic::masked_gather: 3729 case Intrinsic::masked_scatter: { 3730 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3731 CI->arg_operands().end()); 3732 NewCall = Builder.CreateCall(NewFn, Args); 3733 break; 3734 } 3735 3736 case Intrinsic::memcpy: 3737 case Intrinsic::memmove: 3738 case Intrinsic::memset: { 3739 // We have to make sure that the call signature is what we're expecting. 3740 // We only want to change the old signatures by removing the alignment arg: 3741 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3742 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3743 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3744 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3745 // Note: i8*'s in the above can be any pointer type 3746 if (CI->getNumArgOperands() != 5) { 3747 DefaultCase(); 3748 return; 3749 } 3750 // Remove alignment argument (3), and add alignment attributes to the 3751 // dest/src pointers. 3752 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3753 CI->getArgOperand(2), CI->getArgOperand(4)}; 3754 NewCall = Builder.CreateCall(NewFn, Args); 3755 auto *MemCI = cast<MemIntrinsic>(NewCall); 3756 // All mem intrinsics support dest alignment. 3757 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3758 MemCI->setDestAlignment(Align->getZExtValue()); 3759 // Memcpy/Memmove also support source alignment. 3760 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3761 MTI->setSourceAlignment(Align->getZExtValue()); 3762 break; 3763 } 3764 } 3765 assert(NewCall && "Should have either set this variable or returned through " 3766 "the default case"); 3767 std::string Name = std::string(CI->getName()); 3768 if (!Name.empty()) { 3769 CI->setName(Name + ".old"); 3770 NewCall->setName(Name); 3771 } 3772 CI->replaceAllUsesWith(NewCall); 3773 CI->eraseFromParent(); 3774 } 3775 3776 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3777 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3778 3779 // Check if this function should be upgraded and get the replacement function 3780 // if there is one. 3781 Function *NewFn; 3782 if (UpgradeIntrinsicFunction(F, NewFn)) { 3783 // Replace all users of the old function with the new function or new 3784 // instructions. This is not a range loop because the call is deleted. 3785 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3786 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3787 UpgradeIntrinsicCall(CI, NewFn); 3788 3789 // Remove old function, no longer used, from the module. 3790 F->eraseFromParent(); 3791 } 3792 } 3793 3794 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3795 // Check if the tag uses struct-path aware TBAA format. 3796 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3797 return &MD; 3798 3799 auto &Context = MD.getContext(); 3800 if (MD.getNumOperands() == 3) { 3801 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3802 MDNode *ScalarType = MDNode::get(Context, Elts); 3803 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3804 Metadata *Elts2[] = {ScalarType, ScalarType, 3805 ConstantAsMetadata::get( 3806 Constant::getNullValue(Type::getInt64Ty(Context))), 3807 MD.getOperand(2)}; 3808 return MDNode::get(Context, Elts2); 3809 } 3810 // Create a MDNode <MD, MD, offset 0> 3811 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3812 Type::getInt64Ty(Context)))}; 3813 return MDNode::get(Context, Elts); 3814 } 3815 3816 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3817 Instruction *&Temp) { 3818 if (Opc != Instruction::BitCast) 3819 return nullptr; 3820 3821 Temp = nullptr; 3822 Type *SrcTy = V->getType(); 3823 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3824 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3825 LLVMContext &Context = V->getContext(); 3826 3827 // We have no information about target data layout, so we assume that 3828 // the maximum pointer size is 64bit. 3829 Type *MidTy = Type::getInt64Ty(Context); 3830 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3831 3832 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3833 } 3834 3835 return nullptr; 3836 } 3837 3838 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3839 if (Opc != Instruction::BitCast) 3840 return nullptr; 3841 3842 Type *SrcTy = C->getType(); 3843 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3844 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3845 LLVMContext &Context = C->getContext(); 3846 3847 // We have no information about target data layout, so we assume that 3848 // the maximum pointer size is 64bit. 3849 Type *MidTy = Type::getInt64Ty(Context); 3850 3851 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3852 DestTy); 3853 } 3854 3855 return nullptr; 3856 } 3857 3858 /// Check the debug info version number, if it is out-dated, drop the debug 3859 /// info. Return true if module is modified. 3860 bool llvm::UpgradeDebugInfo(Module &M) { 3861 unsigned Version = getDebugMetadataVersionFromModule(M); 3862 if (Version == DEBUG_METADATA_VERSION) { 3863 bool BrokenDebugInfo = false; 3864 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3865 report_fatal_error("Broken module found, compilation aborted!"); 3866 if (!BrokenDebugInfo) 3867 // Everything is ok. 3868 return false; 3869 else { 3870 // Diagnose malformed debug info. 3871 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3872 M.getContext().diagnose(Diag); 3873 } 3874 } 3875 bool Modified = StripDebugInfo(M); 3876 if (Modified && Version != DEBUG_METADATA_VERSION) { 3877 // Diagnose a version mismatch. 3878 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3879 M.getContext().diagnose(DiagVersion); 3880 } 3881 return Modified; 3882 } 3883 3884 /// This checks for objc retain release marker which should be upgraded. It 3885 /// returns true if module is modified. 3886 static bool UpgradeRetainReleaseMarker(Module &M) { 3887 bool Changed = false; 3888 const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker"; 3889 NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey); 3890 if (ModRetainReleaseMarker) { 3891 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3892 if (Op) { 3893 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3894 if (ID) { 3895 SmallVector<StringRef, 4> ValueComp; 3896 ID->getString().split(ValueComp, "#"); 3897 if (ValueComp.size() == 2) { 3898 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3899 ID = MDString::get(M.getContext(), NewValue); 3900 } 3901 M.addModuleFlag(Module::Error, MarkerKey, ID); 3902 M.eraseNamedMetadata(ModRetainReleaseMarker); 3903 Changed = true; 3904 } 3905 } 3906 } 3907 return Changed; 3908 } 3909 3910 void llvm::UpgradeARCRuntime(Module &M) { 3911 // This lambda converts normal function calls to ARC runtime functions to 3912 // intrinsic calls. 3913 auto UpgradeToIntrinsic = [&](const char *OldFunc, 3914 llvm::Intrinsic::ID IntrinsicFunc) { 3915 Function *Fn = M.getFunction(OldFunc); 3916 3917 if (!Fn) 3918 return; 3919 3920 Function *NewFn = llvm::Intrinsic::getDeclaration(&M, IntrinsicFunc); 3921 3922 for (auto I = Fn->user_begin(), E = Fn->user_end(); I != E;) { 3923 CallInst *CI = dyn_cast<CallInst>(*I++); 3924 if (!CI || CI->getCalledFunction() != Fn) 3925 continue; 3926 3927 IRBuilder<> Builder(CI->getParent(), CI->getIterator()); 3928 FunctionType *NewFuncTy = NewFn->getFunctionType(); 3929 SmallVector<Value *, 2> Args; 3930 3931 // Don't upgrade the intrinsic if it's not valid to bitcast the return 3932 // value to the return type of the old function. 3933 if (NewFuncTy->getReturnType() != CI->getType() && 3934 !CastInst::castIsValid(Instruction::BitCast, CI, 3935 NewFuncTy->getReturnType())) 3936 continue; 3937 3938 bool InvalidCast = false; 3939 3940 for (unsigned I = 0, E = CI->getNumArgOperands(); I != E; ++I) { 3941 Value *Arg = CI->getArgOperand(I); 3942 3943 // Bitcast argument to the parameter type of the new function if it's 3944 // not a variadic argument. 3945 if (I < NewFuncTy->getNumParams()) { 3946 // Don't upgrade the intrinsic if it's not valid to bitcast the argument 3947 // to the parameter type of the new function. 3948 if (!CastInst::castIsValid(Instruction::BitCast, Arg, 3949 NewFuncTy->getParamType(I))) { 3950 InvalidCast = true; 3951 break; 3952 } 3953 Arg = Builder.CreateBitCast(Arg, NewFuncTy->getParamType(I)); 3954 } 3955 Args.push_back(Arg); 3956 } 3957 3958 if (InvalidCast) 3959 continue; 3960 3961 // Create a call instruction that calls the new function. 3962 CallInst *NewCall = Builder.CreateCall(NewFuncTy, NewFn, Args); 3963 NewCall->setTailCallKind(cast<CallInst>(CI)->getTailCallKind()); 3964 NewCall->setName(CI->getName()); 3965 3966 // Bitcast the return value back to the type of the old call. 3967 Value *NewRetVal = Builder.CreateBitCast(NewCall, CI->getType()); 3968 3969 if (!CI->use_empty()) 3970 CI->replaceAllUsesWith(NewRetVal); 3971 CI->eraseFromParent(); 3972 } 3973 3974 if (Fn->use_empty()) 3975 Fn->eraseFromParent(); 3976 }; 3977 3978 // Unconditionally convert a call to "clang.arc.use" to a call to 3979 // "llvm.objc.clang.arc.use". 3980 UpgradeToIntrinsic("clang.arc.use", llvm::Intrinsic::objc_clang_arc_use); 3981 3982 // Upgrade the retain release marker. If there is no need to upgrade 3983 // the marker, that means either the module is already new enough to contain 3984 // new intrinsics or it is not ARC. There is no need to upgrade runtime call. 3985 if (!UpgradeRetainReleaseMarker(M)) 3986 return; 3987 3988 std::pair<const char *, llvm::Intrinsic::ID> RuntimeFuncs[] = { 3989 {"objc_autorelease", llvm::Intrinsic::objc_autorelease}, 3990 {"objc_autoreleasePoolPop", llvm::Intrinsic::objc_autoreleasePoolPop}, 3991 {"objc_autoreleasePoolPush", llvm::Intrinsic::objc_autoreleasePoolPush}, 3992 {"objc_autoreleaseReturnValue", 3993 llvm::Intrinsic::objc_autoreleaseReturnValue}, 3994 {"objc_copyWeak", llvm::Intrinsic::objc_copyWeak}, 3995 {"objc_destroyWeak", llvm::Intrinsic::objc_destroyWeak}, 3996 {"objc_initWeak", llvm::Intrinsic::objc_initWeak}, 3997 {"objc_loadWeak", llvm::Intrinsic::objc_loadWeak}, 3998 {"objc_loadWeakRetained", llvm::Intrinsic::objc_loadWeakRetained}, 3999 {"objc_moveWeak", llvm::Intrinsic::objc_moveWeak}, 4000 {"objc_release", llvm::Intrinsic::objc_release}, 4001 {"objc_retain", llvm::Intrinsic::objc_retain}, 4002 {"objc_retainAutorelease", llvm::Intrinsic::objc_retainAutorelease}, 4003 {"objc_retainAutoreleaseReturnValue", 4004 llvm::Intrinsic::objc_retainAutoreleaseReturnValue}, 4005 {"objc_retainAutoreleasedReturnValue", 4006 llvm::Intrinsic::objc_retainAutoreleasedReturnValue}, 4007 {"objc_retainBlock", llvm::Intrinsic::objc_retainBlock}, 4008 {"objc_storeStrong", llvm::Intrinsic::objc_storeStrong}, 4009 {"objc_storeWeak", llvm::Intrinsic::objc_storeWeak}, 4010 {"objc_unsafeClaimAutoreleasedReturnValue", 4011 llvm::Intrinsic::objc_unsafeClaimAutoreleasedReturnValue}, 4012 {"objc_retainedObject", llvm::Intrinsic::objc_retainedObject}, 4013 {"objc_unretainedObject", llvm::Intrinsic::objc_unretainedObject}, 4014 {"objc_unretainedPointer", llvm::Intrinsic::objc_unretainedPointer}, 4015 {"objc_retain_autorelease", llvm::Intrinsic::objc_retain_autorelease}, 4016 {"objc_sync_enter", llvm::Intrinsic::objc_sync_enter}, 4017 {"objc_sync_exit", llvm::Intrinsic::objc_sync_exit}, 4018 {"objc_arc_annotation_topdown_bbstart", 4019 llvm::Intrinsic::objc_arc_annotation_topdown_bbstart}, 4020 {"objc_arc_annotation_topdown_bbend", 4021 llvm::Intrinsic::objc_arc_annotation_topdown_bbend}, 4022 {"objc_arc_annotation_bottomup_bbstart", 4023 llvm::Intrinsic::objc_arc_annotation_bottomup_bbstart}, 4024 {"objc_arc_annotation_bottomup_bbend", 4025 llvm::Intrinsic::objc_arc_annotation_bottomup_bbend}}; 4026 4027 for (auto &I : RuntimeFuncs) 4028 UpgradeToIntrinsic(I.first, I.second); 4029 } 4030 4031 bool llvm::UpgradeModuleFlags(Module &M) { 4032 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 4033 if (!ModFlags) 4034 return false; 4035 4036 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 4037 bool HasSwiftVersionFlag = false; 4038 uint8_t SwiftMajorVersion, SwiftMinorVersion; 4039 uint32_t SwiftABIVersion; 4040 auto Int8Ty = Type::getInt8Ty(M.getContext()); 4041 auto Int32Ty = Type::getInt32Ty(M.getContext()); 4042 4043 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 4044 MDNode *Op = ModFlags->getOperand(I); 4045 if (Op->getNumOperands() != 3) 4046 continue; 4047 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 4048 if (!ID) 4049 continue; 4050 if (ID->getString() == "Objective-C Image Info Version") 4051 HasObjCFlag = true; 4052 if (ID->getString() == "Objective-C Class Properties") 4053 HasClassProperties = true; 4054 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 4055 // field was Error and now they are Max. 4056 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 4057 if (auto *Behavior = 4058 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 4059 if (Behavior->getLimitedValue() == Module::Error) { 4060 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 4061 Metadata *Ops[3] = { 4062 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 4063 MDString::get(M.getContext(), ID->getString()), 4064 Op->getOperand(2)}; 4065 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4066 Changed = true; 4067 } 4068 } 4069 } 4070 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 4071 // section name so that llvm-lto will not complain about mismatching 4072 // module flags that is functionally the same. 4073 if (ID->getString() == "Objective-C Image Info Section") { 4074 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 4075 SmallVector<StringRef, 4> ValueComp; 4076 Value->getString().split(ValueComp, " "); 4077 if (ValueComp.size() != 1) { 4078 std::string NewValue; 4079 for (auto &S : ValueComp) 4080 NewValue += S.str(); 4081 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 4082 MDString::get(M.getContext(), NewValue)}; 4083 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4084 Changed = true; 4085 } 4086 } 4087 } 4088 4089 // IRUpgrader turns a i32 type "Objective-C Garbage Collection" into i8 value. 4090 // If the higher bits are set, it adds new module flag for swift info. 4091 if (ID->getString() == "Objective-C Garbage Collection") { 4092 auto Md = dyn_cast<ConstantAsMetadata>(Op->getOperand(2)); 4093 if (Md) { 4094 assert(Md->getValue() && "Expected non-empty metadata"); 4095 auto Type = Md->getValue()->getType(); 4096 if (Type == Int8Ty) 4097 continue; 4098 unsigned Val = Md->getValue()->getUniqueInteger().getZExtValue(); 4099 if ((Val & 0xff) != Val) { 4100 HasSwiftVersionFlag = true; 4101 SwiftABIVersion = (Val & 0xff00) >> 8; 4102 SwiftMajorVersion = (Val & 0xff000000) >> 24; 4103 SwiftMinorVersion = (Val & 0xff0000) >> 16; 4104 } 4105 Metadata *Ops[3] = { 4106 ConstantAsMetadata::get(ConstantInt::get(Int32Ty,Module::Error)), 4107 Op->getOperand(1), 4108 ConstantAsMetadata::get(ConstantInt::get(Int8Ty,Val & 0xff))}; 4109 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4110 Changed = true; 4111 } 4112 } 4113 } 4114 4115 // "Objective-C Class Properties" is recently added for Objective-C. We 4116 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 4117 // flag of value 0, so we can correclty downgrade this flag when trying to 4118 // link an ObjC bitcode without this module flag with an ObjC bitcode with 4119 // this module flag. 4120 if (HasObjCFlag && !HasClassProperties) { 4121 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 4122 (uint32_t)0); 4123 Changed = true; 4124 } 4125 4126 if (HasSwiftVersionFlag) { 4127 M.addModuleFlag(Module::Error, "Swift ABI Version", 4128 SwiftABIVersion); 4129 M.addModuleFlag(Module::Error, "Swift Major Version", 4130 ConstantInt::get(Int8Ty, SwiftMajorVersion)); 4131 M.addModuleFlag(Module::Error, "Swift Minor Version", 4132 ConstantInt::get(Int8Ty, SwiftMinorVersion)); 4133 Changed = true; 4134 } 4135 4136 return Changed; 4137 } 4138 4139 void llvm::UpgradeSectionAttributes(Module &M) { 4140 auto TrimSpaces = [](StringRef Section) -> std::string { 4141 SmallVector<StringRef, 5> Components; 4142 Section.split(Components, ','); 4143 4144 SmallString<32> Buffer; 4145 raw_svector_ostream OS(Buffer); 4146 4147 for (auto Component : Components) 4148 OS << ',' << Component.trim(); 4149 4150 return std::string(OS.str().substr(1)); 4151 }; 4152 4153 for (auto &GV : M.globals()) { 4154 if (!GV.hasSection()) 4155 continue; 4156 4157 StringRef Section = GV.getSection(); 4158 4159 if (!Section.startswith("__DATA, __objc_catlist")) 4160 continue; 4161 4162 // __DATA, __objc_catlist, regular, no_dead_strip 4163 // __DATA,__objc_catlist,regular,no_dead_strip 4164 GV.setSection(TrimSpaces(Section)); 4165 } 4166 } 4167 4168 static bool isOldLoopArgument(Metadata *MD) { 4169 auto *T = dyn_cast_or_null<MDTuple>(MD); 4170 if (!T) 4171 return false; 4172 if (T->getNumOperands() < 1) 4173 return false; 4174 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 4175 if (!S) 4176 return false; 4177 return S->getString().startswith("llvm.vectorizer."); 4178 } 4179 4180 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 4181 StringRef OldPrefix = "llvm.vectorizer."; 4182 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 4183 4184 if (OldTag == "llvm.vectorizer.unroll") 4185 return MDString::get(C, "llvm.loop.interleave.count"); 4186 4187 return MDString::get( 4188 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 4189 .str()); 4190 } 4191 4192 static Metadata *upgradeLoopArgument(Metadata *MD) { 4193 auto *T = dyn_cast_or_null<MDTuple>(MD); 4194 if (!T) 4195 return MD; 4196 if (T->getNumOperands() < 1) 4197 return MD; 4198 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 4199 if (!OldTag) 4200 return MD; 4201 if (!OldTag->getString().startswith("llvm.vectorizer.")) 4202 return MD; 4203 4204 // This has an old tag. Upgrade it. 4205 SmallVector<Metadata *, 8> Ops; 4206 Ops.reserve(T->getNumOperands()); 4207 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 4208 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 4209 Ops.push_back(T->getOperand(I)); 4210 4211 return MDTuple::get(T->getContext(), Ops); 4212 } 4213 4214 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 4215 auto *T = dyn_cast<MDTuple>(&N); 4216 if (!T) 4217 return &N; 4218 4219 if (none_of(T->operands(), isOldLoopArgument)) 4220 return &N; 4221 4222 SmallVector<Metadata *, 8> Ops; 4223 Ops.reserve(T->getNumOperands()); 4224 for (Metadata *MD : T->operands()) 4225 Ops.push_back(upgradeLoopArgument(MD)); 4226 4227 return MDTuple::get(T->getContext(), Ops); 4228 } 4229 4230 std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { 4231 std::string AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64"; 4232 4233 // If X86, and the datalayout matches the expected format, add pointer size 4234 // address spaces to the datalayout. 4235 if (!Triple(TT).isX86() || DL.contains(AddrSpaces)) 4236 return std::string(DL); 4237 4238 SmallVector<StringRef, 4> Groups; 4239 Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)"); 4240 if (!R.match(DL, &Groups)) 4241 return std::string(DL); 4242 4243 SmallString<1024> Buf; 4244 std::string Res = (Groups[1] + AddrSpaces + Groups[3]).toStringRef(Buf).str(); 4245 return Res; 4246 } 4247 4248 void llvm::UpgradeAttributes(AttrBuilder &B) { 4249 StringRef FramePointer; 4250 if (B.contains("no-frame-pointer-elim")) { 4251 // The value can be "true" or "false". 4252 for (const auto &I : B.td_attrs()) 4253 if (I.first == "no-frame-pointer-elim") 4254 FramePointer = I.second == "true" ? "all" : "none"; 4255 B.removeAttribute("no-frame-pointer-elim"); 4256 } 4257 if (B.contains("no-frame-pointer-elim-non-leaf")) { 4258 // The value is ignored. "no-frame-pointer-elim"="true" takes priority. 4259 if (FramePointer != "all") 4260 FramePointer = "non-leaf"; 4261 B.removeAttribute("no-frame-pointer-elim-non-leaf"); 4262 } 4263 if (!FramePointer.empty()) 4264 B.addAttribute("frame-pointer", FramePointer); 4265 4266 if (B.contains("null-pointer-is-valid")) { 4267 // The value can be "true" or "false". 4268 bool NullPointerIsValid = false; 4269 for (const auto &I : B.td_attrs()) 4270 if (I.first == "null-pointer-is-valid") 4271 NullPointerIsValid = I.second == "true"; 4272 B.removeAttribute("null-pointer-is-valid"); 4273 if (NullPointerIsValid) 4274 B.addAttribute(Attribute::NullPointerIsValid); 4275 } 4276 } 4277