1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the auto-upgrade helper functions.
11 // This is where deprecated IR intrinsics and other IR features are updated to
12 // current specifications.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "llvm/IR/AutoUpgrade.h"
17 #include "llvm/IR/CFG.h"
18 #include "llvm/IR/CallSite.h"
19 #include "llvm/IR/Constants.h"
20 #include "llvm/IR/DIBuilder.h"
21 #include "llvm/IR/DebugInfo.h"
22 #include "llvm/IR/DiagnosticInfo.h"
23 #include "llvm/IR/Function.h"
24 #include "llvm/IR/IRBuilder.h"
25 #include "llvm/IR/Instruction.h"
26 #include "llvm/IR/IntrinsicInst.h"
27 #include "llvm/IR/LLVMContext.h"
28 #include "llvm/IR/Module.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/Regex.h"
31 #include <cstring>
32 using namespace llvm;
33 
34 // Upgrade the declarations of the SSE4.1 functions whose arguments have
35 // changed their type from v4f32 to v2i64.
36 static bool UpgradeSSE41Function(Function* F, Intrinsic::ID IID,
37                                  Function *&NewFn) {
38   // Check whether this is an old version of the function, which received
39   // v4f32 arguments.
40   Type *Arg0Type = F->getFunctionType()->getParamType(0);
41   if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4))
42     return false;
43 
44   // Yes, it's old, replace it with new version.
45   F->setName(F->getName() + ".old");
46   NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
47   return true;
48 }
49 
50 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask
51 // arguments have changed their type from i32 to i8.
52 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID,
53                                              Function *&NewFn) {
54   // Check that the last argument is an i32.
55   Type *LastArgType = F->getFunctionType()->getParamType(
56      F->getFunctionType()->getNumParams() - 1);
57   if (!LastArgType->isIntegerTy(32))
58     return false;
59 
60   // Move this function aside and map down.
61   F->setName(F->getName() + ".old");
62   NewFn = Intrinsic::getDeclaration(F->getParent(), IID);
63   return true;
64 }
65 
66 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
67   assert(F && "Illegal to upgrade a non-existent Function.");
68 
69   // Quickly eliminate it, if it's not a candidate.
70   StringRef Name = F->getName();
71   if (Name.size() <= 8 || !Name.startswith("llvm."))
72     return false;
73   Name = Name.substr(5); // Strip off "llvm."
74 
75   switch (Name[0]) {
76   default: break;
77   case 'a': {
78     if (Name.startswith("arm.neon.vclz")) {
79       Type* args[2] = {
80         F->arg_begin()->getType(),
81         Type::getInt1Ty(F->getContext())
82       };
83       // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to
84       // the end of the name. Change name from llvm.arm.neon.vclz.* to
85       //  llvm.ctlz.*
86       FunctionType* fType = FunctionType::get(F->getReturnType(), args, false);
87       NewFn = Function::Create(fType, F->getLinkage(),
88                                "llvm.ctlz." + Name.substr(14), F->getParent());
89       return true;
90     }
91     if (Name.startswith("arm.neon.vcnt")) {
92       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop,
93                                         F->arg_begin()->getType());
94       return true;
95     }
96     Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$");
97     if (vldRegex.match(Name)) {
98       auto fArgs = F->getFunctionType()->params();
99       SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end());
100       // Can't use Intrinsic::getDeclaration here as the return types might
101       // then only be structurally equal.
102       FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false);
103       NewFn = Function::Create(fType, F->getLinkage(),
104                                "llvm." + Name + ".p0i8", F->getParent());
105       return true;
106     }
107     Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
108     if (vstRegex.match(Name)) {
109       static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
110                                                 Intrinsic::arm_neon_vst2,
111                                                 Intrinsic::arm_neon_vst3,
112                                                 Intrinsic::arm_neon_vst4};
113 
114       static const Intrinsic::ID StoreLaneInts[] = {
115         Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
116         Intrinsic::arm_neon_vst4lane
117       };
118 
119       auto fArgs = F->getFunctionType()->params();
120       Type *Tys[] = {fArgs[0], fArgs[1]};
121       if (Name.find("lane") == StringRef::npos)
122         NewFn = Intrinsic::getDeclaration(F->getParent(),
123                                           StoreInts[fArgs.size() - 3], Tys);
124       else
125         NewFn = Intrinsic::getDeclaration(F->getParent(),
126                                           StoreLaneInts[fArgs.size() - 5], Tys);
127       return true;
128     }
129     if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") {
130       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer);
131       return true;
132     }
133     break;
134   }
135 
136   case 'c': {
137     if (Name.startswith("ctlz.") && F->arg_size() == 1) {
138       F->setName(Name + ".old");
139       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz,
140                                         F->arg_begin()->getType());
141       return true;
142     }
143     if (Name.startswith("cttz.") && F->arg_size() == 1) {
144       F->setName(Name + ".old");
145       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz,
146                                         F->arg_begin()->getType());
147       return true;
148     }
149     break;
150   }
151   case 'i': {
152     if (Name.startswith("invariant.start")) {
153       auto Args = F->getFunctionType()->params();
154       Type* ObjectPtr[1] = {Args[1]};
155       if (F->getName() !=
156           Intrinsic::getName(Intrinsic::invariant_start, ObjectPtr)) {
157         F->setName(Name + ".old");
158         NewFn = Intrinsic::getDeclaration(
159             F->getParent(), Intrinsic::invariant_start, ObjectPtr);
160         return true;
161       }
162     }
163     if (Name.startswith("invariant.end")) {
164       auto Args = F->getFunctionType()->params();
165       Type* ObjectPtr[1] = {Args[2]};
166       if (F->getName() !=
167           Intrinsic::getName(Intrinsic::invariant_end, ObjectPtr)) {
168         F->setName(Name + ".old");
169         NewFn = Intrinsic::getDeclaration(F->getParent(),
170                                           Intrinsic::invariant_end, ObjectPtr);
171         return true;
172       }
173     }
174     break;
175   }
176   case 'm': {
177     if (Name.startswith("masked.load.")) {
178       Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() };
179       if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) {
180         F->setName(Name + ".old");
181         NewFn = Intrinsic::getDeclaration(F->getParent(),
182                                           Intrinsic::masked_load,
183                                           Tys);
184         return true;
185       }
186     }
187     if (Name.startswith("masked.store.")) {
188       auto Args = F->getFunctionType()->params();
189       Type *Tys[] = { Args[0], Args[1] };
190       if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) {
191         F->setName(Name + ".old");
192         NewFn = Intrinsic::getDeclaration(F->getParent(),
193                                           Intrinsic::masked_store,
194                                           Tys);
195         return true;
196       }
197     }
198     break;
199   }
200 
201   case 'o':
202     // We only need to change the name to match the mangling including the
203     // address space.
204     if (F->arg_size() == 2 && Name.startswith("objectsize.")) {
205       Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() };
206       if (F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) {
207         F->setName(Name + ".old");
208         NewFn = Intrinsic::getDeclaration(F->getParent(),
209                                           Intrinsic::objectsize, Tys);
210         return true;
211       }
212     }
213     break;
214 
215   case 's':
216     if (Name == "stackprotectorcheck") {
217       NewFn = nullptr;
218       return true;
219     }
220 
221   case 'x': {
222     bool IsX86 = Name.startswith("x86.");
223     if (IsX86)
224       Name = Name.substr(4);
225 
226     if (IsX86 &&
227         (Name.startswith("sse2.pcmpeq.") ||
228          Name.startswith("sse2.pcmpgt.") ||
229          Name.startswith("avx2.pcmpeq.") ||
230          Name.startswith("avx2.pcmpgt.") ||
231          Name.startswith("avx512.mask.pcmpeq.") ||
232          Name.startswith("avx512.mask.pcmpgt.") ||
233          Name == "sse41.pmaxsb" ||
234          Name == "sse2.pmaxs.w" ||
235          Name == "sse41.pmaxsd" ||
236          Name == "sse2.pmaxu.b" ||
237          Name == "sse41.pmaxuw" ||
238          Name == "sse41.pmaxud" ||
239          Name == "sse41.pminsb" ||
240          Name == "sse2.pmins.w" ||
241          Name == "sse41.pminsd" ||
242          Name == "sse2.pminu.b" ||
243          Name == "sse41.pminuw" ||
244          Name == "sse41.pminud" ||
245          Name.startswith("avx2.pmax") ||
246          Name.startswith("avx2.pmin") ||
247          Name.startswith("avx2.vbroadcast") ||
248          Name.startswith("avx2.pbroadcast") ||
249          Name.startswith("avx.vpermil.") ||
250          Name.startswith("sse2.pshuf") ||
251          Name.startswith("avx512.pbroadcast") ||
252          Name.startswith("avx512.mask.broadcast.s") ||
253          Name.startswith("avx512.mask.movddup") ||
254          Name.startswith("avx512.mask.movshdup") ||
255          Name.startswith("avx512.mask.movsldup") ||
256          Name.startswith("avx512.mask.pshuf.d.") ||
257          Name.startswith("avx512.mask.pshufl.w.") ||
258          Name.startswith("avx512.mask.pshufh.w.") ||
259          Name.startswith("avx512.mask.vpermil.p") ||
260          Name.startswith("avx512.mask.perm.df.") ||
261          Name.startswith("avx512.mask.perm.di.") ||
262          Name.startswith("avx512.mask.punpckl") ||
263          Name.startswith("avx512.mask.punpckh") ||
264          Name.startswith("avx512.mask.unpckl.") ||
265          Name.startswith("avx512.mask.unpckh.") ||
266          Name.startswith("avx512.mask.pand.") ||
267          Name.startswith("avx512.mask.pandn.") ||
268          Name.startswith("avx512.mask.por.") ||
269          Name.startswith("avx512.mask.pxor.") ||
270          Name.startswith("sse41.pmovsx") ||
271          Name.startswith("sse41.pmovzx") ||
272          Name.startswith("avx2.pmovsx") ||
273          Name.startswith("avx2.pmovzx") ||
274          Name == "sse2.cvtdq2pd" ||
275          Name == "sse2.cvtps2pd" ||
276          Name == "avx.cvtdq2.pd.256" ||
277          Name == "avx.cvt.ps2.pd.256" ||
278          Name.startswith("avx.vinsertf128.") ||
279          Name == "avx2.vinserti128" ||
280          Name.startswith("avx.vextractf128.") ||
281          Name == "avx2.vextracti128" ||
282          Name.startswith("sse4a.movnt.") ||
283          Name.startswith("avx.movnt.") ||
284          Name.startswith("avx512.storent.") ||
285          Name == "sse2.storel.dq" ||
286          Name.startswith("sse.storeu.") ||
287          Name.startswith("sse2.storeu.") ||
288          Name.startswith("avx.storeu.") ||
289          Name.startswith("avx512.mask.storeu.p") ||
290          Name.startswith("avx512.mask.storeu.b.") ||
291          Name.startswith("avx512.mask.storeu.w.") ||
292          Name.startswith("avx512.mask.storeu.d.") ||
293          Name.startswith("avx512.mask.storeu.q.") ||
294          Name.startswith("avx512.mask.store.p") ||
295          Name.startswith("avx512.mask.store.b.") ||
296          Name.startswith("avx512.mask.store.w.") ||
297          Name.startswith("avx512.mask.store.d.") ||
298          Name.startswith("avx512.mask.store.q.") ||
299          Name.startswith("avx512.mask.loadu.p") ||
300          Name.startswith("avx512.mask.loadu.b.") ||
301          Name.startswith("avx512.mask.loadu.w.") ||
302          Name.startswith("avx512.mask.loadu.d.") ||
303          Name.startswith("avx512.mask.loadu.q.") ||
304          Name.startswith("avx512.mask.load.p") ||
305          Name.startswith("avx512.mask.load.b.") ||
306          Name.startswith("avx512.mask.load.w.") ||
307          Name.startswith("avx512.mask.load.d.") ||
308          Name.startswith("avx512.mask.load.q.") ||
309          Name == "sse42.crc32.64.8" ||
310          Name.startswith("avx.vbroadcast.s") ||
311          Name.startswith("avx512.mask.palignr.") ||
312          Name.startswith("sse2.psll.dq") ||
313          Name.startswith("sse2.psrl.dq") ||
314          Name.startswith("avx2.psll.dq") ||
315          Name.startswith("avx2.psrl.dq") ||
316          Name.startswith("avx512.psll.dq") ||
317          Name.startswith("avx512.psrl.dq") ||
318          Name == "sse41.pblendw" ||
319          Name.startswith("sse41.blendp") ||
320          Name.startswith("avx.blend.p") ||
321          Name == "avx2.pblendw" ||
322          Name.startswith("avx2.pblendd.") ||
323          Name.startswith("avx.vbroadcastf128") ||
324          Name == "avx2.vbroadcasti128" ||
325          Name == "xop.vpcmov" ||
326          (Name.startswith("xop.vpcom") && F->arg_size() == 2))) {
327       NewFn = nullptr;
328       return true;
329     }
330     // SSE4.1 ptest functions may have an old signature.
331     if (IsX86 && Name.startswith("sse41.ptest")) {
332       if (Name.substr(11) == "c")
333         return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestc, NewFn);
334       if (Name.substr(11) == "z")
335         return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestz, NewFn);
336       if (Name.substr(11) == "nzc")
337         return UpgradeSSE41Function(F, Intrinsic::x86_sse41_ptestnzc, NewFn);
338     }
339     // Several blend and other instructions with masks used the wrong number of
340     // bits.
341     if (IsX86 && Name == "sse41.insertps")
342       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps,
343                                               NewFn);
344     if (IsX86 && Name == "sse41.dppd")
345       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd,
346                                               NewFn);
347     if (IsX86 && Name == "sse41.dpps")
348       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps,
349                                               NewFn);
350     if (IsX86 && Name == "sse41.mpsadbw")
351       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw,
352                                               NewFn);
353     if (IsX86 && Name == "avx.dp.ps.256")
354       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256,
355                                               NewFn);
356     if (IsX86 && Name == "avx2.mpsadbw")
357       return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw,
358                                               NewFn);
359 
360     // frcz.ss/sd may need to have an argument dropped
361     if (IsX86 && Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) {
362       F->setName(Name + ".old");
363       NewFn = Intrinsic::getDeclaration(F->getParent(),
364                                         Intrinsic::x86_xop_vfrcz_ss);
365       return true;
366     }
367     if (IsX86 && Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) {
368       F->setName(Name + ".old");
369       NewFn = Intrinsic::getDeclaration(F->getParent(),
370                                         Intrinsic::x86_xop_vfrcz_sd);
371       return true;
372     }
373     if (IsX86 && (Name.startswith("avx512.mask.pslli.") ||
374                   Name.startswith("avx512.mask.psrai.") ||
375                   Name.startswith("avx512.mask.psrli."))) {
376       Intrinsic::ID ShiftID;
377       if (Name.slice(12, 16) == "psll")
378         ShiftID = Name[18] == 'd' ? Intrinsic::x86_avx512_mask_psll_di_512
379                                   : Intrinsic::x86_avx512_mask_psll_qi_512;
380       else if (Name.slice(12, 16) == "psra")
381         ShiftID = Name[18] == 'd' ? Intrinsic::x86_avx512_mask_psra_di_512
382                                   : Intrinsic::x86_avx512_mask_psra_qi_512;
383       else
384         ShiftID = Name[18] == 'd' ? Intrinsic::x86_avx512_mask_psrl_di_512
385                                   : Intrinsic::x86_avx512_mask_psrl_qi_512;
386       F->setName("llvm.x86." + Name + ".old");
387       NewFn = Intrinsic::getDeclaration(F->getParent(), ShiftID);
388       return true;
389     }
390     // Fix the FMA4 intrinsics to remove the 4
391     if (IsX86 && Name.startswith("fma4.")) {
392       F->setName("llvm.x86.fma" + Name.substr(5));
393       NewFn = F;
394       return true;
395     }
396     // Upgrade any XOP PERMIL2 index operand still using a float/double vector.
397     if (IsX86 && Name.startswith("xop.vpermil2")) {
398       auto Params = F->getFunctionType()->params();
399       auto Idx = Params[2];
400       if (Idx->getScalarType()->isFloatingPointTy()) {
401         F->setName("llvm.x86." + Name + ".old");
402         unsigned IdxSize = Idx->getPrimitiveSizeInBits();
403         unsigned EltSize = Idx->getScalarSizeInBits();
404         Intrinsic::ID Permil2ID;
405         if (EltSize == 64 && IdxSize == 128)
406           Permil2ID = Intrinsic::x86_xop_vpermil2pd;
407         else if (EltSize == 32 && IdxSize == 128)
408           Permil2ID = Intrinsic::x86_xop_vpermil2ps;
409         else if (EltSize == 64 && IdxSize == 256)
410           Permil2ID = Intrinsic::x86_xop_vpermil2pd_256;
411         else
412           Permil2ID = Intrinsic::x86_xop_vpermil2ps_256;
413         NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID);
414         return true;
415       }
416     }
417     break;
418   }
419   }
420 
421   //  This may not belong here. This function is effectively being overloaded
422   //  to both detect an intrinsic which needs upgrading, and to provide the
423   //  upgraded form of the intrinsic. We should perhaps have two separate
424   //  functions for this.
425   return false;
426 }
427 
428 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) {
429   NewFn = nullptr;
430   bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn);
431   assert(F != NewFn && "Intrinsic function upgraded to the same function");
432 
433   // Upgrade intrinsic attributes.  This does not change the function.
434   if (NewFn)
435     F = NewFn;
436   if (Intrinsic::ID id = F->getIntrinsicID())
437     F->setAttributes(Intrinsic::getAttributes(F->getContext(), id));
438   return Upgraded;
439 }
440 
441 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) {
442   // Nothing to do yet.
443   return false;
444 }
445 
446 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them
447 // to byte shuffles.
448 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder,
449                                          Value *Op, unsigned Shift) {
450   Type *ResultTy = Op->getType();
451   unsigned NumElts = ResultTy->getVectorNumElements() * 8;
452 
453   // Bitcast from a 64-bit element type to a byte element type.
454   Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
455   Op = Builder.CreateBitCast(Op, VecTy, "cast");
456 
457   // We'll be shuffling in zeroes.
458   Value *Res = Constant::getNullValue(VecTy);
459 
460   // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
461   // we'll just return the zero vector.
462   if (Shift < 16) {
463     uint32_t Idxs[64];
464     // 256/512-bit version is split into 2/4 16-byte lanes.
465     for (unsigned l = 0; l != NumElts; l += 16)
466       for (unsigned i = 0; i != 16; ++i) {
467         unsigned Idx = NumElts + i - Shift;
468         if (Idx < NumElts)
469           Idx -= NumElts - 16; // end of lane, switch operand.
470         Idxs[l + i] = Idx + l;
471       }
472 
473     Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts));
474   }
475 
476   // Bitcast back to a 64-bit element type.
477   return Builder.CreateBitCast(Res, ResultTy, "cast");
478 }
479 
480 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them
481 // to byte shuffles.
482 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op,
483                                          unsigned Shift) {
484   Type *ResultTy = Op->getType();
485   unsigned NumElts = ResultTy->getVectorNumElements() * 8;
486 
487   // Bitcast from a 64-bit element type to a byte element type.
488   Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts);
489   Op = Builder.CreateBitCast(Op, VecTy, "cast");
490 
491   // We'll be shuffling in zeroes.
492   Value *Res = Constant::getNullValue(VecTy);
493 
494   // If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
495   // we'll just return the zero vector.
496   if (Shift < 16) {
497     uint32_t Idxs[64];
498     // 256/512-bit version is split into 2/4 16-byte lanes.
499     for (unsigned l = 0; l != NumElts; l += 16)
500       for (unsigned i = 0; i != 16; ++i) {
501         unsigned Idx = i + Shift;
502         if (Idx >= 16)
503           Idx += NumElts - 16; // end of lane, switch operand.
504         Idxs[l + i] = Idx + l;
505       }
506 
507     Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts));
508   }
509 
510   // Bitcast back to a 64-bit element type.
511   return Builder.CreateBitCast(Res, ResultTy, "cast");
512 }
513 
514 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask,
515                             unsigned NumElts) {
516   llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(),
517                              cast<IntegerType>(Mask->getType())->getBitWidth());
518   Mask = Builder.CreateBitCast(Mask, MaskTy);
519 
520   // If we have less than 8 elements, then the starting mask was an i8 and
521   // we need to extract down to the right number of elements.
522   if (NumElts < 8) {
523     uint32_t Indices[4];
524     for (unsigned i = 0; i != NumElts; ++i)
525       Indices[i] = i;
526     Mask = Builder.CreateShuffleVector(Mask, Mask,
527                                        makeArrayRef(Indices, NumElts),
528                                        "extract");
529   }
530 
531   return Mask;
532 }
533 
534 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask,
535                             Value *Op0, Value *Op1) {
536   // If the mask is all ones just emit the align operation.
537   if (const auto *C = dyn_cast<Constant>(Mask))
538     if (C->isAllOnesValue())
539       return Op0;
540 
541   Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements());
542   return Builder.CreateSelect(Mask, Op0, Op1);
543 }
544 
545 static Value *UpgradeX86PALIGNRIntrinsics(IRBuilder<> &Builder,
546                                           Value *Op0, Value *Op1, Value *Shift,
547                                           Value *Passthru, Value *Mask) {
548   unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue();
549 
550   unsigned NumElts = Op0->getType()->getVectorNumElements();
551   assert(NumElts % 16 == 0);
552 
553   // If palignr is shifting the pair of vectors more than the size of two
554   // lanes, emit zero.
555   if (ShiftVal >= 32)
556     return llvm::Constant::getNullValue(Op0->getType());
557 
558   // If palignr is shifting the pair of input vectors more than one lane,
559   // but less than two lanes, convert to shifting in zeroes.
560   if (ShiftVal > 16) {
561     ShiftVal -= 16;
562     Op1 = Op0;
563     Op0 = llvm::Constant::getNullValue(Op0->getType());
564   }
565 
566   uint32_t Indices[64];
567   // 256-bit palignr operates on 128-bit lanes so we need to handle that
568   for (unsigned l = 0; l != NumElts; l += 16) {
569     for (unsigned i = 0; i != 16; ++i) {
570       unsigned Idx = ShiftVal + i;
571       if (Idx >= 16)
572         Idx += NumElts - 16; // End of lane, switch operand.
573       Indices[l + i] = Idx + l;
574     }
575   }
576 
577   Value *Align = Builder.CreateShuffleVector(Op1, Op0,
578                                              makeArrayRef(Indices, NumElts),
579                                              "palignr");
580 
581   return EmitX86Select(Builder, Mask, Align, Passthru);
582 }
583 
584 static Value *UpgradeMaskedStore(IRBuilder<> &Builder,
585                                  Value *Ptr, Value *Data, Value *Mask,
586                                  bool Aligned) {
587   // Cast the pointer to the right type.
588   Ptr = Builder.CreateBitCast(Ptr,
589                               llvm::PointerType::getUnqual(Data->getType()));
590   unsigned Align =
591     Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1;
592 
593   // If the mask is all ones just emit a regular store.
594   if (const auto *C = dyn_cast<Constant>(Mask))
595     if (C->isAllOnesValue())
596       return Builder.CreateAlignedStore(Data, Ptr, Align);
597 
598   // Convert the mask from an integer type to a vector of i1.
599   unsigned NumElts = Data->getType()->getVectorNumElements();
600   Mask = getX86MaskVec(Builder, Mask, NumElts);
601   return Builder.CreateMaskedStore(Data, Ptr, Align, Mask);
602 }
603 
604 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder,
605                                 Value *Ptr, Value *Passthru, Value *Mask,
606                                 bool Aligned) {
607   // Cast the pointer to the right type.
608   Ptr = Builder.CreateBitCast(Ptr,
609                              llvm::PointerType::getUnqual(Passthru->getType()));
610   unsigned Align =
611     Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1;
612 
613   // If the mask is all ones just emit a regular store.
614   if (const auto *C = dyn_cast<Constant>(Mask))
615     if (C->isAllOnesValue())
616       return Builder.CreateAlignedLoad(Ptr, Align);
617 
618   // Convert the mask from an integer type to a vector of i1.
619   unsigned NumElts = Passthru->getType()->getVectorNumElements();
620   Mask = getX86MaskVec(Builder, Mask, NumElts);
621   return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru);
622 }
623 
624 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI,
625                                ICmpInst::Predicate Pred) {
626   Value *Op0 = CI.getArgOperand(0);
627   Value *Op1 = CI.getArgOperand(1);
628   Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1);
629   return Builder.CreateSelect(Cmp, Op0, Op1);
630 }
631 
632 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI,
633                                    ICmpInst::Predicate Pred) {
634   Value *Op0 = CI.getArgOperand(0);
635   unsigned NumElts = Op0->getType()->getVectorNumElements();
636   Value *Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1));
637 
638   Value *Mask = CI.getArgOperand(2);
639   const auto *C = dyn_cast<Constant>(Mask);
640   if (!C || !C->isAllOnesValue())
641     Cmp = Builder.CreateAnd(Cmp, getX86MaskVec(Builder, Mask, NumElts));
642 
643   if (NumElts < 8) {
644     uint32_t Indices[8];
645     for (unsigned i = 0; i != NumElts; ++i)
646       Indices[i] = i;
647     for (unsigned i = NumElts; i != 8; ++i)
648       Indices[i] = NumElts + i % NumElts;
649     Cmp = Builder.CreateShuffleVector(Cmp,
650                                       Constant::getNullValue(Cmp->getType()),
651                                       Indices);
652   }
653   return Builder.CreateBitCast(Cmp, IntegerType::get(CI.getContext(),
654                                                      std::max(NumElts, 8U)));
655 }
656 
657 /// Upgrade a call to an old intrinsic. All argument and return casting must be
658 /// provided to seamlessly integrate with existing context.
659 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
660   Function *F = CI->getCalledFunction();
661   LLVMContext &C = CI->getContext();
662   IRBuilder<> Builder(C);
663   Builder.SetInsertPoint(CI->getParent(), CI->getIterator());
664 
665   assert(F && "Intrinsic call is not direct?");
666 
667   if (!NewFn) {
668     // Get the Function's name.
669     StringRef Name = F->getName();
670 
671     assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'");
672     Name = Name.substr(5);
673 
674     bool IsX86 = Name.startswith("x86.");
675     if (IsX86)
676       Name = Name.substr(4);
677 
678     Value *Rep;
679     // Upgrade packed integer vector compare intrinsics to compare instructions.
680     if (IsX86 && (Name.startswith("sse2.pcmpeq.") ||
681                   Name.startswith("avx2.pcmpeq."))) {
682       Rep = Builder.CreateICmpEQ(CI->getArgOperand(0), CI->getArgOperand(1),
683                                  "pcmpeq");
684       Rep = Builder.CreateSExt(Rep, CI->getType(), "");
685     } else if (IsX86 && (Name.startswith("sse2.pcmpgt.") ||
686                          Name.startswith("avx2.pcmpgt."))) {
687       Rep = Builder.CreateICmpSGT(CI->getArgOperand(0), CI->getArgOperand(1),
688                                   "pcmpgt");
689       Rep = Builder.CreateSExt(Rep, CI->getType(), "");
690     } else if (IsX86 && Name.startswith("avx512.mask.pcmpeq.")) {
691       Rep = upgradeMaskedCompare(Builder, *CI, ICmpInst::ICMP_EQ);
692     } else if (IsX86 && Name.startswith("avx512.mask.pcmpgt.")) {
693       Rep = upgradeMaskedCompare(Builder, *CI, ICmpInst::ICMP_SGT);
694     } else if (IsX86 && (Name == "sse41.pmaxsb" ||
695                          Name == "sse2.pmaxs.w" ||
696                          Name == "sse41.pmaxsd" ||
697                          Name.startswith("avx2.pmaxs"))) {
698       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT);
699     } else if (IsX86 && (Name == "sse2.pmaxu.b" ||
700                          Name == "sse41.pmaxuw" ||
701                          Name == "sse41.pmaxud" ||
702                          Name.startswith("avx2.pmaxu"))) {
703       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT);
704     } else if (IsX86 && (Name == "sse41.pminsb" ||
705                          Name == "sse2.pmins.w" ||
706                          Name == "sse41.pminsd" ||
707                          Name.startswith("avx2.pmins"))) {
708       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT);
709     } else if (IsX86 && (Name == "sse2.pminu.b" ||
710                          Name == "sse41.pminuw" ||
711                          Name == "sse41.pminud" ||
712                          Name.startswith("avx2.pminu"))) {
713       Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT);
714     } else if (IsX86 && (Name == "sse2.cvtdq2pd" ||
715                          Name == "sse2.cvtps2pd" ||
716                          Name == "avx.cvtdq2.pd.256" ||
717                          Name == "avx.cvt.ps2.pd.256")) {
718       // Lossless i32/float to double conversion.
719       // Extract the bottom elements if necessary and convert to double vector.
720       Value *Src = CI->getArgOperand(0);
721       VectorType *SrcTy = cast<VectorType>(Src->getType());
722       VectorType *DstTy = cast<VectorType>(CI->getType());
723       Rep = CI->getArgOperand(0);
724 
725       unsigned NumDstElts = DstTy->getNumElements();
726       if (NumDstElts < SrcTy->getNumElements()) {
727         assert(NumDstElts == 2 && "Unexpected vector size");
728         uint32_t ShuffleMask[2] = { 0, 1 };
729         Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy),
730                                           ShuffleMask);
731       }
732 
733       bool Int2Double = (StringRef::npos != Name.find("cvtdq2"));
734       if (Int2Double)
735         Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd");
736       else
737         Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd");
738     } else if (IsX86 && Name.startswith("sse4a.movnt.")) {
739       Module *M = F->getParent();
740       SmallVector<Metadata *, 1> Elts;
741       Elts.push_back(
742           ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1)));
743       MDNode *Node = MDNode::get(C, Elts);
744 
745       Value *Arg0 = CI->getArgOperand(0);
746       Value *Arg1 = CI->getArgOperand(1);
747 
748       // Nontemporal (unaligned) store of the 0'th element of the float/double
749       // vector.
750       Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType();
751       PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy);
752       Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast");
753       Value *Extract =
754           Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement");
755 
756       StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1);
757       SI->setMetadata(M->getMDKindID("nontemporal"), Node);
758 
759       // Remove intrinsic.
760       CI->eraseFromParent();
761       return;
762     } else if (IsX86 && (Name.startswith("avx.movnt.") ||
763                          Name.startswith("avx512.storent."))) {
764       Module *M = F->getParent();
765       SmallVector<Metadata *, 1> Elts;
766       Elts.push_back(
767           ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1)));
768       MDNode *Node = MDNode::get(C, Elts);
769 
770       Value *Arg0 = CI->getArgOperand(0);
771       Value *Arg1 = CI->getArgOperand(1);
772 
773       // Convert the type of the pointer to a pointer to the stored type.
774       Value *BC = Builder.CreateBitCast(Arg0,
775                                         PointerType::getUnqual(Arg1->getType()),
776                                         "cast");
777       VectorType *VTy = cast<VectorType>(Arg1->getType());
778       StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC,
779                                                  VTy->getBitWidth() / 8);
780       SI->setMetadata(M->getMDKindID("nontemporal"), Node);
781 
782       // Remove intrinsic.
783       CI->eraseFromParent();
784       return;
785     } else if (IsX86 && Name == "sse2.storel.dq") {
786       Value *Arg0 = CI->getArgOperand(0);
787       Value *Arg1 = CI->getArgOperand(1);
788 
789       Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
790       Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
791       Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0);
792       Value *BC = Builder.CreateBitCast(Arg0,
793                                         PointerType::getUnqual(Elt->getType()),
794                                         "cast");
795       Builder.CreateAlignedStore(Elt, BC, 1);
796 
797       // Remove intrinsic.
798       CI->eraseFromParent();
799       return;
800     } else if (IsX86 && (Name.startswith("sse.storeu.") ||
801                          Name.startswith("sse2.storeu.") ||
802                          Name.startswith("avx.storeu."))) {
803       Value *Arg0 = CI->getArgOperand(0);
804       Value *Arg1 = CI->getArgOperand(1);
805 
806       Arg0 = Builder.CreateBitCast(Arg0,
807                                    PointerType::getUnqual(Arg1->getType()),
808                                    "cast");
809       Builder.CreateAlignedStore(Arg1, Arg0, 1);
810 
811       // Remove intrinsic.
812       CI->eraseFromParent();
813       return;
814     } else if (IsX86 && (Name.startswith("avx512.mask.storeu.p") ||
815                          Name.startswith("avx512.mask.storeu.b.") ||
816                          Name.startswith("avx512.mask.storeu.w.") ||
817                          Name.startswith("avx512.mask.storeu.d.") ||
818                          Name.startswith("avx512.mask.storeu.q."))) {
819       UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
820                          CI->getArgOperand(2), /*Aligned*/false);
821 
822       // Remove intrinsic.
823       CI->eraseFromParent();
824       return;
825     } else if (IsX86 && (Name.startswith("avx512.mask.store.p") ||
826                          Name.startswith("avx512.mask.store.b.") ||
827                          Name.startswith("avx512.mask.store.w.") ||
828                          Name.startswith("avx512.mask.store.d.") ||
829                          Name.startswith("avx512.mask.store.q."))) {
830       UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1),
831                          CI->getArgOperand(2), /*Aligned*/true);
832 
833       // Remove intrinsic.
834       CI->eraseFromParent();
835       return;
836     } else if (IsX86 && (Name.startswith("avx512.mask.loadu.p") ||
837                          Name.startswith("avx512.mask.loadu.b.") ||
838                          Name.startswith("avx512.mask.loadu.w.") ||
839                          Name.startswith("avx512.mask.loadu.d.") ||
840                          Name.startswith("avx512.mask.loadu.q."))) {
841       Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
842                               CI->getArgOperand(1), CI->getArgOperand(2),
843                               /*Aligned*/false);
844     } else if (IsX86 && (Name.startswith("avx512.mask.load.p") ||
845                          Name.startswith("avx512.mask.load.b.") ||
846                          Name.startswith("avx512.mask.load.w.") ||
847                          Name.startswith("avx512.mask.load.d.") ||
848                          Name.startswith("avx512.mask.load.q."))) {
849       Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0),
850                               CI->getArgOperand(1),CI->getArgOperand(2),
851                               /*Aligned*/true);
852     } else if (IsX86 && Name.startswith("xop.vpcom")) {
853       Intrinsic::ID intID;
854       if (Name.endswith("ub"))
855         intID = Intrinsic::x86_xop_vpcomub;
856       else if (Name.endswith("uw"))
857         intID = Intrinsic::x86_xop_vpcomuw;
858       else if (Name.endswith("ud"))
859         intID = Intrinsic::x86_xop_vpcomud;
860       else if (Name.endswith("uq"))
861         intID = Intrinsic::x86_xop_vpcomuq;
862       else if (Name.endswith("b"))
863         intID = Intrinsic::x86_xop_vpcomb;
864       else if (Name.endswith("w"))
865         intID = Intrinsic::x86_xop_vpcomw;
866       else if (Name.endswith("d"))
867         intID = Intrinsic::x86_xop_vpcomd;
868       else if (Name.endswith("q"))
869         intID = Intrinsic::x86_xop_vpcomq;
870       else
871         llvm_unreachable("Unknown suffix");
872 
873       Name = Name.substr(9); // strip off "xop.vpcom"
874       unsigned Imm;
875       if (Name.startswith("lt"))
876         Imm = 0;
877       else if (Name.startswith("le"))
878         Imm = 1;
879       else if (Name.startswith("gt"))
880         Imm = 2;
881       else if (Name.startswith("ge"))
882         Imm = 3;
883       else if (Name.startswith("eq"))
884         Imm = 4;
885       else if (Name.startswith("ne"))
886         Imm = 5;
887       else if (Name.startswith("false"))
888         Imm = 6;
889       else if (Name.startswith("true"))
890         Imm = 7;
891       else
892         llvm_unreachable("Unknown condition");
893 
894       Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID);
895       Rep =
896           Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1),
897                                      Builder.getInt8(Imm)});
898     } else if (IsX86 && Name == "xop.vpcmov") {
899       Value *Arg0 = CI->getArgOperand(0);
900       Value *Arg1 = CI->getArgOperand(1);
901       Value *Sel = CI->getArgOperand(2);
902       unsigned NumElts = CI->getType()->getVectorNumElements();
903       Constant *MinusOne = ConstantVector::getSplat(NumElts, Builder.getInt64(-1));
904       Value *NotSel = Builder.CreateXor(Sel, MinusOne);
905       Value *Sel0 = Builder.CreateAnd(Arg0, Sel);
906       Value *Sel1 = Builder.CreateAnd(Arg1, NotSel);
907       Rep = Builder.CreateOr(Sel0, Sel1);
908     } else if (IsX86 && Name == "sse42.crc32.64.8") {
909       Function *CRC32 = Intrinsic::getDeclaration(F->getParent(),
910                                                Intrinsic::x86_sse42_crc32_32_8);
911       Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C));
912       Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)});
913       Rep = Builder.CreateZExt(Rep, CI->getType(), "");
914     } else if (IsX86 && Name.startswith("avx.vbroadcast.s")) {
915       // Replace broadcasts with a series of insertelements.
916       Type *VecTy = CI->getType();
917       Type *EltTy = VecTy->getVectorElementType();
918       unsigned EltNum = VecTy->getVectorNumElements();
919       Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0),
920                                           EltTy->getPointerTo());
921       Value *Load = Builder.CreateLoad(EltTy, Cast);
922       Type *I32Ty = Type::getInt32Ty(C);
923       Rep = UndefValue::get(VecTy);
924       for (unsigned I = 0; I < EltNum; ++I)
925         Rep = Builder.CreateInsertElement(Rep, Load,
926                                           ConstantInt::get(I32Ty, I));
927     } else if (IsX86 && (Name.startswith("sse41.pmovsx") ||
928                          Name.startswith("sse41.pmovzx") ||
929                          Name.startswith("avx2.pmovsx") ||
930                          Name.startswith("avx2.pmovzx"))) {
931       VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType());
932       VectorType *DstTy = cast<VectorType>(CI->getType());
933       unsigned NumDstElts = DstTy->getNumElements();
934 
935       // Extract a subvector of the first NumDstElts lanes and sign/zero extend.
936       SmallVector<uint32_t, 8> ShuffleMask(NumDstElts);
937       for (unsigned i = 0; i != NumDstElts; ++i)
938         ShuffleMask[i] = i;
939 
940       Value *SV = Builder.CreateShuffleVector(
941           CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask);
942 
943       bool DoSext = (StringRef::npos != Name.find("pmovsx"));
944       Rep = DoSext ? Builder.CreateSExt(SV, DstTy)
945                    : Builder.CreateZExt(SV, DstTy);
946     } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") ||
947                          Name == "avx2.vbroadcasti128")) {
948       // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle.
949       Type *EltTy = CI->getType()->getVectorElementType();
950       unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits();
951       Type *VT = VectorType::get(EltTy, NumSrcElts);
952       Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
953                                             PointerType::getUnqual(VT));
954       Value *Load = Builder.CreateLoad(VT, Op);
955       if (NumSrcElts == 2)
956         Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
957                                           { 0, 1, 0, 1 });
958       else
959         Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
960                                           { 0, 1, 2, 3, 0, 1, 2, 3 });
961     } else if (IsX86 && (Name.startswith("avx2.pbroadcast") ||
962                          Name.startswith("avx2.vbroadcast") ||
963                          Name.startswith("avx512.pbroadcast") ||
964                          Name.startswith("avx512.mask.broadcast.s"))) {
965       // Replace vp?broadcasts with a vector shuffle.
966       Value *Op = CI->getArgOperand(0);
967       unsigned NumElts = CI->getType()->getVectorNumElements();
968       Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts);
969       Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()),
970                                         Constant::getNullValue(MaskTy));
971 
972       if (CI->getNumArgOperands() == 3)
973         Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
974                             CI->getArgOperand(1));
975     } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) {
976       Rep = UpgradeX86PALIGNRIntrinsics(Builder, CI->getArgOperand(0),
977                                         CI->getArgOperand(1),
978                                         CI->getArgOperand(2),
979                                         CI->getArgOperand(3),
980                                         CI->getArgOperand(4));
981     } else if (IsX86 && (Name == "sse2.psll.dq" ||
982                          Name == "avx2.psll.dq")) {
983       // 128/256-bit shift left specified in bits.
984       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
985       Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0),
986                                        Shift / 8); // Shift is in bits.
987     } else if (IsX86 && (Name == "sse2.psrl.dq" ||
988                          Name == "avx2.psrl.dq")) {
989       // 128/256-bit shift right specified in bits.
990       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
991       Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0),
992                                        Shift / 8); // Shift is in bits.
993     } else if (IsX86 && (Name == "sse2.psll.dq.bs" ||
994                          Name == "avx2.psll.dq.bs" ||
995                          Name == "avx512.psll.dq.512")) {
996       // 128/256/512-bit shift left specified in bytes.
997       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
998       Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
999     } else if (IsX86 && (Name == "sse2.psrl.dq.bs" ||
1000                          Name == "avx2.psrl.dq.bs" ||
1001                          Name == "avx512.psrl.dq.512")) {
1002       // 128/256/512-bit shift right specified in bytes.
1003       unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1004       Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift);
1005     } else if (IsX86 && (Name == "sse41.pblendw" ||
1006                          Name.startswith("sse41.blendp") ||
1007                          Name.startswith("avx.blend.p") ||
1008                          Name == "avx2.pblendw" ||
1009                          Name.startswith("avx2.pblendd."))) {
1010       Value *Op0 = CI->getArgOperand(0);
1011       Value *Op1 = CI->getArgOperand(1);
1012       unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1013       VectorType *VecTy = cast<VectorType>(CI->getType());
1014       unsigned NumElts = VecTy->getNumElements();
1015 
1016       SmallVector<uint32_t, 16> Idxs(NumElts);
1017       for (unsigned i = 0; i != NumElts; ++i)
1018         Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i;
1019 
1020       Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1021     } else if (IsX86 && (Name.startswith("avx.vinsertf128.") ||
1022                          Name == "avx2.vinserti128")) {
1023       Value *Op0 = CI->getArgOperand(0);
1024       Value *Op1 = CI->getArgOperand(1);
1025       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue();
1026       VectorType *VecTy = cast<VectorType>(CI->getType());
1027       unsigned NumElts = VecTy->getNumElements();
1028 
1029       // Mask off the high bits of the immediate value; hardware ignores those.
1030       Imm = Imm & 1;
1031 
1032       // Extend the second operand into a vector that is twice as big.
1033       Value *UndefV = UndefValue::get(Op1->getType());
1034       SmallVector<uint32_t, 8> Idxs(NumElts);
1035       for (unsigned i = 0; i != NumElts; ++i)
1036         Idxs[i] = i;
1037       Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs);
1038 
1039       // Insert the second operand into the first operand.
1040 
1041       // Note that there is no guarantee that instruction lowering will actually
1042       // produce a vinsertf128 instruction for the created shuffles. In
1043       // particular, the 0 immediate case involves no lane changes, so it can
1044       // be handled as a blend.
1045 
1046       // Example of shuffle mask for 32-bit elements:
1047       // Imm = 1  <i32 0, i32 1, i32 2,  i32 3,  i32 8, i32 9, i32 10, i32 11>
1048       // Imm = 0  <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6,  i32 7 >
1049 
1050       // The low half of the result is either the low half of the 1st operand
1051       // or the low half of the 2nd operand (the inserted vector).
1052       for (unsigned i = 0; i != NumElts / 2; ++i)
1053         Idxs[i] = Imm ? i : (i + NumElts);
1054       // The high half of the result is either the low half of the 2nd operand
1055       // (the inserted vector) or the high half of the 1st operand.
1056       for (unsigned i = NumElts / 2; i != NumElts; ++i)
1057         Idxs[i] = Imm ? (i + NumElts / 2) : i;
1058       Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs);
1059     } else if (IsX86 && (Name.startswith("avx.vextractf128.") ||
1060                          Name == "avx2.vextracti128")) {
1061       Value *Op0 = CI->getArgOperand(0);
1062       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1063       VectorType *VecTy = cast<VectorType>(CI->getType());
1064       unsigned NumElts = VecTy->getNumElements();
1065 
1066       // Mask off the high bits of the immediate value; hardware ignores those.
1067       Imm = Imm & 1;
1068 
1069       // Get indexes for either the high half or low half of the input vector.
1070       SmallVector<uint32_t, 4> Idxs(NumElts);
1071       for (unsigned i = 0; i != NumElts; ++i) {
1072         Idxs[i] = Imm ? (i + NumElts) : i;
1073       }
1074 
1075       Value *UndefV = UndefValue::get(Op0->getType());
1076       Rep = Builder.CreateShuffleVector(Op0, UndefV, Idxs);
1077     } else if (!IsX86 && Name == "stackprotectorcheck") {
1078       Rep = nullptr;
1079     } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") ||
1080                          Name.startswith("avx512.mask.perm.di."))) {
1081       Value *Op0 = CI->getArgOperand(0);
1082       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1083       VectorType *VecTy = cast<VectorType>(CI->getType());
1084       unsigned NumElts = VecTy->getNumElements();
1085 
1086       SmallVector<uint32_t, 8> Idxs(NumElts);
1087       for (unsigned i = 0; i != NumElts; ++i)
1088         Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3);
1089 
1090       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1091 
1092       if (CI->getNumArgOperands() == 4)
1093         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1094                             CI->getArgOperand(2));
1095     } else if (IsX86 && (Name.startswith("avx.vpermil.") ||
1096                          Name == "sse2.pshuf.d" ||
1097                          Name.startswith("avx512.mask.vpermil.p") ||
1098                          Name.startswith("avx512.mask.pshuf.d."))) {
1099       Value *Op0 = CI->getArgOperand(0);
1100       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1101       VectorType *VecTy = cast<VectorType>(CI->getType());
1102       unsigned NumElts = VecTy->getNumElements();
1103       // Calculate the size of each index in the immediate.
1104       unsigned IdxSize = 64 / VecTy->getScalarSizeInBits();
1105       unsigned IdxMask = ((1 << IdxSize) - 1);
1106 
1107       SmallVector<uint32_t, 8> Idxs(NumElts);
1108       // Lookup the bits for this element, wrapping around the immediate every
1109       // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need
1110       // to offset by the first index of each group.
1111       for (unsigned i = 0; i != NumElts; ++i)
1112         Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask);
1113 
1114       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1115 
1116       if (CI->getNumArgOperands() == 4)
1117         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1118                             CI->getArgOperand(2));
1119     } else if (IsX86 && (Name == "sse2.pshufl.w" ||
1120                          Name.startswith("avx512.mask.pshufl.w."))) {
1121       Value *Op0 = CI->getArgOperand(0);
1122       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1123       unsigned NumElts = CI->getType()->getVectorNumElements();
1124 
1125       SmallVector<uint32_t, 16> Idxs(NumElts);
1126       for (unsigned l = 0; l != NumElts; l += 8) {
1127         for (unsigned i = 0; i != 4; ++i)
1128           Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l;
1129         for (unsigned i = 4; i != 8; ++i)
1130           Idxs[i + l] = i + l;
1131       }
1132 
1133       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1134 
1135       if (CI->getNumArgOperands() == 4)
1136         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1137                             CI->getArgOperand(2));
1138     } else if (IsX86 && (Name == "sse2.pshufh.w" ||
1139                          Name.startswith("avx512.mask.pshufh.w."))) {
1140       Value *Op0 = CI->getArgOperand(0);
1141       unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue();
1142       unsigned NumElts = CI->getType()->getVectorNumElements();
1143 
1144       SmallVector<uint32_t, 16> Idxs(NumElts);
1145       for (unsigned l = 0; l != NumElts; l += 8) {
1146         for (unsigned i = 0; i != 4; ++i)
1147           Idxs[i + l] = i + l;
1148         for (unsigned i = 0; i != 4; ++i)
1149           Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l;
1150       }
1151 
1152       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1153 
1154       if (CI->getNumArgOperands() == 4)
1155         Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1156                             CI->getArgOperand(2));
1157     } else if (IsX86 && (Name.startswith("avx512.mask.movddup") ||
1158                          Name.startswith("avx512.mask.movshdup") ||
1159                          Name.startswith("avx512.mask.movsldup"))) {
1160       Value *Op0 = CI->getArgOperand(0);
1161       unsigned NumElts = CI->getType()->getVectorNumElements();
1162       unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1163 
1164       unsigned Offset = 0;
1165       if (Name.startswith("avx512.mask.movshdup."))
1166         Offset = 1;
1167 
1168       SmallVector<uint32_t, 16> Idxs(NumElts);
1169       for (unsigned l = 0; l != NumElts; l += NumLaneElts)
1170         for (unsigned i = 0; i != NumLaneElts; i += 2) {
1171           Idxs[i + l + 0] = i + l + Offset;
1172           Idxs[i + l + 1] = i + l + Offset;
1173         }
1174 
1175       Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs);
1176 
1177       Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
1178                           CI->getArgOperand(1));
1179     } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") ||
1180                          Name.startswith("avx512.mask.unpckl."))) {
1181       Value *Op0 = CI->getArgOperand(0);
1182       Value *Op1 = CI->getArgOperand(1);
1183       int NumElts = CI->getType()->getVectorNumElements();
1184       int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1185 
1186       SmallVector<uint32_t, 64> Idxs(NumElts);
1187       for (int l = 0; l != NumElts; l += NumLaneElts)
1188         for (int i = 0; i != NumLaneElts; ++i)
1189           Idxs[i + l] = l + (i / 2) + NumElts * (i % 2);
1190 
1191       Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1192 
1193       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1194                           CI->getArgOperand(2));
1195     } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") ||
1196                          Name.startswith("avx512.mask.unpckh."))) {
1197       Value *Op0 = CI->getArgOperand(0);
1198       Value *Op1 = CI->getArgOperand(1);
1199       int NumElts = CI->getType()->getVectorNumElements();
1200       int NumLaneElts = 128/CI->getType()->getScalarSizeInBits();
1201 
1202       SmallVector<uint32_t, 64> Idxs(NumElts);
1203       for (int l = 0; l != NumElts; l += NumLaneElts)
1204         for (int i = 0; i != NumLaneElts; ++i)
1205           Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2);
1206 
1207       Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs);
1208 
1209       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1210                           CI->getArgOperand(2));
1211     } else if (IsX86 && Name.startswith("avx512.mask.pand.")) {
1212       Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1));
1213       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1214                           CI->getArgOperand(2));
1215     } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) {
1216       Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)),
1217                               CI->getArgOperand(1));
1218       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1219                           CI->getArgOperand(2));
1220     } else if (IsX86 && Name.startswith("avx512.mask.por.")) {
1221       Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1));
1222       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1223                           CI->getArgOperand(2));
1224     } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) {
1225       Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1));
1226       Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep,
1227                           CI->getArgOperand(2));
1228     } else {
1229       llvm_unreachable("Unknown function for CallInst upgrade.");
1230     }
1231 
1232     if (Rep)
1233       CI->replaceAllUsesWith(Rep);
1234     CI->eraseFromParent();
1235     return;
1236   }
1237 
1238   std::string Name = CI->getName();
1239   if (!Name.empty())
1240     CI->setName(Name + ".old");
1241 
1242   switch (NewFn->getIntrinsicID()) {
1243   default:
1244     llvm_unreachable("Unknown function for CallInst upgrade.");
1245 
1246   case Intrinsic::x86_avx512_mask_psll_di_512:
1247   case Intrinsic::x86_avx512_mask_psra_di_512:
1248   case Intrinsic::x86_avx512_mask_psrl_di_512:
1249   case Intrinsic::x86_avx512_mask_psll_qi_512:
1250   case Intrinsic::x86_avx512_mask_psra_qi_512:
1251   case Intrinsic::x86_avx512_mask_psrl_qi_512:
1252   case Intrinsic::arm_neon_vld1:
1253   case Intrinsic::arm_neon_vld2:
1254   case Intrinsic::arm_neon_vld3:
1255   case Intrinsic::arm_neon_vld4:
1256   case Intrinsic::arm_neon_vld2lane:
1257   case Intrinsic::arm_neon_vld3lane:
1258   case Intrinsic::arm_neon_vld4lane:
1259   case Intrinsic::arm_neon_vst1:
1260   case Intrinsic::arm_neon_vst2:
1261   case Intrinsic::arm_neon_vst3:
1262   case Intrinsic::arm_neon_vst4:
1263   case Intrinsic::arm_neon_vst2lane:
1264   case Intrinsic::arm_neon_vst3lane:
1265   case Intrinsic::arm_neon_vst4lane: {
1266     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1267                                  CI->arg_operands().end());
1268     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args));
1269     CI->eraseFromParent();
1270     return;
1271   }
1272 
1273   case Intrinsic::ctlz:
1274   case Intrinsic::cttz:
1275     assert(CI->getNumArgOperands() == 1 &&
1276            "Mismatch between function args and call args");
1277     CI->replaceAllUsesWith(Builder.CreateCall(
1278         NewFn, {CI->getArgOperand(0), Builder.getFalse()}, Name));
1279     CI->eraseFromParent();
1280     return;
1281 
1282   case Intrinsic::objectsize:
1283     CI->replaceAllUsesWith(Builder.CreateCall(
1284         NewFn, {CI->getArgOperand(0), CI->getArgOperand(1)}, Name));
1285     CI->eraseFromParent();
1286     return;
1287 
1288   case Intrinsic::ctpop: {
1289     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {CI->getArgOperand(0)}));
1290     CI->eraseFromParent();
1291     return;
1292   }
1293 
1294   case Intrinsic::x86_xop_vfrcz_ss:
1295   case Intrinsic::x86_xop_vfrcz_sd:
1296     CI->replaceAllUsesWith(
1297         Builder.CreateCall(NewFn, {CI->getArgOperand(1)}, Name));
1298     CI->eraseFromParent();
1299     return;
1300 
1301   case Intrinsic::x86_xop_vpermil2pd:
1302   case Intrinsic::x86_xop_vpermil2ps:
1303   case Intrinsic::x86_xop_vpermil2pd_256:
1304   case Intrinsic::x86_xop_vpermil2ps_256: {
1305     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1306                                  CI->arg_operands().end());
1307     VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType());
1308     VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy);
1309     Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy);
1310     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args, Name));
1311     CI->eraseFromParent();
1312     return;
1313   }
1314 
1315   case Intrinsic::x86_sse41_ptestc:
1316   case Intrinsic::x86_sse41_ptestz:
1317   case Intrinsic::x86_sse41_ptestnzc: {
1318     // The arguments for these intrinsics used to be v4f32, and changed
1319     // to v2i64. This is purely a nop, since those are bitwise intrinsics.
1320     // So, the only thing required is a bitcast for both arguments.
1321     // First, check the arguments have the old type.
1322     Value *Arg0 = CI->getArgOperand(0);
1323     if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4))
1324       return;
1325 
1326     // Old intrinsic, add bitcasts
1327     Value *Arg1 = CI->getArgOperand(1);
1328 
1329     Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2);
1330 
1331     Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast");
1332     Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast");
1333 
1334     CallInst *NewCall = Builder.CreateCall(NewFn, {BC0, BC1}, Name);
1335     CI->replaceAllUsesWith(NewCall);
1336     CI->eraseFromParent();
1337     return;
1338   }
1339 
1340   case Intrinsic::x86_sse41_insertps:
1341   case Intrinsic::x86_sse41_dppd:
1342   case Intrinsic::x86_sse41_dpps:
1343   case Intrinsic::x86_sse41_mpsadbw:
1344   case Intrinsic::x86_avx_dp_ps_256:
1345   case Intrinsic::x86_avx2_mpsadbw: {
1346     // Need to truncate the last argument from i32 to i8 -- this argument models
1347     // an inherently 8-bit immediate operand to these x86 instructions.
1348     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1349                                  CI->arg_operands().end());
1350 
1351     // Replace the last argument with a trunc.
1352     Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc");
1353 
1354     CallInst *NewCall = Builder.CreateCall(NewFn, Args);
1355     CI->replaceAllUsesWith(NewCall);
1356     CI->eraseFromParent();
1357     return;
1358   }
1359 
1360   case Intrinsic::thread_pointer: {
1361     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, {}));
1362     CI->eraseFromParent();
1363     return;
1364   }
1365 
1366   case Intrinsic::invariant_start:
1367   case Intrinsic::invariant_end:
1368   case Intrinsic::masked_load:
1369   case Intrinsic::masked_store: {
1370     SmallVector<Value *, 4> Args(CI->arg_operands().begin(),
1371                                  CI->arg_operands().end());
1372     CI->replaceAllUsesWith(Builder.CreateCall(NewFn, Args));
1373     CI->eraseFromParent();
1374     return;
1375   }
1376   }
1377 }
1378 
1379 void llvm::UpgradeCallsToIntrinsic(Function *F) {
1380   assert(F && "Illegal attempt to upgrade a non-existent intrinsic.");
1381 
1382   // Check if this function should be upgraded and get the replacement function
1383   // if there is one.
1384   Function *NewFn;
1385   if (UpgradeIntrinsicFunction(F, NewFn)) {
1386     // Replace all users of the old function with the new function or new
1387     // instructions. This is not a range loop because the call is deleted.
1388     for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; )
1389       if (CallInst *CI = dyn_cast<CallInst>(*UI++))
1390         UpgradeIntrinsicCall(CI, NewFn);
1391 
1392     // Remove old function, no longer used, from the module.
1393     F->eraseFromParent();
1394   }
1395 }
1396 
1397 void llvm::UpgradeInstWithTBAATag(Instruction *I) {
1398   MDNode *MD = I->getMetadata(LLVMContext::MD_tbaa);
1399   assert(MD && "UpgradeInstWithTBAATag should have a TBAA tag");
1400   // Check if the tag uses struct-path aware TBAA format.
1401   if (isa<MDNode>(MD->getOperand(0)) && MD->getNumOperands() >= 3)
1402     return;
1403 
1404   if (MD->getNumOperands() == 3) {
1405     Metadata *Elts[] = {MD->getOperand(0), MD->getOperand(1)};
1406     MDNode *ScalarType = MDNode::get(I->getContext(), Elts);
1407     // Create a MDNode <ScalarType, ScalarType, offset 0, const>
1408     Metadata *Elts2[] = {ScalarType, ScalarType,
1409                          ConstantAsMetadata::get(Constant::getNullValue(
1410                              Type::getInt64Ty(I->getContext()))),
1411                          MD->getOperand(2)};
1412     I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts2));
1413   } else {
1414     // Create a MDNode <MD, MD, offset 0>
1415     Metadata *Elts[] = {MD, MD, ConstantAsMetadata::get(Constant::getNullValue(
1416                                     Type::getInt64Ty(I->getContext())))};
1417     I->setMetadata(LLVMContext::MD_tbaa, MDNode::get(I->getContext(), Elts));
1418   }
1419 }
1420 
1421 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy,
1422                                       Instruction *&Temp) {
1423   if (Opc != Instruction::BitCast)
1424     return nullptr;
1425 
1426   Temp = nullptr;
1427   Type *SrcTy = V->getType();
1428   if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
1429       SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
1430     LLVMContext &Context = V->getContext();
1431 
1432     // We have no information about target data layout, so we assume that
1433     // the maximum pointer size is 64bit.
1434     Type *MidTy = Type::getInt64Ty(Context);
1435     Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy);
1436 
1437     return CastInst::Create(Instruction::IntToPtr, Temp, DestTy);
1438   }
1439 
1440   return nullptr;
1441 }
1442 
1443 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) {
1444   if (Opc != Instruction::BitCast)
1445     return nullptr;
1446 
1447   Type *SrcTy = C->getType();
1448   if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() &&
1449       SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) {
1450     LLVMContext &Context = C->getContext();
1451 
1452     // We have no information about target data layout, so we assume that
1453     // the maximum pointer size is 64bit.
1454     Type *MidTy = Type::getInt64Ty(Context);
1455 
1456     return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy),
1457                                      DestTy);
1458   }
1459 
1460   return nullptr;
1461 }
1462 
1463 /// Check the debug info version number, if it is out-dated, drop the debug
1464 /// info. Return true if module is modified.
1465 bool llvm::UpgradeDebugInfo(Module &M) {
1466   unsigned Version = getDebugMetadataVersionFromModule(M);
1467   if (Version == DEBUG_METADATA_VERSION)
1468     return false;
1469 
1470   bool RetCode = StripDebugInfo(M);
1471   if (RetCode) {
1472     DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version);
1473     M.getContext().diagnose(DiagVersion);
1474   }
1475   return RetCode;
1476 }
1477 
1478 bool llvm::UpgradeModuleFlags(Module &M) {
1479   const NamedMDNode *ModFlags = M.getModuleFlagsMetadata();
1480   if (!ModFlags)
1481     return false;
1482 
1483   bool HasObjCFlag = false, HasClassProperties = false;
1484   for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) {
1485     MDNode *Op = ModFlags->getOperand(I);
1486     if (Op->getNumOperands() < 2)
1487       continue;
1488     MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1));
1489     if (!ID)
1490       continue;
1491     if (ID->getString() == "Objective-C Image Info Version")
1492       HasObjCFlag = true;
1493     if (ID->getString() == "Objective-C Class Properties")
1494       HasClassProperties = true;
1495   }
1496   // "Objective-C Class Properties" is recently added for Objective-C. We
1497   // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module
1498   // flag of value 0, so we can correclty report error when trying to link
1499   // an ObjC bitcode without this module flag with an ObjC bitcode with this
1500   // module flag.
1501   if (HasObjCFlag && !HasClassProperties) {
1502     M.addModuleFlag(llvm::Module::Error, "Objective-C Class Properties",
1503                     (uint32_t)0);
1504     return true;
1505   }
1506   return false;
1507 }
1508 
1509 static bool isOldLoopArgument(Metadata *MD) {
1510   auto *T = dyn_cast_or_null<MDTuple>(MD);
1511   if (!T)
1512     return false;
1513   if (T->getNumOperands() < 1)
1514     return false;
1515   auto *S = dyn_cast_or_null<MDString>(T->getOperand(0));
1516   if (!S)
1517     return false;
1518   return S->getString().startswith("llvm.vectorizer.");
1519 }
1520 
1521 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) {
1522   StringRef OldPrefix = "llvm.vectorizer.";
1523   assert(OldTag.startswith(OldPrefix) && "Expected old prefix");
1524 
1525   if (OldTag == "llvm.vectorizer.unroll")
1526     return MDString::get(C, "llvm.loop.interleave.count");
1527 
1528   return MDString::get(
1529       C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size()))
1530              .str());
1531 }
1532 
1533 static Metadata *upgradeLoopArgument(Metadata *MD) {
1534   auto *T = dyn_cast_or_null<MDTuple>(MD);
1535   if (!T)
1536     return MD;
1537   if (T->getNumOperands() < 1)
1538     return MD;
1539   auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0));
1540   if (!OldTag)
1541     return MD;
1542   if (!OldTag->getString().startswith("llvm.vectorizer."))
1543     return MD;
1544 
1545   // This has an old tag.  Upgrade it.
1546   SmallVector<Metadata *, 8> Ops;
1547   Ops.reserve(T->getNumOperands());
1548   Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString()));
1549   for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I)
1550     Ops.push_back(T->getOperand(I));
1551 
1552   return MDTuple::get(T->getContext(), Ops);
1553 }
1554 
1555 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) {
1556   auto *T = dyn_cast<MDTuple>(&N);
1557   if (!T)
1558     return &N;
1559 
1560   if (!llvm::any_of(T->operands(), isOldLoopArgument))
1561     return &N;
1562 
1563   SmallVector<Metadata *, 8> Ops;
1564   Ops.reserve(T->getNumOperands());
1565   for (Metadata *MD : T->operands())
1566     Ops.push_back(upgradeLoopArgument(MD));
1567 
1568   return MDTuple::get(T->getContext(), Ops);
1569 }
1570