1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the auto-upgrade helper functions. 11 // This is where deprecated IR intrinsics and other IR features are updated to 12 // current specifications. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "llvm/IR/AutoUpgrade.h" 17 #include "llvm/ADT/StringSwitch.h" 18 #include "llvm/IR/Constants.h" 19 #include "llvm/IR/DIBuilder.h" 20 #include "llvm/IR/DebugInfo.h" 21 #include "llvm/IR/DiagnosticInfo.h" 22 #include "llvm/IR/Function.h" 23 #include "llvm/IR/IRBuilder.h" 24 #include "llvm/IR/Instruction.h" 25 #include "llvm/IR/IntrinsicInst.h" 26 #include "llvm/IR/LLVMContext.h" 27 #include "llvm/IR/Module.h" 28 #include "llvm/IR/Verifier.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Support/Regex.h" 31 #include <cstring> 32 using namespace llvm; 33 34 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 35 36 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 37 // changed their type from v4f32 to v2i64. 38 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 39 Function *&NewFn) { 40 // Check whether this is an old version of the function, which received 41 // v4f32 arguments. 42 Type *Arg0Type = F->getFunctionType()->getParamType(0); 43 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 44 return false; 45 46 // Yes, it's old, replace it with new version. 47 rename(F); 48 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 49 return true; 50 } 51 52 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 53 // arguments have changed their type from i32 to i8. 54 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 55 Function *&NewFn) { 56 // Check that the last argument is an i32. 57 Type *LastArgType = F->getFunctionType()->getParamType( 58 F->getFunctionType()->getNumParams() - 1); 59 if (!LastArgType->isIntegerTy(32)) 60 return false; 61 62 // Move this function aside and map down. 63 rename(F); 64 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 65 return true; 66 } 67 68 // Upgrade the declaration of fp compare intrinsics that change return type 69 // from scalar to vXi1 mask. 70 static bool UpgradeX86MaskedFPCompare(Function *F, Intrinsic::ID IID, 71 Function *&NewFn) { 72 // Check if the return type is a vector. 73 if (F->getReturnType()->isVectorTy()) 74 return false; 75 76 rename(F); 77 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 78 return true; 79 } 80 81 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 82 // All of the intrinsics matches below should be marked with which llvm 83 // version started autoupgrading them. At some point in the future we would 84 // like to use this information to remove upgrade code for some older 85 // intrinsics. It is currently undecided how we will determine that future 86 // point. 87 if (Name=="ssse3.pabs.b.128" || // Added in 6.0 88 Name=="ssse3.pabs.w.128" || // Added in 6.0 89 Name=="ssse3.pabs.d.128" || // Added in 6.0 90 Name.startswith("fma.vfmsub.") || // Added in 7.0 91 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 92 Name.startswith("fma.vfnmadd.") || // Added in 7.0 93 Name.startswith("fma.vfnmsub.") || // Added in 7.0 94 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 95 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 96 Name.startswith("avx512.kunpck") || //added in 6.0 97 Name.startswith("avx2.pabs.") || // Added in 6.0 98 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 99 Name.startswith("avx512.broadcastm") || // Added in 6.0 100 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 101 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 102 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 103 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 104 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 105 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 106 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 107 Name.startswith("avx.vperm2f128.") || // Added in 6.0 108 Name == "avx2.vperm2i128" || // Added in 6.0 109 Name == "sse.add.ss" || // Added in 4.0 110 Name == "sse2.add.sd" || // Added in 4.0 111 Name == "sse.sub.ss" || // Added in 4.0 112 Name == "sse2.sub.sd" || // Added in 4.0 113 Name == "sse.mul.ss" || // Added in 4.0 114 Name == "sse2.mul.sd" || // Added in 4.0 115 Name == "sse.div.ss" || // Added in 4.0 116 Name == "sse2.div.sd" || // Added in 4.0 117 Name == "sse41.pmaxsb" || // Added in 3.9 118 Name == "sse2.pmaxs.w" || // Added in 3.9 119 Name == "sse41.pmaxsd" || // Added in 3.9 120 Name == "sse2.pmaxu.b" || // Added in 3.9 121 Name == "sse41.pmaxuw" || // Added in 3.9 122 Name == "sse41.pmaxud" || // Added in 3.9 123 Name == "sse41.pminsb" || // Added in 3.9 124 Name == "sse2.pmins.w" || // Added in 3.9 125 Name == "sse41.pminsd" || // Added in 3.9 126 Name == "sse2.pminu.b" || // Added in 3.9 127 Name == "sse41.pminuw" || // Added in 3.9 128 Name == "sse41.pminud" || // Added in 3.9 129 Name == "avx512.kand.w" || // Added in 7.0 130 Name == "avx512.kandn.w" || // Added in 7.0 131 Name == "avx512.knot.w" || // Added in 7.0 132 Name == "avx512.kor.w" || // Added in 7.0 133 Name == "avx512.kxor.w" || // Added in 7.0 134 Name == "avx512.kxnor.w" || // Added in 7.0 135 Name == "avx512.kortestc.w" || // Added in 7.0 136 Name == "avx512.kortestz.w" || // Added in 7.0 137 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 138 Name.startswith("avx2.pmax") || // Added in 3.9 139 Name.startswith("avx2.pmin") || // Added in 3.9 140 Name.startswith("avx512.mask.pmax") || // Added in 4.0 141 Name.startswith("avx512.mask.pmin") || // Added in 4.0 142 Name.startswith("avx2.vbroadcast") || // Added in 3.8 143 Name.startswith("avx2.pbroadcast") || // Added in 3.8 144 Name.startswith("avx.vpermil.") || // Added in 3.1 145 Name.startswith("sse2.pshuf") || // Added in 3.9 146 Name.startswith("avx512.pbroadcast") || // Added in 3.9 147 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 148 Name.startswith("avx512.mask.movddup") || // Added in 3.9 149 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 150 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 151 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 152 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 153 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 154 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 155 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 156 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 157 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 158 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 159 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 160 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 161 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 162 Name.startswith("avx512.mask.pand.") || // Added in 3.9 163 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 164 Name.startswith("avx512.mask.por.") || // Added in 3.9 165 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 166 Name.startswith("avx512.mask.and.") || // Added in 3.9 167 Name.startswith("avx512.mask.andn.") || // Added in 3.9 168 Name.startswith("avx512.mask.or.") || // Added in 3.9 169 Name.startswith("avx512.mask.xor.") || // Added in 3.9 170 Name.startswith("avx512.mask.padd.") || // Added in 4.0 171 Name.startswith("avx512.mask.psub.") || // Added in 4.0 172 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 173 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 174 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 175 Name == "avx512.mask.cvtudq2ps.128" || // Added in 7.0 176 Name == "avx512.mask.cvtudq2ps.256" || // Added in 7.0 177 Name == "avx512.mask.cvtqq2pd.128" || // Added in 7.0 178 Name == "avx512.mask.cvtqq2pd.256" || // Added in 7.0 179 Name == "avx512.mask.cvtuqq2pd.128" || // Added in 7.0 180 Name == "avx512.mask.cvtuqq2pd.256" || // Added in 7.0 181 Name == "avx512.mask.cvtdq2ps.128" || // Added in 7.0 182 Name == "avx512.mask.cvtdq2ps.256" || // Added in 7.0 183 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 184 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 185 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 186 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 187 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 188 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 189 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 190 Name == "avx512.cvtusi2sd" || // Added in 7.0 191 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 192 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 193 Name == "sse2.pmulu.dq" || // Added in 7.0 194 Name == "sse41.pmuldq" || // Added in 7.0 195 Name == "avx2.pmulu.dq" || // Added in 7.0 196 Name == "avx2.pmul.dq" || // Added in 7.0 197 Name == "avx512.pmulu.dq.512" || // Added in 7.0 198 Name == "avx512.pmul.dq.512" || // Added in 7.0 199 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 200 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 201 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 202 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 203 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 204 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 205 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 206 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 207 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 208 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 209 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 210 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 211 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 212 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 213 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 214 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 215 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 216 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 217 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 218 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 219 Name == "avx512.mask.add.pd.128" || // Added in 4.0 220 Name == "avx512.mask.add.pd.256" || // Added in 4.0 221 Name == "avx512.mask.add.ps.128" || // Added in 4.0 222 Name == "avx512.mask.add.ps.256" || // Added in 4.0 223 Name == "avx512.mask.div.pd.128" || // Added in 4.0 224 Name == "avx512.mask.div.pd.256" || // Added in 4.0 225 Name == "avx512.mask.div.ps.128" || // Added in 4.0 226 Name == "avx512.mask.div.ps.256" || // Added in 4.0 227 Name == "avx512.mask.mul.pd.128" || // Added in 4.0 228 Name == "avx512.mask.mul.pd.256" || // Added in 4.0 229 Name == "avx512.mask.mul.ps.128" || // Added in 4.0 230 Name == "avx512.mask.mul.ps.256" || // Added in 4.0 231 Name == "avx512.mask.sub.pd.128" || // Added in 4.0 232 Name == "avx512.mask.sub.pd.256" || // Added in 4.0 233 Name == "avx512.mask.sub.ps.128" || // Added in 4.0 234 Name == "avx512.mask.sub.ps.256" || // Added in 4.0 235 Name == "avx512.mask.max.pd.128" || // Added in 5.0 236 Name == "avx512.mask.max.pd.256" || // Added in 5.0 237 Name == "avx512.mask.max.ps.128" || // Added in 5.0 238 Name == "avx512.mask.max.ps.256" || // Added in 5.0 239 Name == "avx512.mask.min.pd.128" || // Added in 5.0 240 Name == "avx512.mask.min.pd.256" || // Added in 5.0 241 Name == "avx512.mask.min.ps.128" || // Added in 5.0 242 Name == "avx512.mask.min.ps.256" || // Added in 5.0 243 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 244 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 245 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 246 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 247 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 248 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 249 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 250 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 251 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 252 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 253 Name.startswith("avx512.mask.pslli") || // Added in 4.0 254 Name.startswith("avx512.mask.psrai") || // Added in 4.0 255 Name.startswith("avx512.mask.psrli") || // Added in 4.0 256 Name.startswith("avx512.mask.psllv") || // Added in 4.0 257 Name.startswith("avx512.mask.psrav") || // Added in 4.0 258 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 259 Name.startswith("sse41.pmovsx") || // Added in 3.8 260 Name.startswith("sse41.pmovzx") || // Added in 3.9 261 Name.startswith("avx2.pmovsx") || // Added in 3.9 262 Name.startswith("avx2.pmovzx") || // Added in 3.9 263 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 264 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 265 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 266 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 267 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 268 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 269 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 270 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 271 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 272 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 273 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 274 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 275 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 276 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 277 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 278 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 279 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 280 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 281 Name == "sse.cvtsi2ss" || // Added in 7.0 282 Name == "sse.cvtsi642ss" || // Added in 7.0 283 Name == "sse2.cvtsi2sd" || // Added in 7.0 284 Name == "sse2.cvtsi642sd" || // Added in 7.0 285 Name == "sse2.cvtss2sd" || // Added in 7.0 286 Name == "sse2.cvtdq2pd" || // Added in 3.9 287 Name == "sse2.cvtdq2ps" || // Added in 7.0 288 Name == "sse2.cvtps2pd" || // Added in 3.9 289 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 290 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 291 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 292 Name.startswith("avx.vinsertf128.") || // Added in 3.7 293 Name == "avx2.vinserti128" || // Added in 3.7 294 Name.startswith("avx512.mask.insert") || // Added in 4.0 295 Name.startswith("avx.vextractf128.") || // Added in 3.7 296 Name == "avx2.vextracti128" || // Added in 3.7 297 Name.startswith("avx512.mask.vextract") || // Added in 4.0 298 Name.startswith("sse4a.movnt.") || // Added in 3.9 299 Name.startswith("avx.movnt.") || // Added in 3.2 300 Name.startswith("avx512.storent.") || // Added in 3.9 301 Name == "sse41.movntdqa" || // Added in 5.0 302 Name == "avx2.movntdqa" || // Added in 5.0 303 Name == "avx512.movntdqa" || // Added in 5.0 304 Name == "sse2.storel.dq" || // Added in 3.9 305 Name.startswith("sse.storeu.") || // Added in 3.9 306 Name.startswith("sse2.storeu.") || // Added in 3.9 307 Name.startswith("avx.storeu.") || // Added in 3.9 308 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 309 Name.startswith("avx512.mask.store.p") || // Added in 3.9 310 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 311 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 312 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 313 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 314 Name == "avx512.mask.store.ss" || // Added in 7.0 315 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 316 Name.startswith("avx512.mask.load.") || // Added in 3.9 317 Name == "sse42.crc32.64.8" || // Added in 3.4 318 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 319 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 320 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 321 Name.startswith("avx512.mask.valign.") || // Added in 4.0 322 Name.startswith("sse2.psll.dq") || // Added in 3.7 323 Name.startswith("sse2.psrl.dq") || // Added in 3.7 324 Name.startswith("avx2.psll.dq") || // Added in 3.7 325 Name.startswith("avx2.psrl.dq") || // Added in 3.7 326 Name.startswith("avx512.psll.dq") || // Added in 3.9 327 Name.startswith("avx512.psrl.dq") || // Added in 3.9 328 Name == "sse41.pblendw" || // Added in 3.7 329 Name.startswith("sse41.blendp") || // Added in 3.7 330 Name.startswith("avx.blend.p") || // Added in 3.7 331 Name == "avx2.pblendw" || // Added in 3.7 332 Name.startswith("avx2.pblendd.") || // Added in 3.7 333 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 334 Name == "avx2.vbroadcasti128" || // Added in 3.7 335 Name.startswith("avx512.mask.broadcastf") || // Added in 6.0 336 Name.startswith("avx512.mask.broadcasti") || // Added in 6.0 337 Name == "xop.vpcmov" || // Added in 3.8 338 Name == "xop.vpcmov.256" || // Added in 5.0 339 Name.startswith("avx512.mask.move.s") || // Added in 4.0 340 Name.startswith("avx512.cvtmask2") || // Added in 5.0 341 (Name.startswith("xop.vpcom") && // Added in 3.2 342 F->arg_size() == 2) || 343 Name.startswith("avx512.ptestm") || //Added in 6.0 344 Name.startswith("avx512.ptestnm") || //Added in 6.0 345 Name.startswith("sse2.pavg") || // Added in 6.0 346 Name.startswith("avx2.pavg") || // Added in 6.0 347 Name.startswith("avx512.mask.pavg")) // Added in 6.0 348 return true; 349 350 return false; 351 } 352 353 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 354 Function *&NewFn) { 355 // Only handle intrinsics that start with "x86.". 356 if (!Name.startswith("x86.")) 357 return false; 358 // Remove "x86." prefix. 359 Name = Name.substr(4); 360 361 if (ShouldUpgradeX86Intrinsic(F, Name)) { 362 NewFn = nullptr; 363 return true; 364 } 365 366 // SSE4.1 ptest functions may have an old signature. 367 if (Name.startswith("sse41.ptest")) { // Added in 3.2 368 if (Name.substr(11) == "c") 369 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 370 if (Name.substr(11) == "z") 371 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 372 if (Name.substr(11) == "nzc") 373 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 374 } 375 // Several blend and other instructions with masks used the wrong number of 376 // bits. 377 if (Name == "sse41.insertps") // Added in 3.6 378 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 379 NewFn); 380 if (Name == "sse41.dppd") // Added in 3.6 381 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 382 NewFn); 383 if (Name == "sse41.dpps") // Added in 3.6 384 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 385 NewFn); 386 if (Name == "sse41.mpsadbw") // Added in 3.6 387 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 388 NewFn); 389 if (Name == "avx.dp.ps.256") // Added in 3.6 390 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 391 NewFn); 392 if (Name == "avx2.mpsadbw") // Added in 3.6 393 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 394 NewFn); 395 if (Name == "avx512.mask.cmp.pd.128") // Added in 7.0 396 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_128, 397 NewFn); 398 if (Name == "avx512.mask.cmp.pd.256") // Added in 7.0 399 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_256, 400 NewFn); 401 if (Name == "avx512.mask.cmp.pd.512") // Added in 7.0 402 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_pd_512, 403 NewFn); 404 if (Name == "avx512.mask.cmp.ps.128") // Added in 7.0 405 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_128, 406 NewFn); 407 if (Name == "avx512.mask.cmp.ps.256") // Added in 7.0 408 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_256, 409 NewFn); 410 if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0 411 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_512, 412 NewFn); 413 414 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 415 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 416 rename(F); 417 NewFn = Intrinsic::getDeclaration(F->getParent(), 418 Intrinsic::x86_xop_vfrcz_ss); 419 return true; 420 } 421 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 422 rename(F); 423 NewFn = Intrinsic::getDeclaration(F->getParent(), 424 Intrinsic::x86_xop_vfrcz_sd); 425 return true; 426 } 427 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 428 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 429 auto Idx = F->getFunctionType()->getParamType(2); 430 if (Idx->isFPOrFPVectorTy()) { 431 rename(F); 432 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 433 unsigned EltSize = Idx->getScalarSizeInBits(); 434 Intrinsic::ID Permil2ID; 435 if (EltSize == 64 && IdxSize == 128) 436 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 437 else if (EltSize == 32 && IdxSize == 128) 438 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 439 else if (EltSize == 64 && IdxSize == 256) 440 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 441 else 442 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 443 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 444 return true; 445 } 446 } 447 448 return false; 449 } 450 451 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 452 assert(F && "Illegal to upgrade a non-existent Function."); 453 454 // Quickly eliminate it, if it's not a candidate. 455 StringRef Name = F->getName(); 456 if (Name.size() <= 8 || !Name.startswith("llvm.")) 457 return false; 458 Name = Name.substr(5); // Strip off "llvm." 459 460 switch (Name[0]) { 461 default: break; 462 case 'a': { 463 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 464 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 465 F->arg_begin()->getType()); 466 return true; 467 } 468 if (Name.startswith("arm.neon.vclz")) { 469 Type* args[2] = { 470 F->arg_begin()->getType(), 471 Type::getInt1Ty(F->getContext()) 472 }; 473 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 474 // the end of the name. Change name from llvm.arm.neon.vclz.* to 475 // llvm.ctlz.* 476 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 477 NewFn = Function::Create(fType, F->getLinkage(), 478 "llvm.ctlz." + Name.substr(14), F->getParent()); 479 return true; 480 } 481 if (Name.startswith("arm.neon.vcnt")) { 482 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 483 F->arg_begin()->getType()); 484 return true; 485 } 486 Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 487 if (vldRegex.match(Name)) { 488 auto fArgs = F->getFunctionType()->params(); 489 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 490 // Can't use Intrinsic::getDeclaration here as the return types might 491 // then only be structurally equal. 492 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 493 NewFn = Function::Create(fType, F->getLinkage(), 494 "llvm." + Name + ".p0i8", F->getParent()); 495 return true; 496 } 497 Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 498 if (vstRegex.match(Name)) { 499 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 500 Intrinsic::arm_neon_vst2, 501 Intrinsic::arm_neon_vst3, 502 Intrinsic::arm_neon_vst4}; 503 504 static const Intrinsic::ID StoreLaneInts[] = { 505 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 506 Intrinsic::arm_neon_vst4lane 507 }; 508 509 auto fArgs = F->getFunctionType()->params(); 510 Type *Tys[] = {fArgs[0], fArgs[1]}; 511 if (Name.find("lane") == StringRef::npos) 512 NewFn = Intrinsic::getDeclaration(F->getParent(), 513 StoreInts[fArgs.size() - 3], Tys); 514 else 515 NewFn = Intrinsic::getDeclaration(F->getParent(), 516 StoreLaneInts[fArgs.size() - 5], Tys); 517 return true; 518 } 519 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 520 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 521 return true; 522 } 523 break; 524 } 525 526 case 'c': { 527 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 528 rename(F); 529 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 530 F->arg_begin()->getType()); 531 return true; 532 } 533 if (Name.startswith("cttz.") && F->arg_size() == 1) { 534 rename(F); 535 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 536 F->arg_begin()->getType()); 537 return true; 538 } 539 break; 540 } 541 case 'd': { 542 if (Name == "dbg.value" && F->arg_size() == 4) { 543 rename(F); 544 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 545 return true; 546 } 547 break; 548 } 549 case 'i': 550 case 'l': { 551 bool IsLifetimeStart = Name.startswith("lifetime.start"); 552 if (IsLifetimeStart || Name.startswith("invariant.start")) { 553 Intrinsic::ID ID = IsLifetimeStart ? 554 Intrinsic::lifetime_start : Intrinsic::invariant_start; 555 auto Args = F->getFunctionType()->params(); 556 Type* ObjectPtr[1] = {Args[1]}; 557 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 558 rename(F); 559 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 560 return true; 561 } 562 } 563 564 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 565 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 566 Intrinsic::ID ID = IsLifetimeEnd ? 567 Intrinsic::lifetime_end : Intrinsic::invariant_end; 568 569 auto Args = F->getFunctionType()->params(); 570 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 571 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 572 rename(F); 573 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 574 return true; 575 } 576 } 577 if (Name.startswith("invariant.group.barrier")) { 578 // Rename invariant.group.barrier to launder.invariant.group 579 auto Args = F->getFunctionType()->params(); 580 Type* ObjectPtr[1] = {Args[0]}; 581 rename(F); 582 NewFn = Intrinsic::getDeclaration(F->getParent(), 583 Intrinsic::launder_invariant_group, ObjectPtr); 584 return true; 585 586 } 587 588 break; 589 } 590 case 'm': { 591 if (Name.startswith("masked.load.")) { 592 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 593 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 594 rename(F); 595 NewFn = Intrinsic::getDeclaration(F->getParent(), 596 Intrinsic::masked_load, 597 Tys); 598 return true; 599 } 600 } 601 if (Name.startswith("masked.store.")) { 602 auto Args = F->getFunctionType()->params(); 603 Type *Tys[] = { Args[0], Args[1] }; 604 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 605 rename(F); 606 NewFn = Intrinsic::getDeclaration(F->getParent(), 607 Intrinsic::masked_store, 608 Tys); 609 return true; 610 } 611 } 612 // Renaming gather/scatter intrinsics with no address space overloading 613 // to the new overload which includes an address space 614 if (Name.startswith("masked.gather.")) { 615 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 616 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 617 rename(F); 618 NewFn = Intrinsic::getDeclaration(F->getParent(), 619 Intrinsic::masked_gather, Tys); 620 return true; 621 } 622 } 623 if (Name.startswith("masked.scatter.")) { 624 auto Args = F->getFunctionType()->params(); 625 Type *Tys[] = {Args[0], Args[1]}; 626 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 627 rename(F); 628 NewFn = Intrinsic::getDeclaration(F->getParent(), 629 Intrinsic::masked_scatter, Tys); 630 return true; 631 } 632 } 633 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 634 // alignment parameter to embedding the alignment as an attribute of 635 // the pointer args. 636 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 637 rename(F); 638 // Get the types of dest, src, and len 639 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 640 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 641 ParamTypes); 642 return true; 643 } 644 if (Name.startswith("memmove.") && F->arg_size() == 5) { 645 rename(F); 646 // Get the types of dest, src, and len 647 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 648 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 649 ParamTypes); 650 return true; 651 } 652 if (Name.startswith("memset.") && F->arg_size() == 5) { 653 rename(F); 654 // Get the types of dest, and len 655 const auto *FT = F->getFunctionType(); 656 Type *ParamTypes[2] = { 657 FT->getParamType(0), // Dest 658 FT->getParamType(2) // len 659 }; 660 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 661 ParamTypes); 662 return true; 663 } 664 break; 665 } 666 case 'n': { 667 if (Name.startswith("nvvm.")) { 668 Name = Name.substr(5); 669 670 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 671 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 672 .Cases("brev32", "brev64", Intrinsic::bitreverse) 673 .Case("clz.i", Intrinsic::ctlz) 674 .Case("popc.i", Intrinsic::ctpop) 675 .Default(Intrinsic::not_intrinsic); 676 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 677 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 678 {F->getReturnType()}); 679 return true; 680 } 681 682 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 683 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 684 // 685 // TODO: We could add lohi.i2d. 686 bool Expand = StringSwitch<bool>(Name) 687 .Cases("abs.i", "abs.ll", true) 688 .Cases("clz.ll", "popc.ll", "h2f", true) 689 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 690 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 691 .Default(false); 692 if (Expand) { 693 NewFn = nullptr; 694 return true; 695 } 696 } 697 break; 698 } 699 case 'o': 700 // We only need to change the name to match the mangling including the 701 // address space. 702 if (Name.startswith("objectsize.")) { 703 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 704 if (F->arg_size() == 2 || 705 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 706 rename(F); 707 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 708 Tys); 709 return true; 710 } 711 } 712 break; 713 714 case 's': 715 if (Name == "stackprotectorcheck") { 716 NewFn = nullptr; 717 return true; 718 } 719 break; 720 721 case 'x': 722 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 723 return true; 724 } 725 // Remangle our intrinsic since we upgrade the mangling 726 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 727 if (Result != None) { 728 NewFn = Result.getValue(); 729 return true; 730 } 731 732 // This may not belong here. This function is effectively being overloaded 733 // to both detect an intrinsic which needs upgrading, and to provide the 734 // upgraded form of the intrinsic. We should perhaps have two separate 735 // functions for this. 736 return false; 737 } 738 739 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 740 NewFn = nullptr; 741 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 742 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 743 744 // Upgrade intrinsic attributes. This does not change the function. 745 if (NewFn) 746 F = NewFn; 747 if (Intrinsic::ID id = F->getIntrinsicID()) 748 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 749 return Upgraded; 750 } 751 752 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 753 // Nothing to do yet. 754 return false; 755 } 756 757 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 758 // to byte shuffles. 759 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 760 Value *Op, unsigned Shift) { 761 Type *ResultTy = Op->getType(); 762 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 763 764 // Bitcast from a 64-bit element type to a byte element type. 765 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 766 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 767 768 // We'll be shuffling in zeroes. 769 Value *Res = Constant::getNullValue(VecTy); 770 771 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 772 // we'll just return the zero vector. 773 if (Shift < 16) { 774 uint32_t Idxs[64]; 775 // 256/512-bit version is split into 2/4 16-byte lanes. 776 for (unsigned l = 0; l != NumElts; l += 16) 777 for (unsigned i = 0; i != 16; ++i) { 778 unsigned Idx = NumElts + i - Shift; 779 if (Idx < NumElts) 780 Idx -= NumElts - 16; // end of lane, switch operand. 781 Idxs[l + i] = Idx + l; 782 } 783 784 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 785 } 786 787 // Bitcast back to a 64-bit element type. 788 return Builder.CreateBitCast(Res, ResultTy, "cast"); 789 } 790 791 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 792 // to byte shuffles. 793 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 794 unsigned Shift) { 795 Type *ResultTy = Op->getType(); 796 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 797 798 // Bitcast from a 64-bit element type to a byte element type. 799 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 800 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 801 802 // We'll be shuffling in zeroes. 803 Value *Res = Constant::getNullValue(VecTy); 804 805 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 806 // we'll just return the zero vector. 807 if (Shift < 16) { 808 uint32_t Idxs[64]; 809 // 256/512-bit version is split into 2/4 16-byte lanes. 810 for (unsigned l = 0; l != NumElts; l += 16) 811 for (unsigned i = 0; i != 16; ++i) { 812 unsigned Idx = i + Shift; 813 if (Idx >= 16) 814 Idx += NumElts - 16; // end of lane, switch operand. 815 Idxs[l + i] = Idx + l; 816 } 817 818 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 819 } 820 821 // Bitcast back to a 64-bit element type. 822 return Builder.CreateBitCast(Res, ResultTy, "cast"); 823 } 824 825 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 826 unsigned NumElts) { 827 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 828 cast<IntegerType>(Mask->getType())->getBitWidth()); 829 Mask = Builder.CreateBitCast(Mask, MaskTy); 830 831 // If we have less than 8 elements, then the starting mask was an i8 and 832 // we need to extract down to the right number of elements. 833 if (NumElts < 8) { 834 uint32_t Indices[4]; 835 for (unsigned i = 0; i != NumElts; ++i) 836 Indices[i] = i; 837 Mask = Builder.CreateShuffleVector(Mask, Mask, 838 makeArrayRef(Indices, NumElts), 839 "extract"); 840 } 841 842 return Mask; 843 } 844 845 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 846 Value *Op0, Value *Op1) { 847 // If the mask is all ones just emit the align operation. 848 if (const auto *C = dyn_cast<Constant>(Mask)) 849 if (C->isAllOnesValue()) 850 return Op0; 851 852 Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements()); 853 return Builder.CreateSelect(Mask, Op0, Op1); 854 } 855 856 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 857 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 858 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 859 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 860 Value *Op1, Value *Shift, 861 Value *Passthru, Value *Mask, 862 bool IsVALIGN) { 863 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 864 865 unsigned NumElts = Op0->getType()->getVectorNumElements(); 866 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 867 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 868 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 869 870 // Mask the immediate for VALIGN. 871 if (IsVALIGN) 872 ShiftVal &= (NumElts - 1); 873 874 // If palignr is shifting the pair of vectors more than the size of two 875 // lanes, emit zero. 876 if (ShiftVal >= 32) 877 return llvm::Constant::getNullValue(Op0->getType()); 878 879 // If palignr is shifting the pair of input vectors more than one lane, 880 // but less than two lanes, convert to shifting in zeroes. 881 if (ShiftVal > 16) { 882 ShiftVal -= 16; 883 Op1 = Op0; 884 Op0 = llvm::Constant::getNullValue(Op0->getType()); 885 } 886 887 uint32_t Indices[64]; 888 // 256-bit palignr operates on 128-bit lanes so we need to handle that 889 for (unsigned l = 0; l < NumElts; l += 16) { 890 for (unsigned i = 0; i != 16; ++i) { 891 unsigned Idx = ShiftVal + i; 892 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 893 Idx += NumElts - 16; // End of lane, switch operand. 894 Indices[l + i] = Idx + l; 895 } 896 } 897 898 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 899 makeArrayRef(Indices, NumElts), 900 "palignr"); 901 902 return EmitX86Select(Builder, Mask, Align, Passthru); 903 } 904 905 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 906 Value *Ptr, Value *Data, Value *Mask, 907 bool Aligned) { 908 // Cast the pointer to the right type. 909 Ptr = Builder.CreateBitCast(Ptr, 910 llvm::PointerType::getUnqual(Data->getType())); 911 unsigned Align = 912 Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; 913 914 // If the mask is all ones just emit a regular store. 915 if (const auto *C = dyn_cast<Constant>(Mask)) 916 if (C->isAllOnesValue()) 917 return Builder.CreateAlignedStore(Data, Ptr, Align); 918 919 // Convert the mask from an integer type to a vector of i1. 920 unsigned NumElts = Data->getType()->getVectorNumElements(); 921 Mask = getX86MaskVec(Builder, Mask, NumElts); 922 return Builder.CreateMaskedStore(Data, Ptr, Align, Mask); 923 } 924 925 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 926 Value *Ptr, Value *Passthru, Value *Mask, 927 bool Aligned) { 928 // Cast the pointer to the right type. 929 Ptr = Builder.CreateBitCast(Ptr, 930 llvm::PointerType::getUnqual(Passthru->getType())); 931 unsigned Align = 932 Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1; 933 934 // If the mask is all ones just emit a regular store. 935 if (const auto *C = dyn_cast<Constant>(Mask)) 936 if (C->isAllOnesValue()) 937 return Builder.CreateAlignedLoad(Ptr, Align); 938 939 // Convert the mask from an integer type to a vector of i1. 940 unsigned NumElts = Passthru->getType()->getVectorNumElements(); 941 Mask = getX86MaskVec(Builder, Mask, NumElts); 942 return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru); 943 } 944 945 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 946 Value *Op0 = CI.getArgOperand(0); 947 llvm::Type *Ty = Op0->getType(); 948 Value *Zero = llvm::Constant::getNullValue(Ty); 949 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 950 Value *Neg = Builder.CreateNeg(Op0); 951 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 952 953 if (CI.getNumArgOperands() == 3) 954 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 955 956 return Res; 957 } 958 959 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 960 ICmpInst::Predicate Pred) { 961 Value *Op0 = CI.getArgOperand(0); 962 Value *Op1 = CI.getArgOperand(1); 963 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 964 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 965 966 if (CI.getNumArgOperands() == 4) 967 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 968 969 return Res; 970 } 971 972 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 973 Type *Ty = CI.getType(); 974 975 // Arguments have a vXi32 type so cast to vXi64. 976 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 977 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 978 979 if (IsSigned) { 980 // Shift left then arithmetic shift right. 981 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 982 LHS = Builder.CreateShl(LHS, ShiftAmt); 983 LHS = Builder.CreateAShr(LHS, ShiftAmt); 984 RHS = Builder.CreateShl(RHS, ShiftAmt); 985 RHS = Builder.CreateAShr(RHS, ShiftAmt); 986 } else { 987 // Clear the upper bits. 988 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 989 LHS = Builder.CreateAnd(LHS, Mask); 990 RHS = Builder.CreateAnd(RHS, Mask); 991 } 992 993 Value *Res = Builder.CreateMul(LHS, RHS); 994 995 if (CI.getNumArgOperands() == 4) 996 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 997 998 return Res; 999 } 1000 1001 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1002 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder,Value *Vec, Value *Mask, 1003 unsigned NumElts) { 1004 if (Mask) { 1005 const auto *C = dyn_cast<Constant>(Mask); 1006 if (!C || !C->isAllOnesValue()) 1007 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1008 } 1009 1010 if (NumElts < 8) { 1011 uint32_t Indices[8]; 1012 for (unsigned i = 0; i != NumElts; ++i) 1013 Indices[i] = i; 1014 for (unsigned i = NumElts; i != 8; ++i) 1015 Indices[i] = NumElts + i % NumElts; 1016 Vec = Builder.CreateShuffleVector(Vec, 1017 Constant::getNullValue(Vec->getType()), 1018 Indices); 1019 } 1020 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1021 } 1022 1023 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1024 unsigned CC, bool Signed) { 1025 Value *Op0 = CI.getArgOperand(0); 1026 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1027 1028 Value *Cmp; 1029 if (CC == 3) { 1030 Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1031 } else if (CC == 7) { 1032 Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1033 } else { 1034 ICmpInst::Predicate Pred; 1035 switch (CC) { 1036 default: llvm_unreachable("Unknown condition code"); 1037 case 0: Pred = ICmpInst::ICMP_EQ; break; 1038 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1039 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1040 case 4: Pred = ICmpInst::ICMP_NE; break; 1041 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1042 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1043 } 1044 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1045 } 1046 1047 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1048 1049 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask, NumElts); 1050 } 1051 1052 // Replace a masked intrinsic with an older unmasked intrinsic. 1053 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1054 Intrinsic::ID IID) { 1055 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1056 Value *Rep = Builder.CreateCall(Intrin, 1057 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1058 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1059 } 1060 1061 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1062 Value* A = CI.getArgOperand(0); 1063 Value* B = CI.getArgOperand(1); 1064 Value* Src = CI.getArgOperand(2); 1065 Value* Mask = CI.getArgOperand(3); 1066 1067 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1068 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1069 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1070 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1071 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1072 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1073 } 1074 1075 1076 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1077 Value* Op = CI.getArgOperand(0); 1078 Type* ReturnOp = CI.getType(); 1079 unsigned NumElts = CI.getType()->getVectorNumElements(); 1080 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1081 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1082 } 1083 1084 // Replace intrinsic with unmasked version and a select. 1085 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1086 CallInst &CI, Value *&Rep) { 1087 Name = Name.substr(12); // Remove avx512.mask. 1088 1089 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1090 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1091 Intrinsic::ID IID; 1092 if (Name.startswith("max.p")) { 1093 if (VecWidth == 128 && EltWidth == 32) 1094 IID = Intrinsic::x86_sse_max_ps; 1095 else if (VecWidth == 128 && EltWidth == 64) 1096 IID = Intrinsic::x86_sse2_max_pd; 1097 else if (VecWidth == 256 && EltWidth == 32) 1098 IID = Intrinsic::x86_avx_max_ps_256; 1099 else if (VecWidth == 256 && EltWidth == 64) 1100 IID = Intrinsic::x86_avx_max_pd_256; 1101 else 1102 llvm_unreachable("Unexpected intrinsic"); 1103 } else if (Name.startswith("min.p")) { 1104 if (VecWidth == 128 && EltWidth == 32) 1105 IID = Intrinsic::x86_sse_min_ps; 1106 else if (VecWidth == 128 && EltWidth == 64) 1107 IID = Intrinsic::x86_sse2_min_pd; 1108 else if (VecWidth == 256 && EltWidth == 32) 1109 IID = Intrinsic::x86_avx_min_ps_256; 1110 else if (VecWidth == 256 && EltWidth == 64) 1111 IID = Intrinsic::x86_avx_min_pd_256; 1112 else 1113 llvm_unreachable("Unexpected intrinsic"); 1114 } else if (Name.startswith("pshuf.b.")) { 1115 if (VecWidth == 128) 1116 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1117 else if (VecWidth == 256) 1118 IID = Intrinsic::x86_avx2_pshuf_b; 1119 else if (VecWidth == 512) 1120 IID = Intrinsic::x86_avx512_pshuf_b_512; 1121 else 1122 llvm_unreachable("Unexpected intrinsic"); 1123 } else if (Name.startswith("pmul.hr.sw.")) { 1124 if (VecWidth == 128) 1125 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1126 else if (VecWidth == 256) 1127 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1128 else if (VecWidth == 512) 1129 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1130 else 1131 llvm_unreachable("Unexpected intrinsic"); 1132 } else if (Name.startswith("pmulh.w.")) { 1133 if (VecWidth == 128) 1134 IID = Intrinsic::x86_sse2_pmulh_w; 1135 else if (VecWidth == 256) 1136 IID = Intrinsic::x86_avx2_pmulh_w; 1137 else if (VecWidth == 512) 1138 IID = Intrinsic::x86_avx512_pmulh_w_512; 1139 else 1140 llvm_unreachable("Unexpected intrinsic"); 1141 } else if (Name.startswith("pmulhu.w.")) { 1142 if (VecWidth == 128) 1143 IID = Intrinsic::x86_sse2_pmulhu_w; 1144 else if (VecWidth == 256) 1145 IID = Intrinsic::x86_avx2_pmulhu_w; 1146 else if (VecWidth == 512) 1147 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1148 else 1149 llvm_unreachable("Unexpected intrinsic"); 1150 } else if (Name.startswith("pmaddw.d.")) { 1151 if (VecWidth == 128) 1152 IID = Intrinsic::x86_sse2_pmadd_wd; 1153 else if (VecWidth == 256) 1154 IID = Intrinsic::x86_avx2_pmadd_wd; 1155 else if (VecWidth == 512) 1156 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1157 else 1158 llvm_unreachable("Unexpected intrinsic"); 1159 } else if (Name.startswith("pmaddubs.w.")) { 1160 if (VecWidth == 128) 1161 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1162 else if (VecWidth == 256) 1163 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1164 else if (VecWidth == 512) 1165 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1166 else 1167 llvm_unreachable("Unexpected intrinsic"); 1168 } else if (Name.startswith("packsswb.")) { 1169 if (VecWidth == 128) 1170 IID = Intrinsic::x86_sse2_packsswb_128; 1171 else if (VecWidth == 256) 1172 IID = Intrinsic::x86_avx2_packsswb; 1173 else if (VecWidth == 512) 1174 IID = Intrinsic::x86_avx512_packsswb_512; 1175 else 1176 llvm_unreachable("Unexpected intrinsic"); 1177 } else if (Name.startswith("packssdw.")) { 1178 if (VecWidth == 128) 1179 IID = Intrinsic::x86_sse2_packssdw_128; 1180 else if (VecWidth == 256) 1181 IID = Intrinsic::x86_avx2_packssdw; 1182 else if (VecWidth == 512) 1183 IID = Intrinsic::x86_avx512_packssdw_512; 1184 else 1185 llvm_unreachable("Unexpected intrinsic"); 1186 } else if (Name.startswith("packuswb.")) { 1187 if (VecWidth == 128) 1188 IID = Intrinsic::x86_sse2_packuswb_128; 1189 else if (VecWidth == 256) 1190 IID = Intrinsic::x86_avx2_packuswb; 1191 else if (VecWidth == 512) 1192 IID = Intrinsic::x86_avx512_packuswb_512; 1193 else 1194 llvm_unreachable("Unexpected intrinsic"); 1195 } else if (Name.startswith("packusdw.")) { 1196 if (VecWidth == 128) 1197 IID = Intrinsic::x86_sse41_packusdw; 1198 else if (VecWidth == 256) 1199 IID = Intrinsic::x86_avx2_packusdw; 1200 else if (VecWidth == 512) 1201 IID = Intrinsic::x86_avx512_packusdw_512; 1202 else 1203 llvm_unreachable("Unexpected intrinsic"); 1204 } else if (Name.startswith("vpermilvar.")) { 1205 if (VecWidth == 128 && EltWidth == 32) 1206 IID = Intrinsic::x86_avx_vpermilvar_ps; 1207 else if (VecWidth == 128 && EltWidth == 64) 1208 IID = Intrinsic::x86_avx_vpermilvar_pd; 1209 else if (VecWidth == 256 && EltWidth == 32) 1210 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1211 else if (VecWidth == 256 && EltWidth == 64) 1212 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1213 else if (VecWidth == 512 && EltWidth == 32) 1214 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1215 else if (VecWidth == 512 && EltWidth == 64) 1216 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1217 else 1218 llvm_unreachable("Unexpected intrinsic"); 1219 } else if (Name == "cvtpd2dq.256") { 1220 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1221 } else if (Name == "cvtpd2ps.256") { 1222 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1223 } else if (Name == "cvttpd2dq.256") { 1224 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1225 } else if (Name == "cvttps2dq.128") { 1226 IID = Intrinsic::x86_sse2_cvttps2dq; 1227 } else if (Name == "cvttps2dq.256") { 1228 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1229 } else if (Name.startswith("permvar.")) { 1230 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1231 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1232 IID = Intrinsic::x86_avx2_permps; 1233 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1234 IID = Intrinsic::x86_avx2_permd; 1235 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1236 IID = Intrinsic::x86_avx512_permvar_df_256; 1237 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1238 IID = Intrinsic::x86_avx512_permvar_di_256; 1239 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1240 IID = Intrinsic::x86_avx512_permvar_sf_512; 1241 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1242 IID = Intrinsic::x86_avx512_permvar_si_512; 1243 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1244 IID = Intrinsic::x86_avx512_permvar_df_512; 1245 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1246 IID = Intrinsic::x86_avx512_permvar_di_512; 1247 else if (VecWidth == 128 && EltWidth == 16) 1248 IID = Intrinsic::x86_avx512_permvar_hi_128; 1249 else if (VecWidth == 256 && EltWidth == 16) 1250 IID = Intrinsic::x86_avx512_permvar_hi_256; 1251 else if (VecWidth == 512 && EltWidth == 16) 1252 IID = Intrinsic::x86_avx512_permvar_hi_512; 1253 else if (VecWidth == 128 && EltWidth == 8) 1254 IID = Intrinsic::x86_avx512_permvar_qi_128; 1255 else if (VecWidth == 256 && EltWidth == 8) 1256 IID = Intrinsic::x86_avx512_permvar_qi_256; 1257 else if (VecWidth == 512 && EltWidth == 8) 1258 IID = Intrinsic::x86_avx512_permvar_qi_512; 1259 else 1260 llvm_unreachable("Unexpected intrinsic"); 1261 } else 1262 return false; 1263 1264 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1265 CI.arg_operands().end()); 1266 Args.pop_back(); 1267 Args.pop_back(); 1268 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1269 Args); 1270 unsigned NumArgs = CI.getNumArgOperands(); 1271 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1272 CI.getArgOperand(NumArgs - 2)); 1273 return true; 1274 } 1275 1276 /// Upgrade comment in call to inline asm that represents an objc retain release 1277 /// marker. 1278 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1279 size_t Pos; 1280 if (AsmStr->find("mov\tfp") == 0 && 1281 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1282 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1283 AsmStr->replace(Pos, 1, ";"); 1284 } 1285 return; 1286 } 1287 1288 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1289 /// provided to seamlessly integrate with existing context. 1290 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1291 Function *F = CI->getCalledFunction(); 1292 LLVMContext &C = CI->getContext(); 1293 IRBuilder<> Builder(C); 1294 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1295 1296 assert(F && "Intrinsic call is not direct?"); 1297 1298 if (!NewFn) { 1299 // Get the Function's name. 1300 StringRef Name = F->getName(); 1301 1302 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1303 Name = Name.substr(5); 1304 1305 bool IsX86 = Name.startswith("x86."); 1306 if (IsX86) 1307 Name = Name.substr(4); 1308 bool IsNVVM = Name.startswith("nvvm."); 1309 if (IsNVVM) 1310 Name = Name.substr(5); 1311 1312 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1313 Module *M = F->getParent(); 1314 SmallVector<Metadata *, 1> Elts; 1315 Elts.push_back( 1316 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1317 MDNode *Node = MDNode::get(C, Elts); 1318 1319 Value *Arg0 = CI->getArgOperand(0); 1320 Value *Arg1 = CI->getArgOperand(1); 1321 1322 // Nontemporal (unaligned) store of the 0'th element of the float/double 1323 // vector. 1324 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1325 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1326 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1327 Value *Extract = 1328 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1329 1330 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1); 1331 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1332 1333 // Remove intrinsic. 1334 CI->eraseFromParent(); 1335 return; 1336 } 1337 1338 if (IsX86 && (Name.startswith("avx.movnt.") || 1339 Name.startswith("avx512.storent."))) { 1340 Module *M = F->getParent(); 1341 SmallVector<Metadata *, 1> Elts; 1342 Elts.push_back( 1343 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1344 MDNode *Node = MDNode::get(C, Elts); 1345 1346 Value *Arg0 = CI->getArgOperand(0); 1347 Value *Arg1 = CI->getArgOperand(1); 1348 1349 // Convert the type of the pointer to a pointer to the stored type. 1350 Value *BC = Builder.CreateBitCast(Arg0, 1351 PointerType::getUnqual(Arg1->getType()), 1352 "cast"); 1353 VectorType *VTy = cast<VectorType>(Arg1->getType()); 1354 StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC, 1355 VTy->getBitWidth() / 8); 1356 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1357 1358 // Remove intrinsic. 1359 CI->eraseFromParent(); 1360 return; 1361 } 1362 1363 if (IsX86 && Name == "sse2.storel.dq") { 1364 Value *Arg0 = CI->getArgOperand(0); 1365 Value *Arg1 = CI->getArgOperand(1); 1366 1367 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 1368 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1369 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1370 Value *BC = Builder.CreateBitCast(Arg0, 1371 PointerType::getUnqual(Elt->getType()), 1372 "cast"); 1373 Builder.CreateAlignedStore(Elt, BC, 1); 1374 1375 // Remove intrinsic. 1376 CI->eraseFromParent(); 1377 return; 1378 } 1379 1380 if (IsX86 && (Name.startswith("sse.storeu.") || 1381 Name.startswith("sse2.storeu.") || 1382 Name.startswith("avx.storeu."))) { 1383 Value *Arg0 = CI->getArgOperand(0); 1384 Value *Arg1 = CI->getArgOperand(1); 1385 1386 Arg0 = Builder.CreateBitCast(Arg0, 1387 PointerType::getUnqual(Arg1->getType()), 1388 "cast"); 1389 Builder.CreateAlignedStore(Arg1, Arg0, 1); 1390 1391 // Remove intrinsic. 1392 CI->eraseFromParent(); 1393 return; 1394 } 1395 1396 if (IsX86 && Name == "avx512.mask.store.ss") { 1397 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1398 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1399 Mask, false); 1400 1401 // Remove intrinsic. 1402 CI->eraseFromParent(); 1403 return; 1404 } 1405 1406 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1407 // "avx512.mask.storeu." or "avx512.mask.store." 1408 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1409 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1410 CI->getArgOperand(2), Aligned); 1411 1412 // Remove intrinsic. 1413 CI->eraseFromParent(); 1414 return; 1415 } 1416 1417 Value *Rep; 1418 // Upgrade packed integer vector compare intrinsics to compare instructions. 1419 if (IsX86 && (Name.startswith("sse2.pcmp") || 1420 Name.startswith("avx2.pcmp"))) { 1421 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1422 bool CmpEq = Name[9] == 'e'; 1423 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1424 CI->getArgOperand(0), CI->getArgOperand(1)); 1425 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1426 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1427 Type *ExtTy = Type::getInt32Ty(C); 1428 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1429 ExtTy = Type::getInt64Ty(C); 1430 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1431 ExtTy->getPrimitiveSizeInBits(); 1432 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1433 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1434 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1435 Name.startswith("avx512.ptestnm"))) { 1436 Value *Op0 = CI->getArgOperand(0); 1437 Value *Op1 = CI->getArgOperand(1); 1438 Value *Mask = CI->getArgOperand(2); 1439 Rep = Builder.CreateAnd(Op0, Op1); 1440 llvm::Type *Ty = Op0->getType(); 1441 Value *Zero = llvm::Constant::getNullValue(Ty); 1442 ICmpInst::Predicate Pred = 1443 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1444 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1445 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1446 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask, NumElts); 1447 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1448 unsigned NumElts = 1449 CI->getArgOperand(1)->getType()->getVectorNumElements(); 1450 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1451 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1452 CI->getArgOperand(1)); 1453 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1454 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1455 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1456 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1457 uint32_t Indices[64]; 1458 for (unsigned i = 0; i != NumElts; ++i) 1459 Indices[i] = i; 1460 1461 // First extract half of each vector. This gives better codegen than 1462 // doing it in a single shuffle. 1463 LHS = Builder.CreateShuffleVector(LHS, LHS, 1464 makeArrayRef(Indices, NumElts / 2)); 1465 RHS = Builder.CreateShuffleVector(RHS, RHS, 1466 makeArrayRef(Indices, NumElts / 2)); 1467 // Concat the vectors. 1468 // NOTE: Operands have to be swapped to match intrinsic definition. 1469 Rep = Builder.CreateShuffleVector(RHS, LHS, 1470 makeArrayRef(Indices, NumElts)); 1471 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1472 } else if (IsX86 && Name == "avx512.kand.w") { 1473 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1474 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1475 Rep = Builder.CreateAnd(LHS, RHS); 1476 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1477 } else if (IsX86 && Name == "avx512.kandn.w") { 1478 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1479 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1480 LHS = Builder.CreateNot(LHS); 1481 Rep = Builder.CreateAnd(LHS, RHS); 1482 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1483 } else if (IsX86 && Name == "avx512.kor.w") { 1484 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1485 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1486 Rep = Builder.CreateOr(LHS, RHS); 1487 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1488 } else if (IsX86 && Name == "avx512.kxor.w") { 1489 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1490 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1491 Rep = Builder.CreateXor(LHS, RHS); 1492 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1493 } else if (IsX86 && Name == "avx512.kxnor.w") { 1494 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1495 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1496 LHS = Builder.CreateNot(LHS); 1497 Rep = Builder.CreateXor(LHS, RHS); 1498 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1499 } else if (IsX86 && Name == "avx512.knot.w") { 1500 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1501 Rep = Builder.CreateNot(Rep); 1502 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1503 } else if (IsX86 && 1504 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1505 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1506 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1507 Rep = Builder.CreateOr(LHS, RHS); 1508 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1509 Value *C; 1510 if (Name[14] == 'c') 1511 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1512 else 1513 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1514 Rep = Builder.CreateICmpEQ(Rep, C); 1515 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1516 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd")) { 1517 Type *I32Ty = Type::getInt32Ty(C); 1518 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1519 ConstantInt::get(I32Ty, 0)); 1520 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1521 ConstantInt::get(I32Ty, 0)); 1522 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1523 Builder.CreateFAdd(Elt0, Elt1), 1524 ConstantInt::get(I32Ty, 0)); 1525 } else if (IsX86 && (Name == "sse.sub.ss" || Name == "sse2.sub.sd")) { 1526 Type *I32Ty = Type::getInt32Ty(C); 1527 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1528 ConstantInt::get(I32Ty, 0)); 1529 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1530 ConstantInt::get(I32Ty, 0)); 1531 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1532 Builder.CreateFSub(Elt0, Elt1), 1533 ConstantInt::get(I32Ty, 0)); 1534 } else if (IsX86 && (Name == "sse.mul.ss" || Name == "sse2.mul.sd")) { 1535 Type *I32Ty = Type::getInt32Ty(C); 1536 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1537 ConstantInt::get(I32Ty, 0)); 1538 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1539 ConstantInt::get(I32Ty, 0)); 1540 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1541 Builder.CreateFMul(Elt0, Elt1), 1542 ConstantInt::get(I32Ty, 0)); 1543 } else if (IsX86 && (Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1544 Type *I32Ty = Type::getInt32Ty(C); 1545 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1546 ConstantInt::get(I32Ty, 0)); 1547 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1548 ConstantInt::get(I32Ty, 0)); 1549 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), 1550 Builder.CreateFDiv(Elt0, Elt1), 1551 ConstantInt::get(I32Ty, 0)); 1552 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1553 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1554 bool CmpEq = Name[16] == 'e'; 1555 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1556 } else if (IsX86 && Name.startswith("avx512.mask.cmp")) { 1557 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1558 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 1559 } else if (IsX86 && Name.startswith("avx512.mask.ucmp")) { 1560 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1561 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 1562 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 1563 Name.startswith("avx512.cvtw2mask.") || 1564 Name.startswith("avx512.cvtd2mask.") || 1565 Name.startswith("avx512.cvtq2mask."))) { 1566 Value *Op = CI->getArgOperand(0); 1567 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 1568 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 1569 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr, 1570 Op->getType()->getVectorNumElements()); 1571 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 1572 Name == "ssse3.pabs.w.128" || 1573 Name == "ssse3.pabs.d.128" || 1574 Name.startswith("avx2.pabs") || 1575 Name.startswith("avx512.mask.pabs"))) { 1576 Rep = upgradeAbs(Builder, *CI); 1577 } else if (IsX86 && (Name == "sse41.pmaxsb" || 1578 Name == "sse2.pmaxs.w" || 1579 Name == "sse41.pmaxsd" || 1580 Name.startswith("avx2.pmaxs") || 1581 Name.startswith("avx512.mask.pmaxs"))) { 1582 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 1583 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 1584 Name == "sse41.pmaxuw" || 1585 Name == "sse41.pmaxud" || 1586 Name.startswith("avx2.pmaxu") || 1587 Name.startswith("avx512.mask.pmaxu"))) { 1588 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 1589 } else if (IsX86 && (Name == "sse41.pminsb" || 1590 Name == "sse2.pmins.w" || 1591 Name == "sse41.pminsd" || 1592 Name.startswith("avx2.pmins") || 1593 Name.startswith("avx512.mask.pmins"))) { 1594 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 1595 } else if (IsX86 && (Name == "sse2.pminu.b" || 1596 Name == "sse41.pminuw" || 1597 Name == "sse41.pminud" || 1598 Name.startswith("avx2.pminu") || 1599 Name.startswith("avx512.mask.pminu"))) { 1600 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 1601 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 1602 Name == "avx2.pmulu.dq" || 1603 Name == "avx512.pmulu.dq.512" || 1604 Name.startswith("avx512.mask.pmulu.dq."))) { 1605 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 1606 } else if (IsX86 && (Name == "sse41.pmuldq" || 1607 Name == "avx2.pmul.dq" || 1608 Name == "avx512.pmul.dq.512" || 1609 Name.startswith("avx512.mask.pmul.dq."))) { 1610 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 1611 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 1612 Name == "sse2.cvtsi2sd" || 1613 Name == "sse.cvtsi642ss" || 1614 Name == "sse2.cvtsi642sd")) { 1615 Rep = Builder.CreateSIToFP(CI->getArgOperand(1), 1616 CI->getType()->getVectorElementType()); 1617 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1618 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 1619 Rep = Builder.CreateUIToFP(CI->getArgOperand(1), 1620 CI->getType()->getVectorElementType()); 1621 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1622 } else if (IsX86 && Name == "sse2.cvtss2sd") { 1623 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 1624 Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType()); 1625 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1626 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 1627 Name == "sse2.cvtdq2ps" || 1628 Name == "avx.cvtdq2.pd.256" || 1629 Name == "avx.cvtdq2.ps.256" || 1630 Name.startswith("avx512.mask.cvtdq2pd.") || 1631 Name.startswith("avx512.mask.cvtudq2pd.") || 1632 Name == "avx512.mask.cvtdq2ps.128" || 1633 Name == "avx512.mask.cvtdq2ps.256" || 1634 Name == "avx512.mask.cvtudq2ps.128" || 1635 Name == "avx512.mask.cvtudq2ps.256" || 1636 Name == "avx512.mask.cvtqq2pd.128" || 1637 Name == "avx512.mask.cvtqq2pd.256" || 1638 Name == "avx512.mask.cvtuqq2pd.128" || 1639 Name == "avx512.mask.cvtuqq2pd.256" || 1640 Name == "sse2.cvtps2pd" || 1641 Name == "avx.cvt.ps2.pd.256" || 1642 Name == "avx512.mask.cvtps2pd.128" || 1643 Name == "avx512.mask.cvtps2pd.256")) { 1644 Type *DstTy = CI->getType(); 1645 Rep = CI->getArgOperand(0); 1646 1647 unsigned NumDstElts = DstTy->getVectorNumElements(); 1648 if (NumDstElts < Rep->getType()->getVectorNumElements()) { 1649 assert(NumDstElts == 2 && "Unexpected vector size"); 1650 uint32_t ShuffleMask[2] = { 0, 1 }; 1651 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 1652 } 1653 1654 bool IsPS2PD = (StringRef::npos != Name.find("ps2")); 1655 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 1656 if (IsPS2PD) 1657 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 1658 else if (IsUnsigned) 1659 Rep = Builder.CreateUIToFP(Rep, DstTy, "cvt"); 1660 else 1661 Rep = Builder.CreateSIToFP(Rep, DstTy, "cvt"); 1662 1663 if (CI->getNumArgOperands() == 3) 1664 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1665 CI->getArgOperand(1)); 1666 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 1667 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 1668 CI->getArgOperand(1), CI->getArgOperand(2), 1669 /*Aligned*/false); 1670 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 1671 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 1672 CI->getArgOperand(1),CI->getArgOperand(2), 1673 /*Aligned*/true); 1674 } else if (IsX86 && Name.startswith("xop.vpcom")) { 1675 Intrinsic::ID intID; 1676 if (Name.endswith("ub")) 1677 intID = Intrinsic::x86_xop_vpcomub; 1678 else if (Name.endswith("uw")) 1679 intID = Intrinsic::x86_xop_vpcomuw; 1680 else if (Name.endswith("ud")) 1681 intID = Intrinsic::x86_xop_vpcomud; 1682 else if (Name.endswith("uq")) 1683 intID = Intrinsic::x86_xop_vpcomuq; 1684 else if (Name.endswith("b")) 1685 intID = Intrinsic::x86_xop_vpcomb; 1686 else if (Name.endswith("w")) 1687 intID = Intrinsic::x86_xop_vpcomw; 1688 else if (Name.endswith("d")) 1689 intID = Intrinsic::x86_xop_vpcomd; 1690 else if (Name.endswith("q")) 1691 intID = Intrinsic::x86_xop_vpcomq; 1692 else 1693 llvm_unreachable("Unknown suffix"); 1694 1695 Name = Name.substr(9); // strip off "xop.vpcom" 1696 unsigned Imm; 1697 if (Name.startswith("lt")) 1698 Imm = 0; 1699 else if (Name.startswith("le")) 1700 Imm = 1; 1701 else if (Name.startswith("gt")) 1702 Imm = 2; 1703 else if (Name.startswith("ge")) 1704 Imm = 3; 1705 else if (Name.startswith("eq")) 1706 Imm = 4; 1707 else if (Name.startswith("ne")) 1708 Imm = 5; 1709 else if (Name.startswith("false")) 1710 Imm = 6; 1711 else if (Name.startswith("true")) 1712 Imm = 7; 1713 else 1714 llvm_unreachable("Unknown condition"); 1715 1716 Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID); 1717 Rep = 1718 Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1), 1719 Builder.getInt8(Imm)}); 1720 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 1721 Value *Sel = CI->getArgOperand(2); 1722 Value *NotSel = Builder.CreateNot(Sel); 1723 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 1724 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 1725 Rep = Builder.CreateOr(Sel0, Sel1); 1726 } else if (IsX86 && Name == "sse42.crc32.64.8") { 1727 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 1728 Intrinsic::x86_sse42_crc32_32_8); 1729 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 1730 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 1731 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 1732 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 1733 Name.startswith("avx512.vbroadcast.s"))) { 1734 // Replace broadcasts with a series of insertelements. 1735 Type *VecTy = CI->getType(); 1736 Type *EltTy = VecTy->getVectorElementType(); 1737 unsigned EltNum = VecTy->getVectorNumElements(); 1738 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 1739 EltTy->getPointerTo()); 1740 Value *Load = Builder.CreateLoad(EltTy, Cast); 1741 Type *I32Ty = Type::getInt32Ty(C); 1742 Rep = UndefValue::get(VecTy); 1743 for (unsigned I = 0; I < EltNum; ++I) 1744 Rep = Builder.CreateInsertElement(Rep, Load, 1745 ConstantInt::get(I32Ty, I)); 1746 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 1747 Name.startswith("sse41.pmovzx") || 1748 Name.startswith("avx2.pmovsx") || 1749 Name.startswith("avx2.pmovzx") || 1750 Name.startswith("avx512.mask.pmovsx") || 1751 Name.startswith("avx512.mask.pmovzx"))) { 1752 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 1753 VectorType *DstTy = cast<VectorType>(CI->getType()); 1754 unsigned NumDstElts = DstTy->getNumElements(); 1755 1756 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 1757 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 1758 for (unsigned i = 0; i != NumDstElts; ++i) 1759 ShuffleMask[i] = i; 1760 1761 Value *SV = Builder.CreateShuffleVector( 1762 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 1763 1764 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 1765 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 1766 : Builder.CreateZExt(SV, DstTy); 1767 // If there are 3 arguments, it's a masked intrinsic so we need a select. 1768 if (CI->getNumArgOperands() == 3) 1769 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1770 CI->getArgOperand(1)); 1771 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 1772 Name == "avx2.vbroadcasti128")) { 1773 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 1774 Type *EltTy = CI->getType()->getVectorElementType(); 1775 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 1776 Type *VT = VectorType::get(EltTy, NumSrcElts); 1777 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 1778 PointerType::getUnqual(VT)); 1779 Value *Load = Builder.CreateAlignedLoad(Op, 1); 1780 if (NumSrcElts == 2) 1781 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 1782 { 0, 1, 0, 1 }); 1783 else 1784 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 1785 { 0, 1, 2, 3, 0, 1, 2, 3 }); 1786 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 1787 Name.startswith("avx512.mask.shuf.f"))) { 1788 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1789 Type *VT = CI->getType(); 1790 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 1791 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 1792 unsigned ControlBitsMask = NumLanes - 1; 1793 unsigned NumControlBits = NumLanes / 2; 1794 SmallVector<uint32_t, 8> ShuffleMask(0); 1795 1796 for (unsigned l = 0; l != NumLanes; ++l) { 1797 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 1798 // We actually need the other source. 1799 if (l >= NumLanes / 2) 1800 LaneMask += NumLanes; 1801 for (unsigned i = 0; i != NumElementsInLane; ++i) 1802 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 1803 } 1804 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 1805 CI->getArgOperand(1), ShuffleMask); 1806 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 1807 CI->getArgOperand(3)); 1808 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 1809 Name.startswith("avx512.mask.broadcasti"))) { 1810 unsigned NumSrcElts = 1811 CI->getArgOperand(0)->getType()->getVectorNumElements(); 1812 unsigned NumDstElts = CI->getType()->getVectorNumElements(); 1813 1814 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 1815 for (unsigned i = 0; i != NumDstElts; ++i) 1816 ShuffleMask[i] = i % NumSrcElts; 1817 1818 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 1819 CI->getArgOperand(0), 1820 ShuffleMask); 1821 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1822 CI->getArgOperand(1)); 1823 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 1824 Name.startswith("avx2.vbroadcast") || 1825 Name.startswith("avx512.pbroadcast") || 1826 Name.startswith("avx512.mask.broadcast.s"))) { 1827 // Replace vp?broadcasts with a vector shuffle. 1828 Value *Op = CI->getArgOperand(0); 1829 unsigned NumElts = CI->getType()->getVectorNumElements(); 1830 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); 1831 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 1832 Constant::getNullValue(MaskTy)); 1833 1834 if (CI->getNumArgOperands() == 3) 1835 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1836 CI->getArgOperand(1)); 1837 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 1838 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 1839 CI->getArgOperand(1), 1840 CI->getArgOperand(2), 1841 CI->getArgOperand(3), 1842 CI->getArgOperand(4), 1843 false); 1844 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 1845 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 1846 CI->getArgOperand(1), 1847 CI->getArgOperand(2), 1848 CI->getArgOperand(3), 1849 CI->getArgOperand(4), 1850 true); 1851 } else if (IsX86 && (Name == "sse2.psll.dq" || 1852 Name == "avx2.psll.dq")) { 1853 // 128/256-bit shift left specified in bits. 1854 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1855 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 1856 Shift / 8); // Shift is in bits. 1857 } else if (IsX86 && (Name == "sse2.psrl.dq" || 1858 Name == "avx2.psrl.dq")) { 1859 // 128/256-bit shift right specified in bits. 1860 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1861 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 1862 Shift / 8); // Shift is in bits. 1863 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 1864 Name == "avx2.psll.dq.bs" || 1865 Name == "avx512.psll.dq.512")) { 1866 // 128/256/512-bit shift left specified in bytes. 1867 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1868 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 1869 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 1870 Name == "avx2.psrl.dq.bs" || 1871 Name == "avx512.psrl.dq.512")) { 1872 // 128/256/512-bit shift right specified in bytes. 1873 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1874 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 1875 } else if (IsX86 && (Name == "sse41.pblendw" || 1876 Name.startswith("sse41.blendp") || 1877 Name.startswith("avx.blend.p") || 1878 Name == "avx2.pblendw" || 1879 Name.startswith("avx2.pblendd."))) { 1880 Value *Op0 = CI->getArgOperand(0); 1881 Value *Op1 = CI->getArgOperand(1); 1882 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1883 VectorType *VecTy = cast<VectorType>(CI->getType()); 1884 unsigned NumElts = VecTy->getNumElements(); 1885 1886 SmallVector<uint32_t, 16> Idxs(NumElts); 1887 for (unsigned i = 0; i != NumElts; ++i) 1888 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 1889 1890 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 1891 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 1892 Name == "avx2.vinserti128" || 1893 Name.startswith("avx512.mask.insert"))) { 1894 Value *Op0 = CI->getArgOperand(0); 1895 Value *Op1 = CI->getArgOperand(1); 1896 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1897 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 1898 unsigned SrcNumElts = Op1->getType()->getVectorNumElements(); 1899 unsigned Scale = DstNumElts / SrcNumElts; 1900 1901 // Mask off the high bits of the immediate value; hardware ignores those. 1902 Imm = Imm % Scale; 1903 1904 // Extend the second operand into a vector the size of the destination. 1905 Value *UndefV = UndefValue::get(Op1->getType()); 1906 SmallVector<uint32_t, 8> Idxs(DstNumElts); 1907 for (unsigned i = 0; i != SrcNumElts; ++i) 1908 Idxs[i] = i; 1909 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 1910 Idxs[i] = SrcNumElts; 1911 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 1912 1913 // Insert the second operand into the first operand. 1914 1915 // Note that there is no guarantee that instruction lowering will actually 1916 // produce a vinsertf128 instruction for the created shuffles. In 1917 // particular, the 0 immediate case involves no lane changes, so it can 1918 // be handled as a blend. 1919 1920 // Example of shuffle mask for 32-bit elements: 1921 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 1922 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 1923 1924 // First fill with identify mask. 1925 for (unsigned i = 0; i != DstNumElts; ++i) 1926 Idxs[i] = i; 1927 // Then replace the elements where we need to insert. 1928 for (unsigned i = 0; i != SrcNumElts; ++i) 1929 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 1930 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 1931 1932 // If the intrinsic has a mask operand, handle that. 1933 if (CI->getNumArgOperands() == 5) 1934 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 1935 CI->getArgOperand(3)); 1936 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 1937 Name == "avx2.vextracti128" || 1938 Name.startswith("avx512.mask.vextract"))) { 1939 Value *Op0 = CI->getArgOperand(0); 1940 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1941 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 1942 unsigned SrcNumElts = Op0->getType()->getVectorNumElements(); 1943 unsigned Scale = SrcNumElts / DstNumElts; 1944 1945 // Mask off the high bits of the immediate value; hardware ignores those. 1946 Imm = Imm % Scale; 1947 1948 // Get indexes for the subvector of the input vector. 1949 SmallVector<uint32_t, 8> Idxs(DstNumElts); 1950 for (unsigned i = 0; i != DstNumElts; ++i) { 1951 Idxs[i] = i + (Imm * DstNumElts); 1952 } 1953 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 1954 1955 // If the intrinsic has a mask operand, handle that. 1956 if (CI->getNumArgOperands() == 4) 1957 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 1958 CI->getArgOperand(2)); 1959 } else if (!IsX86 && Name == "stackprotectorcheck") { 1960 Rep = nullptr; 1961 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 1962 Name.startswith("avx512.mask.perm.di."))) { 1963 Value *Op0 = CI->getArgOperand(0); 1964 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 1965 VectorType *VecTy = cast<VectorType>(CI->getType()); 1966 unsigned NumElts = VecTy->getNumElements(); 1967 1968 SmallVector<uint32_t, 8> Idxs(NumElts); 1969 for (unsigned i = 0; i != NumElts; ++i) 1970 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 1971 1972 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 1973 1974 if (CI->getNumArgOperands() == 4) 1975 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 1976 CI->getArgOperand(2)); 1977 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 1978 Name == "avx2.vperm2i128")) { 1979 // The immediate permute control byte looks like this: 1980 // [1:0] - select 128 bits from sources for low half of destination 1981 // [2] - ignore 1982 // [3] - zero low half of destination 1983 // [5:4] - select 128 bits from sources for high half of destination 1984 // [6] - ignore 1985 // [7] - zero high half of destination 1986 1987 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1988 1989 unsigned NumElts = CI->getType()->getVectorNumElements(); 1990 unsigned HalfSize = NumElts / 2; 1991 SmallVector<uint32_t, 8> ShuffleMask(NumElts); 1992 1993 // Determine which operand(s) are actually in use for this instruction. 1994 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 1995 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 1996 1997 // If needed, replace operands based on zero mask. 1998 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 1999 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2000 2001 // Permute low half of result. 2002 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2003 for (unsigned i = 0; i < HalfSize; ++i) 2004 ShuffleMask[i] = StartIndex + i; 2005 2006 // Permute high half of result. 2007 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2008 for (unsigned i = 0; i < HalfSize; ++i) 2009 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2010 2011 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2012 2013 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2014 Name == "sse2.pshuf.d" || 2015 Name.startswith("avx512.mask.vpermil.p") || 2016 Name.startswith("avx512.mask.pshuf.d."))) { 2017 Value *Op0 = CI->getArgOperand(0); 2018 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2019 VectorType *VecTy = cast<VectorType>(CI->getType()); 2020 unsigned NumElts = VecTy->getNumElements(); 2021 // Calculate the size of each index in the immediate. 2022 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2023 unsigned IdxMask = ((1 << IdxSize) - 1); 2024 2025 SmallVector<uint32_t, 8> Idxs(NumElts); 2026 // Lookup the bits for this element, wrapping around the immediate every 2027 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2028 // to offset by the first index of each group. 2029 for (unsigned i = 0; i != NumElts; ++i) 2030 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2031 2032 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2033 2034 if (CI->getNumArgOperands() == 4) 2035 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2036 CI->getArgOperand(2)); 2037 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2038 Name.startswith("avx512.mask.pshufl.w."))) { 2039 Value *Op0 = CI->getArgOperand(0); 2040 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2041 unsigned NumElts = CI->getType()->getVectorNumElements(); 2042 2043 SmallVector<uint32_t, 16> Idxs(NumElts); 2044 for (unsigned l = 0; l != NumElts; l += 8) { 2045 for (unsigned i = 0; i != 4; ++i) 2046 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2047 for (unsigned i = 4; i != 8; ++i) 2048 Idxs[i + l] = i + l; 2049 } 2050 2051 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2052 2053 if (CI->getNumArgOperands() == 4) 2054 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2055 CI->getArgOperand(2)); 2056 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2057 Name.startswith("avx512.mask.pshufh.w."))) { 2058 Value *Op0 = CI->getArgOperand(0); 2059 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2060 unsigned NumElts = CI->getType()->getVectorNumElements(); 2061 2062 SmallVector<uint32_t, 16> Idxs(NumElts); 2063 for (unsigned l = 0; l != NumElts; l += 8) { 2064 for (unsigned i = 0; i != 4; ++i) 2065 Idxs[i + l] = i + l; 2066 for (unsigned i = 0; i != 4; ++i) 2067 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2068 } 2069 2070 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2071 2072 if (CI->getNumArgOperands() == 4) 2073 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2074 CI->getArgOperand(2)); 2075 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2076 Value *Op0 = CI->getArgOperand(0); 2077 Value *Op1 = CI->getArgOperand(1); 2078 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2079 unsigned NumElts = CI->getType()->getVectorNumElements(); 2080 2081 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2082 unsigned HalfLaneElts = NumLaneElts / 2; 2083 2084 SmallVector<uint32_t, 16> Idxs(NumElts); 2085 for (unsigned i = 0; i != NumElts; ++i) { 2086 // Base index is the starting element of the lane. 2087 Idxs[i] = i - (i % NumLaneElts); 2088 // If we are half way through the lane switch to the other source. 2089 if ((i % NumLaneElts) >= HalfLaneElts) 2090 Idxs[i] += NumElts; 2091 // Now select the specific element. By adding HalfLaneElts bits from 2092 // the immediate. Wrapping around the immediate every 8-bits. 2093 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2094 } 2095 2096 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2097 2098 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2099 CI->getArgOperand(3)); 2100 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2101 Name.startswith("avx512.mask.movshdup") || 2102 Name.startswith("avx512.mask.movsldup"))) { 2103 Value *Op0 = CI->getArgOperand(0); 2104 unsigned NumElts = CI->getType()->getVectorNumElements(); 2105 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2106 2107 unsigned Offset = 0; 2108 if (Name.startswith("avx512.mask.movshdup.")) 2109 Offset = 1; 2110 2111 SmallVector<uint32_t, 16> Idxs(NumElts); 2112 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2113 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2114 Idxs[i + l + 0] = i + l + Offset; 2115 Idxs[i + l + 1] = i + l + Offset; 2116 } 2117 2118 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2119 2120 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2121 CI->getArgOperand(1)); 2122 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2123 Name.startswith("avx512.mask.unpckl."))) { 2124 Value *Op0 = CI->getArgOperand(0); 2125 Value *Op1 = CI->getArgOperand(1); 2126 int NumElts = CI->getType()->getVectorNumElements(); 2127 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2128 2129 SmallVector<uint32_t, 64> Idxs(NumElts); 2130 for (int l = 0; l != NumElts; l += NumLaneElts) 2131 for (int i = 0; i != NumLaneElts; ++i) 2132 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2133 2134 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2135 2136 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2137 CI->getArgOperand(2)); 2138 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2139 Name.startswith("avx512.mask.unpckh."))) { 2140 Value *Op0 = CI->getArgOperand(0); 2141 Value *Op1 = CI->getArgOperand(1); 2142 int NumElts = CI->getType()->getVectorNumElements(); 2143 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2144 2145 SmallVector<uint32_t, 64> Idxs(NumElts); 2146 for (int l = 0; l != NumElts; l += NumLaneElts) 2147 for (int i = 0; i != NumLaneElts; ++i) 2148 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2149 2150 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2151 2152 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2153 CI->getArgOperand(2)); 2154 } else if (IsX86 && Name.startswith("avx512.mask.pand.")) { 2155 Rep = Builder.CreateAnd(CI->getArgOperand(0), CI->getArgOperand(1)); 2156 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2157 CI->getArgOperand(2)); 2158 } else if (IsX86 && Name.startswith("avx512.mask.pandn.")) { 2159 Rep = Builder.CreateAnd(Builder.CreateNot(CI->getArgOperand(0)), 2160 CI->getArgOperand(1)); 2161 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2162 CI->getArgOperand(2)); 2163 } else if (IsX86 && Name.startswith("avx512.mask.por.")) { 2164 Rep = Builder.CreateOr(CI->getArgOperand(0), CI->getArgOperand(1)); 2165 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2166 CI->getArgOperand(2)); 2167 } else if (IsX86 && Name.startswith("avx512.mask.pxor.")) { 2168 Rep = Builder.CreateXor(CI->getArgOperand(0), CI->getArgOperand(1)); 2169 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2170 CI->getArgOperand(2)); 2171 } else if (IsX86 && Name.startswith("avx512.mask.and.")) { 2172 VectorType *FTy = cast<VectorType>(CI->getType()); 2173 VectorType *ITy = VectorType::getInteger(FTy); 2174 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2175 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2176 Rep = Builder.CreateBitCast(Rep, FTy); 2177 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2178 CI->getArgOperand(2)); 2179 } else if (IsX86 && Name.startswith("avx512.mask.andn.")) { 2180 VectorType *FTy = cast<VectorType>(CI->getType()); 2181 VectorType *ITy = VectorType::getInteger(FTy); 2182 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2183 Rep = Builder.CreateAnd(Rep, 2184 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2185 Rep = Builder.CreateBitCast(Rep, FTy); 2186 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2187 CI->getArgOperand(2)); 2188 } else if (IsX86 && Name.startswith("avx512.mask.or.")) { 2189 VectorType *FTy = cast<VectorType>(CI->getType()); 2190 VectorType *ITy = VectorType::getInteger(FTy); 2191 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2192 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2193 Rep = Builder.CreateBitCast(Rep, FTy); 2194 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2195 CI->getArgOperand(2)); 2196 } else if (IsX86 && Name.startswith("avx512.mask.xor.")) { 2197 VectorType *FTy = cast<VectorType>(CI->getType()); 2198 VectorType *ITy = VectorType::getInteger(FTy); 2199 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2200 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2201 Rep = Builder.CreateBitCast(Rep, FTy); 2202 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2203 CI->getArgOperand(2)); 2204 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2205 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2206 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2207 CI->getArgOperand(2)); 2208 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2209 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2210 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2211 CI->getArgOperand(2)); 2212 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2213 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2214 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2215 CI->getArgOperand(2)); 2216 } else if (IsX86 && (Name.startswith("avx512.mask.add.p"))) { 2217 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2218 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2219 CI->getArgOperand(2)); 2220 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2221 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2222 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2223 CI->getArgOperand(2)); 2224 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2225 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2226 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2227 CI->getArgOperand(2)); 2228 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2229 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2230 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2231 CI->getArgOperand(2)); 2232 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2233 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2234 Intrinsic::ctlz, 2235 CI->getType()), 2236 { CI->getArgOperand(0), Builder.getInt1(false) }); 2237 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2238 CI->getArgOperand(1)); 2239 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2240 bool IsImmediate = Name[16] == 'i' || 2241 (Name.size() > 18 && Name[18] == 'i'); 2242 bool IsVariable = Name[16] == 'v'; 2243 char Size = Name[16] == '.' ? Name[17] : 2244 Name[17] == '.' ? Name[18] : 2245 Name[18] == '.' ? Name[19] : 2246 Name[20]; 2247 2248 Intrinsic::ID IID; 2249 if (IsVariable && Name[17] != '.') { 2250 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2251 IID = Intrinsic::x86_avx2_psllv_q; 2252 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2253 IID = Intrinsic::x86_avx2_psllv_q_256; 2254 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2255 IID = Intrinsic::x86_avx2_psllv_d; 2256 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2257 IID = Intrinsic::x86_avx2_psllv_d_256; 2258 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2259 IID = Intrinsic::x86_avx512_psllv_w_128; 2260 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2261 IID = Intrinsic::x86_avx512_psllv_w_256; 2262 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2263 IID = Intrinsic::x86_avx512_psllv_w_512; 2264 else 2265 llvm_unreachable("Unexpected size"); 2266 } else if (Name.endswith(".128")) { 2267 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2268 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2269 : Intrinsic::x86_sse2_psll_d; 2270 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2271 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2272 : Intrinsic::x86_sse2_psll_q; 2273 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2274 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2275 : Intrinsic::x86_sse2_psll_w; 2276 else 2277 llvm_unreachable("Unexpected size"); 2278 } else if (Name.endswith(".256")) { 2279 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2280 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2281 : Intrinsic::x86_avx2_psll_d; 2282 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2283 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2284 : Intrinsic::x86_avx2_psll_q; 2285 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2286 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2287 : Intrinsic::x86_avx2_psll_w; 2288 else 2289 llvm_unreachable("Unexpected size"); 2290 } else { 2291 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2292 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2293 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2294 Intrinsic::x86_avx512_psll_d_512; 2295 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2296 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2297 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2298 Intrinsic::x86_avx512_psll_q_512; 2299 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2300 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2301 : Intrinsic::x86_avx512_psll_w_512; 2302 else 2303 llvm_unreachable("Unexpected size"); 2304 } 2305 2306 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2307 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2308 bool IsImmediate = Name[16] == 'i' || 2309 (Name.size() > 18 && Name[18] == 'i'); 2310 bool IsVariable = Name[16] == 'v'; 2311 char Size = Name[16] == '.' ? Name[17] : 2312 Name[17] == '.' ? Name[18] : 2313 Name[18] == '.' ? Name[19] : 2314 Name[20]; 2315 2316 Intrinsic::ID IID; 2317 if (IsVariable && Name[17] != '.') { 2318 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2319 IID = Intrinsic::x86_avx2_psrlv_q; 2320 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2321 IID = Intrinsic::x86_avx2_psrlv_q_256; 2322 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2323 IID = Intrinsic::x86_avx2_psrlv_d; 2324 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2325 IID = Intrinsic::x86_avx2_psrlv_d_256; 2326 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2327 IID = Intrinsic::x86_avx512_psrlv_w_128; 2328 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2329 IID = Intrinsic::x86_avx512_psrlv_w_256; 2330 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2331 IID = Intrinsic::x86_avx512_psrlv_w_512; 2332 else 2333 llvm_unreachable("Unexpected size"); 2334 } else if (Name.endswith(".128")) { 2335 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2336 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2337 : Intrinsic::x86_sse2_psrl_d; 2338 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2339 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2340 : Intrinsic::x86_sse2_psrl_q; 2341 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2342 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2343 : Intrinsic::x86_sse2_psrl_w; 2344 else 2345 llvm_unreachable("Unexpected size"); 2346 } else if (Name.endswith(".256")) { 2347 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2348 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2349 : Intrinsic::x86_avx2_psrl_d; 2350 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2351 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2352 : Intrinsic::x86_avx2_psrl_q; 2353 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2354 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2355 : Intrinsic::x86_avx2_psrl_w; 2356 else 2357 llvm_unreachable("Unexpected size"); 2358 } else { 2359 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2360 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2361 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2362 Intrinsic::x86_avx512_psrl_d_512; 2363 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2364 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2365 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2366 Intrinsic::x86_avx512_psrl_q_512; 2367 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 2368 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 2369 : Intrinsic::x86_avx512_psrl_w_512; 2370 else 2371 llvm_unreachable("Unexpected size"); 2372 } 2373 2374 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2375 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 2376 bool IsImmediate = Name[16] == 'i' || 2377 (Name.size() > 18 && Name[18] == 'i'); 2378 bool IsVariable = Name[16] == 'v'; 2379 char Size = Name[16] == '.' ? Name[17] : 2380 Name[17] == '.' ? Name[18] : 2381 Name[18] == '.' ? Name[19] : 2382 Name[20]; 2383 2384 Intrinsic::ID IID; 2385 if (IsVariable && Name[17] != '.') { 2386 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 2387 IID = Intrinsic::x86_avx2_psrav_d; 2388 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 2389 IID = Intrinsic::x86_avx2_psrav_d_256; 2390 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 2391 IID = Intrinsic::x86_avx512_psrav_w_128; 2392 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 2393 IID = Intrinsic::x86_avx512_psrav_w_256; 2394 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 2395 IID = Intrinsic::x86_avx512_psrav_w_512; 2396 else 2397 llvm_unreachable("Unexpected size"); 2398 } else if (Name.endswith(".128")) { 2399 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 2400 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 2401 : Intrinsic::x86_sse2_psra_d; 2402 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 2403 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 2404 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 2405 Intrinsic::x86_avx512_psra_q_128; 2406 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 2407 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 2408 : Intrinsic::x86_sse2_psra_w; 2409 else 2410 llvm_unreachable("Unexpected size"); 2411 } else if (Name.endswith(".256")) { 2412 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 2413 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 2414 : Intrinsic::x86_avx2_psra_d; 2415 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 2416 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 2417 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 2418 Intrinsic::x86_avx512_psra_q_256; 2419 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 2420 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 2421 : Intrinsic::x86_avx2_psra_w; 2422 else 2423 llvm_unreachable("Unexpected size"); 2424 } else { 2425 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 2426 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 2427 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 2428 Intrinsic::x86_avx512_psra_d_512; 2429 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 2430 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 2431 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 2432 Intrinsic::x86_avx512_psra_q_512; 2433 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 2434 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 2435 : Intrinsic::x86_avx512_psra_w_512; 2436 else 2437 llvm_unreachable("Unexpected size"); 2438 } 2439 2440 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2441 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 2442 Rep = upgradeMaskedMove(Builder, *CI); 2443 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 2444 Rep = UpgradeMaskToInt(Builder, *CI); 2445 } else if (IsX86 && Name.endswith(".movntdqa")) { 2446 Module *M = F->getParent(); 2447 MDNode *Node = MDNode::get( 2448 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 2449 2450 Value *Ptr = CI->getArgOperand(0); 2451 VectorType *VTy = cast<VectorType>(CI->getType()); 2452 2453 // Convert the type of the pointer to a pointer to the stored type. 2454 Value *BC = 2455 Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast"); 2456 LoadInst *LI = Builder.CreateAlignedLoad(BC, VTy->getBitWidth() / 8); 2457 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 2458 Rep = LI; 2459 } else if (IsX86 && 2460 (Name.startswith("sse2.pavg") || Name.startswith("avx2.pavg") || 2461 Name.startswith("avx512.mask.pavg"))) { 2462 // llvm.x86.sse2.pavg.b/w, llvm.x86.avx2.pavg.b/w, 2463 // llvm.x86.avx512.mask.pavg.b/w 2464 Value *A = CI->getArgOperand(0); 2465 Value *B = CI->getArgOperand(1); 2466 VectorType *ZextType = VectorType::getExtendedElementVectorType( 2467 cast<VectorType>(A->getType())); 2468 Value *ExtendedA = Builder.CreateZExt(A, ZextType); 2469 Value *ExtendedB = Builder.CreateZExt(B, ZextType); 2470 Value *Sum = Builder.CreateAdd(ExtendedA, ExtendedB); 2471 Value *AddOne = Builder.CreateAdd(Sum, ConstantInt::get(ZextType, 1)); 2472 Value *ShiftR = Builder.CreateLShr(AddOne, ConstantInt::get(ZextType, 1)); 2473 Rep = Builder.CreateTrunc(ShiftR, A->getType()); 2474 if (CI->getNumArgOperands() > 2) { 2475 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2476 CI->getArgOperand(2)); 2477 } 2478 } else if (IsX86 && Name.startswith("fma.vfmsub")) { 2479 // Handle FMSUB and FSUBADD. 2480 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2481 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2482 Intrinsic::ID IID; 2483 if (Name[10] == '.' && Name[11] == 'p') { 2484 // Packed FMSUB 2485 if (VecWidth == 128 && EltWidth == 32) 2486 IID = Intrinsic::x86_fma_vfmadd_ps; 2487 else if (VecWidth == 128 && EltWidth == 64) 2488 IID = Intrinsic::x86_fma_vfmadd_pd; 2489 else if (VecWidth == 256 && EltWidth == 32) 2490 IID = Intrinsic::x86_fma_vfmadd_ps_256; 2491 else if (VecWidth == 256 && EltWidth == 64) 2492 IID = Intrinsic::x86_fma_vfmadd_pd_256; 2493 else 2494 llvm_unreachable("Unexpected intrinsic"); 2495 } else if (Name[10] == '.' && Name[11] == 's') { 2496 // Scalar FMSUB 2497 if (EltWidth == 32) 2498 IID = Intrinsic::x86_fma_vfmadd_ss; 2499 else if (EltWidth == 64) 2500 IID = Intrinsic::x86_fma_vfmadd_sd; 2501 else 2502 llvm_unreachable("Unexpected intrinsic"); 2503 } else { 2504 // FMSUBADD 2505 if (VecWidth == 128 && EltWidth == 32) 2506 IID = Intrinsic::x86_fma_vfmaddsub_ps; 2507 else if (VecWidth == 128 && EltWidth == 64) 2508 IID = Intrinsic::x86_fma_vfmaddsub_pd; 2509 else if (VecWidth == 256 && EltWidth == 32) 2510 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 2511 else if (VecWidth == 256 && EltWidth == 64) 2512 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 2513 else 2514 llvm_unreachable("Unexpected intrinsic"); 2515 } 2516 Value *Arg2 = Builder.CreateFNeg(CI->getArgOperand(2)); 2517 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), Arg2 }; 2518 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2519 Ops); 2520 } else if (IsX86 && (Name.startswith("fma.vfnmadd.") || 2521 Name.startswith("fma.vfnmsub."))) { 2522 Value *Arg0 = CI->getArgOperand(0); 2523 Value *Arg1 = CI->getArgOperand(1); 2524 Value *Arg2 = CI->getArgOperand(2); 2525 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2526 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2527 Intrinsic::ID IID; 2528 if (Name[12] == 'p') { 2529 // Packed FNMADD/FNSUB 2530 Arg0 = Builder.CreateFNeg(Arg0); 2531 if (VecWidth == 128 && EltWidth == 32) 2532 IID = Intrinsic::x86_fma_vfmadd_ps; 2533 else if (VecWidth == 128 && EltWidth == 64) 2534 IID = Intrinsic::x86_fma_vfmadd_pd; 2535 else if (VecWidth == 256 && EltWidth == 32) 2536 IID = Intrinsic::x86_fma_vfmadd_ps_256; 2537 else if (VecWidth == 256 && EltWidth == 64) 2538 IID = Intrinsic::x86_fma_vfmadd_pd_256; 2539 else 2540 llvm_unreachable("Unexpected intrinsic"); 2541 } else { 2542 // Scalar FNMADD/FNMSUB 2543 Arg1 = Builder.CreateFNeg(Arg1); // Arg0 is passthru so invert Arg1. 2544 if (EltWidth == 32) 2545 IID = Intrinsic::x86_fma_vfmadd_ss; 2546 else if (EltWidth == 64) 2547 IID = Intrinsic::x86_fma_vfmadd_sd; 2548 else 2549 llvm_unreachable("Unexpected intrinsic"); 2550 } 2551 // Invert for FNMSUB. 2552 if (Name[8] == 's') 2553 Arg2 = Builder.CreateFNeg(Arg2); 2554 Value *Ops[] = { Arg0, Arg1, Arg2 }; 2555 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2556 Ops); 2557 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 2558 Name.startswith("avx512.maskz.pternlog."))) { 2559 bool ZeroMask = Name[11] == 'z'; 2560 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2561 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2562 Intrinsic::ID IID; 2563 if (VecWidth == 128 && EltWidth == 32) 2564 IID = Intrinsic::x86_avx512_pternlog_d_128; 2565 else if (VecWidth == 256 && EltWidth == 32) 2566 IID = Intrinsic::x86_avx512_pternlog_d_256; 2567 else if (VecWidth == 512 && EltWidth == 32) 2568 IID = Intrinsic::x86_avx512_pternlog_d_512; 2569 else if (VecWidth == 128 && EltWidth == 64) 2570 IID = Intrinsic::x86_avx512_pternlog_q_128; 2571 else if (VecWidth == 256 && EltWidth == 64) 2572 IID = Intrinsic::x86_avx512_pternlog_q_256; 2573 else if (VecWidth == 512 && EltWidth == 64) 2574 IID = Intrinsic::x86_avx512_pternlog_q_512; 2575 else 2576 llvm_unreachable("Unexpected intrinsic"); 2577 2578 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 2579 CI->getArgOperand(2), CI->getArgOperand(3) }; 2580 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2581 Args); 2582 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 2583 : CI->getArgOperand(0); 2584 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 2585 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 2586 Name.startswith("avx512.maskz.vpmadd52"))) { 2587 bool ZeroMask = Name[11] == 'z'; 2588 bool High = Name[20] == 'h' || Name[21] == 'h'; 2589 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2590 Intrinsic::ID IID; 2591 if (VecWidth == 128 && !High) 2592 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 2593 else if (VecWidth == 256 && !High) 2594 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 2595 else if (VecWidth == 512 && !High) 2596 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 2597 else if (VecWidth == 128 && High) 2598 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 2599 else if (VecWidth == 256 && High) 2600 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 2601 else if (VecWidth == 512 && High) 2602 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 2603 else 2604 llvm_unreachable("Unexpected intrinsic"); 2605 2606 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 2607 CI->getArgOperand(2) }; 2608 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2609 Args); 2610 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 2611 : CI->getArgOperand(0); 2612 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 2613 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 2614 Name.startswith("avx512.mask.vpermt2var.") || 2615 Name.startswith("avx512.maskz.vpermt2var."))) { 2616 bool ZeroMask = Name[11] == 'z'; 2617 bool IndexForm = Name[17] == 'i'; 2618 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2619 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 2620 bool IsFloat = CI->getType()->isFPOrFPVectorTy(); 2621 Intrinsic::ID IID; 2622 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 2623 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 2624 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 2625 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 2626 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 2627 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 2628 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 2629 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 2630 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 2631 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 2632 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 2633 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 2634 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 2635 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 2636 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 2637 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 2638 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 2639 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 2640 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 2641 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 2642 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 2643 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 2644 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 2645 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 2646 else if (VecWidth == 128 && EltWidth == 16) 2647 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 2648 else if (VecWidth == 256 && EltWidth == 16) 2649 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 2650 else if (VecWidth == 512 && EltWidth == 16) 2651 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 2652 else if (VecWidth == 128 && EltWidth == 8) 2653 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 2654 else if (VecWidth == 256 && EltWidth == 8) 2655 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 2656 else if (VecWidth == 512 && EltWidth == 8) 2657 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 2658 else 2659 llvm_unreachable("Unexpected intrinsic"); 2660 2661 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 2662 CI->getArgOperand(2) }; 2663 2664 // If this isn't index form we need to swap operand 0 and 1. 2665 if (!IndexForm) 2666 std::swap(Args[0], Args[1]); 2667 2668 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2669 Args); 2670 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 2671 : Builder.CreateBitCast(CI->getArgOperand(1), 2672 CI->getType()); 2673 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 2674 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 2675 Name.startswith("avx512.maskz.vpdpbusd.") || 2676 Name.startswith("avx512.mask.vpdpbusds.") || 2677 Name.startswith("avx512.maskz.vpdpbusds."))) { 2678 bool ZeroMask = Name[11] == 'z'; 2679 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 2680 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2681 Intrinsic::ID IID; 2682 if (VecWidth == 128 && !IsSaturating) 2683 IID = Intrinsic::x86_avx512_vpdpbusd_128; 2684 else if (VecWidth == 256 && !IsSaturating) 2685 IID = Intrinsic::x86_avx512_vpdpbusd_256; 2686 else if (VecWidth == 512 && !IsSaturating) 2687 IID = Intrinsic::x86_avx512_vpdpbusd_512; 2688 else if (VecWidth == 128 && IsSaturating) 2689 IID = Intrinsic::x86_avx512_vpdpbusds_128; 2690 else if (VecWidth == 256 && IsSaturating) 2691 IID = Intrinsic::x86_avx512_vpdpbusds_256; 2692 else if (VecWidth == 512 && IsSaturating) 2693 IID = Intrinsic::x86_avx512_vpdpbusds_512; 2694 else 2695 llvm_unreachable("Unexpected intrinsic"); 2696 2697 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 2698 CI->getArgOperand(2) }; 2699 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2700 Args); 2701 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 2702 : CI->getArgOperand(0); 2703 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 2704 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 2705 Name.startswith("avx512.maskz.vpdpwssd.") || 2706 Name.startswith("avx512.mask.vpdpwssds.") || 2707 Name.startswith("avx512.maskz.vpdpwssds."))) { 2708 bool ZeroMask = Name[11] == 'z'; 2709 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 2710 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 2711 Intrinsic::ID IID; 2712 if (VecWidth == 128 && !IsSaturating) 2713 IID = Intrinsic::x86_avx512_vpdpwssd_128; 2714 else if (VecWidth == 256 && !IsSaturating) 2715 IID = Intrinsic::x86_avx512_vpdpwssd_256; 2716 else if (VecWidth == 512 && !IsSaturating) 2717 IID = Intrinsic::x86_avx512_vpdpwssd_512; 2718 else if (VecWidth == 128 && IsSaturating) 2719 IID = Intrinsic::x86_avx512_vpdpwssds_128; 2720 else if (VecWidth == 256 && IsSaturating) 2721 IID = Intrinsic::x86_avx512_vpdpwssds_256; 2722 else if (VecWidth == 512 && IsSaturating) 2723 IID = Intrinsic::x86_avx512_vpdpwssds_512; 2724 else 2725 llvm_unreachable("Unexpected intrinsic"); 2726 2727 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 2728 CI->getArgOperand(2) }; 2729 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 2730 Args); 2731 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 2732 : CI->getArgOperand(0); 2733 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 2734 } else if (IsX86 && Name.startswith("avx512.mask.") && 2735 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 2736 // Rep will be updated by the call in the condition. 2737 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 2738 Value *Arg = CI->getArgOperand(0); 2739 Value *Neg = Builder.CreateNeg(Arg, "neg"); 2740 Value *Cmp = Builder.CreateICmpSGE( 2741 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 2742 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 2743 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 2744 Name == "max.ui" || Name == "max.ull")) { 2745 Value *Arg0 = CI->getArgOperand(0); 2746 Value *Arg1 = CI->getArgOperand(1); 2747 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 2748 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 2749 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 2750 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 2751 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 2752 Name == "min.ui" || Name == "min.ull")) { 2753 Value *Arg0 = CI->getArgOperand(0); 2754 Value *Arg1 = CI->getArgOperand(1); 2755 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 2756 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 2757 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 2758 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 2759 } else if (IsNVVM && Name == "clz.ll") { 2760 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 2761 Value *Arg = CI->getArgOperand(0); 2762 Value *Ctlz = Builder.CreateCall( 2763 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 2764 {Arg->getType()}), 2765 {Arg, Builder.getFalse()}, "ctlz"); 2766 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 2767 } else if (IsNVVM && Name == "popc.ll") { 2768 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 2769 // i64. 2770 Value *Arg = CI->getArgOperand(0); 2771 Value *Popc = Builder.CreateCall( 2772 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 2773 {Arg->getType()}), 2774 Arg, "ctpop"); 2775 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 2776 } else if (IsNVVM && Name == "h2f") { 2777 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 2778 F->getParent(), Intrinsic::convert_from_fp16, 2779 {Builder.getFloatTy()}), 2780 CI->getArgOperand(0), "h2f"); 2781 } else { 2782 llvm_unreachable("Unknown function for CallInst upgrade."); 2783 } 2784 2785 if (Rep) 2786 CI->replaceAllUsesWith(Rep); 2787 CI->eraseFromParent(); 2788 return; 2789 } 2790 2791 const auto &DefaultCase = [&NewFn, &CI]() -> void { 2792 // Handle generic mangling change, but nothing else 2793 assert( 2794 (CI->getCalledFunction()->getName() != NewFn->getName()) && 2795 "Unknown function for CallInst upgrade and isn't just a name change"); 2796 CI->setCalledFunction(NewFn); 2797 }; 2798 CallInst *NewCall = nullptr; 2799 switch (NewFn->getIntrinsicID()) { 2800 default: { 2801 DefaultCase(); 2802 return; 2803 } 2804 2805 case Intrinsic::arm_neon_vld1: 2806 case Intrinsic::arm_neon_vld2: 2807 case Intrinsic::arm_neon_vld3: 2808 case Intrinsic::arm_neon_vld4: 2809 case Intrinsic::arm_neon_vld2lane: 2810 case Intrinsic::arm_neon_vld3lane: 2811 case Intrinsic::arm_neon_vld4lane: 2812 case Intrinsic::arm_neon_vst1: 2813 case Intrinsic::arm_neon_vst2: 2814 case Intrinsic::arm_neon_vst3: 2815 case Intrinsic::arm_neon_vst4: 2816 case Intrinsic::arm_neon_vst2lane: 2817 case Intrinsic::arm_neon_vst3lane: 2818 case Intrinsic::arm_neon_vst4lane: { 2819 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2820 CI->arg_operands().end()); 2821 NewCall = Builder.CreateCall(NewFn, Args); 2822 break; 2823 } 2824 2825 case Intrinsic::bitreverse: 2826 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 2827 break; 2828 2829 case Intrinsic::ctlz: 2830 case Intrinsic::cttz: 2831 assert(CI->getNumArgOperands() == 1 && 2832 "Mismatch between function args and call args"); 2833 NewCall = 2834 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 2835 break; 2836 2837 case Intrinsic::objectsize: { 2838 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 2839 ? Builder.getFalse() 2840 : CI->getArgOperand(2); 2841 NewCall = Builder.CreateCall( 2842 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize}); 2843 break; 2844 } 2845 2846 case Intrinsic::ctpop: 2847 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 2848 break; 2849 2850 case Intrinsic::convert_from_fp16: 2851 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 2852 break; 2853 2854 case Intrinsic::dbg_value: 2855 // Upgrade from the old version that had an extra offset argument. 2856 assert(CI->getNumArgOperands() == 4); 2857 // Drop nonzero offsets instead of attempting to upgrade them. 2858 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 2859 if (Offset->isZeroValue()) { 2860 NewCall = Builder.CreateCall( 2861 NewFn, 2862 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 2863 break; 2864 } 2865 CI->eraseFromParent(); 2866 return; 2867 2868 case Intrinsic::x86_xop_vfrcz_ss: 2869 case Intrinsic::x86_xop_vfrcz_sd: 2870 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 2871 break; 2872 2873 case Intrinsic::x86_xop_vpermil2pd: 2874 case Intrinsic::x86_xop_vpermil2ps: 2875 case Intrinsic::x86_xop_vpermil2pd_256: 2876 case Intrinsic::x86_xop_vpermil2ps_256: { 2877 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2878 CI->arg_operands().end()); 2879 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 2880 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 2881 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 2882 NewCall = Builder.CreateCall(NewFn, Args); 2883 break; 2884 } 2885 2886 case Intrinsic::x86_sse41_ptestc: 2887 case Intrinsic::x86_sse41_ptestz: 2888 case Intrinsic::x86_sse41_ptestnzc: { 2889 // The arguments for these intrinsics used to be v4f32, and changed 2890 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 2891 // So, the only thing required is a bitcast for both arguments. 2892 // First, check the arguments have the old type. 2893 Value *Arg0 = CI->getArgOperand(0); 2894 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 2895 return; 2896 2897 // Old intrinsic, add bitcasts 2898 Value *Arg1 = CI->getArgOperand(1); 2899 2900 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 2901 2902 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 2903 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 2904 2905 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 2906 break; 2907 } 2908 2909 case Intrinsic::x86_sse41_insertps: 2910 case Intrinsic::x86_sse41_dppd: 2911 case Intrinsic::x86_sse41_dpps: 2912 case Intrinsic::x86_sse41_mpsadbw: 2913 case Intrinsic::x86_avx_dp_ps_256: 2914 case Intrinsic::x86_avx2_mpsadbw: { 2915 // Need to truncate the last argument from i32 to i8 -- this argument models 2916 // an inherently 8-bit immediate operand to these x86 instructions. 2917 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2918 CI->arg_operands().end()); 2919 2920 // Replace the last argument with a trunc. 2921 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 2922 NewCall = Builder.CreateCall(NewFn, Args); 2923 break; 2924 } 2925 2926 case Intrinsic::x86_avx512_mask_cmp_pd_128: 2927 case Intrinsic::x86_avx512_mask_cmp_pd_256: 2928 case Intrinsic::x86_avx512_mask_cmp_pd_512: 2929 case Intrinsic::x86_avx512_mask_cmp_ps_128: 2930 case Intrinsic::x86_avx512_mask_cmp_ps_256: 2931 case Intrinsic::x86_avx512_mask_cmp_ps_512: { 2932 SmallVector<Value *, 4> Args; 2933 Args.push_back(CI->getArgOperand(0)); 2934 Args.push_back(CI->getArgOperand(1)); 2935 Args.push_back(CI->getArgOperand(2)); 2936 if (CI->getNumArgOperands() == 5) 2937 Args.push_back(CI->getArgOperand(4)); 2938 2939 NewCall = Builder.CreateCall(NewFn, Args); 2940 unsigned NumElts = Args[0]->getType()->getVectorNumElements(); 2941 Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall, CI->getArgOperand(3), 2942 NumElts); 2943 2944 std::string Name = CI->getName(); 2945 if (!Name.empty()) { 2946 CI->setName(Name + ".old"); 2947 NewCall->setName(Name); 2948 } 2949 CI->replaceAllUsesWith(Res); 2950 CI->eraseFromParent(); 2951 return; 2952 } 2953 2954 case Intrinsic::thread_pointer: { 2955 NewCall = Builder.CreateCall(NewFn, {}); 2956 break; 2957 } 2958 2959 case Intrinsic::invariant_start: 2960 case Intrinsic::invariant_end: 2961 case Intrinsic::masked_load: 2962 case Intrinsic::masked_store: 2963 case Intrinsic::masked_gather: 2964 case Intrinsic::masked_scatter: { 2965 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 2966 CI->arg_operands().end()); 2967 NewCall = Builder.CreateCall(NewFn, Args); 2968 break; 2969 } 2970 2971 case Intrinsic::memcpy: 2972 case Intrinsic::memmove: 2973 case Intrinsic::memset: { 2974 // We have to make sure that the call signature is what we're expecting. 2975 // We only want to change the old signatures by removing the alignment arg: 2976 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 2977 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 2978 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 2979 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 2980 // Note: i8*'s in the above can be any pointer type 2981 if (CI->getNumArgOperands() != 5) { 2982 DefaultCase(); 2983 return; 2984 } 2985 // Remove alignment argument (3), and add alignment attributes to the 2986 // dest/src pointers. 2987 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 2988 CI->getArgOperand(2), CI->getArgOperand(4)}; 2989 NewCall = Builder.CreateCall(NewFn, Args); 2990 auto *MemCI = cast<MemIntrinsic>(NewCall); 2991 // All mem intrinsics support dest alignment. 2992 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 2993 MemCI->setDestAlignment(Align->getZExtValue()); 2994 // Memcpy/Memmove also support source alignment. 2995 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 2996 MTI->setSourceAlignment(Align->getZExtValue()); 2997 break; 2998 } 2999 } 3000 assert(NewCall && "Should have either set this variable or returned through " 3001 "the default case"); 3002 std::string Name = CI->getName(); 3003 if (!Name.empty()) { 3004 CI->setName(Name + ".old"); 3005 NewCall->setName(Name); 3006 } 3007 CI->replaceAllUsesWith(NewCall); 3008 CI->eraseFromParent(); 3009 } 3010 3011 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3012 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3013 3014 // Check if this function should be upgraded and get the replacement function 3015 // if there is one. 3016 Function *NewFn; 3017 if (UpgradeIntrinsicFunction(F, NewFn)) { 3018 // Replace all users of the old function with the new function or new 3019 // instructions. This is not a range loop because the call is deleted. 3020 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3021 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3022 UpgradeIntrinsicCall(CI, NewFn); 3023 3024 // Remove old function, no longer used, from the module. 3025 F->eraseFromParent(); 3026 } 3027 } 3028 3029 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3030 // Check if the tag uses struct-path aware TBAA format. 3031 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3032 return &MD; 3033 3034 auto &Context = MD.getContext(); 3035 if (MD.getNumOperands() == 3) { 3036 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3037 MDNode *ScalarType = MDNode::get(Context, Elts); 3038 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3039 Metadata *Elts2[] = {ScalarType, ScalarType, 3040 ConstantAsMetadata::get( 3041 Constant::getNullValue(Type::getInt64Ty(Context))), 3042 MD.getOperand(2)}; 3043 return MDNode::get(Context, Elts2); 3044 } 3045 // Create a MDNode <MD, MD, offset 0> 3046 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3047 Type::getInt64Ty(Context)))}; 3048 return MDNode::get(Context, Elts); 3049 } 3050 3051 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3052 Instruction *&Temp) { 3053 if (Opc != Instruction::BitCast) 3054 return nullptr; 3055 3056 Temp = nullptr; 3057 Type *SrcTy = V->getType(); 3058 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3059 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3060 LLVMContext &Context = V->getContext(); 3061 3062 // We have no information about target data layout, so we assume that 3063 // the maximum pointer size is 64bit. 3064 Type *MidTy = Type::getInt64Ty(Context); 3065 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3066 3067 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3068 } 3069 3070 return nullptr; 3071 } 3072 3073 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3074 if (Opc != Instruction::BitCast) 3075 return nullptr; 3076 3077 Type *SrcTy = C->getType(); 3078 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3079 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3080 LLVMContext &Context = C->getContext(); 3081 3082 // We have no information about target data layout, so we assume that 3083 // the maximum pointer size is 64bit. 3084 Type *MidTy = Type::getInt64Ty(Context); 3085 3086 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3087 DestTy); 3088 } 3089 3090 return nullptr; 3091 } 3092 3093 /// Check the debug info version number, if it is out-dated, drop the debug 3094 /// info. Return true if module is modified. 3095 bool llvm::UpgradeDebugInfo(Module &M) { 3096 unsigned Version = getDebugMetadataVersionFromModule(M); 3097 if (Version == DEBUG_METADATA_VERSION) { 3098 bool BrokenDebugInfo = false; 3099 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3100 report_fatal_error("Broken module found, compilation aborted!"); 3101 if (!BrokenDebugInfo) 3102 // Everything is ok. 3103 return false; 3104 else { 3105 // Diagnose malformed debug info. 3106 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3107 M.getContext().diagnose(Diag); 3108 } 3109 } 3110 bool Modified = StripDebugInfo(M); 3111 if (Modified && Version != DEBUG_METADATA_VERSION) { 3112 // Diagnose a version mismatch. 3113 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3114 M.getContext().diagnose(DiagVersion); 3115 } 3116 return Modified; 3117 } 3118 3119 bool llvm::UpgradeRetainReleaseMarker(Module &M) { 3120 bool Changed = false; 3121 NamedMDNode *ModRetainReleaseMarker = 3122 M.getNamedMetadata("clang.arc.retainAutoreleasedReturnValueMarker"); 3123 if (ModRetainReleaseMarker) { 3124 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3125 if (Op) { 3126 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3127 if (ID) { 3128 SmallVector<StringRef, 4> ValueComp; 3129 ID->getString().split(ValueComp, "#"); 3130 if (ValueComp.size() == 2) { 3131 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3132 Metadata *Ops[1] = {MDString::get(M.getContext(), NewValue)}; 3133 ModRetainReleaseMarker->setOperand(0, 3134 MDNode::get(M.getContext(), Ops)); 3135 Changed = true; 3136 } 3137 } 3138 } 3139 } 3140 return Changed; 3141 } 3142 3143 bool llvm::UpgradeModuleFlags(Module &M) { 3144 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 3145 if (!ModFlags) 3146 return false; 3147 3148 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 3149 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 3150 MDNode *Op = ModFlags->getOperand(I); 3151 if (Op->getNumOperands() != 3) 3152 continue; 3153 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 3154 if (!ID) 3155 continue; 3156 if (ID->getString() == "Objective-C Image Info Version") 3157 HasObjCFlag = true; 3158 if (ID->getString() == "Objective-C Class Properties") 3159 HasClassProperties = true; 3160 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 3161 // field was Error and now they are Max. 3162 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 3163 if (auto *Behavior = 3164 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 3165 if (Behavior->getLimitedValue() == Module::Error) { 3166 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 3167 Metadata *Ops[3] = { 3168 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 3169 MDString::get(M.getContext(), ID->getString()), 3170 Op->getOperand(2)}; 3171 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 3172 Changed = true; 3173 } 3174 } 3175 } 3176 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 3177 // section name so that llvm-lto will not complain about mismatching 3178 // module flags that is functionally the same. 3179 if (ID->getString() == "Objective-C Image Info Section") { 3180 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 3181 SmallVector<StringRef, 4> ValueComp; 3182 Value->getString().split(ValueComp, " "); 3183 if (ValueComp.size() != 1) { 3184 std::string NewValue; 3185 for (auto &S : ValueComp) 3186 NewValue += S.str(); 3187 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 3188 MDString::get(M.getContext(), NewValue)}; 3189 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 3190 Changed = true; 3191 } 3192 } 3193 } 3194 } 3195 3196 // "Objective-C Class Properties" is recently added for Objective-C. We 3197 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 3198 // flag of value 0, so we can correclty downgrade this flag when trying to 3199 // link an ObjC bitcode without this module flag with an ObjC bitcode with 3200 // this module flag. 3201 if (HasObjCFlag && !HasClassProperties) { 3202 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 3203 (uint32_t)0); 3204 Changed = true; 3205 } 3206 3207 return Changed; 3208 } 3209 3210 void llvm::UpgradeSectionAttributes(Module &M) { 3211 auto TrimSpaces = [](StringRef Section) -> std::string { 3212 SmallVector<StringRef, 5> Components; 3213 Section.split(Components, ','); 3214 3215 SmallString<32> Buffer; 3216 raw_svector_ostream OS(Buffer); 3217 3218 for (auto Component : Components) 3219 OS << ',' << Component.trim(); 3220 3221 return OS.str().substr(1); 3222 }; 3223 3224 for (auto &GV : M.globals()) { 3225 if (!GV.hasSection()) 3226 continue; 3227 3228 StringRef Section = GV.getSection(); 3229 3230 if (!Section.startswith("__DATA, __objc_catlist")) 3231 continue; 3232 3233 // __DATA, __objc_catlist, regular, no_dead_strip 3234 // __DATA,__objc_catlist,regular,no_dead_strip 3235 GV.setSection(TrimSpaces(Section)); 3236 } 3237 } 3238 3239 static bool isOldLoopArgument(Metadata *MD) { 3240 auto *T = dyn_cast_or_null<MDTuple>(MD); 3241 if (!T) 3242 return false; 3243 if (T->getNumOperands() < 1) 3244 return false; 3245 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 3246 if (!S) 3247 return false; 3248 return S->getString().startswith("llvm.vectorizer."); 3249 } 3250 3251 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 3252 StringRef OldPrefix = "llvm.vectorizer."; 3253 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 3254 3255 if (OldTag == "llvm.vectorizer.unroll") 3256 return MDString::get(C, "llvm.loop.interleave.count"); 3257 3258 return MDString::get( 3259 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 3260 .str()); 3261 } 3262 3263 static Metadata *upgradeLoopArgument(Metadata *MD) { 3264 auto *T = dyn_cast_or_null<MDTuple>(MD); 3265 if (!T) 3266 return MD; 3267 if (T->getNumOperands() < 1) 3268 return MD; 3269 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 3270 if (!OldTag) 3271 return MD; 3272 if (!OldTag->getString().startswith("llvm.vectorizer.")) 3273 return MD; 3274 3275 // This has an old tag. Upgrade it. 3276 SmallVector<Metadata *, 8> Ops; 3277 Ops.reserve(T->getNumOperands()); 3278 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 3279 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 3280 Ops.push_back(T->getOperand(I)); 3281 3282 return MDTuple::get(T->getContext(), Ops); 3283 } 3284 3285 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 3286 auto *T = dyn_cast<MDTuple>(&N); 3287 if (!T) 3288 return &N; 3289 3290 if (none_of(T->operands(), isOldLoopArgument)) 3291 return &N; 3292 3293 SmallVector<Metadata *, 8> Ops; 3294 Ops.reserve(T->getNumOperands()); 3295 for (Metadata *MD : T->operands()) 3296 Ops.push_back(upgradeLoopArgument(MD)); 3297 3298 return MDTuple::get(T->getContext(), Ops); 3299 } 3300