1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the auto-upgrade helper functions. 11 // This is where deprecated IR intrinsics and other IR features are updated to 12 // current specifications. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "llvm/IR/AutoUpgrade.h" 17 #include "llvm/ADT/StringSwitch.h" 18 #include "llvm/IR/Constants.h" 19 #include "llvm/IR/DIBuilder.h" 20 #include "llvm/IR/DebugInfo.h" 21 #include "llvm/IR/DiagnosticInfo.h" 22 #include "llvm/IR/Function.h" 23 #include "llvm/IR/IRBuilder.h" 24 #include "llvm/IR/Instruction.h" 25 #include "llvm/IR/IntrinsicInst.h" 26 #include "llvm/IR/LLVMContext.h" 27 #include "llvm/IR/Module.h" 28 #include "llvm/IR/Verifier.h" 29 #include "llvm/Support/ErrorHandling.h" 30 #include "llvm/Support/Regex.h" 31 #include <cstring> 32 using namespace llvm; 33 34 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 35 36 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 37 // changed their type from v4f32 to v2i64. 38 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 39 Function *&NewFn) { 40 // Check whether this is an old version of the function, which received 41 // v4f32 arguments. 42 Type *Arg0Type = F->getFunctionType()->getParamType(0); 43 if (Arg0Type != VectorType::get(Type::getFloatTy(F->getContext()), 4)) 44 return false; 45 46 // Yes, it's old, replace it with new version. 47 rename(F); 48 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 49 return true; 50 } 51 52 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 53 // arguments have changed their type from i32 to i8. 54 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 55 Function *&NewFn) { 56 // Check that the last argument is an i32. 57 Type *LastArgType = F->getFunctionType()->getParamType( 58 F->getFunctionType()->getNumParams() - 1); 59 if (!LastArgType->isIntegerTy(32)) 60 return false; 61 62 // Move this function aside and map down. 63 rename(F); 64 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 65 return true; 66 } 67 68 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 69 // All of the intrinsics matches below should be marked with which llvm 70 // version started autoupgrading them. At some point in the future we would 71 // like to use this information to remove upgrade code for some older 72 // intrinsics. It is currently undecided how we will determine that future 73 // point. 74 if (Name == "addcarryx.u32" || // Added in 8.0 75 Name == "addcarryx.u64" || // Added in 8.0 76 Name == "addcarry.u32" || // Added in 8.0 77 Name == "addcarry.u64" || // Added in 8.0 78 Name == "subborrow.u32" || // Added in 8.0 79 Name == "subborrow.u64" || // Added in 8.0 80 Name.startswith("sse2.padds.") || // Added in 8.0 81 Name.startswith("sse2.psubs.") || // Added in 8.0 82 Name.startswith("sse2.paddus.") || // Added in 8.0 83 Name.startswith("sse2.psubus.") || // Added in 8.0 84 Name.startswith("avx2.padds.") || // Added in 8.0 85 Name.startswith("avx2.psubs.") || // Added in 8.0 86 Name.startswith("avx2.paddus.") || // Added in 8.0 87 Name.startswith("avx2.psubus.") || // Added in 8.0 88 Name.startswith("avx512.padds.") || // Added in 8.0 89 Name.startswith("avx512.psubs.") || // Added in 8.0 90 Name.startswith("avx512.mask.padds.") || // Added in 8.0 91 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 92 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 93 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 94 Name=="ssse3.pabs.b.128" || // Added in 6.0 95 Name=="ssse3.pabs.w.128" || // Added in 6.0 96 Name=="ssse3.pabs.d.128" || // Added in 6.0 97 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 98 Name.startswith("fma.vfmadd.") || // Added in 7.0 99 Name.startswith("fma.vfmsub.") || // Added in 7.0 100 Name.startswith("fma.vfmaddsub.") || // Added in 7.0 101 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 102 Name.startswith("fma.vfnmadd.") || // Added in 7.0 103 Name.startswith("fma.vfnmsub.") || // Added in 7.0 104 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 105 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 106 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 107 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 108 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 109 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 110 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 111 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 112 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 113 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 114 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 115 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 116 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 117 Name.startswith("avx512.kunpck") || //added in 6.0 118 Name.startswith("avx2.pabs.") || // Added in 6.0 119 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 120 Name.startswith("avx512.broadcastm") || // Added in 6.0 121 Name == "sse.sqrt.ss" || // Added in 7.0 122 Name == "sse2.sqrt.sd" || // Added in 7.0 123 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 124 Name.startswith("avx.sqrt.p") || // Added in 7.0 125 Name.startswith("sse2.sqrt.p") || // Added in 7.0 126 Name.startswith("sse.sqrt.p") || // Added in 7.0 127 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 128 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 129 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 130 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 131 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 132 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 133 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 134 Name.startswith("avx.vperm2f128.") || // Added in 6.0 135 Name == "avx2.vperm2i128" || // Added in 6.0 136 Name == "sse.add.ss" || // Added in 4.0 137 Name == "sse2.add.sd" || // Added in 4.0 138 Name == "sse.sub.ss" || // Added in 4.0 139 Name == "sse2.sub.sd" || // Added in 4.0 140 Name == "sse.mul.ss" || // Added in 4.0 141 Name == "sse2.mul.sd" || // Added in 4.0 142 Name == "sse.div.ss" || // Added in 4.0 143 Name == "sse2.div.sd" || // Added in 4.0 144 Name == "sse41.pmaxsb" || // Added in 3.9 145 Name == "sse2.pmaxs.w" || // Added in 3.9 146 Name == "sse41.pmaxsd" || // Added in 3.9 147 Name == "sse2.pmaxu.b" || // Added in 3.9 148 Name == "sse41.pmaxuw" || // Added in 3.9 149 Name == "sse41.pmaxud" || // Added in 3.9 150 Name == "sse41.pminsb" || // Added in 3.9 151 Name == "sse2.pmins.w" || // Added in 3.9 152 Name == "sse41.pminsd" || // Added in 3.9 153 Name == "sse2.pminu.b" || // Added in 3.9 154 Name == "sse41.pminuw" || // Added in 3.9 155 Name == "sse41.pminud" || // Added in 3.9 156 Name == "avx512.kand.w" || // Added in 7.0 157 Name == "avx512.kandn.w" || // Added in 7.0 158 Name == "avx512.knot.w" || // Added in 7.0 159 Name == "avx512.kor.w" || // Added in 7.0 160 Name == "avx512.kxor.w" || // Added in 7.0 161 Name == "avx512.kxnor.w" || // Added in 7.0 162 Name == "avx512.kortestc.w" || // Added in 7.0 163 Name == "avx512.kortestz.w" || // Added in 7.0 164 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 165 Name.startswith("avx2.pmax") || // Added in 3.9 166 Name.startswith("avx2.pmin") || // Added in 3.9 167 Name.startswith("avx512.mask.pmax") || // Added in 4.0 168 Name.startswith("avx512.mask.pmin") || // Added in 4.0 169 Name.startswith("avx2.vbroadcast") || // Added in 3.8 170 Name.startswith("avx2.pbroadcast") || // Added in 3.8 171 Name.startswith("avx.vpermil.") || // Added in 3.1 172 Name.startswith("sse2.pshuf") || // Added in 3.9 173 Name.startswith("avx512.pbroadcast") || // Added in 3.9 174 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 175 Name.startswith("avx512.mask.movddup") || // Added in 3.9 176 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 177 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 178 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 179 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 180 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 181 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 182 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 183 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 184 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 185 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 186 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 187 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 188 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 189 Name.startswith("avx512.mask.pand.") || // Added in 3.9 190 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 191 Name.startswith("avx512.mask.por.") || // Added in 3.9 192 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 193 Name.startswith("avx512.mask.and.") || // Added in 3.9 194 Name.startswith("avx512.mask.andn.") || // Added in 3.9 195 Name.startswith("avx512.mask.or.") || // Added in 3.9 196 Name.startswith("avx512.mask.xor.") || // Added in 3.9 197 Name.startswith("avx512.mask.padd.") || // Added in 4.0 198 Name.startswith("avx512.mask.psub.") || // Added in 4.0 199 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 200 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 201 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 202 Name == "avx512.mask.cvtudq2ps.128" || // Added in 7.0 203 Name == "avx512.mask.cvtudq2ps.256" || // Added in 7.0 204 Name == "avx512.mask.cvtqq2pd.128" || // Added in 7.0 205 Name == "avx512.mask.cvtqq2pd.256" || // Added in 7.0 206 Name == "avx512.mask.cvtuqq2pd.128" || // Added in 7.0 207 Name == "avx512.mask.cvtuqq2pd.256" || // Added in 7.0 208 Name == "avx512.mask.cvtdq2ps.128" || // Added in 7.0 209 Name == "avx512.mask.cvtdq2ps.256" || // Added in 7.0 210 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 211 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 212 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 213 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 214 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 215 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 216 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 217 Name == "avx512.cvtusi2sd" || // Added in 7.0 218 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 219 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 220 Name == "sse2.pmulu.dq" || // Added in 7.0 221 Name == "sse41.pmuldq" || // Added in 7.0 222 Name == "avx2.pmulu.dq" || // Added in 7.0 223 Name == "avx2.pmul.dq" || // Added in 7.0 224 Name == "avx512.pmulu.dq.512" || // Added in 7.0 225 Name == "avx512.pmul.dq.512" || // Added in 7.0 226 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 227 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 228 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 229 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 230 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 231 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 232 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 233 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 234 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 235 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 236 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 237 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 238 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 239 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 240 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 241 Name.startswith("avx512.mask.cmp.p") || // Added in 7.0 242 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 243 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 244 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 245 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 246 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 247 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 248 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 249 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 250 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 251 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 252 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 253 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 254 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 255 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 256 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 257 Name.startswith("avx512.mask.pslli") || // Added in 4.0 258 Name.startswith("avx512.mask.psrai") || // Added in 4.0 259 Name.startswith("avx512.mask.psrli") || // Added in 4.0 260 Name.startswith("avx512.mask.psllv") || // Added in 4.0 261 Name.startswith("avx512.mask.psrav") || // Added in 4.0 262 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 263 Name.startswith("sse41.pmovsx") || // Added in 3.8 264 Name.startswith("sse41.pmovzx") || // Added in 3.9 265 Name.startswith("avx2.pmovsx") || // Added in 3.9 266 Name.startswith("avx2.pmovzx") || // Added in 3.9 267 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 268 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 269 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 270 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 271 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 272 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 273 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 274 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 275 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 276 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 277 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 278 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 279 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 280 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 281 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 282 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 283 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 284 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 285 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 286 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 287 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 289 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 290 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 291 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 292 Name.startswith("avx512.vpshld.") || // Added in 8.0 293 Name.startswith("avx512.vpshrd.") || // Added in 8.0 294 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 295 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 296 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 297 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 298 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 299 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 300 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 301 Name == "sse.cvtsi2ss" || // Added in 7.0 302 Name == "sse.cvtsi642ss" || // Added in 7.0 303 Name == "sse2.cvtsi2sd" || // Added in 7.0 304 Name == "sse2.cvtsi642sd" || // Added in 7.0 305 Name == "sse2.cvtss2sd" || // Added in 7.0 306 Name == "sse2.cvtdq2pd" || // Added in 3.9 307 Name == "sse2.cvtdq2ps" || // Added in 7.0 308 Name == "sse2.cvtps2pd" || // Added in 3.9 309 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 310 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 311 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 312 Name.startswith("avx.vinsertf128.") || // Added in 3.7 313 Name == "avx2.vinserti128" || // Added in 3.7 314 Name.startswith("avx512.mask.insert") || // Added in 4.0 315 Name.startswith("avx.vextractf128.") || // Added in 3.7 316 Name == "avx2.vextracti128" || // Added in 3.7 317 Name.startswith("avx512.mask.vextract") || // Added in 4.0 318 Name.startswith("sse4a.movnt.") || // Added in 3.9 319 Name.startswith("avx.movnt.") || // Added in 3.2 320 Name.startswith("avx512.storent.") || // Added in 3.9 321 Name == "sse41.movntdqa" || // Added in 5.0 322 Name == "avx2.movntdqa" || // Added in 5.0 323 Name == "avx512.movntdqa" || // Added in 5.0 324 Name == "sse2.storel.dq" || // Added in 3.9 325 Name.startswith("sse.storeu.") || // Added in 3.9 326 Name.startswith("sse2.storeu.") || // Added in 3.9 327 Name.startswith("avx.storeu.") || // Added in 3.9 328 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 329 Name.startswith("avx512.mask.store.p") || // Added in 3.9 330 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 331 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 332 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 333 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 334 Name == "avx512.mask.store.ss" || // Added in 7.0 335 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 336 Name.startswith("avx512.mask.load.") || // Added in 3.9 337 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 338 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 339 Name == "sse42.crc32.64.8" || // Added in 3.4 340 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 341 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 342 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 343 Name.startswith("avx512.mask.valign.") || // Added in 4.0 344 Name.startswith("sse2.psll.dq") || // Added in 3.7 345 Name.startswith("sse2.psrl.dq") || // Added in 3.7 346 Name.startswith("avx2.psll.dq") || // Added in 3.7 347 Name.startswith("avx2.psrl.dq") || // Added in 3.7 348 Name.startswith("avx512.psll.dq") || // Added in 3.9 349 Name.startswith("avx512.psrl.dq") || // Added in 3.9 350 Name == "sse41.pblendw" || // Added in 3.7 351 Name.startswith("sse41.blendp") || // Added in 3.7 352 Name.startswith("avx.blend.p") || // Added in 3.7 353 Name == "avx2.pblendw" || // Added in 3.7 354 Name.startswith("avx2.pblendd.") || // Added in 3.7 355 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 356 Name == "avx2.vbroadcasti128" || // Added in 3.7 357 Name.startswith("avx512.mask.broadcastf") || // Added in 6.0 358 Name.startswith("avx512.mask.broadcasti") || // Added in 6.0 359 Name == "xop.vpcmov" || // Added in 3.8 360 Name == "xop.vpcmov.256" || // Added in 5.0 361 Name.startswith("avx512.mask.move.s") || // Added in 4.0 362 Name.startswith("avx512.cvtmask2") || // Added in 5.0 363 (Name.startswith("xop.vpcom") && // Added in 3.2 364 F->arg_size() == 2) || 365 Name.startswith("xop.vprot") || // Added in 8.0 366 Name.startswith("avx512.prol") || // Added in 8.0 367 Name.startswith("avx512.pror") || // Added in 8.0 368 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 369 Name.startswith("avx512.mask.pror.") || // Added in 8.0 370 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 371 Name.startswith("avx512.mask.prol.") || // Added in 8.0 372 Name.startswith("avx512.ptestm") || //Added in 6.0 373 Name.startswith("avx512.ptestnm") || //Added in 6.0 374 Name.startswith("sse2.pavg") || // Added in 6.0 375 Name.startswith("avx2.pavg") || // Added in 6.0 376 Name.startswith("avx512.mask.pavg")) // Added in 6.0 377 return true; 378 379 return false; 380 } 381 382 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 383 Function *&NewFn) { 384 // Only handle intrinsics that start with "x86.". 385 if (!Name.startswith("x86.")) 386 return false; 387 // Remove "x86." prefix. 388 Name = Name.substr(4); 389 390 if (ShouldUpgradeX86Intrinsic(F, Name)) { 391 NewFn = nullptr; 392 return true; 393 } 394 395 if (Name == "rdtscp") { // Added in 8.0 396 // If this intrinsic has 0 operands, it's the new version. 397 if (F->getFunctionType()->getNumParams() == 0) 398 return false; 399 400 rename(F); 401 NewFn = Intrinsic::getDeclaration(F->getParent(), 402 Intrinsic::x86_rdtscp); 403 return true; 404 } 405 406 // SSE4.1 ptest functions may have an old signature. 407 if (Name.startswith("sse41.ptest")) { // Added in 3.2 408 if (Name.substr(11) == "c") 409 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 410 if (Name.substr(11) == "z") 411 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 412 if (Name.substr(11) == "nzc") 413 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 414 } 415 // Several blend and other instructions with masks used the wrong number of 416 // bits. 417 if (Name == "sse41.insertps") // Added in 3.6 418 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 419 NewFn); 420 if (Name == "sse41.dppd") // Added in 3.6 421 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 422 NewFn); 423 if (Name == "sse41.dpps") // Added in 3.6 424 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 425 NewFn); 426 if (Name == "sse41.mpsadbw") // Added in 3.6 427 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 428 NewFn); 429 if (Name == "avx.dp.ps.256") // Added in 3.6 430 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 431 NewFn); 432 if (Name == "avx2.mpsadbw") // Added in 3.6 433 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 434 NewFn); 435 436 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 437 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 438 rename(F); 439 NewFn = Intrinsic::getDeclaration(F->getParent(), 440 Intrinsic::x86_xop_vfrcz_ss); 441 return true; 442 } 443 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 444 rename(F); 445 NewFn = Intrinsic::getDeclaration(F->getParent(), 446 Intrinsic::x86_xop_vfrcz_sd); 447 return true; 448 } 449 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 450 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 451 auto Idx = F->getFunctionType()->getParamType(2); 452 if (Idx->isFPOrFPVectorTy()) { 453 rename(F); 454 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 455 unsigned EltSize = Idx->getScalarSizeInBits(); 456 Intrinsic::ID Permil2ID; 457 if (EltSize == 64 && IdxSize == 128) 458 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 459 else if (EltSize == 32 && IdxSize == 128) 460 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 461 else if (EltSize == 64 && IdxSize == 256) 462 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 463 else 464 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 465 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 466 return true; 467 } 468 } 469 470 return false; 471 } 472 473 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 474 assert(F && "Illegal to upgrade a non-existent Function."); 475 476 // Quickly eliminate it, if it's not a candidate. 477 StringRef Name = F->getName(); 478 if (Name.size() <= 8 || !Name.startswith("llvm.")) 479 return false; 480 Name = Name.substr(5); // Strip off "llvm." 481 482 switch (Name[0]) { 483 default: break; 484 case 'a': { 485 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 486 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 487 F->arg_begin()->getType()); 488 return true; 489 } 490 if (Name.startswith("arm.neon.vclz")) { 491 Type* args[2] = { 492 F->arg_begin()->getType(), 493 Type::getInt1Ty(F->getContext()) 494 }; 495 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 496 // the end of the name. Change name from llvm.arm.neon.vclz.* to 497 // llvm.ctlz.* 498 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 499 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 500 "llvm.ctlz." + Name.substr(14), F->getParent()); 501 return true; 502 } 503 if (Name.startswith("arm.neon.vcnt")) { 504 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 505 F->arg_begin()->getType()); 506 return true; 507 } 508 Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 509 if (vldRegex.match(Name)) { 510 auto fArgs = F->getFunctionType()->params(); 511 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 512 // Can't use Intrinsic::getDeclaration here as the return types might 513 // then only be structurally equal. 514 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 515 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 516 "llvm." + Name + ".p0i8", F->getParent()); 517 return true; 518 } 519 Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 520 if (vstRegex.match(Name)) { 521 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 522 Intrinsic::arm_neon_vst2, 523 Intrinsic::arm_neon_vst3, 524 Intrinsic::arm_neon_vst4}; 525 526 static const Intrinsic::ID StoreLaneInts[] = { 527 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 528 Intrinsic::arm_neon_vst4lane 529 }; 530 531 auto fArgs = F->getFunctionType()->params(); 532 Type *Tys[] = {fArgs[0], fArgs[1]}; 533 if (Name.find("lane") == StringRef::npos) 534 NewFn = Intrinsic::getDeclaration(F->getParent(), 535 StoreInts[fArgs.size() - 3], Tys); 536 else 537 NewFn = Intrinsic::getDeclaration(F->getParent(), 538 StoreLaneInts[fArgs.size() - 5], Tys); 539 return true; 540 } 541 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 542 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 543 return true; 544 } 545 break; 546 } 547 548 case 'c': { 549 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 550 rename(F); 551 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 552 F->arg_begin()->getType()); 553 return true; 554 } 555 if (Name.startswith("cttz.") && F->arg_size() == 1) { 556 rename(F); 557 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 558 F->arg_begin()->getType()); 559 return true; 560 } 561 break; 562 } 563 case 'd': { 564 if (Name == "dbg.value" && F->arg_size() == 4) { 565 rename(F); 566 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 567 return true; 568 } 569 break; 570 } 571 case 'i': 572 case 'l': { 573 bool IsLifetimeStart = Name.startswith("lifetime.start"); 574 if (IsLifetimeStart || Name.startswith("invariant.start")) { 575 Intrinsic::ID ID = IsLifetimeStart ? 576 Intrinsic::lifetime_start : Intrinsic::invariant_start; 577 auto Args = F->getFunctionType()->params(); 578 Type* ObjectPtr[1] = {Args[1]}; 579 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 580 rename(F); 581 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 582 return true; 583 } 584 } 585 586 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 587 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 588 Intrinsic::ID ID = IsLifetimeEnd ? 589 Intrinsic::lifetime_end : Intrinsic::invariant_end; 590 591 auto Args = F->getFunctionType()->params(); 592 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 593 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 594 rename(F); 595 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 596 return true; 597 } 598 } 599 if (Name.startswith("invariant.group.barrier")) { 600 // Rename invariant.group.barrier to launder.invariant.group 601 auto Args = F->getFunctionType()->params(); 602 Type* ObjectPtr[1] = {Args[0]}; 603 rename(F); 604 NewFn = Intrinsic::getDeclaration(F->getParent(), 605 Intrinsic::launder_invariant_group, ObjectPtr); 606 return true; 607 608 } 609 610 break; 611 } 612 case 'm': { 613 if (Name.startswith("masked.load.")) { 614 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 615 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 616 rename(F); 617 NewFn = Intrinsic::getDeclaration(F->getParent(), 618 Intrinsic::masked_load, 619 Tys); 620 return true; 621 } 622 } 623 if (Name.startswith("masked.store.")) { 624 auto Args = F->getFunctionType()->params(); 625 Type *Tys[] = { Args[0], Args[1] }; 626 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 627 rename(F); 628 NewFn = Intrinsic::getDeclaration(F->getParent(), 629 Intrinsic::masked_store, 630 Tys); 631 return true; 632 } 633 } 634 // Renaming gather/scatter intrinsics with no address space overloading 635 // to the new overload which includes an address space 636 if (Name.startswith("masked.gather.")) { 637 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 638 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 639 rename(F); 640 NewFn = Intrinsic::getDeclaration(F->getParent(), 641 Intrinsic::masked_gather, Tys); 642 return true; 643 } 644 } 645 if (Name.startswith("masked.scatter.")) { 646 auto Args = F->getFunctionType()->params(); 647 Type *Tys[] = {Args[0], Args[1]}; 648 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 649 rename(F); 650 NewFn = Intrinsic::getDeclaration(F->getParent(), 651 Intrinsic::masked_scatter, Tys); 652 return true; 653 } 654 } 655 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 656 // alignment parameter to embedding the alignment as an attribute of 657 // the pointer args. 658 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 659 rename(F); 660 // Get the types of dest, src, and len 661 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 662 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 663 ParamTypes); 664 return true; 665 } 666 if (Name.startswith("memmove.") && F->arg_size() == 5) { 667 rename(F); 668 // Get the types of dest, src, and len 669 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 670 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 671 ParamTypes); 672 return true; 673 } 674 if (Name.startswith("memset.") && F->arg_size() == 5) { 675 rename(F); 676 // Get the types of dest, and len 677 const auto *FT = F->getFunctionType(); 678 Type *ParamTypes[2] = { 679 FT->getParamType(0), // Dest 680 FT->getParamType(2) // len 681 }; 682 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 683 ParamTypes); 684 return true; 685 } 686 break; 687 } 688 case 'n': { 689 if (Name.startswith("nvvm.")) { 690 Name = Name.substr(5); 691 692 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 693 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 694 .Cases("brev32", "brev64", Intrinsic::bitreverse) 695 .Case("clz.i", Intrinsic::ctlz) 696 .Case("popc.i", Intrinsic::ctpop) 697 .Default(Intrinsic::not_intrinsic); 698 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 699 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 700 {F->getReturnType()}); 701 return true; 702 } 703 704 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 705 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 706 // 707 // TODO: We could add lohi.i2d. 708 bool Expand = StringSwitch<bool>(Name) 709 .Cases("abs.i", "abs.ll", true) 710 .Cases("clz.ll", "popc.ll", "h2f", true) 711 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 712 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 713 .Default(false); 714 if (Expand) { 715 NewFn = nullptr; 716 return true; 717 } 718 } 719 break; 720 } 721 case 'o': 722 // We only need to change the name to match the mangling including the 723 // address space. 724 if (Name.startswith("objectsize.")) { 725 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 726 if (F->arg_size() == 2 || 727 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 728 rename(F); 729 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 730 Tys); 731 return true; 732 } 733 } 734 break; 735 736 case 's': 737 if (Name == "stackprotectorcheck") { 738 NewFn = nullptr; 739 return true; 740 } 741 break; 742 743 case 'x': 744 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 745 return true; 746 } 747 // Remangle our intrinsic since we upgrade the mangling 748 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 749 if (Result != None) { 750 NewFn = Result.getValue(); 751 return true; 752 } 753 754 // This may not belong here. This function is effectively being overloaded 755 // to both detect an intrinsic which needs upgrading, and to provide the 756 // upgraded form of the intrinsic. We should perhaps have two separate 757 // functions for this. 758 return false; 759 } 760 761 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 762 NewFn = nullptr; 763 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 764 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 765 766 // Upgrade intrinsic attributes. This does not change the function. 767 if (NewFn) 768 F = NewFn; 769 if (Intrinsic::ID id = F->getIntrinsicID()) 770 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 771 return Upgraded; 772 } 773 774 bool llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 775 // Nothing to do yet. 776 return false; 777 } 778 779 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 780 // to byte shuffles. 781 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 782 Value *Op, unsigned Shift) { 783 Type *ResultTy = Op->getType(); 784 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 785 786 // Bitcast from a 64-bit element type to a byte element type. 787 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 788 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 789 790 // We'll be shuffling in zeroes. 791 Value *Res = Constant::getNullValue(VecTy); 792 793 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 794 // we'll just return the zero vector. 795 if (Shift < 16) { 796 uint32_t Idxs[64]; 797 // 256/512-bit version is split into 2/4 16-byte lanes. 798 for (unsigned l = 0; l != NumElts; l += 16) 799 for (unsigned i = 0; i != 16; ++i) { 800 unsigned Idx = NumElts + i - Shift; 801 if (Idx < NumElts) 802 Idx -= NumElts - 16; // end of lane, switch operand. 803 Idxs[l + i] = Idx + l; 804 } 805 806 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 807 } 808 809 // Bitcast back to a 64-bit element type. 810 return Builder.CreateBitCast(Res, ResultTy, "cast"); 811 } 812 813 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 814 // to byte shuffles. 815 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 816 unsigned Shift) { 817 Type *ResultTy = Op->getType(); 818 unsigned NumElts = ResultTy->getVectorNumElements() * 8; 819 820 // Bitcast from a 64-bit element type to a byte element type. 821 Type *VecTy = VectorType::get(Builder.getInt8Ty(), NumElts); 822 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 823 824 // We'll be shuffling in zeroes. 825 Value *Res = Constant::getNullValue(VecTy); 826 827 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 828 // we'll just return the zero vector. 829 if (Shift < 16) { 830 uint32_t Idxs[64]; 831 // 256/512-bit version is split into 2/4 16-byte lanes. 832 for (unsigned l = 0; l != NumElts; l += 16) 833 for (unsigned i = 0; i != 16; ++i) { 834 unsigned Idx = i + Shift; 835 if (Idx >= 16) 836 Idx += NumElts - 16; // end of lane, switch operand. 837 Idxs[l + i] = Idx + l; 838 } 839 840 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 841 } 842 843 // Bitcast back to a 64-bit element type. 844 return Builder.CreateBitCast(Res, ResultTy, "cast"); 845 } 846 847 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 848 unsigned NumElts) { 849 llvm::VectorType *MaskTy = llvm::VectorType::get(Builder.getInt1Ty(), 850 cast<IntegerType>(Mask->getType())->getBitWidth()); 851 Mask = Builder.CreateBitCast(Mask, MaskTy); 852 853 // If we have less than 8 elements, then the starting mask was an i8 and 854 // we need to extract down to the right number of elements. 855 if (NumElts < 8) { 856 uint32_t Indices[4]; 857 for (unsigned i = 0; i != NumElts; ++i) 858 Indices[i] = i; 859 Mask = Builder.CreateShuffleVector(Mask, Mask, 860 makeArrayRef(Indices, NumElts), 861 "extract"); 862 } 863 864 return Mask; 865 } 866 867 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 868 Value *Op0, Value *Op1) { 869 // If the mask is all ones just emit the first operation. 870 if (const auto *C = dyn_cast<Constant>(Mask)) 871 if (C->isAllOnesValue()) 872 return Op0; 873 874 Mask = getX86MaskVec(Builder, Mask, Op0->getType()->getVectorNumElements()); 875 return Builder.CreateSelect(Mask, Op0, Op1); 876 } 877 878 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 879 Value *Op0, Value *Op1) { 880 // If the mask is all ones just emit the first operation. 881 if (const auto *C = dyn_cast<Constant>(Mask)) 882 if (C->isAllOnesValue()) 883 return Op0; 884 885 llvm::VectorType *MaskTy = 886 llvm::VectorType::get(Builder.getInt1Ty(), 887 Mask->getType()->getIntegerBitWidth()); 888 Mask = Builder.CreateBitCast(Mask, MaskTy); 889 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 890 return Builder.CreateSelect(Mask, Op0, Op1); 891 } 892 893 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 894 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 895 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 896 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 897 Value *Op1, Value *Shift, 898 Value *Passthru, Value *Mask, 899 bool IsVALIGN) { 900 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 901 902 unsigned NumElts = Op0->getType()->getVectorNumElements(); 903 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 904 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 905 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 906 907 // Mask the immediate for VALIGN. 908 if (IsVALIGN) 909 ShiftVal &= (NumElts - 1); 910 911 // If palignr is shifting the pair of vectors more than the size of two 912 // lanes, emit zero. 913 if (ShiftVal >= 32) 914 return llvm::Constant::getNullValue(Op0->getType()); 915 916 // If palignr is shifting the pair of input vectors more than one lane, 917 // but less than two lanes, convert to shifting in zeroes. 918 if (ShiftVal > 16) { 919 ShiftVal -= 16; 920 Op1 = Op0; 921 Op0 = llvm::Constant::getNullValue(Op0->getType()); 922 } 923 924 uint32_t Indices[64]; 925 // 256-bit palignr operates on 128-bit lanes so we need to handle that 926 for (unsigned l = 0; l < NumElts; l += 16) { 927 for (unsigned i = 0; i != 16; ++i) { 928 unsigned Idx = ShiftVal + i; 929 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 930 Idx += NumElts - 16; // End of lane, switch operand. 931 Indices[l + i] = Idx + l; 932 } 933 } 934 935 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 936 makeArrayRef(Indices, NumElts), 937 "palignr"); 938 939 return EmitX86Select(Builder, Mask, Align, Passthru); 940 } 941 942 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 943 bool ZeroMask, bool IndexForm) { 944 Type *Ty = CI.getType(); 945 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 946 unsigned EltWidth = Ty->getScalarSizeInBits(); 947 bool IsFloat = Ty->isFPOrFPVectorTy(); 948 Intrinsic::ID IID; 949 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 950 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 951 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 952 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 953 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 954 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 955 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 956 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 957 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 958 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 959 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 960 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 961 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 962 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 963 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 964 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 965 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 966 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 967 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 968 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 969 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 970 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 971 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 972 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 973 else if (VecWidth == 128 && EltWidth == 16) 974 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 975 else if (VecWidth == 256 && EltWidth == 16) 976 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 977 else if (VecWidth == 512 && EltWidth == 16) 978 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 979 else if (VecWidth == 128 && EltWidth == 8) 980 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 981 else if (VecWidth == 256 && EltWidth == 8) 982 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 983 else if (VecWidth == 512 && EltWidth == 8) 984 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 985 else 986 llvm_unreachable("Unexpected intrinsic"); 987 988 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 989 CI.getArgOperand(2) }; 990 991 // If this isn't index form we need to swap operand 0 and 1. 992 if (!IndexForm) 993 std::swap(Args[0], Args[1]); 994 995 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 996 Args); 997 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 998 : Builder.CreateBitCast(CI.getArgOperand(1), 999 Ty); 1000 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1001 } 1002 1003 static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1004 bool IsSigned, bool IsAddition) { 1005 Type *Ty = CI.getType(); 1006 Value *Op0 = CI.getOperand(0); 1007 Value *Op1 = CI.getOperand(1); 1008 1009 Intrinsic::ID IID = 1010 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 1011 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 1012 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1013 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1014 1015 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1016 Value *VecSrc = CI.getOperand(2); 1017 Value *Mask = CI.getOperand(3); 1018 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1019 } 1020 return Res; 1021 } 1022 1023 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1024 bool IsRotateRight) { 1025 Type *Ty = CI.getType(); 1026 Value *Src = CI.getArgOperand(0); 1027 Value *Amt = CI.getArgOperand(1); 1028 1029 // Amount may be scalar immediate, in which case create a splat vector. 1030 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1031 // we only care about the lowest log2 bits anyway. 1032 if (Amt->getType() != Ty) { 1033 unsigned NumElts = Ty->getVectorNumElements(); 1034 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1035 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1036 } 1037 1038 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1039 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1040 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1041 1042 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1043 Value *VecSrc = CI.getOperand(2); 1044 Value *Mask = CI.getOperand(3); 1045 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1046 } 1047 return Res; 1048 } 1049 1050 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1051 bool IsShiftRight, bool ZeroMask) { 1052 Type *Ty = CI.getType(); 1053 Value *Op0 = CI.getArgOperand(0); 1054 Value *Op1 = CI.getArgOperand(1); 1055 Value *Amt = CI.getArgOperand(2); 1056 1057 if (IsShiftRight) 1058 std::swap(Op0, Op1); 1059 1060 // Amount may be scalar immediate, in which case create a splat vector. 1061 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1062 // we only care about the lowest log2 bits anyway. 1063 if (Amt->getType() != Ty) { 1064 unsigned NumElts = Ty->getVectorNumElements(); 1065 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1066 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1067 } 1068 1069 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1070 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1071 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1072 1073 unsigned NumArgs = CI.getNumArgOperands(); 1074 if (NumArgs >= 4) { // For masked intrinsics. 1075 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1076 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1077 CI.getArgOperand(0); 1078 Value *Mask = CI.getOperand(NumArgs - 1); 1079 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1080 } 1081 return Res; 1082 } 1083 1084 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1085 Value *Ptr, Value *Data, Value *Mask, 1086 bool Aligned) { 1087 // Cast the pointer to the right type. 1088 Ptr = Builder.CreateBitCast(Ptr, 1089 llvm::PointerType::getUnqual(Data->getType())); 1090 unsigned Align = 1091 Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; 1092 1093 // If the mask is all ones just emit a regular store. 1094 if (const auto *C = dyn_cast<Constant>(Mask)) 1095 if (C->isAllOnesValue()) 1096 return Builder.CreateAlignedStore(Data, Ptr, Align); 1097 1098 // Convert the mask from an integer type to a vector of i1. 1099 unsigned NumElts = Data->getType()->getVectorNumElements(); 1100 Mask = getX86MaskVec(Builder, Mask, NumElts); 1101 return Builder.CreateMaskedStore(Data, Ptr, Align, Mask); 1102 } 1103 1104 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1105 Value *Ptr, Value *Passthru, Value *Mask, 1106 bool Aligned) { 1107 // Cast the pointer to the right type. 1108 Ptr = Builder.CreateBitCast(Ptr, 1109 llvm::PointerType::getUnqual(Passthru->getType())); 1110 unsigned Align = 1111 Aligned ? cast<VectorType>(Passthru->getType())->getBitWidth() / 8 : 1; 1112 1113 // If the mask is all ones just emit a regular store. 1114 if (const auto *C = dyn_cast<Constant>(Mask)) 1115 if (C->isAllOnesValue()) 1116 return Builder.CreateAlignedLoad(Ptr, Align); 1117 1118 // Convert the mask from an integer type to a vector of i1. 1119 unsigned NumElts = Passthru->getType()->getVectorNumElements(); 1120 Mask = getX86MaskVec(Builder, Mask, NumElts); 1121 return Builder.CreateMaskedLoad(Ptr, Align, Mask, Passthru); 1122 } 1123 1124 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1125 Value *Op0 = CI.getArgOperand(0); 1126 llvm::Type *Ty = Op0->getType(); 1127 Value *Zero = llvm::Constant::getNullValue(Ty); 1128 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 1129 Value *Neg = Builder.CreateNeg(Op0); 1130 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 1131 1132 if (CI.getNumArgOperands() == 3) 1133 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1134 1135 return Res; 1136 } 1137 1138 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1139 ICmpInst::Predicate Pred) { 1140 Value *Op0 = CI.getArgOperand(0); 1141 Value *Op1 = CI.getArgOperand(1); 1142 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1143 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1144 1145 if (CI.getNumArgOperands() == 4) 1146 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1147 1148 return Res; 1149 } 1150 1151 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1152 Type *Ty = CI.getType(); 1153 1154 // Arguments have a vXi32 type so cast to vXi64. 1155 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1156 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1157 1158 if (IsSigned) { 1159 // Shift left then arithmetic shift right. 1160 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1161 LHS = Builder.CreateShl(LHS, ShiftAmt); 1162 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1163 RHS = Builder.CreateShl(RHS, ShiftAmt); 1164 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1165 } else { 1166 // Clear the upper bits. 1167 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1168 LHS = Builder.CreateAnd(LHS, Mask); 1169 RHS = Builder.CreateAnd(RHS, Mask); 1170 } 1171 1172 Value *Res = Builder.CreateMul(LHS, RHS); 1173 1174 if (CI.getNumArgOperands() == 4) 1175 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1176 1177 return Res; 1178 } 1179 1180 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1181 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1182 Value *Mask) { 1183 unsigned NumElts = Vec->getType()->getVectorNumElements(); 1184 if (Mask) { 1185 const auto *C = dyn_cast<Constant>(Mask); 1186 if (!C || !C->isAllOnesValue()) 1187 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1188 } 1189 1190 if (NumElts < 8) { 1191 uint32_t Indices[8]; 1192 for (unsigned i = 0; i != NumElts; ++i) 1193 Indices[i] = i; 1194 for (unsigned i = NumElts; i != 8; ++i) 1195 Indices[i] = NumElts + i % NumElts; 1196 Vec = Builder.CreateShuffleVector(Vec, 1197 Constant::getNullValue(Vec->getType()), 1198 Indices); 1199 } 1200 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1201 } 1202 1203 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1204 unsigned CC, bool Signed) { 1205 Value *Op0 = CI.getArgOperand(0); 1206 unsigned NumElts = Op0->getType()->getVectorNumElements(); 1207 1208 Value *Cmp; 1209 if (CC == 3) { 1210 Cmp = Constant::getNullValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1211 } else if (CC == 7) { 1212 Cmp = Constant::getAllOnesValue(llvm::VectorType::get(Builder.getInt1Ty(), NumElts)); 1213 } else { 1214 ICmpInst::Predicate Pred; 1215 switch (CC) { 1216 default: llvm_unreachable("Unknown condition code"); 1217 case 0: Pred = ICmpInst::ICMP_EQ; break; 1218 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1219 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1220 case 4: Pred = ICmpInst::ICMP_NE; break; 1221 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1222 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1223 } 1224 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1225 } 1226 1227 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1228 1229 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1230 } 1231 1232 // Replace a masked intrinsic with an older unmasked intrinsic. 1233 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1234 Intrinsic::ID IID) { 1235 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1236 Value *Rep = Builder.CreateCall(Intrin, 1237 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1238 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1239 } 1240 1241 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1242 Value* A = CI.getArgOperand(0); 1243 Value* B = CI.getArgOperand(1); 1244 Value* Src = CI.getArgOperand(2); 1245 Value* Mask = CI.getArgOperand(3); 1246 1247 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1248 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1249 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1250 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1251 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1252 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1253 } 1254 1255 1256 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1257 Value* Op = CI.getArgOperand(0); 1258 Type* ReturnOp = CI.getType(); 1259 unsigned NumElts = CI.getType()->getVectorNumElements(); 1260 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1261 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1262 } 1263 1264 // Replace intrinsic with unmasked version and a select. 1265 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1266 CallInst &CI, Value *&Rep) { 1267 Name = Name.substr(12); // Remove avx512.mask. 1268 1269 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1270 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1271 Intrinsic::ID IID; 1272 if (Name.startswith("max.p")) { 1273 if (VecWidth == 128 && EltWidth == 32) 1274 IID = Intrinsic::x86_sse_max_ps; 1275 else if (VecWidth == 128 && EltWidth == 64) 1276 IID = Intrinsic::x86_sse2_max_pd; 1277 else if (VecWidth == 256 && EltWidth == 32) 1278 IID = Intrinsic::x86_avx_max_ps_256; 1279 else if (VecWidth == 256 && EltWidth == 64) 1280 IID = Intrinsic::x86_avx_max_pd_256; 1281 else 1282 llvm_unreachable("Unexpected intrinsic"); 1283 } else if (Name.startswith("min.p")) { 1284 if (VecWidth == 128 && EltWidth == 32) 1285 IID = Intrinsic::x86_sse_min_ps; 1286 else if (VecWidth == 128 && EltWidth == 64) 1287 IID = Intrinsic::x86_sse2_min_pd; 1288 else if (VecWidth == 256 && EltWidth == 32) 1289 IID = Intrinsic::x86_avx_min_ps_256; 1290 else if (VecWidth == 256 && EltWidth == 64) 1291 IID = Intrinsic::x86_avx_min_pd_256; 1292 else 1293 llvm_unreachable("Unexpected intrinsic"); 1294 } else if (Name.startswith("pshuf.b.")) { 1295 if (VecWidth == 128) 1296 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1297 else if (VecWidth == 256) 1298 IID = Intrinsic::x86_avx2_pshuf_b; 1299 else if (VecWidth == 512) 1300 IID = Intrinsic::x86_avx512_pshuf_b_512; 1301 else 1302 llvm_unreachable("Unexpected intrinsic"); 1303 } else if (Name.startswith("pmul.hr.sw.")) { 1304 if (VecWidth == 128) 1305 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1306 else if (VecWidth == 256) 1307 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1308 else if (VecWidth == 512) 1309 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1310 else 1311 llvm_unreachable("Unexpected intrinsic"); 1312 } else if (Name.startswith("pmulh.w.")) { 1313 if (VecWidth == 128) 1314 IID = Intrinsic::x86_sse2_pmulh_w; 1315 else if (VecWidth == 256) 1316 IID = Intrinsic::x86_avx2_pmulh_w; 1317 else if (VecWidth == 512) 1318 IID = Intrinsic::x86_avx512_pmulh_w_512; 1319 else 1320 llvm_unreachable("Unexpected intrinsic"); 1321 } else if (Name.startswith("pmulhu.w.")) { 1322 if (VecWidth == 128) 1323 IID = Intrinsic::x86_sse2_pmulhu_w; 1324 else if (VecWidth == 256) 1325 IID = Intrinsic::x86_avx2_pmulhu_w; 1326 else if (VecWidth == 512) 1327 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1328 else 1329 llvm_unreachable("Unexpected intrinsic"); 1330 } else if (Name.startswith("pmaddw.d.")) { 1331 if (VecWidth == 128) 1332 IID = Intrinsic::x86_sse2_pmadd_wd; 1333 else if (VecWidth == 256) 1334 IID = Intrinsic::x86_avx2_pmadd_wd; 1335 else if (VecWidth == 512) 1336 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1337 else 1338 llvm_unreachable("Unexpected intrinsic"); 1339 } else if (Name.startswith("pmaddubs.w.")) { 1340 if (VecWidth == 128) 1341 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1342 else if (VecWidth == 256) 1343 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1344 else if (VecWidth == 512) 1345 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1346 else 1347 llvm_unreachable("Unexpected intrinsic"); 1348 } else if (Name.startswith("packsswb.")) { 1349 if (VecWidth == 128) 1350 IID = Intrinsic::x86_sse2_packsswb_128; 1351 else if (VecWidth == 256) 1352 IID = Intrinsic::x86_avx2_packsswb; 1353 else if (VecWidth == 512) 1354 IID = Intrinsic::x86_avx512_packsswb_512; 1355 else 1356 llvm_unreachable("Unexpected intrinsic"); 1357 } else if (Name.startswith("packssdw.")) { 1358 if (VecWidth == 128) 1359 IID = Intrinsic::x86_sse2_packssdw_128; 1360 else if (VecWidth == 256) 1361 IID = Intrinsic::x86_avx2_packssdw; 1362 else if (VecWidth == 512) 1363 IID = Intrinsic::x86_avx512_packssdw_512; 1364 else 1365 llvm_unreachable("Unexpected intrinsic"); 1366 } else if (Name.startswith("packuswb.")) { 1367 if (VecWidth == 128) 1368 IID = Intrinsic::x86_sse2_packuswb_128; 1369 else if (VecWidth == 256) 1370 IID = Intrinsic::x86_avx2_packuswb; 1371 else if (VecWidth == 512) 1372 IID = Intrinsic::x86_avx512_packuswb_512; 1373 else 1374 llvm_unreachable("Unexpected intrinsic"); 1375 } else if (Name.startswith("packusdw.")) { 1376 if (VecWidth == 128) 1377 IID = Intrinsic::x86_sse41_packusdw; 1378 else if (VecWidth == 256) 1379 IID = Intrinsic::x86_avx2_packusdw; 1380 else if (VecWidth == 512) 1381 IID = Intrinsic::x86_avx512_packusdw_512; 1382 else 1383 llvm_unreachable("Unexpected intrinsic"); 1384 } else if (Name.startswith("vpermilvar.")) { 1385 if (VecWidth == 128 && EltWidth == 32) 1386 IID = Intrinsic::x86_avx_vpermilvar_ps; 1387 else if (VecWidth == 128 && EltWidth == 64) 1388 IID = Intrinsic::x86_avx_vpermilvar_pd; 1389 else if (VecWidth == 256 && EltWidth == 32) 1390 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1391 else if (VecWidth == 256 && EltWidth == 64) 1392 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1393 else if (VecWidth == 512 && EltWidth == 32) 1394 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1395 else if (VecWidth == 512 && EltWidth == 64) 1396 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1397 else 1398 llvm_unreachable("Unexpected intrinsic"); 1399 } else if (Name == "cvtpd2dq.256") { 1400 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1401 } else if (Name == "cvtpd2ps.256") { 1402 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1403 } else if (Name == "cvttpd2dq.256") { 1404 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1405 } else if (Name == "cvttps2dq.128") { 1406 IID = Intrinsic::x86_sse2_cvttps2dq; 1407 } else if (Name == "cvttps2dq.256") { 1408 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1409 } else if (Name.startswith("permvar.")) { 1410 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1411 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1412 IID = Intrinsic::x86_avx2_permps; 1413 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1414 IID = Intrinsic::x86_avx2_permd; 1415 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1416 IID = Intrinsic::x86_avx512_permvar_df_256; 1417 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1418 IID = Intrinsic::x86_avx512_permvar_di_256; 1419 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1420 IID = Intrinsic::x86_avx512_permvar_sf_512; 1421 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1422 IID = Intrinsic::x86_avx512_permvar_si_512; 1423 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1424 IID = Intrinsic::x86_avx512_permvar_df_512; 1425 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1426 IID = Intrinsic::x86_avx512_permvar_di_512; 1427 else if (VecWidth == 128 && EltWidth == 16) 1428 IID = Intrinsic::x86_avx512_permvar_hi_128; 1429 else if (VecWidth == 256 && EltWidth == 16) 1430 IID = Intrinsic::x86_avx512_permvar_hi_256; 1431 else if (VecWidth == 512 && EltWidth == 16) 1432 IID = Intrinsic::x86_avx512_permvar_hi_512; 1433 else if (VecWidth == 128 && EltWidth == 8) 1434 IID = Intrinsic::x86_avx512_permvar_qi_128; 1435 else if (VecWidth == 256 && EltWidth == 8) 1436 IID = Intrinsic::x86_avx512_permvar_qi_256; 1437 else if (VecWidth == 512 && EltWidth == 8) 1438 IID = Intrinsic::x86_avx512_permvar_qi_512; 1439 else 1440 llvm_unreachable("Unexpected intrinsic"); 1441 } else if (Name.startswith("dbpsadbw.")) { 1442 if (VecWidth == 128) 1443 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1444 else if (VecWidth == 256) 1445 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1446 else if (VecWidth == 512) 1447 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1448 else 1449 llvm_unreachable("Unexpected intrinsic"); 1450 } else 1451 return false; 1452 1453 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1454 CI.arg_operands().end()); 1455 Args.pop_back(); 1456 Args.pop_back(); 1457 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1458 Args); 1459 unsigned NumArgs = CI.getNumArgOperands(); 1460 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1461 CI.getArgOperand(NumArgs - 2)); 1462 return true; 1463 } 1464 1465 /// Upgrade comment in call to inline asm that represents an objc retain release 1466 /// marker. 1467 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1468 size_t Pos; 1469 if (AsmStr->find("mov\tfp") == 0 && 1470 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1471 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1472 AsmStr->replace(Pos, 1, ";"); 1473 } 1474 return; 1475 } 1476 1477 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1478 /// provided to seamlessly integrate with existing context. 1479 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1480 Function *F = CI->getCalledFunction(); 1481 LLVMContext &C = CI->getContext(); 1482 IRBuilder<> Builder(C); 1483 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1484 1485 assert(F && "Intrinsic call is not direct?"); 1486 1487 if (!NewFn) { 1488 // Get the Function's name. 1489 StringRef Name = F->getName(); 1490 1491 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1492 Name = Name.substr(5); 1493 1494 bool IsX86 = Name.startswith("x86."); 1495 if (IsX86) 1496 Name = Name.substr(4); 1497 bool IsNVVM = Name.startswith("nvvm."); 1498 if (IsNVVM) 1499 Name = Name.substr(5); 1500 1501 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1502 Module *M = F->getParent(); 1503 SmallVector<Metadata *, 1> Elts; 1504 Elts.push_back( 1505 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1506 MDNode *Node = MDNode::get(C, Elts); 1507 1508 Value *Arg0 = CI->getArgOperand(0); 1509 Value *Arg1 = CI->getArgOperand(1); 1510 1511 // Nontemporal (unaligned) store of the 0'th element of the float/double 1512 // vector. 1513 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1514 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1515 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1516 Value *Extract = 1517 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1518 1519 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, 1); 1520 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1521 1522 // Remove intrinsic. 1523 CI->eraseFromParent(); 1524 return; 1525 } 1526 1527 if (IsX86 && (Name.startswith("avx.movnt.") || 1528 Name.startswith("avx512.storent."))) { 1529 Module *M = F->getParent(); 1530 SmallVector<Metadata *, 1> Elts; 1531 Elts.push_back( 1532 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1533 MDNode *Node = MDNode::get(C, Elts); 1534 1535 Value *Arg0 = CI->getArgOperand(0); 1536 Value *Arg1 = CI->getArgOperand(1); 1537 1538 // Convert the type of the pointer to a pointer to the stored type. 1539 Value *BC = Builder.CreateBitCast(Arg0, 1540 PointerType::getUnqual(Arg1->getType()), 1541 "cast"); 1542 VectorType *VTy = cast<VectorType>(Arg1->getType()); 1543 StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC, 1544 VTy->getBitWidth() / 8); 1545 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1546 1547 // Remove intrinsic. 1548 CI->eraseFromParent(); 1549 return; 1550 } 1551 1552 if (IsX86 && Name == "sse2.storel.dq") { 1553 Value *Arg0 = CI->getArgOperand(0); 1554 Value *Arg1 = CI->getArgOperand(1); 1555 1556 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 1557 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1558 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1559 Value *BC = Builder.CreateBitCast(Arg0, 1560 PointerType::getUnqual(Elt->getType()), 1561 "cast"); 1562 Builder.CreateAlignedStore(Elt, BC, 1); 1563 1564 // Remove intrinsic. 1565 CI->eraseFromParent(); 1566 return; 1567 } 1568 1569 if (IsX86 && (Name.startswith("sse.storeu.") || 1570 Name.startswith("sse2.storeu.") || 1571 Name.startswith("avx.storeu."))) { 1572 Value *Arg0 = CI->getArgOperand(0); 1573 Value *Arg1 = CI->getArgOperand(1); 1574 1575 Arg0 = Builder.CreateBitCast(Arg0, 1576 PointerType::getUnqual(Arg1->getType()), 1577 "cast"); 1578 Builder.CreateAlignedStore(Arg1, Arg0, 1); 1579 1580 // Remove intrinsic. 1581 CI->eraseFromParent(); 1582 return; 1583 } 1584 1585 if (IsX86 && Name == "avx512.mask.store.ss") { 1586 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1587 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1588 Mask, false); 1589 1590 // Remove intrinsic. 1591 CI->eraseFromParent(); 1592 return; 1593 } 1594 1595 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1596 // "avx512.mask.storeu." or "avx512.mask.store." 1597 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1598 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1599 CI->getArgOperand(2), Aligned); 1600 1601 // Remove intrinsic. 1602 CI->eraseFromParent(); 1603 return; 1604 } 1605 1606 Value *Rep; 1607 // Upgrade packed integer vector compare intrinsics to compare instructions. 1608 if (IsX86 && (Name.startswith("sse2.pcmp") || 1609 Name.startswith("avx2.pcmp"))) { 1610 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1611 bool CmpEq = Name[9] == 'e'; 1612 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1613 CI->getArgOperand(0), CI->getArgOperand(1)); 1614 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1615 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1616 Type *ExtTy = Type::getInt32Ty(C); 1617 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1618 ExtTy = Type::getInt64Ty(C); 1619 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1620 ExtTy->getPrimitiveSizeInBits(); 1621 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1622 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1623 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1624 Name == "sse2.sqrt.sd")) { 1625 Value *Vec = CI->getArgOperand(0); 1626 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1627 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1628 Intrinsic::sqrt, Elt0->getType()); 1629 Elt0 = Builder.CreateCall(Intr, Elt0); 1630 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1631 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1632 Name.startswith("sse2.sqrt.p") || 1633 Name.startswith("sse.sqrt.p"))) { 1634 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1635 Intrinsic::sqrt, 1636 CI->getType()), 1637 {CI->getArgOperand(0)}); 1638 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1639 if (CI->getNumArgOperands() == 4 && 1640 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1641 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1642 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1643 : Intrinsic::x86_avx512_sqrt_pd_512; 1644 1645 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1646 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1647 IID), Args); 1648 } else { 1649 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1650 Intrinsic::sqrt, 1651 CI->getType()), 1652 {CI->getArgOperand(0)}); 1653 } 1654 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1655 CI->getArgOperand(1)); 1656 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1657 Name.startswith("avx512.ptestnm"))) { 1658 Value *Op0 = CI->getArgOperand(0); 1659 Value *Op1 = CI->getArgOperand(1); 1660 Value *Mask = CI->getArgOperand(2); 1661 Rep = Builder.CreateAnd(Op0, Op1); 1662 llvm::Type *Ty = Op0->getType(); 1663 Value *Zero = llvm::Constant::getNullValue(Ty); 1664 ICmpInst::Predicate Pred = 1665 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1666 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1667 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1668 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1669 unsigned NumElts = 1670 CI->getArgOperand(1)->getType()->getVectorNumElements(); 1671 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1672 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1673 CI->getArgOperand(1)); 1674 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1675 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1676 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1677 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1678 uint32_t Indices[64]; 1679 for (unsigned i = 0; i != NumElts; ++i) 1680 Indices[i] = i; 1681 1682 // First extract half of each vector. This gives better codegen than 1683 // doing it in a single shuffle. 1684 LHS = Builder.CreateShuffleVector(LHS, LHS, 1685 makeArrayRef(Indices, NumElts / 2)); 1686 RHS = Builder.CreateShuffleVector(RHS, RHS, 1687 makeArrayRef(Indices, NumElts / 2)); 1688 // Concat the vectors. 1689 // NOTE: Operands have to be swapped to match intrinsic definition. 1690 Rep = Builder.CreateShuffleVector(RHS, LHS, 1691 makeArrayRef(Indices, NumElts)); 1692 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1693 } else if (IsX86 && Name == "avx512.kand.w") { 1694 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1695 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1696 Rep = Builder.CreateAnd(LHS, RHS); 1697 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1698 } else if (IsX86 && Name == "avx512.kandn.w") { 1699 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1700 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1701 LHS = Builder.CreateNot(LHS); 1702 Rep = Builder.CreateAnd(LHS, RHS); 1703 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1704 } else if (IsX86 && Name == "avx512.kor.w") { 1705 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1706 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1707 Rep = Builder.CreateOr(LHS, RHS); 1708 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1709 } else if (IsX86 && Name == "avx512.kxor.w") { 1710 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1711 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1712 Rep = Builder.CreateXor(LHS, RHS); 1713 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1714 } else if (IsX86 && Name == "avx512.kxnor.w") { 1715 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1716 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1717 LHS = Builder.CreateNot(LHS); 1718 Rep = Builder.CreateXor(LHS, RHS); 1719 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1720 } else if (IsX86 && Name == "avx512.knot.w") { 1721 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1722 Rep = Builder.CreateNot(Rep); 1723 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1724 } else if (IsX86 && 1725 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1726 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1727 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1728 Rep = Builder.CreateOr(LHS, RHS); 1729 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1730 Value *C; 1731 if (Name[14] == 'c') 1732 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1733 else 1734 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1735 Rep = Builder.CreateICmpEQ(Rep, C); 1736 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1737 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 1738 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 1739 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 1740 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1741 Type *I32Ty = Type::getInt32Ty(C); 1742 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1743 ConstantInt::get(I32Ty, 0)); 1744 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1745 ConstantInt::get(I32Ty, 0)); 1746 Value *EltOp; 1747 if (Name.contains(".add.")) 1748 EltOp = Builder.CreateFAdd(Elt0, Elt1); 1749 else if (Name.contains(".sub.")) 1750 EltOp = Builder.CreateFSub(Elt0, Elt1); 1751 else if (Name.contains(".mul.")) 1752 EltOp = Builder.CreateFMul(Elt0, Elt1); 1753 else 1754 EltOp = Builder.CreateFDiv(Elt0, Elt1); 1755 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 1756 ConstantInt::get(I32Ty, 0)); 1757 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1758 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1759 bool CmpEq = Name[16] == 'e'; 1760 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1761 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 1762 Type *OpTy = CI->getArgOperand(0)->getType(); 1763 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1764 unsigned EltWidth = OpTy->getScalarSizeInBits(); 1765 Intrinsic::ID IID; 1766 if (VecWidth == 128 && EltWidth == 32) 1767 IID = Intrinsic::x86_avx512_fpclass_ps_128; 1768 else if (VecWidth == 256 && EltWidth == 32) 1769 IID = Intrinsic::x86_avx512_fpclass_ps_256; 1770 else if (VecWidth == 512 && EltWidth == 32) 1771 IID = Intrinsic::x86_avx512_fpclass_ps_512; 1772 else if (VecWidth == 128 && EltWidth == 64) 1773 IID = Intrinsic::x86_avx512_fpclass_pd_128; 1774 else if (VecWidth == 256 && EltWidth == 64) 1775 IID = Intrinsic::x86_avx512_fpclass_pd_256; 1776 else if (VecWidth == 512 && EltWidth == 64) 1777 IID = Intrinsic::x86_avx512_fpclass_pd_512; 1778 else 1779 llvm_unreachable("Unexpected intrinsic"); 1780 1781 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1782 { CI->getOperand(0), CI->getArgOperand(1) }); 1783 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1784 } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) { 1785 Type *OpTy = CI->getArgOperand(0)->getType(); 1786 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1787 unsigned EltWidth = OpTy->getScalarSizeInBits(); 1788 Intrinsic::ID IID; 1789 if (VecWidth == 128 && EltWidth == 32) 1790 IID = Intrinsic::x86_avx512_cmp_ps_128; 1791 else if (VecWidth == 256 && EltWidth == 32) 1792 IID = Intrinsic::x86_avx512_cmp_ps_256; 1793 else if (VecWidth == 512 && EltWidth == 32) 1794 IID = Intrinsic::x86_avx512_cmp_ps_512; 1795 else if (VecWidth == 128 && EltWidth == 64) 1796 IID = Intrinsic::x86_avx512_cmp_pd_128; 1797 else if (VecWidth == 256 && EltWidth == 64) 1798 IID = Intrinsic::x86_avx512_cmp_pd_256; 1799 else if (VecWidth == 512 && EltWidth == 64) 1800 IID = Intrinsic::x86_avx512_cmp_pd_512; 1801 else 1802 llvm_unreachable("Unexpected intrinsic"); 1803 1804 SmallVector<Value *, 4> Args; 1805 Args.push_back(CI->getArgOperand(0)); 1806 Args.push_back(CI->getArgOperand(1)); 1807 Args.push_back(CI->getArgOperand(2)); 1808 if (CI->getNumArgOperands() == 5) 1809 Args.push_back(CI->getArgOperand(4)); 1810 1811 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1812 Args); 1813 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3)); 1814 } else if (IsX86 && Name.startswith("avx512.mask.cmp.") && 1815 Name[16] != 'p') { 1816 // Integer compare intrinsics. 1817 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1818 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 1819 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 1820 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 1821 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 1822 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 1823 Name.startswith("avx512.cvtw2mask.") || 1824 Name.startswith("avx512.cvtd2mask.") || 1825 Name.startswith("avx512.cvtq2mask."))) { 1826 Value *Op = CI->getArgOperand(0); 1827 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 1828 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 1829 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 1830 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 1831 Name == "ssse3.pabs.w.128" || 1832 Name == "ssse3.pabs.d.128" || 1833 Name.startswith("avx2.pabs") || 1834 Name.startswith("avx512.mask.pabs"))) { 1835 Rep = upgradeAbs(Builder, *CI); 1836 } else if (IsX86 && (Name == "sse41.pmaxsb" || 1837 Name == "sse2.pmaxs.w" || 1838 Name == "sse41.pmaxsd" || 1839 Name.startswith("avx2.pmaxs") || 1840 Name.startswith("avx512.mask.pmaxs"))) { 1841 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 1842 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 1843 Name == "sse41.pmaxuw" || 1844 Name == "sse41.pmaxud" || 1845 Name.startswith("avx2.pmaxu") || 1846 Name.startswith("avx512.mask.pmaxu"))) { 1847 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 1848 } else if (IsX86 && (Name == "sse41.pminsb" || 1849 Name == "sse2.pmins.w" || 1850 Name == "sse41.pminsd" || 1851 Name.startswith("avx2.pmins") || 1852 Name.startswith("avx512.mask.pmins"))) { 1853 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 1854 } else if (IsX86 && (Name == "sse2.pminu.b" || 1855 Name == "sse41.pminuw" || 1856 Name == "sse41.pminud" || 1857 Name.startswith("avx2.pminu") || 1858 Name.startswith("avx512.mask.pminu"))) { 1859 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 1860 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 1861 Name == "avx2.pmulu.dq" || 1862 Name == "avx512.pmulu.dq.512" || 1863 Name.startswith("avx512.mask.pmulu.dq."))) { 1864 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 1865 } else if (IsX86 && (Name == "sse41.pmuldq" || 1866 Name == "avx2.pmul.dq" || 1867 Name == "avx512.pmul.dq.512" || 1868 Name.startswith("avx512.mask.pmul.dq."))) { 1869 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 1870 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 1871 Name == "sse2.cvtsi2sd" || 1872 Name == "sse.cvtsi642ss" || 1873 Name == "sse2.cvtsi642sd")) { 1874 Rep = Builder.CreateSIToFP(CI->getArgOperand(1), 1875 CI->getType()->getVectorElementType()); 1876 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1877 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 1878 Rep = Builder.CreateUIToFP(CI->getArgOperand(1), 1879 CI->getType()->getVectorElementType()); 1880 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1881 } else if (IsX86 && Name == "sse2.cvtss2sd") { 1882 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 1883 Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType()); 1884 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 1885 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 1886 Name == "sse2.cvtdq2ps" || 1887 Name == "avx.cvtdq2.pd.256" || 1888 Name == "avx.cvtdq2.ps.256" || 1889 Name.startswith("avx512.mask.cvtdq2pd.") || 1890 Name.startswith("avx512.mask.cvtudq2pd.") || 1891 Name == "avx512.mask.cvtdq2ps.128" || 1892 Name == "avx512.mask.cvtdq2ps.256" || 1893 Name == "avx512.mask.cvtudq2ps.128" || 1894 Name == "avx512.mask.cvtudq2ps.256" || 1895 Name == "avx512.mask.cvtqq2pd.128" || 1896 Name == "avx512.mask.cvtqq2pd.256" || 1897 Name == "avx512.mask.cvtuqq2pd.128" || 1898 Name == "avx512.mask.cvtuqq2pd.256" || 1899 Name == "sse2.cvtps2pd" || 1900 Name == "avx.cvt.ps2.pd.256" || 1901 Name == "avx512.mask.cvtps2pd.128" || 1902 Name == "avx512.mask.cvtps2pd.256")) { 1903 Type *DstTy = CI->getType(); 1904 Rep = CI->getArgOperand(0); 1905 1906 unsigned NumDstElts = DstTy->getVectorNumElements(); 1907 if (NumDstElts < Rep->getType()->getVectorNumElements()) { 1908 assert(NumDstElts == 2 && "Unexpected vector size"); 1909 uint32_t ShuffleMask[2] = { 0, 1 }; 1910 Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask); 1911 } 1912 1913 bool IsPS2PD = (StringRef::npos != Name.find("ps2")); 1914 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 1915 if (IsPS2PD) 1916 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 1917 else if (IsUnsigned) 1918 Rep = Builder.CreateUIToFP(Rep, DstTy, "cvt"); 1919 else 1920 Rep = Builder.CreateSIToFP(Rep, DstTy, "cvt"); 1921 1922 if (CI->getNumArgOperands() == 3) 1923 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1924 CI->getArgOperand(1)); 1925 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 1926 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 1927 CI->getArgOperand(1), CI->getArgOperand(2), 1928 /*Aligned*/false); 1929 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 1930 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 1931 CI->getArgOperand(1),CI->getArgOperand(2), 1932 /*Aligned*/true); 1933 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 1934 Type *ResultTy = CI->getType(); 1935 Type *PtrTy = ResultTy->getVectorElementType(); 1936 1937 // Cast the pointer to element type. 1938 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 1939 llvm::PointerType::getUnqual(PtrTy)); 1940 1941 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 1942 ResultTy->getVectorNumElements()); 1943 1944 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 1945 Intrinsic::masked_expandload, 1946 ResultTy); 1947 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 1948 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 1949 Type *ResultTy = CI->getArgOperand(1)->getType(); 1950 Type *PtrTy = ResultTy->getVectorElementType(); 1951 1952 // Cast the pointer to element type. 1953 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 1954 llvm::PointerType::getUnqual(PtrTy)); 1955 1956 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 1957 ResultTy->getVectorNumElements()); 1958 1959 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 1960 Intrinsic::masked_compressstore, 1961 ResultTy); 1962 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 1963 } else if (IsX86 && Name.startswith("xop.vpcom")) { 1964 Intrinsic::ID intID; 1965 if (Name.endswith("ub")) 1966 intID = Intrinsic::x86_xop_vpcomub; 1967 else if (Name.endswith("uw")) 1968 intID = Intrinsic::x86_xop_vpcomuw; 1969 else if (Name.endswith("ud")) 1970 intID = Intrinsic::x86_xop_vpcomud; 1971 else if (Name.endswith("uq")) 1972 intID = Intrinsic::x86_xop_vpcomuq; 1973 else if (Name.endswith("b")) 1974 intID = Intrinsic::x86_xop_vpcomb; 1975 else if (Name.endswith("w")) 1976 intID = Intrinsic::x86_xop_vpcomw; 1977 else if (Name.endswith("d")) 1978 intID = Intrinsic::x86_xop_vpcomd; 1979 else if (Name.endswith("q")) 1980 intID = Intrinsic::x86_xop_vpcomq; 1981 else 1982 llvm_unreachable("Unknown suffix"); 1983 1984 Name = Name.substr(9); // strip off "xop.vpcom" 1985 unsigned Imm; 1986 if (Name.startswith("lt")) 1987 Imm = 0; 1988 else if (Name.startswith("le")) 1989 Imm = 1; 1990 else if (Name.startswith("gt")) 1991 Imm = 2; 1992 else if (Name.startswith("ge")) 1993 Imm = 3; 1994 else if (Name.startswith("eq")) 1995 Imm = 4; 1996 else if (Name.startswith("ne")) 1997 Imm = 5; 1998 else if (Name.startswith("false")) 1999 Imm = 6; 2000 else if (Name.startswith("true")) 2001 Imm = 7; 2002 else 2003 llvm_unreachable("Unknown condition"); 2004 2005 Function *VPCOM = Intrinsic::getDeclaration(F->getParent(), intID); 2006 Rep = 2007 Builder.CreateCall(VPCOM, {CI->getArgOperand(0), CI->getArgOperand(1), 2008 Builder.getInt8(Imm)}); 2009 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2010 Value *Sel = CI->getArgOperand(2); 2011 Value *NotSel = Builder.CreateNot(Sel); 2012 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2013 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2014 Rep = Builder.CreateOr(Sel0, Sel1); 2015 } else if (IsX86 && (Name.startswith("xop.vprot") || 2016 Name.startswith("avx512.prol") || 2017 Name.startswith("avx512.mask.prol"))) { 2018 Rep = upgradeX86Rotate(Builder, *CI, false); 2019 } else if (IsX86 && (Name.startswith("avx512.pror") || 2020 Name.startswith("avx512.mask.pror"))) { 2021 Rep = upgradeX86Rotate(Builder, *CI, true); 2022 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2023 Name.startswith("avx512.mask.vpshld") || 2024 Name.startswith("avx512.maskz.vpshld"))) { 2025 bool ZeroMask = Name[11] == 'z'; 2026 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2027 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2028 Name.startswith("avx512.mask.vpshrd") || 2029 Name.startswith("avx512.maskz.vpshrd"))) { 2030 bool ZeroMask = Name[11] == 'z'; 2031 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2032 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2033 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2034 Intrinsic::x86_sse42_crc32_32_8); 2035 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2036 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2037 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2038 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2039 Name.startswith("avx512.vbroadcast.s"))) { 2040 // Replace broadcasts with a series of insertelements. 2041 Type *VecTy = CI->getType(); 2042 Type *EltTy = VecTy->getVectorElementType(); 2043 unsigned EltNum = VecTy->getVectorNumElements(); 2044 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2045 EltTy->getPointerTo()); 2046 Value *Load = Builder.CreateLoad(EltTy, Cast); 2047 Type *I32Ty = Type::getInt32Ty(C); 2048 Rep = UndefValue::get(VecTy); 2049 for (unsigned I = 0; I < EltNum; ++I) 2050 Rep = Builder.CreateInsertElement(Rep, Load, 2051 ConstantInt::get(I32Ty, I)); 2052 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2053 Name.startswith("sse41.pmovzx") || 2054 Name.startswith("avx2.pmovsx") || 2055 Name.startswith("avx2.pmovzx") || 2056 Name.startswith("avx512.mask.pmovsx") || 2057 Name.startswith("avx512.mask.pmovzx"))) { 2058 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 2059 VectorType *DstTy = cast<VectorType>(CI->getType()); 2060 unsigned NumDstElts = DstTy->getNumElements(); 2061 2062 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2063 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 2064 for (unsigned i = 0; i != NumDstElts; ++i) 2065 ShuffleMask[i] = i; 2066 2067 Value *SV = Builder.CreateShuffleVector( 2068 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2069 2070 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2071 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2072 : Builder.CreateZExt(SV, DstTy); 2073 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2074 if (CI->getNumArgOperands() == 3) 2075 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2076 CI->getArgOperand(1)); 2077 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2078 Name == "avx2.vbroadcasti128")) { 2079 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2080 Type *EltTy = CI->getType()->getVectorElementType(); 2081 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2082 Type *VT = VectorType::get(EltTy, NumSrcElts); 2083 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2084 PointerType::getUnqual(VT)); 2085 Value *Load = Builder.CreateAlignedLoad(Op, 1); 2086 if (NumSrcElts == 2) 2087 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2088 { 0, 1, 0, 1 }); 2089 else 2090 Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2091 { 0, 1, 2, 3, 0, 1, 2, 3 }); 2092 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2093 Name.startswith("avx512.mask.shuf.f"))) { 2094 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2095 Type *VT = CI->getType(); 2096 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2097 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2098 unsigned ControlBitsMask = NumLanes - 1; 2099 unsigned NumControlBits = NumLanes / 2; 2100 SmallVector<uint32_t, 8> ShuffleMask(0); 2101 2102 for (unsigned l = 0; l != NumLanes; ++l) { 2103 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2104 // We actually need the other source. 2105 if (l >= NumLanes / 2) 2106 LaneMask += NumLanes; 2107 for (unsigned i = 0; i != NumElementsInLane; ++i) 2108 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2109 } 2110 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2111 CI->getArgOperand(1), ShuffleMask); 2112 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2113 CI->getArgOperand(3)); 2114 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2115 Name.startswith("avx512.mask.broadcasti"))) { 2116 unsigned NumSrcElts = 2117 CI->getArgOperand(0)->getType()->getVectorNumElements(); 2118 unsigned NumDstElts = CI->getType()->getVectorNumElements(); 2119 2120 SmallVector<uint32_t, 8> ShuffleMask(NumDstElts); 2121 for (unsigned i = 0; i != NumDstElts; ++i) 2122 ShuffleMask[i] = i % NumSrcElts; 2123 2124 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2125 CI->getArgOperand(0), 2126 ShuffleMask); 2127 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2128 CI->getArgOperand(1)); 2129 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2130 Name.startswith("avx2.vbroadcast") || 2131 Name.startswith("avx512.pbroadcast") || 2132 Name.startswith("avx512.mask.broadcast.s"))) { 2133 // Replace vp?broadcasts with a vector shuffle. 2134 Value *Op = CI->getArgOperand(0); 2135 unsigned NumElts = CI->getType()->getVectorNumElements(); 2136 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); 2137 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2138 Constant::getNullValue(MaskTy)); 2139 2140 if (CI->getNumArgOperands() == 3) 2141 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2142 CI->getArgOperand(1)); 2143 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2144 Name.startswith("sse2.psubs.") || 2145 Name.startswith("avx2.padds.") || 2146 Name.startswith("avx2.psubs.") || 2147 Name.startswith("avx512.padds.") || 2148 Name.startswith("avx512.psubs.") || 2149 Name.startswith("avx512.mask.padds.") || 2150 Name.startswith("avx512.mask.psubs."))) { 2151 bool IsAdd = Name.contains(".padds"); 2152 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); 2153 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2154 Name.startswith("sse2.psubus.") || 2155 Name.startswith("avx2.paddus.") || 2156 Name.startswith("avx2.psubus.") || 2157 Name.startswith("avx512.mask.paddus.") || 2158 Name.startswith("avx512.mask.psubus."))) { 2159 bool IsAdd = Name.contains(".paddus"); 2160 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); 2161 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2162 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2163 CI->getArgOperand(1), 2164 CI->getArgOperand(2), 2165 CI->getArgOperand(3), 2166 CI->getArgOperand(4), 2167 false); 2168 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2169 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2170 CI->getArgOperand(1), 2171 CI->getArgOperand(2), 2172 CI->getArgOperand(3), 2173 CI->getArgOperand(4), 2174 true); 2175 } else if (IsX86 && (Name == "sse2.psll.dq" || 2176 Name == "avx2.psll.dq")) { 2177 // 128/256-bit shift left specified in bits. 2178 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2179 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2180 Shift / 8); // Shift is in bits. 2181 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2182 Name == "avx2.psrl.dq")) { 2183 // 128/256-bit shift right specified in bits. 2184 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2185 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2186 Shift / 8); // Shift is in bits. 2187 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2188 Name == "avx2.psll.dq.bs" || 2189 Name == "avx512.psll.dq.512")) { 2190 // 128/256/512-bit shift left specified in bytes. 2191 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2192 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2193 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2194 Name == "avx2.psrl.dq.bs" || 2195 Name == "avx512.psrl.dq.512")) { 2196 // 128/256/512-bit shift right specified in bytes. 2197 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2198 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2199 } else if (IsX86 && (Name == "sse41.pblendw" || 2200 Name.startswith("sse41.blendp") || 2201 Name.startswith("avx.blend.p") || 2202 Name == "avx2.pblendw" || 2203 Name.startswith("avx2.pblendd."))) { 2204 Value *Op0 = CI->getArgOperand(0); 2205 Value *Op1 = CI->getArgOperand(1); 2206 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2207 VectorType *VecTy = cast<VectorType>(CI->getType()); 2208 unsigned NumElts = VecTy->getNumElements(); 2209 2210 SmallVector<uint32_t, 16> Idxs(NumElts); 2211 for (unsigned i = 0; i != NumElts; ++i) 2212 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2213 2214 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2215 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2216 Name == "avx2.vinserti128" || 2217 Name.startswith("avx512.mask.insert"))) { 2218 Value *Op0 = CI->getArgOperand(0); 2219 Value *Op1 = CI->getArgOperand(1); 2220 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2221 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 2222 unsigned SrcNumElts = Op1->getType()->getVectorNumElements(); 2223 unsigned Scale = DstNumElts / SrcNumElts; 2224 2225 // Mask off the high bits of the immediate value; hardware ignores those. 2226 Imm = Imm % Scale; 2227 2228 // Extend the second operand into a vector the size of the destination. 2229 Value *UndefV = UndefValue::get(Op1->getType()); 2230 SmallVector<uint32_t, 8> Idxs(DstNumElts); 2231 for (unsigned i = 0; i != SrcNumElts; ++i) 2232 Idxs[i] = i; 2233 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2234 Idxs[i] = SrcNumElts; 2235 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2236 2237 // Insert the second operand into the first operand. 2238 2239 // Note that there is no guarantee that instruction lowering will actually 2240 // produce a vinsertf128 instruction for the created shuffles. In 2241 // particular, the 0 immediate case involves no lane changes, so it can 2242 // be handled as a blend. 2243 2244 // Example of shuffle mask for 32-bit elements: 2245 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2246 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2247 2248 // First fill with identify mask. 2249 for (unsigned i = 0; i != DstNumElts; ++i) 2250 Idxs[i] = i; 2251 // Then replace the elements where we need to insert. 2252 for (unsigned i = 0; i != SrcNumElts; ++i) 2253 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2254 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2255 2256 // If the intrinsic has a mask operand, handle that. 2257 if (CI->getNumArgOperands() == 5) 2258 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2259 CI->getArgOperand(3)); 2260 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2261 Name == "avx2.vextracti128" || 2262 Name.startswith("avx512.mask.vextract"))) { 2263 Value *Op0 = CI->getArgOperand(0); 2264 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2265 unsigned DstNumElts = CI->getType()->getVectorNumElements(); 2266 unsigned SrcNumElts = Op0->getType()->getVectorNumElements(); 2267 unsigned Scale = SrcNumElts / DstNumElts; 2268 2269 // Mask off the high bits of the immediate value; hardware ignores those. 2270 Imm = Imm % Scale; 2271 2272 // Get indexes for the subvector of the input vector. 2273 SmallVector<uint32_t, 8> Idxs(DstNumElts); 2274 for (unsigned i = 0; i != DstNumElts; ++i) { 2275 Idxs[i] = i + (Imm * DstNumElts); 2276 } 2277 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2278 2279 // If the intrinsic has a mask operand, handle that. 2280 if (CI->getNumArgOperands() == 4) 2281 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2282 CI->getArgOperand(2)); 2283 } else if (!IsX86 && Name == "stackprotectorcheck") { 2284 Rep = nullptr; 2285 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2286 Name.startswith("avx512.mask.perm.di."))) { 2287 Value *Op0 = CI->getArgOperand(0); 2288 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2289 VectorType *VecTy = cast<VectorType>(CI->getType()); 2290 unsigned NumElts = VecTy->getNumElements(); 2291 2292 SmallVector<uint32_t, 8> Idxs(NumElts); 2293 for (unsigned i = 0; i != NumElts; ++i) 2294 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2295 2296 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2297 2298 if (CI->getNumArgOperands() == 4) 2299 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2300 CI->getArgOperand(2)); 2301 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2302 Name == "avx2.vperm2i128")) { 2303 // The immediate permute control byte looks like this: 2304 // [1:0] - select 128 bits from sources for low half of destination 2305 // [2] - ignore 2306 // [3] - zero low half of destination 2307 // [5:4] - select 128 bits from sources for high half of destination 2308 // [6] - ignore 2309 // [7] - zero high half of destination 2310 2311 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2312 2313 unsigned NumElts = CI->getType()->getVectorNumElements(); 2314 unsigned HalfSize = NumElts / 2; 2315 SmallVector<uint32_t, 8> ShuffleMask(NumElts); 2316 2317 // Determine which operand(s) are actually in use for this instruction. 2318 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2319 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2320 2321 // If needed, replace operands based on zero mask. 2322 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2323 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2324 2325 // Permute low half of result. 2326 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2327 for (unsigned i = 0; i < HalfSize; ++i) 2328 ShuffleMask[i] = StartIndex + i; 2329 2330 // Permute high half of result. 2331 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2332 for (unsigned i = 0; i < HalfSize; ++i) 2333 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2334 2335 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2336 2337 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2338 Name == "sse2.pshuf.d" || 2339 Name.startswith("avx512.mask.vpermil.p") || 2340 Name.startswith("avx512.mask.pshuf.d."))) { 2341 Value *Op0 = CI->getArgOperand(0); 2342 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2343 VectorType *VecTy = cast<VectorType>(CI->getType()); 2344 unsigned NumElts = VecTy->getNumElements(); 2345 // Calculate the size of each index in the immediate. 2346 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2347 unsigned IdxMask = ((1 << IdxSize) - 1); 2348 2349 SmallVector<uint32_t, 8> Idxs(NumElts); 2350 // Lookup the bits for this element, wrapping around the immediate every 2351 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2352 // to offset by the first index of each group. 2353 for (unsigned i = 0; i != NumElts; ++i) 2354 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2355 2356 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2357 2358 if (CI->getNumArgOperands() == 4) 2359 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2360 CI->getArgOperand(2)); 2361 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2362 Name.startswith("avx512.mask.pshufl.w."))) { 2363 Value *Op0 = CI->getArgOperand(0); 2364 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2365 unsigned NumElts = CI->getType()->getVectorNumElements(); 2366 2367 SmallVector<uint32_t, 16> Idxs(NumElts); 2368 for (unsigned l = 0; l != NumElts; l += 8) { 2369 for (unsigned i = 0; i != 4; ++i) 2370 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2371 for (unsigned i = 4; i != 8; ++i) 2372 Idxs[i + l] = i + l; 2373 } 2374 2375 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2376 2377 if (CI->getNumArgOperands() == 4) 2378 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2379 CI->getArgOperand(2)); 2380 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2381 Name.startswith("avx512.mask.pshufh.w."))) { 2382 Value *Op0 = CI->getArgOperand(0); 2383 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2384 unsigned NumElts = CI->getType()->getVectorNumElements(); 2385 2386 SmallVector<uint32_t, 16> Idxs(NumElts); 2387 for (unsigned l = 0; l != NumElts; l += 8) { 2388 for (unsigned i = 0; i != 4; ++i) 2389 Idxs[i + l] = i + l; 2390 for (unsigned i = 0; i != 4; ++i) 2391 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2392 } 2393 2394 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2395 2396 if (CI->getNumArgOperands() == 4) 2397 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2398 CI->getArgOperand(2)); 2399 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2400 Value *Op0 = CI->getArgOperand(0); 2401 Value *Op1 = CI->getArgOperand(1); 2402 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2403 unsigned NumElts = CI->getType()->getVectorNumElements(); 2404 2405 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2406 unsigned HalfLaneElts = NumLaneElts / 2; 2407 2408 SmallVector<uint32_t, 16> Idxs(NumElts); 2409 for (unsigned i = 0; i != NumElts; ++i) { 2410 // Base index is the starting element of the lane. 2411 Idxs[i] = i - (i % NumLaneElts); 2412 // If we are half way through the lane switch to the other source. 2413 if ((i % NumLaneElts) >= HalfLaneElts) 2414 Idxs[i] += NumElts; 2415 // Now select the specific element. By adding HalfLaneElts bits from 2416 // the immediate. Wrapping around the immediate every 8-bits. 2417 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2418 } 2419 2420 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2421 2422 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2423 CI->getArgOperand(3)); 2424 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2425 Name.startswith("avx512.mask.movshdup") || 2426 Name.startswith("avx512.mask.movsldup"))) { 2427 Value *Op0 = CI->getArgOperand(0); 2428 unsigned NumElts = CI->getType()->getVectorNumElements(); 2429 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2430 2431 unsigned Offset = 0; 2432 if (Name.startswith("avx512.mask.movshdup.")) 2433 Offset = 1; 2434 2435 SmallVector<uint32_t, 16> Idxs(NumElts); 2436 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2437 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2438 Idxs[i + l + 0] = i + l + Offset; 2439 Idxs[i + l + 1] = i + l + Offset; 2440 } 2441 2442 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2443 2444 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2445 CI->getArgOperand(1)); 2446 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2447 Name.startswith("avx512.mask.unpckl."))) { 2448 Value *Op0 = CI->getArgOperand(0); 2449 Value *Op1 = CI->getArgOperand(1); 2450 int NumElts = CI->getType()->getVectorNumElements(); 2451 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2452 2453 SmallVector<uint32_t, 64> Idxs(NumElts); 2454 for (int l = 0; l != NumElts; l += NumLaneElts) 2455 for (int i = 0; i != NumLaneElts; ++i) 2456 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2457 2458 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2459 2460 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2461 CI->getArgOperand(2)); 2462 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2463 Name.startswith("avx512.mask.unpckh."))) { 2464 Value *Op0 = CI->getArgOperand(0); 2465 Value *Op1 = CI->getArgOperand(1); 2466 int NumElts = CI->getType()->getVectorNumElements(); 2467 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2468 2469 SmallVector<uint32_t, 64> Idxs(NumElts); 2470 for (int l = 0; l != NumElts; l += NumLaneElts) 2471 for (int i = 0; i != NumLaneElts; ++i) 2472 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2473 2474 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2475 2476 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2477 CI->getArgOperand(2)); 2478 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2479 Name.startswith("avx512.mask.pand."))) { 2480 VectorType *FTy = cast<VectorType>(CI->getType()); 2481 VectorType *ITy = VectorType::getInteger(FTy); 2482 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2483 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2484 Rep = Builder.CreateBitCast(Rep, FTy); 2485 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2486 CI->getArgOperand(2)); 2487 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2488 Name.startswith("avx512.mask.pandn."))) { 2489 VectorType *FTy = cast<VectorType>(CI->getType()); 2490 VectorType *ITy = VectorType::getInteger(FTy); 2491 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2492 Rep = Builder.CreateAnd(Rep, 2493 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2494 Rep = Builder.CreateBitCast(Rep, FTy); 2495 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2496 CI->getArgOperand(2)); 2497 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2498 Name.startswith("avx512.mask.por."))) { 2499 VectorType *FTy = cast<VectorType>(CI->getType()); 2500 VectorType *ITy = VectorType::getInteger(FTy); 2501 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2502 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2503 Rep = Builder.CreateBitCast(Rep, FTy); 2504 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2505 CI->getArgOperand(2)); 2506 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2507 Name.startswith("avx512.mask.pxor."))) { 2508 VectorType *FTy = cast<VectorType>(CI->getType()); 2509 VectorType *ITy = VectorType::getInteger(FTy); 2510 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2511 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2512 Rep = Builder.CreateBitCast(Rep, FTy); 2513 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2514 CI->getArgOperand(2)); 2515 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2516 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2517 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2518 CI->getArgOperand(2)); 2519 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2520 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2521 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2522 CI->getArgOperand(2)); 2523 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2524 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2525 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2526 CI->getArgOperand(2)); 2527 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2528 if (Name.endswith(".512")) { 2529 Intrinsic::ID IID; 2530 if (Name[17] == 's') 2531 IID = Intrinsic::x86_avx512_add_ps_512; 2532 else 2533 IID = Intrinsic::x86_avx512_add_pd_512; 2534 2535 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2536 { CI->getArgOperand(0), CI->getArgOperand(1), 2537 CI->getArgOperand(4) }); 2538 } else { 2539 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2540 } 2541 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2542 CI->getArgOperand(2)); 2543 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2544 if (Name.endswith(".512")) { 2545 Intrinsic::ID IID; 2546 if (Name[17] == 's') 2547 IID = Intrinsic::x86_avx512_div_ps_512; 2548 else 2549 IID = Intrinsic::x86_avx512_div_pd_512; 2550 2551 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2552 { CI->getArgOperand(0), CI->getArgOperand(1), 2553 CI->getArgOperand(4) }); 2554 } else { 2555 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2556 } 2557 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2558 CI->getArgOperand(2)); 2559 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2560 if (Name.endswith(".512")) { 2561 Intrinsic::ID IID; 2562 if (Name[17] == 's') 2563 IID = Intrinsic::x86_avx512_mul_ps_512; 2564 else 2565 IID = Intrinsic::x86_avx512_mul_pd_512; 2566 2567 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2568 { CI->getArgOperand(0), CI->getArgOperand(1), 2569 CI->getArgOperand(4) }); 2570 } else { 2571 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2572 } 2573 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2574 CI->getArgOperand(2)); 2575 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2576 if (Name.endswith(".512")) { 2577 Intrinsic::ID IID; 2578 if (Name[17] == 's') 2579 IID = Intrinsic::x86_avx512_sub_ps_512; 2580 else 2581 IID = Intrinsic::x86_avx512_sub_pd_512; 2582 2583 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2584 { CI->getArgOperand(0), CI->getArgOperand(1), 2585 CI->getArgOperand(4) }); 2586 } else { 2587 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2588 } 2589 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2590 CI->getArgOperand(2)); 2591 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2592 Name.startswith("avx512.mask.min.p")) && 2593 Name.drop_front(18) == ".512") { 2594 bool IsDouble = Name[17] == 'd'; 2595 bool IsMin = Name[13] == 'i'; 2596 static const Intrinsic::ID MinMaxTbl[2][2] = { 2597 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2598 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2599 }; 2600 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2601 2602 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2603 { CI->getArgOperand(0), CI->getArgOperand(1), 2604 CI->getArgOperand(4) }); 2605 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2606 CI->getArgOperand(2)); 2607 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2608 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2609 Intrinsic::ctlz, 2610 CI->getType()), 2611 { CI->getArgOperand(0), Builder.getInt1(false) }); 2612 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2613 CI->getArgOperand(1)); 2614 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2615 bool IsImmediate = Name[16] == 'i' || 2616 (Name.size() > 18 && Name[18] == 'i'); 2617 bool IsVariable = Name[16] == 'v'; 2618 char Size = Name[16] == '.' ? Name[17] : 2619 Name[17] == '.' ? Name[18] : 2620 Name[18] == '.' ? Name[19] : 2621 Name[20]; 2622 2623 Intrinsic::ID IID; 2624 if (IsVariable && Name[17] != '.') { 2625 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2626 IID = Intrinsic::x86_avx2_psllv_q; 2627 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2628 IID = Intrinsic::x86_avx2_psllv_q_256; 2629 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2630 IID = Intrinsic::x86_avx2_psllv_d; 2631 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2632 IID = Intrinsic::x86_avx2_psllv_d_256; 2633 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2634 IID = Intrinsic::x86_avx512_psllv_w_128; 2635 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2636 IID = Intrinsic::x86_avx512_psllv_w_256; 2637 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2638 IID = Intrinsic::x86_avx512_psllv_w_512; 2639 else 2640 llvm_unreachable("Unexpected size"); 2641 } else if (Name.endswith(".128")) { 2642 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2643 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2644 : Intrinsic::x86_sse2_psll_d; 2645 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2646 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2647 : Intrinsic::x86_sse2_psll_q; 2648 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2649 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2650 : Intrinsic::x86_sse2_psll_w; 2651 else 2652 llvm_unreachable("Unexpected size"); 2653 } else if (Name.endswith(".256")) { 2654 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2655 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2656 : Intrinsic::x86_avx2_psll_d; 2657 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2658 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2659 : Intrinsic::x86_avx2_psll_q; 2660 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2661 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2662 : Intrinsic::x86_avx2_psll_w; 2663 else 2664 llvm_unreachable("Unexpected size"); 2665 } else { 2666 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2667 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2668 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2669 Intrinsic::x86_avx512_psll_d_512; 2670 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2671 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2672 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2673 Intrinsic::x86_avx512_psll_q_512; 2674 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2675 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2676 : Intrinsic::x86_avx512_psll_w_512; 2677 else 2678 llvm_unreachable("Unexpected size"); 2679 } 2680 2681 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2682 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2683 bool IsImmediate = Name[16] == 'i' || 2684 (Name.size() > 18 && Name[18] == 'i'); 2685 bool IsVariable = Name[16] == 'v'; 2686 char Size = Name[16] == '.' ? Name[17] : 2687 Name[17] == '.' ? Name[18] : 2688 Name[18] == '.' ? Name[19] : 2689 Name[20]; 2690 2691 Intrinsic::ID IID; 2692 if (IsVariable && Name[17] != '.') { 2693 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2694 IID = Intrinsic::x86_avx2_psrlv_q; 2695 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2696 IID = Intrinsic::x86_avx2_psrlv_q_256; 2697 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2698 IID = Intrinsic::x86_avx2_psrlv_d; 2699 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2700 IID = Intrinsic::x86_avx2_psrlv_d_256; 2701 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2702 IID = Intrinsic::x86_avx512_psrlv_w_128; 2703 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2704 IID = Intrinsic::x86_avx512_psrlv_w_256; 2705 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2706 IID = Intrinsic::x86_avx512_psrlv_w_512; 2707 else 2708 llvm_unreachable("Unexpected size"); 2709 } else if (Name.endswith(".128")) { 2710 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2711 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2712 : Intrinsic::x86_sse2_psrl_d; 2713 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2714 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2715 : Intrinsic::x86_sse2_psrl_q; 2716 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2717 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2718 : Intrinsic::x86_sse2_psrl_w; 2719 else 2720 llvm_unreachable("Unexpected size"); 2721 } else if (Name.endswith(".256")) { 2722 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2723 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2724 : Intrinsic::x86_avx2_psrl_d; 2725 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2726 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2727 : Intrinsic::x86_avx2_psrl_q; 2728 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2729 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2730 : Intrinsic::x86_avx2_psrl_w; 2731 else 2732 llvm_unreachable("Unexpected size"); 2733 } else { 2734 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2735 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2736 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2737 Intrinsic::x86_avx512_psrl_d_512; 2738 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2739 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2740 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2741 Intrinsic::x86_avx512_psrl_q_512; 2742 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 2743 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 2744 : Intrinsic::x86_avx512_psrl_w_512; 2745 else 2746 llvm_unreachable("Unexpected size"); 2747 } 2748 2749 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2750 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 2751 bool IsImmediate = Name[16] == 'i' || 2752 (Name.size() > 18 && Name[18] == 'i'); 2753 bool IsVariable = Name[16] == 'v'; 2754 char Size = Name[16] == '.' ? Name[17] : 2755 Name[17] == '.' ? Name[18] : 2756 Name[18] == '.' ? Name[19] : 2757 Name[20]; 2758 2759 Intrinsic::ID IID; 2760 if (IsVariable && Name[17] != '.') { 2761 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 2762 IID = Intrinsic::x86_avx2_psrav_d; 2763 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 2764 IID = Intrinsic::x86_avx2_psrav_d_256; 2765 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 2766 IID = Intrinsic::x86_avx512_psrav_w_128; 2767 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 2768 IID = Intrinsic::x86_avx512_psrav_w_256; 2769 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 2770 IID = Intrinsic::x86_avx512_psrav_w_512; 2771 else 2772 llvm_unreachable("Unexpected size"); 2773 } else if (Name.endswith(".128")) { 2774 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 2775 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 2776 : Intrinsic::x86_sse2_psra_d; 2777 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 2778 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 2779 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 2780 Intrinsic::x86_avx512_psra_q_128; 2781 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 2782 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 2783 : Intrinsic::x86_sse2_psra_w; 2784 else 2785 llvm_unreachable("Unexpected size"); 2786 } else if (Name.endswith(".256")) { 2787 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 2788 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 2789 : Intrinsic::x86_avx2_psra_d; 2790 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 2791 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 2792 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 2793 Intrinsic::x86_avx512_psra_q_256; 2794 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 2795 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 2796 : Intrinsic::x86_avx2_psra_w; 2797 else 2798 llvm_unreachable("Unexpected size"); 2799 } else { 2800 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 2801 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 2802 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 2803 Intrinsic::x86_avx512_psra_d_512; 2804 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 2805 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 2806 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 2807 Intrinsic::x86_avx512_psra_q_512; 2808 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 2809 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 2810 : Intrinsic::x86_avx512_psra_w_512; 2811 else 2812 llvm_unreachable("Unexpected size"); 2813 } 2814 2815 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2816 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 2817 Rep = upgradeMaskedMove(Builder, *CI); 2818 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 2819 Rep = UpgradeMaskToInt(Builder, *CI); 2820 } else if (IsX86 && Name.endswith(".movntdqa")) { 2821 Module *M = F->getParent(); 2822 MDNode *Node = MDNode::get( 2823 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 2824 2825 Value *Ptr = CI->getArgOperand(0); 2826 VectorType *VTy = cast<VectorType>(CI->getType()); 2827 2828 // Convert the type of the pointer to a pointer to the stored type. 2829 Value *BC = 2830 Builder.CreateBitCast(Ptr, PointerType::getUnqual(VTy), "cast"); 2831 LoadInst *LI = Builder.CreateAlignedLoad(BC, VTy->getBitWidth() / 8); 2832 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 2833 Rep = LI; 2834 } else if (IsX86 && 2835 (Name.startswith("sse2.pavg") || Name.startswith("avx2.pavg") || 2836 Name.startswith("avx512.mask.pavg"))) { 2837 // llvm.x86.sse2.pavg.b/w, llvm.x86.avx2.pavg.b/w, 2838 // llvm.x86.avx512.mask.pavg.b/w 2839 Value *A = CI->getArgOperand(0); 2840 Value *B = CI->getArgOperand(1); 2841 VectorType *ZextType = VectorType::getExtendedElementVectorType( 2842 cast<VectorType>(A->getType())); 2843 Value *ExtendedA = Builder.CreateZExt(A, ZextType); 2844 Value *ExtendedB = Builder.CreateZExt(B, ZextType); 2845 Value *Sum = Builder.CreateAdd(ExtendedA, ExtendedB); 2846 Value *AddOne = Builder.CreateAdd(Sum, ConstantInt::get(ZextType, 1)); 2847 Value *ShiftR = Builder.CreateLShr(AddOne, ConstantInt::get(ZextType, 1)); 2848 Rep = Builder.CreateTrunc(ShiftR, A->getType()); 2849 if (CI->getNumArgOperands() > 2) { 2850 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2851 CI->getArgOperand(2)); 2852 } 2853 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 2854 Name.startswith("fma.vfmsub.") || 2855 Name.startswith("fma.vfnmadd.") || 2856 Name.startswith("fma.vfnmsub."))) { 2857 bool NegMul = Name[6] == 'n'; 2858 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 2859 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 2860 2861 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 2862 CI->getArgOperand(2) }; 2863 2864 if (IsScalar) { 2865 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 2866 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 2867 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 2868 } 2869 2870 if (NegMul && !IsScalar) 2871 Ops[0] = Builder.CreateFNeg(Ops[0]); 2872 if (NegMul && IsScalar) 2873 Ops[1] = Builder.CreateFNeg(Ops[1]); 2874 if (NegAcc) 2875 Ops[2] = Builder.CreateFNeg(Ops[2]); 2876 2877 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 2878 Intrinsic::fma, 2879 Ops[0]->getType()), 2880 Ops); 2881 2882 if (IsScalar) 2883 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 2884 (uint64_t)0); 2885 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 2886 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 2887 CI->getArgOperand(2) }; 2888 2889 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 2890 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 2891 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 2892 2893 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 2894 Intrinsic::fma, 2895 Ops[0]->getType()), 2896 Ops); 2897 2898 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 2899 Rep, (uint64_t)0); 2900 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 2901 Name.startswith("avx512.maskz.vfmadd.s") || 2902 Name.startswith("avx512.mask3.vfmadd.s") || 2903 Name.startswith("avx512.mask3.vfmsub.s") || 2904 Name.startswith("avx512.mask3.vfnmsub.s"))) { 2905 bool IsMask3 = Name[11] == '3'; 2906 bool IsMaskZ = Name[11] == 'z'; 2907 // Drop the "avx512.mask." to make it easier. 2908 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 2909 bool NegMul = Name[2] == 'n'; 2910 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 2911 2912 Value *A = CI->getArgOperand(0); 2913 Value *B = CI->getArgOperand(1); 2914 Value *C = CI->getArgOperand(2); 2915 2916 if (NegMul && (IsMask3 || IsMaskZ)) 2917 A = Builder.CreateFNeg(A); 2918 if (NegMul && !(IsMask3 || IsMaskZ)) 2919 B = Builder.CreateFNeg(B); 2920 if (NegAcc) 2921 C = Builder.CreateFNeg(C); 2922 2923 A = Builder.CreateExtractElement(A, (uint64_t)0); 2924 B = Builder.CreateExtractElement(B, (uint64_t)0); 2925 C = Builder.CreateExtractElement(C, (uint64_t)0); 2926 2927 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 2928 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 2929 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 2930 2931 Intrinsic::ID IID; 2932 if (Name.back() == 'd') 2933 IID = Intrinsic::x86_avx512_vfmadd_f64; 2934 else 2935 IID = Intrinsic::x86_avx512_vfmadd_f32; 2936 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 2937 Rep = Builder.CreateCall(FMA, Ops); 2938 } else { 2939 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 2940 Intrinsic::fma, 2941 A->getType()); 2942 Rep = Builder.CreateCall(FMA, { A, B, C }); 2943 } 2944 2945 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 2946 IsMask3 ? C : A; 2947 2948 // For Mask3 with NegAcc, we need to create a new extractelement that 2949 // avoids the negation above. 2950 if (NegAcc && IsMask3) 2951 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 2952 (uint64_t)0); 2953 2954 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 2955 Rep, PassThru); 2956 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 2957 Rep, (uint64_t)0); 2958 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 2959 Name.startswith("avx512.mask.vfnmadd.p") || 2960 Name.startswith("avx512.mask.vfnmsub.p") || 2961 Name.startswith("avx512.mask3.vfmadd.p") || 2962 Name.startswith("avx512.mask3.vfmsub.p") || 2963 Name.startswith("avx512.mask3.vfnmsub.p") || 2964 Name.startswith("avx512.maskz.vfmadd.p"))) { 2965 bool IsMask3 = Name[11] == '3'; 2966 bool IsMaskZ = Name[11] == 'z'; 2967 // Drop the "avx512.mask." to make it easier. 2968 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 2969 bool NegMul = Name[2] == 'n'; 2970 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 2971 2972 Value *A = CI->getArgOperand(0); 2973 Value *B = CI->getArgOperand(1); 2974 Value *C = CI->getArgOperand(2); 2975 2976 if (NegMul && (IsMask3 || IsMaskZ)) 2977 A = Builder.CreateFNeg(A); 2978 if (NegMul && !(IsMask3 || IsMaskZ)) 2979 B = Builder.CreateFNeg(B); 2980 if (NegAcc) 2981 C = Builder.CreateFNeg(C); 2982 2983 if (CI->getNumArgOperands() == 5 && 2984 (!isa<ConstantInt>(CI->getArgOperand(4)) || 2985 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 2986 Intrinsic::ID IID; 2987 // Check the character before ".512" in string. 2988 if (Name[Name.size()-5] == 's') 2989 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 2990 else 2991 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 2992 2993 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2994 { A, B, C, CI->getArgOperand(4) }); 2995 } else { 2996 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 2997 Intrinsic::fma, 2998 A->getType()); 2999 Rep = Builder.CreateCall(FMA, { A, B, C }); 3000 } 3001 3002 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3003 IsMask3 ? CI->getArgOperand(2) : 3004 CI->getArgOperand(0); 3005 3006 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3007 } else if (IsX86 && (Name.startswith("fma.vfmaddsub.p") || 3008 Name.startswith("fma.vfmsubadd.p"))) { 3009 bool IsSubAdd = Name[7] == 's'; 3010 int NumElts = CI->getType()->getVectorNumElements(); 3011 3012 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3013 CI->getArgOperand(2) }; 3014 3015 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3016 Ops[0]->getType()); 3017 Value *Odd = Builder.CreateCall(FMA, Ops); 3018 Ops[2] = Builder.CreateFNeg(Ops[2]); 3019 Value *Even = Builder.CreateCall(FMA, Ops); 3020 3021 if (IsSubAdd) 3022 std::swap(Even, Odd); 3023 3024 SmallVector<uint32_t, 32> Idxs(NumElts); 3025 for (int i = 0; i != NumElts; ++i) 3026 Idxs[i] = i + (i % 2) * NumElts; 3027 3028 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3029 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3030 Name.startswith("avx512.mask3.vfmaddsub.p") || 3031 Name.startswith("avx512.maskz.vfmaddsub.p") || 3032 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3033 bool IsMask3 = Name[11] == '3'; 3034 bool IsMaskZ = Name[11] == 'z'; 3035 // Drop the "avx512.mask." to make it easier. 3036 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3037 bool IsSubAdd = Name[3] == 's'; 3038 if (CI->getNumArgOperands() == 5 && 3039 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3040 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3041 Intrinsic::ID IID; 3042 // Check the character before ".512" in string. 3043 if (Name[Name.size()-5] == 's') 3044 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3045 else 3046 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3047 3048 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3049 CI->getArgOperand(2), CI->getArgOperand(4) }; 3050 if (IsSubAdd) 3051 Ops[2] = Builder.CreateFNeg(Ops[2]); 3052 3053 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3054 {CI->getArgOperand(0), CI->getArgOperand(1), 3055 CI->getArgOperand(2), CI->getArgOperand(4)}); 3056 } else { 3057 int NumElts = CI->getType()->getVectorNumElements(); 3058 3059 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3060 CI->getArgOperand(2) }; 3061 3062 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3063 Ops[0]->getType()); 3064 Value *Odd = Builder.CreateCall(FMA, Ops); 3065 Ops[2] = Builder.CreateFNeg(Ops[2]); 3066 Value *Even = Builder.CreateCall(FMA, Ops); 3067 3068 if (IsSubAdd) 3069 std::swap(Even, Odd); 3070 3071 SmallVector<uint32_t, 32> Idxs(NumElts); 3072 for (int i = 0; i != NumElts; ++i) 3073 Idxs[i] = i + (i % 2) * NumElts; 3074 3075 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3076 } 3077 3078 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3079 IsMask3 ? CI->getArgOperand(2) : 3080 CI->getArgOperand(0); 3081 3082 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3083 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3084 Name.startswith("avx512.maskz.pternlog."))) { 3085 bool ZeroMask = Name[11] == 'z'; 3086 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3087 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3088 Intrinsic::ID IID; 3089 if (VecWidth == 128 && EltWidth == 32) 3090 IID = Intrinsic::x86_avx512_pternlog_d_128; 3091 else if (VecWidth == 256 && EltWidth == 32) 3092 IID = Intrinsic::x86_avx512_pternlog_d_256; 3093 else if (VecWidth == 512 && EltWidth == 32) 3094 IID = Intrinsic::x86_avx512_pternlog_d_512; 3095 else if (VecWidth == 128 && EltWidth == 64) 3096 IID = Intrinsic::x86_avx512_pternlog_q_128; 3097 else if (VecWidth == 256 && EltWidth == 64) 3098 IID = Intrinsic::x86_avx512_pternlog_q_256; 3099 else if (VecWidth == 512 && EltWidth == 64) 3100 IID = Intrinsic::x86_avx512_pternlog_q_512; 3101 else 3102 llvm_unreachable("Unexpected intrinsic"); 3103 3104 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3105 CI->getArgOperand(2), CI->getArgOperand(3) }; 3106 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3107 Args); 3108 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3109 : CI->getArgOperand(0); 3110 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3111 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3112 Name.startswith("avx512.maskz.vpmadd52"))) { 3113 bool ZeroMask = Name[11] == 'z'; 3114 bool High = Name[20] == 'h' || Name[21] == 'h'; 3115 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3116 Intrinsic::ID IID; 3117 if (VecWidth == 128 && !High) 3118 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3119 else if (VecWidth == 256 && !High) 3120 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3121 else if (VecWidth == 512 && !High) 3122 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3123 else if (VecWidth == 128 && High) 3124 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3125 else if (VecWidth == 256 && High) 3126 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3127 else if (VecWidth == 512 && High) 3128 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3129 else 3130 llvm_unreachable("Unexpected intrinsic"); 3131 3132 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3133 CI->getArgOperand(2) }; 3134 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3135 Args); 3136 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3137 : CI->getArgOperand(0); 3138 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3139 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3140 Name.startswith("avx512.mask.vpermt2var.") || 3141 Name.startswith("avx512.maskz.vpermt2var."))) { 3142 bool ZeroMask = Name[11] == 'z'; 3143 bool IndexForm = Name[17] == 'i'; 3144 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3145 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3146 Name.startswith("avx512.maskz.vpdpbusd.") || 3147 Name.startswith("avx512.mask.vpdpbusds.") || 3148 Name.startswith("avx512.maskz.vpdpbusds."))) { 3149 bool ZeroMask = Name[11] == 'z'; 3150 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3151 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3152 Intrinsic::ID IID; 3153 if (VecWidth == 128 && !IsSaturating) 3154 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3155 else if (VecWidth == 256 && !IsSaturating) 3156 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3157 else if (VecWidth == 512 && !IsSaturating) 3158 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3159 else if (VecWidth == 128 && IsSaturating) 3160 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3161 else if (VecWidth == 256 && IsSaturating) 3162 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3163 else if (VecWidth == 512 && IsSaturating) 3164 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3165 else 3166 llvm_unreachable("Unexpected intrinsic"); 3167 3168 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3169 CI->getArgOperand(2) }; 3170 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3171 Args); 3172 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3173 : CI->getArgOperand(0); 3174 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3175 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3176 Name.startswith("avx512.maskz.vpdpwssd.") || 3177 Name.startswith("avx512.mask.vpdpwssds.") || 3178 Name.startswith("avx512.maskz.vpdpwssds."))) { 3179 bool ZeroMask = Name[11] == 'z'; 3180 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3181 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3182 Intrinsic::ID IID; 3183 if (VecWidth == 128 && !IsSaturating) 3184 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3185 else if (VecWidth == 256 && !IsSaturating) 3186 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3187 else if (VecWidth == 512 && !IsSaturating) 3188 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3189 else if (VecWidth == 128 && IsSaturating) 3190 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3191 else if (VecWidth == 256 && IsSaturating) 3192 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3193 else if (VecWidth == 512 && IsSaturating) 3194 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3195 else 3196 llvm_unreachable("Unexpected intrinsic"); 3197 3198 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3199 CI->getArgOperand(2) }; 3200 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3201 Args); 3202 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3203 : CI->getArgOperand(0); 3204 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3205 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3206 Name == "addcarry.u32" || Name == "addcarry.u64" || 3207 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3208 Intrinsic::ID IID; 3209 if (Name[0] == 'a' && Name.back() == '2') 3210 IID = Intrinsic::x86_addcarry_32; 3211 else if (Name[0] == 'a' && Name.back() == '4') 3212 IID = Intrinsic::x86_addcarry_64; 3213 else if (Name[0] == 's' && Name.back() == '2') 3214 IID = Intrinsic::x86_subborrow_32; 3215 else if (Name[0] == 's' && Name.back() == '4') 3216 IID = Intrinsic::x86_subborrow_64; 3217 else 3218 llvm_unreachable("Unexpected intrinsic"); 3219 3220 // Make a call with 3 operands. 3221 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3222 CI->getArgOperand(2)}; 3223 Value *NewCall = Builder.CreateCall( 3224 Intrinsic::getDeclaration(CI->getModule(), IID), 3225 Args); 3226 3227 // Extract the second result and store it. 3228 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3229 // Cast the pointer to the right type. 3230 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3231 llvm::PointerType::getUnqual(Data->getType())); 3232 Builder.CreateAlignedStore(Data, Ptr, 1); 3233 // Replace the original call result with the first result of the new call. 3234 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3235 3236 CI->replaceAllUsesWith(CF); 3237 Rep = nullptr; 3238 } else if (IsX86 && Name.startswith("avx512.mask.") && 3239 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3240 // Rep will be updated by the call in the condition. 3241 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3242 Value *Arg = CI->getArgOperand(0); 3243 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3244 Value *Cmp = Builder.CreateICmpSGE( 3245 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3246 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3247 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3248 Name == "max.ui" || Name == "max.ull")) { 3249 Value *Arg0 = CI->getArgOperand(0); 3250 Value *Arg1 = CI->getArgOperand(1); 3251 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3252 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3253 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3254 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3255 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3256 Name == "min.ui" || Name == "min.ull")) { 3257 Value *Arg0 = CI->getArgOperand(0); 3258 Value *Arg1 = CI->getArgOperand(1); 3259 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3260 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3261 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3262 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3263 } else if (IsNVVM && Name == "clz.ll") { 3264 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3265 Value *Arg = CI->getArgOperand(0); 3266 Value *Ctlz = Builder.CreateCall( 3267 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3268 {Arg->getType()}), 3269 {Arg, Builder.getFalse()}, "ctlz"); 3270 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3271 } else if (IsNVVM && Name == "popc.ll") { 3272 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3273 // i64. 3274 Value *Arg = CI->getArgOperand(0); 3275 Value *Popc = Builder.CreateCall( 3276 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3277 {Arg->getType()}), 3278 Arg, "ctpop"); 3279 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3280 } else if (IsNVVM && Name == "h2f") { 3281 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3282 F->getParent(), Intrinsic::convert_from_fp16, 3283 {Builder.getFloatTy()}), 3284 CI->getArgOperand(0), "h2f"); 3285 } else { 3286 llvm_unreachable("Unknown function for CallInst upgrade."); 3287 } 3288 3289 if (Rep) 3290 CI->replaceAllUsesWith(Rep); 3291 CI->eraseFromParent(); 3292 return; 3293 } 3294 3295 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3296 // Handle generic mangling change, but nothing else 3297 assert( 3298 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3299 "Unknown function for CallInst upgrade and isn't just a name change"); 3300 CI->setCalledFunction(NewFn); 3301 }; 3302 CallInst *NewCall = nullptr; 3303 switch (NewFn->getIntrinsicID()) { 3304 default: { 3305 DefaultCase(); 3306 return; 3307 } 3308 3309 case Intrinsic::arm_neon_vld1: 3310 case Intrinsic::arm_neon_vld2: 3311 case Intrinsic::arm_neon_vld3: 3312 case Intrinsic::arm_neon_vld4: 3313 case Intrinsic::arm_neon_vld2lane: 3314 case Intrinsic::arm_neon_vld3lane: 3315 case Intrinsic::arm_neon_vld4lane: 3316 case Intrinsic::arm_neon_vst1: 3317 case Intrinsic::arm_neon_vst2: 3318 case Intrinsic::arm_neon_vst3: 3319 case Intrinsic::arm_neon_vst4: 3320 case Intrinsic::arm_neon_vst2lane: 3321 case Intrinsic::arm_neon_vst3lane: 3322 case Intrinsic::arm_neon_vst4lane: { 3323 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3324 CI->arg_operands().end()); 3325 NewCall = Builder.CreateCall(NewFn, Args); 3326 break; 3327 } 3328 3329 case Intrinsic::bitreverse: 3330 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3331 break; 3332 3333 case Intrinsic::ctlz: 3334 case Intrinsic::cttz: 3335 assert(CI->getNumArgOperands() == 1 && 3336 "Mismatch between function args and call args"); 3337 NewCall = 3338 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3339 break; 3340 3341 case Intrinsic::objectsize: { 3342 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3343 ? Builder.getFalse() 3344 : CI->getArgOperand(2); 3345 NewCall = Builder.CreateCall( 3346 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize}); 3347 break; 3348 } 3349 3350 case Intrinsic::ctpop: 3351 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3352 break; 3353 3354 case Intrinsic::convert_from_fp16: 3355 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3356 break; 3357 3358 case Intrinsic::dbg_value: 3359 // Upgrade from the old version that had an extra offset argument. 3360 assert(CI->getNumArgOperands() == 4); 3361 // Drop nonzero offsets instead of attempting to upgrade them. 3362 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3363 if (Offset->isZeroValue()) { 3364 NewCall = Builder.CreateCall( 3365 NewFn, 3366 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3367 break; 3368 } 3369 CI->eraseFromParent(); 3370 return; 3371 3372 case Intrinsic::x86_xop_vfrcz_ss: 3373 case Intrinsic::x86_xop_vfrcz_sd: 3374 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3375 break; 3376 3377 case Intrinsic::x86_xop_vpermil2pd: 3378 case Intrinsic::x86_xop_vpermil2ps: 3379 case Intrinsic::x86_xop_vpermil2pd_256: 3380 case Intrinsic::x86_xop_vpermil2ps_256: { 3381 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3382 CI->arg_operands().end()); 3383 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3384 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3385 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3386 NewCall = Builder.CreateCall(NewFn, Args); 3387 break; 3388 } 3389 3390 case Intrinsic::x86_sse41_ptestc: 3391 case Intrinsic::x86_sse41_ptestz: 3392 case Intrinsic::x86_sse41_ptestnzc: { 3393 // The arguments for these intrinsics used to be v4f32, and changed 3394 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3395 // So, the only thing required is a bitcast for both arguments. 3396 // First, check the arguments have the old type. 3397 Value *Arg0 = CI->getArgOperand(0); 3398 if (Arg0->getType() != VectorType::get(Type::getFloatTy(C), 4)) 3399 return; 3400 3401 // Old intrinsic, add bitcasts 3402 Value *Arg1 = CI->getArgOperand(1); 3403 3404 Type *NewVecTy = VectorType::get(Type::getInt64Ty(C), 2); 3405 3406 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3407 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3408 3409 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3410 break; 3411 } 3412 3413 case Intrinsic::x86_rdtscp: { 3414 // This used to take 1 arguments. If we have no arguments, it is already 3415 // upgraded. 3416 if (CI->getNumOperands() == 0) 3417 return; 3418 3419 NewCall = Builder.CreateCall(NewFn); 3420 // Extract the second result and store it. 3421 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3422 // Cast the pointer to the right type. 3423 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3424 llvm::PointerType::getUnqual(Data->getType())); 3425 Builder.CreateAlignedStore(Data, Ptr, 1); 3426 // Replace the original call result with the first result of the new call. 3427 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3428 3429 std::string Name = CI->getName(); 3430 if (!Name.empty()) { 3431 CI->setName(Name + ".old"); 3432 NewCall->setName(Name); 3433 } 3434 CI->replaceAllUsesWith(TSC); 3435 CI->eraseFromParent(); 3436 return; 3437 } 3438 3439 case Intrinsic::x86_sse41_insertps: 3440 case Intrinsic::x86_sse41_dppd: 3441 case Intrinsic::x86_sse41_dpps: 3442 case Intrinsic::x86_sse41_mpsadbw: 3443 case Intrinsic::x86_avx_dp_ps_256: 3444 case Intrinsic::x86_avx2_mpsadbw: { 3445 // Need to truncate the last argument from i32 to i8 -- this argument models 3446 // an inherently 8-bit immediate operand to these x86 instructions. 3447 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3448 CI->arg_operands().end()); 3449 3450 // Replace the last argument with a trunc. 3451 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3452 NewCall = Builder.CreateCall(NewFn, Args); 3453 break; 3454 } 3455 3456 case Intrinsic::thread_pointer: { 3457 NewCall = Builder.CreateCall(NewFn, {}); 3458 break; 3459 } 3460 3461 case Intrinsic::invariant_start: 3462 case Intrinsic::invariant_end: 3463 case Intrinsic::masked_load: 3464 case Intrinsic::masked_store: 3465 case Intrinsic::masked_gather: 3466 case Intrinsic::masked_scatter: { 3467 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3468 CI->arg_operands().end()); 3469 NewCall = Builder.CreateCall(NewFn, Args); 3470 break; 3471 } 3472 3473 case Intrinsic::memcpy: 3474 case Intrinsic::memmove: 3475 case Intrinsic::memset: { 3476 // We have to make sure that the call signature is what we're expecting. 3477 // We only want to change the old signatures by removing the alignment arg: 3478 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3479 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3480 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3481 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3482 // Note: i8*'s in the above can be any pointer type 3483 if (CI->getNumArgOperands() != 5) { 3484 DefaultCase(); 3485 return; 3486 } 3487 // Remove alignment argument (3), and add alignment attributes to the 3488 // dest/src pointers. 3489 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3490 CI->getArgOperand(2), CI->getArgOperand(4)}; 3491 NewCall = Builder.CreateCall(NewFn, Args); 3492 auto *MemCI = cast<MemIntrinsic>(NewCall); 3493 // All mem intrinsics support dest alignment. 3494 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3495 MemCI->setDestAlignment(Align->getZExtValue()); 3496 // Memcpy/Memmove also support source alignment. 3497 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3498 MTI->setSourceAlignment(Align->getZExtValue()); 3499 break; 3500 } 3501 } 3502 assert(NewCall && "Should have either set this variable or returned through " 3503 "the default case"); 3504 std::string Name = CI->getName(); 3505 if (!Name.empty()) { 3506 CI->setName(Name + ".old"); 3507 NewCall->setName(Name); 3508 } 3509 CI->replaceAllUsesWith(NewCall); 3510 CI->eraseFromParent(); 3511 } 3512 3513 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3514 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3515 3516 // Check if this function should be upgraded and get the replacement function 3517 // if there is one. 3518 Function *NewFn; 3519 if (UpgradeIntrinsicFunction(F, NewFn)) { 3520 // Replace all users of the old function with the new function or new 3521 // instructions. This is not a range loop because the call is deleted. 3522 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3523 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3524 UpgradeIntrinsicCall(CI, NewFn); 3525 3526 // Remove old function, no longer used, from the module. 3527 F->eraseFromParent(); 3528 } 3529 } 3530 3531 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3532 // Check if the tag uses struct-path aware TBAA format. 3533 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3534 return &MD; 3535 3536 auto &Context = MD.getContext(); 3537 if (MD.getNumOperands() == 3) { 3538 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3539 MDNode *ScalarType = MDNode::get(Context, Elts); 3540 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3541 Metadata *Elts2[] = {ScalarType, ScalarType, 3542 ConstantAsMetadata::get( 3543 Constant::getNullValue(Type::getInt64Ty(Context))), 3544 MD.getOperand(2)}; 3545 return MDNode::get(Context, Elts2); 3546 } 3547 // Create a MDNode <MD, MD, offset 0> 3548 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3549 Type::getInt64Ty(Context)))}; 3550 return MDNode::get(Context, Elts); 3551 } 3552 3553 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3554 Instruction *&Temp) { 3555 if (Opc != Instruction::BitCast) 3556 return nullptr; 3557 3558 Temp = nullptr; 3559 Type *SrcTy = V->getType(); 3560 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3561 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3562 LLVMContext &Context = V->getContext(); 3563 3564 // We have no information about target data layout, so we assume that 3565 // the maximum pointer size is 64bit. 3566 Type *MidTy = Type::getInt64Ty(Context); 3567 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3568 3569 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3570 } 3571 3572 return nullptr; 3573 } 3574 3575 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3576 if (Opc != Instruction::BitCast) 3577 return nullptr; 3578 3579 Type *SrcTy = C->getType(); 3580 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3581 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3582 LLVMContext &Context = C->getContext(); 3583 3584 // We have no information about target data layout, so we assume that 3585 // the maximum pointer size is 64bit. 3586 Type *MidTy = Type::getInt64Ty(Context); 3587 3588 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3589 DestTy); 3590 } 3591 3592 return nullptr; 3593 } 3594 3595 /// Check the debug info version number, if it is out-dated, drop the debug 3596 /// info. Return true if module is modified. 3597 bool llvm::UpgradeDebugInfo(Module &M) { 3598 unsigned Version = getDebugMetadataVersionFromModule(M); 3599 if (Version == DEBUG_METADATA_VERSION) { 3600 bool BrokenDebugInfo = false; 3601 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3602 report_fatal_error("Broken module found, compilation aborted!"); 3603 if (!BrokenDebugInfo) 3604 // Everything is ok. 3605 return false; 3606 else { 3607 // Diagnose malformed debug info. 3608 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3609 M.getContext().diagnose(Diag); 3610 } 3611 } 3612 bool Modified = StripDebugInfo(M); 3613 if (Modified && Version != DEBUG_METADATA_VERSION) { 3614 // Diagnose a version mismatch. 3615 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3616 M.getContext().diagnose(DiagVersion); 3617 } 3618 return Modified; 3619 } 3620 3621 bool llvm::UpgradeRetainReleaseMarker(Module &M) { 3622 bool Changed = false; 3623 NamedMDNode *ModRetainReleaseMarker = 3624 M.getNamedMetadata("clang.arc.retainAutoreleasedReturnValueMarker"); 3625 if (ModRetainReleaseMarker) { 3626 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3627 if (Op) { 3628 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3629 if (ID) { 3630 SmallVector<StringRef, 4> ValueComp; 3631 ID->getString().split(ValueComp, "#"); 3632 if (ValueComp.size() == 2) { 3633 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3634 Metadata *Ops[1] = {MDString::get(M.getContext(), NewValue)}; 3635 ModRetainReleaseMarker->setOperand(0, 3636 MDNode::get(M.getContext(), Ops)); 3637 Changed = true; 3638 } 3639 } 3640 } 3641 } 3642 return Changed; 3643 } 3644 3645 bool llvm::UpgradeModuleFlags(Module &M) { 3646 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 3647 if (!ModFlags) 3648 return false; 3649 3650 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 3651 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 3652 MDNode *Op = ModFlags->getOperand(I); 3653 if (Op->getNumOperands() != 3) 3654 continue; 3655 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 3656 if (!ID) 3657 continue; 3658 if (ID->getString() == "Objective-C Image Info Version") 3659 HasObjCFlag = true; 3660 if (ID->getString() == "Objective-C Class Properties") 3661 HasClassProperties = true; 3662 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 3663 // field was Error and now they are Max. 3664 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 3665 if (auto *Behavior = 3666 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 3667 if (Behavior->getLimitedValue() == Module::Error) { 3668 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 3669 Metadata *Ops[3] = { 3670 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 3671 MDString::get(M.getContext(), ID->getString()), 3672 Op->getOperand(2)}; 3673 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 3674 Changed = true; 3675 } 3676 } 3677 } 3678 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 3679 // section name so that llvm-lto will not complain about mismatching 3680 // module flags that is functionally the same. 3681 if (ID->getString() == "Objective-C Image Info Section") { 3682 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 3683 SmallVector<StringRef, 4> ValueComp; 3684 Value->getString().split(ValueComp, " "); 3685 if (ValueComp.size() != 1) { 3686 std::string NewValue; 3687 for (auto &S : ValueComp) 3688 NewValue += S.str(); 3689 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 3690 MDString::get(M.getContext(), NewValue)}; 3691 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 3692 Changed = true; 3693 } 3694 } 3695 } 3696 } 3697 3698 // "Objective-C Class Properties" is recently added for Objective-C. We 3699 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 3700 // flag of value 0, so we can correclty downgrade this flag when trying to 3701 // link an ObjC bitcode without this module flag with an ObjC bitcode with 3702 // this module flag. 3703 if (HasObjCFlag && !HasClassProperties) { 3704 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 3705 (uint32_t)0); 3706 Changed = true; 3707 } 3708 3709 return Changed; 3710 } 3711 3712 void llvm::UpgradeSectionAttributes(Module &M) { 3713 auto TrimSpaces = [](StringRef Section) -> std::string { 3714 SmallVector<StringRef, 5> Components; 3715 Section.split(Components, ','); 3716 3717 SmallString<32> Buffer; 3718 raw_svector_ostream OS(Buffer); 3719 3720 for (auto Component : Components) 3721 OS << ',' << Component.trim(); 3722 3723 return OS.str().substr(1); 3724 }; 3725 3726 for (auto &GV : M.globals()) { 3727 if (!GV.hasSection()) 3728 continue; 3729 3730 StringRef Section = GV.getSection(); 3731 3732 if (!Section.startswith("__DATA, __objc_catlist")) 3733 continue; 3734 3735 // __DATA, __objc_catlist, regular, no_dead_strip 3736 // __DATA,__objc_catlist,regular,no_dead_strip 3737 GV.setSection(TrimSpaces(Section)); 3738 } 3739 } 3740 3741 static bool isOldLoopArgument(Metadata *MD) { 3742 auto *T = dyn_cast_or_null<MDTuple>(MD); 3743 if (!T) 3744 return false; 3745 if (T->getNumOperands() < 1) 3746 return false; 3747 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 3748 if (!S) 3749 return false; 3750 return S->getString().startswith("llvm.vectorizer."); 3751 } 3752 3753 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 3754 StringRef OldPrefix = "llvm.vectorizer."; 3755 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 3756 3757 if (OldTag == "llvm.vectorizer.unroll") 3758 return MDString::get(C, "llvm.loop.interleave.count"); 3759 3760 return MDString::get( 3761 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 3762 .str()); 3763 } 3764 3765 static Metadata *upgradeLoopArgument(Metadata *MD) { 3766 auto *T = dyn_cast_or_null<MDTuple>(MD); 3767 if (!T) 3768 return MD; 3769 if (T->getNumOperands() < 1) 3770 return MD; 3771 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 3772 if (!OldTag) 3773 return MD; 3774 if (!OldTag->getString().startswith("llvm.vectorizer.")) 3775 return MD; 3776 3777 // This has an old tag. Upgrade it. 3778 SmallVector<Metadata *, 8> Ops; 3779 Ops.reserve(T->getNumOperands()); 3780 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 3781 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 3782 Ops.push_back(T->getOperand(I)); 3783 3784 return MDTuple::get(T->getContext(), Ops); 3785 } 3786 3787 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 3788 auto *T = dyn_cast<MDTuple>(&N); 3789 if (!T) 3790 return &N; 3791 3792 if (none_of(T->operands(), isOldLoopArgument)) 3793 return &N; 3794 3795 SmallVector<Metadata *, 8> Ops; 3796 Ops.reserve(T->getNumOperands()); 3797 for (Metadata *MD : T->operands()) 3798 Ops.push_back(upgradeLoopArgument(MD)); 3799 3800 return MDTuple::get(T->getContext(), Ops); 3801 } 3802