1 //===-- AutoUpgrade.cpp - Implement auto-upgrade helper functions ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the auto-upgrade helper functions. 10 // This is where deprecated IR intrinsics and other IR features are updated to 11 // current specifications. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/IR/AutoUpgrade.h" 16 #include "llvm/ADT/StringSwitch.h" 17 #include "llvm/IR/Constants.h" 18 #include "llvm/IR/DIBuilder.h" 19 #include "llvm/IR/DebugInfo.h" 20 #include "llvm/IR/DiagnosticInfo.h" 21 #include "llvm/IR/Function.h" 22 #include "llvm/IR/IRBuilder.h" 23 #include "llvm/IR/Instruction.h" 24 #include "llvm/IR/IntrinsicInst.h" 25 #include "llvm/IR/IntrinsicsAArch64.h" 26 #include "llvm/IR/IntrinsicsARM.h" 27 #include "llvm/IR/IntrinsicsX86.h" 28 #include "llvm/IR/LLVMContext.h" 29 #include "llvm/IR/Module.h" 30 #include "llvm/IR/Verifier.h" 31 #include "llvm/Support/ErrorHandling.h" 32 #include "llvm/Support/Regex.h" 33 #include <cstring> 34 using namespace llvm; 35 36 static void rename(GlobalValue *GV) { GV->setName(GV->getName() + ".old"); } 37 38 // Upgrade the declarations of the SSE4.1 ptest intrinsics whose arguments have 39 // changed their type from v4f32 to v2i64. 40 static bool UpgradePTESTIntrinsic(Function* F, Intrinsic::ID IID, 41 Function *&NewFn) { 42 // Check whether this is an old version of the function, which received 43 // v4f32 arguments. 44 Type *Arg0Type = F->getFunctionType()->getParamType(0); 45 if (Arg0Type != FixedVectorType::get(Type::getFloatTy(F->getContext()), 4)) 46 return false; 47 48 // Yes, it's old, replace it with new version. 49 rename(F); 50 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 51 return true; 52 } 53 54 // Upgrade the declarations of intrinsic functions whose 8-bit immediate mask 55 // arguments have changed their type from i32 to i8. 56 static bool UpgradeX86IntrinsicsWith8BitMask(Function *F, Intrinsic::ID IID, 57 Function *&NewFn) { 58 // Check that the last argument is an i32. 59 Type *LastArgType = F->getFunctionType()->getParamType( 60 F->getFunctionType()->getNumParams() - 1); 61 if (!LastArgType->isIntegerTy(32)) 62 return false; 63 64 // Move this function aside and map down. 65 rename(F); 66 NewFn = Intrinsic::getDeclaration(F->getParent(), IID); 67 return true; 68 } 69 70 static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { 71 // All of the intrinsics matches below should be marked with which llvm 72 // version started autoupgrading them. At some point in the future we would 73 // like to use this information to remove upgrade code for some older 74 // intrinsics. It is currently undecided how we will determine that future 75 // point. 76 if (Name == "addcarryx.u32" || // Added in 8.0 77 Name == "addcarryx.u64" || // Added in 8.0 78 Name == "addcarry.u32" || // Added in 8.0 79 Name == "addcarry.u64" || // Added in 8.0 80 Name == "subborrow.u32" || // Added in 8.0 81 Name == "subborrow.u64" || // Added in 8.0 82 Name.startswith("sse2.padds.") || // Added in 8.0 83 Name.startswith("sse2.psubs.") || // Added in 8.0 84 Name.startswith("sse2.paddus.") || // Added in 8.0 85 Name.startswith("sse2.psubus.") || // Added in 8.0 86 Name.startswith("avx2.padds.") || // Added in 8.0 87 Name.startswith("avx2.psubs.") || // Added in 8.0 88 Name.startswith("avx2.paddus.") || // Added in 8.0 89 Name.startswith("avx2.psubus.") || // Added in 8.0 90 Name.startswith("avx512.padds.") || // Added in 8.0 91 Name.startswith("avx512.psubs.") || // Added in 8.0 92 Name.startswith("avx512.mask.padds.") || // Added in 8.0 93 Name.startswith("avx512.mask.psubs.") || // Added in 8.0 94 Name.startswith("avx512.mask.paddus.") || // Added in 8.0 95 Name.startswith("avx512.mask.psubus.") || // Added in 8.0 96 Name=="ssse3.pabs.b.128" || // Added in 6.0 97 Name=="ssse3.pabs.w.128" || // Added in 6.0 98 Name=="ssse3.pabs.d.128" || // Added in 6.0 99 Name.startswith("fma4.vfmadd.s") || // Added in 7.0 100 Name.startswith("fma.vfmadd.") || // Added in 7.0 101 Name.startswith("fma.vfmsub.") || // Added in 7.0 102 Name.startswith("fma.vfmsubadd.") || // Added in 7.0 103 Name.startswith("fma.vfnmadd.") || // Added in 7.0 104 Name.startswith("fma.vfnmsub.") || // Added in 7.0 105 Name.startswith("avx512.mask.vfmadd.") || // Added in 7.0 106 Name.startswith("avx512.mask.vfnmadd.") || // Added in 7.0 107 Name.startswith("avx512.mask.vfnmsub.") || // Added in 7.0 108 Name.startswith("avx512.mask3.vfmadd.") || // Added in 7.0 109 Name.startswith("avx512.maskz.vfmadd.") || // Added in 7.0 110 Name.startswith("avx512.mask3.vfmsub.") || // Added in 7.0 111 Name.startswith("avx512.mask3.vfnmsub.") || // Added in 7.0 112 Name.startswith("avx512.mask.vfmaddsub.") || // Added in 7.0 113 Name.startswith("avx512.maskz.vfmaddsub.") || // Added in 7.0 114 Name.startswith("avx512.mask3.vfmaddsub.") || // Added in 7.0 115 Name.startswith("avx512.mask3.vfmsubadd.") || // Added in 7.0 116 Name.startswith("avx512.mask.shuf.i") || // Added in 6.0 117 Name.startswith("avx512.mask.shuf.f") || // Added in 6.0 118 Name.startswith("avx512.kunpck") || //added in 6.0 119 Name.startswith("avx2.pabs.") || // Added in 6.0 120 Name.startswith("avx512.mask.pabs.") || // Added in 6.0 121 Name.startswith("avx512.broadcastm") || // Added in 6.0 122 Name == "sse.sqrt.ss" || // Added in 7.0 123 Name == "sse2.sqrt.sd" || // Added in 7.0 124 Name.startswith("avx512.mask.sqrt.p") || // Added in 7.0 125 Name.startswith("avx.sqrt.p") || // Added in 7.0 126 Name.startswith("sse2.sqrt.p") || // Added in 7.0 127 Name.startswith("sse.sqrt.p") || // Added in 7.0 128 Name.startswith("avx512.mask.pbroadcast") || // Added in 6.0 129 Name.startswith("sse2.pcmpeq.") || // Added in 3.1 130 Name.startswith("sse2.pcmpgt.") || // Added in 3.1 131 Name.startswith("avx2.pcmpeq.") || // Added in 3.1 132 Name.startswith("avx2.pcmpgt.") || // Added in 3.1 133 Name.startswith("avx512.mask.pcmpeq.") || // Added in 3.9 134 Name.startswith("avx512.mask.pcmpgt.") || // Added in 3.9 135 Name.startswith("avx.vperm2f128.") || // Added in 6.0 136 Name == "avx2.vperm2i128" || // Added in 6.0 137 Name == "sse.add.ss" || // Added in 4.0 138 Name == "sse2.add.sd" || // Added in 4.0 139 Name == "sse.sub.ss" || // Added in 4.0 140 Name == "sse2.sub.sd" || // Added in 4.0 141 Name == "sse.mul.ss" || // Added in 4.0 142 Name == "sse2.mul.sd" || // Added in 4.0 143 Name == "sse.div.ss" || // Added in 4.0 144 Name == "sse2.div.sd" || // Added in 4.0 145 Name == "sse41.pmaxsb" || // Added in 3.9 146 Name == "sse2.pmaxs.w" || // Added in 3.9 147 Name == "sse41.pmaxsd" || // Added in 3.9 148 Name == "sse2.pmaxu.b" || // Added in 3.9 149 Name == "sse41.pmaxuw" || // Added in 3.9 150 Name == "sse41.pmaxud" || // Added in 3.9 151 Name == "sse41.pminsb" || // Added in 3.9 152 Name == "sse2.pmins.w" || // Added in 3.9 153 Name == "sse41.pminsd" || // Added in 3.9 154 Name == "sse2.pminu.b" || // Added in 3.9 155 Name == "sse41.pminuw" || // Added in 3.9 156 Name == "sse41.pminud" || // Added in 3.9 157 Name == "avx512.kand.w" || // Added in 7.0 158 Name == "avx512.kandn.w" || // Added in 7.0 159 Name == "avx512.knot.w" || // Added in 7.0 160 Name == "avx512.kor.w" || // Added in 7.0 161 Name == "avx512.kxor.w" || // Added in 7.0 162 Name == "avx512.kxnor.w" || // Added in 7.0 163 Name == "avx512.kortestc.w" || // Added in 7.0 164 Name == "avx512.kortestz.w" || // Added in 7.0 165 Name.startswith("avx512.mask.pshuf.b.") || // Added in 4.0 166 Name.startswith("avx2.pmax") || // Added in 3.9 167 Name.startswith("avx2.pmin") || // Added in 3.9 168 Name.startswith("avx512.mask.pmax") || // Added in 4.0 169 Name.startswith("avx512.mask.pmin") || // Added in 4.0 170 Name.startswith("avx2.vbroadcast") || // Added in 3.8 171 Name.startswith("avx2.pbroadcast") || // Added in 3.8 172 Name.startswith("avx.vpermil.") || // Added in 3.1 173 Name.startswith("sse2.pshuf") || // Added in 3.9 174 Name.startswith("avx512.pbroadcast") || // Added in 3.9 175 Name.startswith("avx512.mask.broadcast.s") || // Added in 3.9 176 Name.startswith("avx512.mask.movddup") || // Added in 3.9 177 Name.startswith("avx512.mask.movshdup") || // Added in 3.9 178 Name.startswith("avx512.mask.movsldup") || // Added in 3.9 179 Name.startswith("avx512.mask.pshuf.d.") || // Added in 3.9 180 Name.startswith("avx512.mask.pshufl.w.") || // Added in 3.9 181 Name.startswith("avx512.mask.pshufh.w.") || // Added in 3.9 182 Name.startswith("avx512.mask.shuf.p") || // Added in 4.0 183 Name.startswith("avx512.mask.vpermil.p") || // Added in 3.9 184 Name.startswith("avx512.mask.perm.df.") || // Added in 3.9 185 Name.startswith("avx512.mask.perm.di.") || // Added in 3.9 186 Name.startswith("avx512.mask.punpckl") || // Added in 3.9 187 Name.startswith("avx512.mask.punpckh") || // Added in 3.9 188 Name.startswith("avx512.mask.unpckl.") || // Added in 3.9 189 Name.startswith("avx512.mask.unpckh.") || // Added in 3.9 190 Name.startswith("avx512.mask.pand.") || // Added in 3.9 191 Name.startswith("avx512.mask.pandn.") || // Added in 3.9 192 Name.startswith("avx512.mask.por.") || // Added in 3.9 193 Name.startswith("avx512.mask.pxor.") || // Added in 3.9 194 Name.startswith("avx512.mask.and.") || // Added in 3.9 195 Name.startswith("avx512.mask.andn.") || // Added in 3.9 196 Name.startswith("avx512.mask.or.") || // Added in 3.9 197 Name.startswith("avx512.mask.xor.") || // Added in 3.9 198 Name.startswith("avx512.mask.padd.") || // Added in 4.0 199 Name.startswith("avx512.mask.psub.") || // Added in 4.0 200 Name.startswith("avx512.mask.pmull.") || // Added in 4.0 201 Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0 202 Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0 203 Name.startswith("avx512.mask.cvtudq2ps.") || // Added in 7.0 updated 9.0 204 Name.startswith("avx512.mask.cvtqq2pd.") || // Added in 7.0 updated 9.0 205 Name.startswith("avx512.mask.cvtuqq2pd.") || // Added in 7.0 updated 9.0 206 Name.startswith("avx512.mask.cvtdq2ps.") || // Added in 7.0 updated 9.0 207 Name == "avx512.mask.vcvtph2ps.128" || // Added in 11.0 208 Name == "avx512.mask.vcvtph2ps.256" || // Added in 11.0 209 Name == "avx512.mask.cvtqq2ps.256" || // Added in 9.0 210 Name == "avx512.mask.cvtqq2ps.512" || // Added in 9.0 211 Name == "avx512.mask.cvtuqq2ps.256" || // Added in 9.0 212 Name == "avx512.mask.cvtuqq2ps.512" || // Added in 9.0 213 Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0 214 Name == "avx512.mask.cvtpd2ps.256" || // Added in 7.0 215 Name == "avx512.mask.cvttpd2dq.256" || // Added in 7.0 216 Name == "avx512.mask.cvttps2dq.128" || // Added in 7.0 217 Name == "avx512.mask.cvttps2dq.256" || // Added in 7.0 218 Name == "avx512.mask.cvtps2pd.128" || // Added in 7.0 219 Name == "avx512.mask.cvtps2pd.256" || // Added in 7.0 220 Name == "avx512.cvtusi2sd" || // Added in 7.0 221 Name.startswith("avx512.mask.permvar.") || // Added in 7.0 222 Name == "sse2.pmulu.dq" || // Added in 7.0 223 Name == "sse41.pmuldq" || // Added in 7.0 224 Name == "avx2.pmulu.dq" || // Added in 7.0 225 Name == "avx2.pmul.dq" || // Added in 7.0 226 Name == "avx512.pmulu.dq.512" || // Added in 7.0 227 Name == "avx512.pmul.dq.512" || // Added in 7.0 228 Name.startswith("avx512.mask.pmul.dq.") || // Added in 4.0 229 Name.startswith("avx512.mask.pmulu.dq.") || // Added in 4.0 230 Name.startswith("avx512.mask.pmul.hr.sw.") || // Added in 7.0 231 Name.startswith("avx512.mask.pmulh.w.") || // Added in 7.0 232 Name.startswith("avx512.mask.pmulhu.w.") || // Added in 7.0 233 Name.startswith("avx512.mask.pmaddw.d.") || // Added in 7.0 234 Name.startswith("avx512.mask.pmaddubs.w.") || // Added in 7.0 235 Name.startswith("avx512.mask.packsswb.") || // Added in 5.0 236 Name.startswith("avx512.mask.packssdw.") || // Added in 5.0 237 Name.startswith("avx512.mask.packuswb.") || // Added in 5.0 238 Name.startswith("avx512.mask.packusdw.") || // Added in 5.0 239 Name.startswith("avx512.mask.cmp.b") || // Added in 5.0 240 Name.startswith("avx512.mask.cmp.d") || // Added in 5.0 241 Name.startswith("avx512.mask.cmp.q") || // Added in 5.0 242 Name.startswith("avx512.mask.cmp.w") || // Added in 5.0 243 Name.startswith("avx512.mask.cmp.p") || // Added in 7.0 244 Name.startswith("avx512.mask.ucmp.") || // Added in 5.0 245 Name.startswith("avx512.cvtb2mask.") || // Added in 7.0 246 Name.startswith("avx512.cvtw2mask.") || // Added in 7.0 247 Name.startswith("avx512.cvtd2mask.") || // Added in 7.0 248 Name.startswith("avx512.cvtq2mask.") || // Added in 7.0 249 Name.startswith("avx512.mask.vpermilvar.") || // Added in 4.0 250 Name.startswith("avx512.mask.psll.d") || // Added in 4.0 251 Name.startswith("avx512.mask.psll.q") || // Added in 4.0 252 Name.startswith("avx512.mask.psll.w") || // Added in 4.0 253 Name.startswith("avx512.mask.psra.d") || // Added in 4.0 254 Name.startswith("avx512.mask.psra.q") || // Added in 4.0 255 Name.startswith("avx512.mask.psra.w") || // Added in 4.0 256 Name.startswith("avx512.mask.psrl.d") || // Added in 4.0 257 Name.startswith("avx512.mask.psrl.q") || // Added in 4.0 258 Name.startswith("avx512.mask.psrl.w") || // Added in 4.0 259 Name.startswith("avx512.mask.pslli") || // Added in 4.0 260 Name.startswith("avx512.mask.psrai") || // Added in 4.0 261 Name.startswith("avx512.mask.psrli") || // Added in 4.0 262 Name.startswith("avx512.mask.psllv") || // Added in 4.0 263 Name.startswith("avx512.mask.psrav") || // Added in 4.0 264 Name.startswith("avx512.mask.psrlv") || // Added in 4.0 265 Name.startswith("sse41.pmovsx") || // Added in 3.8 266 Name.startswith("sse41.pmovzx") || // Added in 3.9 267 Name.startswith("avx2.pmovsx") || // Added in 3.9 268 Name.startswith("avx2.pmovzx") || // Added in 3.9 269 Name.startswith("avx512.mask.pmovsx") || // Added in 4.0 270 Name.startswith("avx512.mask.pmovzx") || // Added in 4.0 271 Name.startswith("avx512.mask.lzcnt.") || // Added in 5.0 272 Name.startswith("avx512.mask.pternlog.") || // Added in 7.0 273 Name.startswith("avx512.maskz.pternlog.") || // Added in 7.0 274 Name.startswith("avx512.mask.vpmadd52") || // Added in 7.0 275 Name.startswith("avx512.maskz.vpmadd52") || // Added in 7.0 276 Name.startswith("avx512.mask.vpermi2var.") || // Added in 7.0 277 Name.startswith("avx512.mask.vpermt2var.") || // Added in 7.0 278 Name.startswith("avx512.maskz.vpermt2var.") || // Added in 7.0 279 Name.startswith("avx512.mask.vpdpbusd.") || // Added in 7.0 280 Name.startswith("avx512.maskz.vpdpbusd.") || // Added in 7.0 281 Name.startswith("avx512.mask.vpdpbusds.") || // Added in 7.0 282 Name.startswith("avx512.maskz.vpdpbusds.") || // Added in 7.0 283 Name.startswith("avx512.mask.vpdpwssd.") || // Added in 7.0 284 Name.startswith("avx512.maskz.vpdpwssd.") || // Added in 7.0 285 Name.startswith("avx512.mask.vpdpwssds.") || // Added in 7.0 286 Name.startswith("avx512.maskz.vpdpwssds.") || // Added in 7.0 287 Name.startswith("avx512.mask.dbpsadbw.") || // Added in 7.0 288 Name.startswith("avx512.mask.vpshld.") || // Added in 7.0 289 Name.startswith("avx512.mask.vpshrd.") || // Added in 7.0 290 Name.startswith("avx512.mask.vpshldv.") || // Added in 8.0 291 Name.startswith("avx512.mask.vpshrdv.") || // Added in 8.0 292 Name.startswith("avx512.maskz.vpshldv.") || // Added in 8.0 293 Name.startswith("avx512.maskz.vpshrdv.") || // Added in 8.0 294 Name.startswith("avx512.vpshld.") || // Added in 8.0 295 Name.startswith("avx512.vpshrd.") || // Added in 8.0 296 Name.startswith("avx512.mask.add.p") || // Added in 7.0. 128/256 in 4.0 297 Name.startswith("avx512.mask.sub.p") || // Added in 7.0. 128/256 in 4.0 298 Name.startswith("avx512.mask.mul.p") || // Added in 7.0. 128/256 in 4.0 299 Name.startswith("avx512.mask.div.p") || // Added in 7.0. 128/256 in 4.0 300 Name.startswith("avx512.mask.max.p") || // Added in 7.0. 128/256 in 5.0 301 Name.startswith("avx512.mask.min.p") || // Added in 7.0. 128/256 in 5.0 302 Name.startswith("avx512.mask.fpclass.p") || // Added in 7.0 303 Name.startswith("avx512.mask.vpshufbitqmb.") || // Added in 8.0 304 Name.startswith("avx512.mask.pmultishift.qb.") || // Added in 8.0 305 Name.startswith("avx512.mask.conflict.") || // Added in 9.0 306 Name == "avx512.mask.pmov.qd.256" || // Added in 9.0 307 Name == "avx512.mask.pmov.qd.512" || // Added in 9.0 308 Name == "avx512.mask.pmov.wb.256" || // Added in 9.0 309 Name == "avx512.mask.pmov.wb.512" || // Added in 9.0 310 Name == "sse.cvtsi2ss" || // Added in 7.0 311 Name == "sse.cvtsi642ss" || // Added in 7.0 312 Name == "sse2.cvtsi2sd" || // Added in 7.0 313 Name == "sse2.cvtsi642sd" || // Added in 7.0 314 Name == "sse2.cvtss2sd" || // Added in 7.0 315 Name == "sse2.cvtdq2pd" || // Added in 3.9 316 Name == "sse2.cvtdq2ps" || // Added in 7.0 317 Name == "sse2.cvtps2pd" || // Added in 3.9 318 Name == "avx.cvtdq2.pd.256" || // Added in 3.9 319 Name == "avx.cvtdq2.ps.256" || // Added in 7.0 320 Name == "avx.cvt.ps2.pd.256" || // Added in 3.9 321 Name.startswith("vcvtph2ps.") || // Added in 11.0 322 Name.startswith("avx.vinsertf128.") || // Added in 3.7 323 Name == "avx2.vinserti128" || // Added in 3.7 324 Name.startswith("avx512.mask.insert") || // Added in 4.0 325 Name.startswith("avx.vextractf128.") || // Added in 3.7 326 Name == "avx2.vextracti128" || // Added in 3.7 327 Name.startswith("avx512.mask.vextract") || // Added in 4.0 328 Name.startswith("sse4a.movnt.") || // Added in 3.9 329 Name.startswith("avx.movnt.") || // Added in 3.2 330 Name.startswith("avx512.storent.") || // Added in 3.9 331 Name == "sse41.movntdqa" || // Added in 5.0 332 Name == "avx2.movntdqa" || // Added in 5.0 333 Name == "avx512.movntdqa" || // Added in 5.0 334 Name == "sse2.storel.dq" || // Added in 3.9 335 Name.startswith("sse.storeu.") || // Added in 3.9 336 Name.startswith("sse2.storeu.") || // Added in 3.9 337 Name.startswith("avx.storeu.") || // Added in 3.9 338 Name.startswith("avx512.mask.storeu.") || // Added in 3.9 339 Name.startswith("avx512.mask.store.p") || // Added in 3.9 340 Name.startswith("avx512.mask.store.b.") || // Added in 3.9 341 Name.startswith("avx512.mask.store.w.") || // Added in 3.9 342 Name.startswith("avx512.mask.store.d.") || // Added in 3.9 343 Name.startswith("avx512.mask.store.q.") || // Added in 3.9 344 Name == "avx512.mask.store.ss" || // Added in 7.0 345 Name.startswith("avx512.mask.loadu.") || // Added in 3.9 346 Name.startswith("avx512.mask.load.") || // Added in 3.9 347 Name.startswith("avx512.mask.expand.load.") || // Added in 7.0 348 Name.startswith("avx512.mask.compress.store.") || // Added in 7.0 349 Name.startswith("avx512.mask.expand.b") || // Added in 9.0 350 Name.startswith("avx512.mask.expand.w") || // Added in 9.0 351 Name.startswith("avx512.mask.expand.d") || // Added in 9.0 352 Name.startswith("avx512.mask.expand.q") || // Added in 9.0 353 Name.startswith("avx512.mask.expand.p") || // Added in 9.0 354 Name.startswith("avx512.mask.compress.b") || // Added in 9.0 355 Name.startswith("avx512.mask.compress.w") || // Added in 9.0 356 Name.startswith("avx512.mask.compress.d") || // Added in 9.0 357 Name.startswith("avx512.mask.compress.q") || // Added in 9.0 358 Name.startswith("avx512.mask.compress.p") || // Added in 9.0 359 Name == "sse42.crc32.64.8" || // Added in 3.4 360 Name.startswith("avx.vbroadcast.s") || // Added in 3.5 361 Name.startswith("avx512.vbroadcast.s") || // Added in 7.0 362 Name.startswith("avx512.mask.palignr.") || // Added in 3.9 363 Name.startswith("avx512.mask.valign.") || // Added in 4.0 364 Name.startswith("sse2.psll.dq") || // Added in 3.7 365 Name.startswith("sse2.psrl.dq") || // Added in 3.7 366 Name.startswith("avx2.psll.dq") || // Added in 3.7 367 Name.startswith("avx2.psrl.dq") || // Added in 3.7 368 Name.startswith("avx512.psll.dq") || // Added in 3.9 369 Name.startswith("avx512.psrl.dq") || // Added in 3.9 370 Name == "sse41.pblendw" || // Added in 3.7 371 Name.startswith("sse41.blendp") || // Added in 3.7 372 Name.startswith("avx.blend.p") || // Added in 3.7 373 Name == "avx2.pblendw" || // Added in 3.7 374 Name.startswith("avx2.pblendd.") || // Added in 3.7 375 Name.startswith("avx.vbroadcastf128") || // Added in 4.0 376 Name == "avx2.vbroadcasti128" || // Added in 3.7 377 Name.startswith("avx512.mask.broadcastf32x4.") || // Added in 6.0 378 Name.startswith("avx512.mask.broadcastf64x2.") || // Added in 6.0 379 Name.startswith("avx512.mask.broadcastf32x8.") || // Added in 6.0 380 Name.startswith("avx512.mask.broadcastf64x4.") || // Added in 6.0 381 Name.startswith("avx512.mask.broadcasti32x4.") || // Added in 6.0 382 Name.startswith("avx512.mask.broadcasti64x2.") || // Added in 6.0 383 Name.startswith("avx512.mask.broadcasti32x8.") || // Added in 6.0 384 Name.startswith("avx512.mask.broadcasti64x4.") || // Added in 6.0 385 Name == "xop.vpcmov" || // Added in 3.8 386 Name == "xop.vpcmov.256" || // Added in 5.0 387 Name.startswith("avx512.mask.move.s") || // Added in 4.0 388 Name.startswith("avx512.cvtmask2") || // Added in 5.0 389 Name.startswith("xop.vpcom") || // Added in 3.2, Updated in 9.0 390 Name.startswith("xop.vprot") || // Added in 8.0 391 Name.startswith("avx512.prol") || // Added in 8.0 392 Name.startswith("avx512.pror") || // Added in 8.0 393 Name.startswith("avx512.mask.prorv.") || // Added in 8.0 394 Name.startswith("avx512.mask.pror.") || // Added in 8.0 395 Name.startswith("avx512.mask.prolv.") || // Added in 8.0 396 Name.startswith("avx512.mask.prol.") || // Added in 8.0 397 Name.startswith("avx512.ptestm") || //Added in 6.0 398 Name.startswith("avx512.ptestnm") || //Added in 6.0 399 Name.startswith("avx512.mask.pavg")) // Added in 6.0 400 return true; 401 402 return false; 403 } 404 405 static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, 406 Function *&NewFn) { 407 // Only handle intrinsics that start with "x86.". 408 if (!Name.startswith("x86.")) 409 return false; 410 // Remove "x86." prefix. 411 Name = Name.substr(4); 412 413 if (ShouldUpgradeX86Intrinsic(F, Name)) { 414 NewFn = nullptr; 415 return true; 416 } 417 418 if (Name == "rdtscp") { // Added in 8.0 419 // If this intrinsic has 0 operands, it's the new version. 420 if (F->getFunctionType()->getNumParams() == 0) 421 return false; 422 423 rename(F); 424 NewFn = Intrinsic::getDeclaration(F->getParent(), 425 Intrinsic::x86_rdtscp); 426 return true; 427 } 428 429 // SSE4.1 ptest functions may have an old signature. 430 if (Name.startswith("sse41.ptest")) { // Added in 3.2 431 if (Name.substr(11) == "c") 432 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestc, NewFn); 433 if (Name.substr(11) == "z") 434 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestz, NewFn); 435 if (Name.substr(11) == "nzc") 436 return UpgradePTESTIntrinsic(F, Intrinsic::x86_sse41_ptestnzc, NewFn); 437 } 438 // Several blend and other instructions with masks used the wrong number of 439 // bits. 440 if (Name == "sse41.insertps") // Added in 3.6 441 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_insertps, 442 NewFn); 443 if (Name == "sse41.dppd") // Added in 3.6 444 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dppd, 445 NewFn); 446 if (Name == "sse41.dpps") // Added in 3.6 447 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_dpps, 448 NewFn); 449 if (Name == "sse41.mpsadbw") // Added in 3.6 450 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_sse41_mpsadbw, 451 NewFn); 452 if (Name == "avx.dp.ps.256") // Added in 3.6 453 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx_dp_ps_256, 454 NewFn); 455 if (Name == "avx2.mpsadbw") // Added in 3.6 456 return UpgradeX86IntrinsicsWith8BitMask(F, Intrinsic::x86_avx2_mpsadbw, 457 NewFn); 458 459 // frcz.ss/sd may need to have an argument dropped. Added in 3.2 460 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { 461 rename(F); 462 NewFn = Intrinsic::getDeclaration(F->getParent(), 463 Intrinsic::x86_xop_vfrcz_ss); 464 return true; 465 } 466 if (Name.startswith("xop.vfrcz.sd") && F->arg_size() == 2) { 467 rename(F); 468 NewFn = Intrinsic::getDeclaration(F->getParent(), 469 Intrinsic::x86_xop_vfrcz_sd); 470 return true; 471 } 472 // Upgrade any XOP PERMIL2 index operand still using a float/double vector. 473 if (Name.startswith("xop.vpermil2")) { // Added in 3.9 474 auto Idx = F->getFunctionType()->getParamType(2); 475 if (Idx->isFPOrFPVectorTy()) { 476 rename(F); 477 unsigned IdxSize = Idx->getPrimitiveSizeInBits(); 478 unsigned EltSize = Idx->getScalarSizeInBits(); 479 Intrinsic::ID Permil2ID; 480 if (EltSize == 64 && IdxSize == 128) 481 Permil2ID = Intrinsic::x86_xop_vpermil2pd; 482 else if (EltSize == 32 && IdxSize == 128) 483 Permil2ID = Intrinsic::x86_xop_vpermil2ps; 484 else if (EltSize == 64 && IdxSize == 256) 485 Permil2ID = Intrinsic::x86_xop_vpermil2pd_256; 486 else 487 Permil2ID = Intrinsic::x86_xop_vpermil2ps_256; 488 NewFn = Intrinsic::getDeclaration(F->getParent(), Permil2ID); 489 return true; 490 } 491 } 492 493 if (Name == "seh.recoverfp") { 494 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::eh_recoverfp); 495 return true; 496 } 497 498 return false; 499 } 500 501 static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) { 502 assert(F && "Illegal to upgrade a non-existent Function."); 503 504 // Quickly eliminate it, if it's not a candidate. 505 StringRef Name = F->getName(); 506 if (Name.size() <= 8 || !Name.startswith("llvm.")) 507 return false; 508 Name = Name.substr(5); // Strip off "llvm." 509 510 switch (Name[0]) { 511 default: break; 512 case 'a': { 513 if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) { 514 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse, 515 F->arg_begin()->getType()); 516 return true; 517 } 518 if (Name.startswith("arm.neon.vclz")) { 519 Type* args[2] = { 520 F->arg_begin()->getType(), 521 Type::getInt1Ty(F->getContext()) 522 }; 523 // Can't use Intrinsic::getDeclaration here as it adds a ".i1" to 524 // the end of the name. Change name from llvm.arm.neon.vclz.* to 525 // llvm.ctlz.* 526 FunctionType* fType = FunctionType::get(F->getReturnType(), args, false); 527 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 528 "llvm.ctlz." + Name.substr(14), F->getParent()); 529 return true; 530 } 531 if (Name.startswith("arm.neon.vcnt")) { 532 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 533 F->arg_begin()->getType()); 534 return true; 535 } 536 static const Regex vldRegex("^arm\\.neon\\.vld([1234]|[234]lane)\\.v[a-z0-9]*$"); 537 if (vldRegex.match(Name)) { 538 auto fArgs = F->getFunctionType()->params(); 539 SmallVector<Type *, 4> Tys(fArgs.begin(), fArgs.end()); 540 // Can't use Intrinsic::getDeclaration here as the return types might 541 // then only be structurally equal. 542 FunctionType* fType = FunctionType::get(F->getReturnType(), Tys, false); 543 NewFn = Function::Create(fType, F->getLinkage(), F->getAddressSpace(), 544 "llvm." + Name + ".p0i8", F->getParent()); 545 return true; 546 } 547 static const Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$"); 548 if (vstRegex.match(Name)) { 549 static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1, 550 Intrinsic::arm_neon_vst2, 551 Intrinsic::arm_neon_vst3, 552 Intrinsic::arm_neon_vst4}; 553 554 static const Intrinsic::ID StoreLaneInts[] = { 555 Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane, 556 Intrinsic::arm_neon_vst4lane 557 }; 558 559 auto fArgs = F->getFunctionType()->params(); 560 Type *Tys[] = {fArgs[0], fArgs[1]}; 561 if (Name.find("lane") == StringRef::npos) 562 NewFn = Intrinsic::getDeclaration(F->getParent(), 563 StoreInts[fArgs.size() - 3], Tys); 564 else 565 NewFn = Intrinsic::getDeclaration(F->getParent(), 566 StoreLaneInts[fArgs.size() - 5], Tys); 567 return true; 568 } 569 if (Name == "aarch64.thread.pointer" || Name == "arm.thread.pointer") { 570 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::thread_pointer); 571 return true; 572 } 573 if (Name.startswith("arm.neon.vqadds.")) { 574 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::sadd_sat, 575 F->arg_begin()->getType()); 576 return true; 577 } 578 if (Name.startswith("arm.neon.vqaddu.")) { 579 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::uadd_sat, 580 F->arg_begin()->getType()); 581 return true; 582 } 583 if (Name.startswith("arm.neon.vqsubs.")) { 584 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ssub_sat, 585 F->arg_begin()->getType()); 586 return true; 587 } 588 if (Name.startswith("arm.neon.vqsubu.")) { 589 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::usub_sat, 590 F->arg_begin()->getType()); 591 return true; 592 } 593 if (Name.startswith("aarch64.neon.addp")) { 594 if (F->arg_size() != 2) 595 break; // Invalid IR. 596 VectorType *Ty = dyn_cast<VectorType>(F->getReturnType()); 597 if (Ty && Ty->getElementType()->isFloatingPointTy()) { 598 NewFn = Intrinsic::getDeclaration(F->getParent(), 599 Intrinsic::aarch64_neon_faddp, Ty); 600 return true; 601 } 602 } 603 break; 604 } 605 606 case 'c': { 607 if (Name.startswith("ctlz.") && F->arg_size() == 1) { 608 rename(F); 609 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 610 F->arg_begin()->getType()); 611 return true; 612 } 613 if (Name.startswith("cttz.") && F->arg_size() == 1) { 614 rename(F); 615 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::cttz, 616 F->arg_begin()->getType()); 617 return true; 618 } 619 break; 620 } 621 case 'd': { 622 if (Name == "dbg.value" && F->arg_size() == 4) { 623 rename(F); 624 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::dbg_value); 625 return true; 626 } 627 break; 628 } 629 case 'e': { 630 SmallVector<StringRef, 2> Groups; 631 static const Regex R("^experimental.vector.reduce.([a-z]+)\\.[fi][0-9]+"); 632 if (R.match(Name, &Groups)) { 633 Intrinsic::ID ID = Intrinsic::not_intrinsic; 634 if (Groups[1] == "fadd") 635 ID = Intrinsic::experimental_vector_reduce_v2_fadd; 636 if (Groups[1] == "fmul") 637 ID = Intrinsic::experimental_vector_reduce_v2_fmul; 638 639 if (ID != Intrinsic::not_intrinsic) { 640 rename(F); 641 auto Args = F->getFunctionType()->params(); 642 Type *Tys[] = {F->getFunctionType()->getReturnType(), Args[1]}; 643 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, Tys); 644 return true; 645 } 646 } 647 break; 648 } 649 case 'i': 650 case 'l': { 651 bool IsLifetimeStart = Name.startswith("lifetime.start"); 652 if (IsLifetimeStart || Name.startswith("invariant.start")) { 653 Intrinsic::ID ID = IsLifetimeStart ? 654 Intrinsic::lifetime_start : Intrinsic::invariant_start; 655 auto Args = F->getFunctionType()->params(); 656 Type* ObjectPtr[1] = {Args[1]}; 657 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 658 rename(F); 659 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 660 return true; 661 } 662 } 663 664 bool IsLifetimeEnd = Name.startswith("lifetime.end"); 665 if (IsLifetimeEnd || Name.startswith("invariant.end")) { 666 Intrinsic::ID ID = IsLifetimeEnd ? 667 Intrinsic::lifetime_end : Intrinsic::invariant_end; 668 669 auto Args = F->getFunctionType()->params(); 670 Type* ObjectPtr[1] = {Args[IsLifetimeEnd ? 1 : 2]}; 671 if (F->getName() != Intrinsic::getName(ID, ObjectPtr)) { 672 rename(F); 673 NewFn = Intrinsic::getDeclaration(F->getParent(), ID, ObjectPtr); 674 return true; 675 } 676 } 677 if (Name.startswith("invariant.group.barrier")) { 678 // Rename invariant.group.barrier to launder.invariant.group 679 auto Args = F->getFunctionType()->params(); 680 Type* ObjectPtr[1] = {Args[0]}; 681 rename(F); 682 NewFn = Intrinsic::getDeclaration(F->getParent(), 683 Intrinsic::launder_invariant_group, ObjectPtr); 684 return true; 685 686 } 687 688 break; 689 } 690 case 'm': { 691 if (Name.startswith("masked.load.")) { 692 Type *Tys[] = { F->getReturnType(), F->arg_begin()->getType() }; 693 if (F->getName() != Intrinsic::getName(Intrinsic::masked_load, Tys)) { 694 rename(F); 695 NewFn = Intrinsic::getDeclaration(F->getParent(), 696 Intrinsic::masked_load, 697 Tys); 698 return true; 699 } 700 } 701 if (Name.startswith("masked.store.")) { 702 auto Args = F->getFunctionType()->params(); 703 Type *Tys[] = { Args[0], Args[1] }; 704 if (F->getName() != Intrinsic::getName(Intrinsic::masked_store, Tys)) { 705 rename(F); 706 NewFn = Intrinsic::getDeclaration(F->getParent(), 707 Intrinsic::masked_store, 708 Tys); 709 return true; 710 } 711 } 712 // Renaming gather/scatter intrinsics with no address space overloading 713 // to the new overload which includes an address space 714 if (Name.startswith("masked.gather.")) { 715 Type *Tys[] = {F->getReturnType(), F->arg_begin()->getType()}; 716 if (F->getName() != Intrinsic::getName(Intrinsic::masked_gather, Tys)) { 717 rename(F); 718 NewFn = Intrinsic::getDeclaration(F->getParent(), 719 Intrinsic::masked_gather, Tys); 720 return true; 721 } 722 } 723 if (Name.startswith("masked.scatter.")) { 724 auto Args = F->getFunctionType()->params(); 725 Type *Tys[] = {Args[0], Args[1]}; 726 if (F->getName() != Intrinsic::getName(Intrinsic::masked_scatter, Tys)) { 727 rename(F); 728 NewFn = Intrinsic::getDeclaration(F->getParent(), 729 Intrinsic::masked_scatter, Tys); 730 return true; 731 } 732 } 733 // Updating the memory intrinsics (memcpy/memmove/memset) that have an 734 // alignment parameter to embedding the alignment as an attribute of 735 // the pointer args. 736 if (Name.startswith("memcpy.") && F->arg_size() == 5) { 737 rename(F); 738 // Get the types of dest, src, and len 739 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 740 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memcpy, 741 ParamTypes); 742 return true; 743 } 744 if (Name.startswith("memmove.") && F->arg_size() == 5) { 745 rename(F); 746 // Get the types of dest, src, and len 747 ArrayRef<Type *> ParamTypes = F->getFunctionType()->params().slice(0, 3); 748 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memmove, 749 ParamTypes); 750 return true; 751 } 752 if (Name.startswith("memset.") && F->arg_size() == 5) { 753 rename(F); 754 // Get the types of dest, and len 755 const auto *FT = F->getFunctionType(); 756 Type *ParamTypes[2] = { 757 FT->getParamType(0), // Dest 758 FT->getParamType(2) // len 759 }; 760 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::memset, 761 ParamTypes); 762 return true; 763 } 764 break; 765 } 766 case 'n': { 767 if (Name.startswith("nvvm.")) { 768 Name = Name.substr(5); 769 770 // The following nvvm intrinsics correspond exactly to an LLVM intrinsic. 771 Intrinsic::ID IID = StringSwitch<Intrinsic::ID>(Name) 772 .Cases("brev32", "brev64", Intrinsic::bitreverse) 773 .Case("clz.i", Intrinsic::ctlz) 774 .Case("popc.i", Intrinsic::ctpop) 775 .Default(Intrinsic::not_intrinsic); 776 if (IID != Intrinsic::not_intrinsic && F->arg_size() == 1) { 777 NewFn = Intrinsic::getDeclaration(F->getParent(), IID, 778 {F->getReturnType()}); 779 return true; 780 } 781 782 // The following nvvm intrinsics correspond exactly to an LLVM idiom, but 783 // not to an intrinsic alone. We expand them in UpgradeIntrinsicCall. 784 // 785 // TODO: We could add lohi.i2d. 786 bool Expand = StringSwitch<bool>(Name) 787 .Cases("abs.i", "abs.ll", true) 788 .Cases("clz.ll", "popc.ll", "h2f", true) 789 .Cases("max.i", "max.ll", "max.ui", "max.ull", true) 790 .Cases("min.i", "min.ll", "min.ui", "min.ull", true) 791 .StartsWith("atomic.load.add.f32.p", true) 792 .StartsWith("atomic.load.add.f64.p", true) 793 .Default(false); 794 if (Expand) { 795 NewFn = nullptr; 796 return true; 797 } 798 } 799 break; 800 } 801 case 'o': 802 // We only need to change the name to match the mangling including the 803 // address space. 804 if (Name.startswith("objectsize.")) { 805 Type *Tys[2] = { F->getReturnType(), F->arg_begin()->getType() }; 806 if (F->arg_size() == 2 || F->arg_size() == 3 || 807 F->getName() != Intrinsic::getName(Intrinsic::objectsize, Tys)) { 808 rename(F); 809 NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::objectsize, 810 Tys); 811 return true; 812 } 813 } 814 break; 815 816 case 'p': 817 if (Name == "prefetch") { 818 // Handle address space overloading. 819 Type *Tys[] = {F->arg_begin()->getType()}; 820 if (F->getName() != Intrinsic::getName(Intrinsic::prefetch, Tys)) { 821 rename(F); 822 NewFn = 823 Intrinsic::getDeclaration(F->getParent(), Intrinsic::prefetch, Tys); 824 return true; 825 } 826 } 827 break; 828 829 case 's': 830 if (Name == "stackprotectorcheck") { 831 NewFn = nullptr; 832 return true; 833 } 834 break; 835 836 case 'x': 837 if (UpgradeX86IntrinsicFunction(F, Name, NewFn)) 838 return true; 839 } 840 // Remangle our intrinsic since we upgrade the mangling 841 auto Result = llvm::Intrinsic::remangleIntrinsicFunction(F); 842 if (Result != None) { 843 NewFn = Result.getValue(); 844 return true; 845 } 846 847 // This may not belong here. This function is effectively being overloaded 848 // to both detect an intrinsic which needs upgrading, and to provide the 849 // upgraded form of the intrinsic. We should perhaps have two separate 850 // functions for this. 851 return false; 852 } 853 854 bool llvm::UpgradeIntrinsicFunction(Function *F, Function *&NewFn) { 855 NewFn = nullptr; 856 bool Upgraded = UpgradeIntrinsicFunction1(F, NewFn); 857 assert(F != NewFn && "Intrinsic function upgraded to the same function"); 858 859 // Upgrade intrinsic attributes. This does not change the function. 860 if (NewFn) 861 F = NewFn; 862 if (Intrinsic::ID id = F->getIntrinsicID()) 863 F->setAttributes(Intrinsic::getAttributes(F->getContext(), id)); 864 return Upgraded; 865 } 866 867 GlobalVariable *llvm::UpgradeGlobalVariable(GlobalVariable *GV) { 868 if (!(GV->hasName() && (GV->getName() == "llvm.global_ctors" || 869 GV->getName() == "llvm.global_dtors")) || 870 !GV->hasInitializer()) 871 return nullptr; 872 ArrayType *ATy = dyn_cast<ArrayType>(GV->getValueType()); 873 if (!ATy) 874 return nullptr; 875 StructType *STy = dyn_cast<StructType>(ATy->getElementType()); 876 if (!STy || STy->getNumElements() != 2) 877 return nullptr; 878 879 LLVMContext &C = GV->getContext(); 880 IRBuilder<> IRB(C); 881 auto EltTy = StructType::get(STy->getElementType(0), STy->getElementType(1), 882 IRB.getInt8PtrTy()); 883 Constant *Init = GV->getInitializer(); 884 unsigned N = Init->getNumOperands(); 885 std::vector<Constant *> NewCtors(N); 886 for (unsigned i = 0; i != N; ++i) { 887 auto Ctor = cast<Constant>(Init->getOperand(i)); 888 NewCtors[i] = ConstantStruct::get( 889 EltTy, Ctor->getAggregateElement(0u), Ctor->getAggregateElement(1), 890 Constant::getNullValue(IRB.getInt8PtrTy())); 891 } 892 Constant *NewInit = ConstantArray::get(ArrayType::get(EltTy, N), NewCtors); 893 894 return new GlobalVariable(NewInit->getType(), false, GV->getLinkage(), 895 NewInit, GV->getName()); 896 } 897 898 // Handles upgrading SSE2/AVX2/AVX512BW PSLLDQ intrinsics by converting them 899 // to byte shuffles. 900 static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, 901 Value *Op, unsigned Shift) { 902 auto *ResultTy = cast<VectorType>(Op->getType()); 903 unsigned NumElts = ResultTy->getNumElements() * 8; 904 905 // Bitcast from a 64-bit element type to a byte element type. 906 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts); 907 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 908 909 // We'll be shuffling in zeroes. 910 Value *Res = Constant::getNullValue(VecTy); 911 912 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 913 // we'll just return the zero vector. 914 if (Shift < 16) { 915 int Idxs[64]; 916 // 256/512-bit version is split into 2/4 16-byte lanes. 917 for (unsigned l = 0; l != NumElts; l += 16) 918 for (unsigned i = 0; i != 16; ++i) { 919 unsigned Idx = NumElts + i - Shift; 920 if (Idx < NumElts) 921 Idx -= NumElts - 16; // end of lane, switch operand. 922 Idxs[l + i] = Idx + l; 923 } 924 925 Res = Builder.CreateShuffleVector(Res, Op, makeArrayRef(Idxs, NumElts)); 926 } 927 928 // Bitcast back to a 64-bit element type. 929 return Builder.CreateBitCast(Res, ResultTy, "cast"); 930 } 931 932 // Handles upgrading SSE2/AVX2/AVX512BW PSRLDQ intrinsics by converting them 933 // to byte shuffles. 934 static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, Value *Op, 935 unsigned Shift) { 936 auto *ResultTy = cast<VectorType>(Op->getType()); 937 unsigned NumElts = ResultTy->getNumElements() * 8; 938 939 // Bitcast from a 64-bit element type to a byte element type. 940 Type *VecTy = FixedVectorType::get(Builder.getInt8Ty(), NumElts); 941 Op = Builder.CreateBitCast(Op, VecTy, "cast"); 942 943 // We'll be shuffling in zeroes. 944 Value *Res = Constant::getNullValue(VecTy); 945 946 // If shift is less than 16, emit a shuffle to move the bytes. Otherwise, 947 // we'll just return the zero vector. 948 if (Shift < 16) { 949 int Idxs[64]; 950 // 256/512-bit version is split into 2/4 16-byte lanes. 951 for (unsigned l = 0; l != NumElts; l += 16) 952 for (unsigned i = 0; i != 16; ++i) { 953 unsigned Idx = i + Shift; 954 if (Idx >= 16) 955 Idx += NumElts - 16; // end of lane, switch operand. 956 Idxs[l + i] = Idx + l; 957 } 958 959 Res = Builder.CreateShuffleVector(Op, Res, makeArrayRef(Idxs, NumElts)); 960 } 961 962 // Bitcast back to a 64-bit element type. 963 return Builder.CreateBitCast(Res, ResultTy, "cast"); 964 } 965 966 static Value *getX86MaskVec(IRBuilder<> &Builder, Value *Mask, 967 unsigned NumElts) { 968 llvm::VectorType *MaskTy = FixedVectorType::get( 969 Builder.getInt1Ty(), cast<IntegerType>(Mask->getType())->getBitWidth()); 970 Mask = Builder.CreateBitCast(Mask, MaskTy); 971 972 // If we have less than 8 elements, then the starting mask was an i8 and 973 // we need to extract down to the right number of elements. 974 if (NumElts < 8) { 975 int Indices[4]; 976 for (unsigned i = 0; i != NumElts; ++i) 977 Indices[i] = i; 978 Mask = Builder.CreateShuffleVector(Mask, Mask, 979 makeArrayRef(Indices, NumElts), 980 "extract"); 981 } 982 983 return Mask; 984 } 985 986 static Value *EmitX86Select(IRBuilder<> &Builder, Value *Mask, 987 Value *Op0, Value *Op1) { 988 // If the mask is all ones just emit the first operation. 989 if (const auto *C = dyn_cast<Constant>(Mask)) 990 if (C->isAllOnesValue()) 991 return Op0; 992 993 Mask = getX86MaskVec(Builder, Mask, 994 cast<VectorType>(Op0->getType())->getNumElements()); 995 return Builder.CreateSelect(Mask, Op0, Op1); 996 } 997 998 static Value *EmitX86ScalarSelect(IRBuilder<> &Builder, Value *Mask, 999 Value *Op0, Value *Op1) { 1000 // If the mask is all ones just emit the first operation. 1001 if (const auto *C = dyn_cast<Constant>(Mask)) 1002 if (C->isAllOnesValue()) 1003 return Op0; 1004 1005 auto *MaskTy = FixedVectorType::get(Builder.getInt1Ty(), 1006 Mask->getType()->getIntegerBitWidth()); 1007 Mask = Builder.CreateBitCast(Mask, MaskTy); 1008 Mask = Builder.CreateExtractElement(Mask, (uint64_t)0); 1009 return Builder.CreateSelect(Mask, Op0, Op1); 1010 } 1011 1012 // Handle autoupgrade for masked PALIGNR and VALIGND/Q intrinsics. 1013 // PALIGNR handles large immediates by shifting while VALIGN masks the immediate 1014 // so we need to handle both cases. VALIGN also doesn't have 128-bit lanes. 1015 static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, 1016 Value *Op1, Value *Shift, 1017 Value *Passthru, Value *Mask, 1018 bool IsVALIGN) { 1019 unsigned ShiftVal = cast<llvm::ConstantInt>(Shift)->getZExtValue(); 1020 1021 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1022 assert((IsVALIGN || NumElts % 16 == 0) && "Illegal NumElts for PALIGNR!"); 1023 assert((!IsVALIGN || NumElts <= 16) && "NumElts too large for VALIGN!"); 1024 assert(isPowerOf2_32(NumElts) && "NumElts not a power of 2!"); 1025 1026 // Mask the immediate for VALIGN. 1027 if (IsVALIGN) 1028 ShiftVal &= (NumElts - 1); 1029 1030 // If palignr is shifting the pair of vectors more than the size of two 1031 // lanes, emit zero. 1032 if (ShiftVal >= 32) 1033 return llvm::Constant::getNullValue(Op0->getType()); 1034 1035 // If palignr is shifting the pair of input vectors more than one lane, 1036 // but less than two lanes, convert to shifting in zeroes. 1037 if (ShiftVal > 16) { 1038 ShiftVal -= 16; 1039 Op1 = Op0; 1040 Op0 = llvm::Constant::getNullValue(Op0->getType()); 1041 } 1042 1043 int Indices[64]; 1044 // 256-bit palignr operates on 128-bit lanes so we need to handle that 1045 for (unsigned l = 0; l < NumElts; l += 16) { 1046 for (unsigned i = 0; i != 16; ++i) { 1047 unsigned Idx = ShiftVal + i; 1048 if (!IsVALIGN && Idx >= 16) // Disable wrap for VALIGN. 1049 Idx += NumElts - 16; // End of lane, switch operand. 1050 Indices[l + i] = Idx + l; 1051 } 1052 } 1053 1054 Value *Align = Builder.CreateShuffleVector(Op1, Op0, 1055 makeArrayRef(Indices, NumElts), 1056 "palignr"); 1057 1058 return EmitX86Select(Builder, Mask, Align, Passthru); 1059 } 1060 1061 static Value *UpgradeX86VPERMT2Intrinsics(IRBuilder<> &Builder, CallInst &CI, 1062 bool ZeroMask, bool IndexForm) { 1063 Type *Ty = CI.getType(); 1064 unsigned VecWidth = Ty->getPrimitiveSizeInBits(); 1065 unsigned EltWidth = Ty->getScalarSizeInBits(); 1066 bool IsFloat = Ty->isFPOrFPVectorTy(); 1067 Intrinsic::ID IID; 1068 if (VecWidth == 128 && EltWidth == 32 && IsFloat) 1069 IID = Intrinsic::x86_avx512_vpermi2var_ps_128; 1070 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat) 1071 IID = Intrinsic::x86_avx512_vpermi2var_d_128; 1072 else if (VecWidth == 128 && EltWidth == 64 && IsFloat) 1073 IID = Intrinsic::x86_avx512_vpermi2var_pd_128; 1074 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat) 1075 IID = Intrinsic::x86_avx512_vpermi2var_q_128; 1076 else if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1077 IID = Intrinsic::x86_avx512_vpermi2var_ps_256; 1078 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1079 IID = Intrinsic::x86_avx512_vpermi2var_d_256; 1080 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1081 IID = Intrinsic::x86_avx512_vpermi2var_pd_256; 1082 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1083 IID = Intrinsic::x86_avx512_vpermi2var_q_256; 1084 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1085 IID = Intrinsic::x86_avx512_vpermi2var_ps_512; 1086 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1087 IID = Intrinsic::x86_avx512_vpermi2var_d_512; 1088 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1089 IID = Intrinsic::x86_avx512_vpermi2var_pd_512; 1090 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1091 IID = Intrinsic::x86_avx512_vpermi2var_q_512; 1092 else if (VecWidth == 128 && EltWidth == 16) 1093 IID = Intrinsic::x86_avx512_vpermi2var_hi_128; 1094 else if (VecWidth == 256 && EltWidth == 16) 1095 IID = Intrinsic::x86_avx512_vpermi2var_hi_256; 1096 else if (VecWidth == 512 && EltWidth == 16) 1097 IID = Intrinsic::x86_avx512_vpermi2var_hi_512; 1098 else if (VecWidth == 128 && EltWidth == 8) 1099 IID = Intrinsic::x86_avx512_vpermi2var_qi_128; 1100 else if (VecWidth == 256 && EltWidth == 8) 1101 IID = Intrinsic::x86_avx512_vpermi2var_qi_256; 1102 else if (VecWidth == 512 && EltWidth == 8) 1103 IID = Intrinsic::x86_avx512_vpermi2var_qi_512; 1104 else 1105 llvm_unreachable("Unexpected intrinsic"); 1106 1107 Value *Args[] = { CI.getArgOperand(0) , CI.getArgOperand(1), 1108 CI.getArgOperand(2) }; 1109 1110 // If this isn't index form we need to swap operand 0 and 1. 1111 if (!IndexForm) 1112 std::swap(Args[0], Args[1]); 1113 1114 Value *V = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1115 Args); 1116 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(Ty) 1117 : Builder.CreateBitCast(CI.getArgOperand(1), 1118 Ty); 1119 return EmitX86Select(Builder, CI.getArgOperand(3), V, PassThru); 1120 } 1121 1122 static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, 1123 bool IsSigned, bool IsAddition) { 1124 Type *Ty = CI.getType(); 1125 Value *Op0 = CI.getOperand(0); 1126 Value *Op1 = CI.getOperand(1); 1127 1128 Intrinsic::ID IID = 1129 IsSigned ? (IsAddition ? Intrinsic::sadd_sat : Intrinsic::ssub_sat) 1130 : (IsAddition ? Intrinsic::uadd_sat : Intrinsic::usub_sat); 1131 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1132 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1}); 1133 1134 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1135 Value *VecSrc = CI.getOperand(2); 1136 Value *Mask = CI.getOperand(3); 1137 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1138 } 1139 return Res; 1140 } 1141 1142 static Value *upgradeX86Rotate(IRBuilder<> &Builder, CallInst &CI, 1143 bool IsRotateRight) { 1144 Type *Ty = CI.getType(); 1145 Value *Src = CI.getArgOperand(0); 1146 Value *Amt = CI.getArgOperand(1); 1147 1148 // Amount may be scalar immediate, in which case create a splat vector. 1149 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1150 // we only care about the lowest log2 bits anyway. 1151 if (Amt->getType() != Ty) { 1152 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1153 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1154 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1155 } 1156 1157 Intrinsic::ID IID = IsRotateRight ? Intrinsic::fshr : Intrinsic::fshl; 1158 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1159 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); 1160 1161 if (CI.getNumArgOperands() == 4) { // For masked intrinsics. 1162 Value *VecSrc = CI.getOperand(2); 1163 Value *Mask = CI.getOperand(3); 1164 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1165 } 1166 return Res; 1167 } 1168 1169 static Value *upgradeX86vpcom(IRBuilder<> &Builder, CallInst &CI, unsigned Imm, 1170 bool IsSigned) { 1171 Type *Ty = CI.getType(); 1172 Value *LHS = CI.getArgOperand(0); 1173 Value *RHS = CI.getArgOperand(1); 1174 1175 CmpInst::Predicate Pred; 1176 switch (Imm) { 1177 case 0x0: 1178 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; 1179 break; 1180 case 0x1: 1181 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; 1182 break; 1183 case 0x2: 1184 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; 1185 break; 1186 case 0x3: 1187 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; 1188 break; 1189 case 0x4: 1190 Pred = ICmpInst::ICMP_EQ; 1191 break; 1192 case 0x5: 1193 Pred = ICmpInst::ICMP_NE; 1194 break; 1195 case 0x6: 1196 return Constant::getNullValue(Ty); // FALSE 1197 case 0x7: 1198 return Constant::getAllOnesValue(Ty); // TRUE 1199 default: 1200 llvm_unreachable("Unknown XOP vpcom/vpcomu predicate"); 1201 } 1202 1203 Value *Cmp = Builder.CreateICmp(Pred, LHS, RHS); 1204 Value *Ext = Builder.CreateSExt(Cmp, Ty); 1205 return Ext; 1206 } 1207 1208 static Value *upgradeX86ConcatShift(IRBuilder<> &Builder, CallInst &CI, 1209 bool IsShiftRight, bool ZeroMask) { 1210 Type *Ty = CI.getType(); 1211 Value *Op0 = CI.getArgOperand(0); 1212 Value *Op1 = CI.getArgOperand(1); 1213 Value *Amt = CI.getArgOperand(2); 1214 1215 if (IsShiftRight) 1216 std::swap(Op0, Op1); 1217 1218 // Amount may be scalar immediate, in which case create a splat vector. 1219 // Funnel shifts amounts are treated as modulo and types are all power-of-2 so 1220 // we only care about the lowest log2 bits anyway. 1221 if (Amt->getType() != Ty) { 1222 unsigned NumElts = cast<VectorType>(Ty)->getNumElements(); 1223 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); 1224 Amt = Builder.CreateVectorSplat(NumElts, Amt); 1225 } 1226 1227 Intrinsic::ID IID = IsShiftRight ? Intrinsic::fshr : Intrinsic::fshl; 1228 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID, Ty); 1229 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); 1230 1231 unsigned NumArgs = CI.getNumArgOperands(); 1232 if (NumArgs >= 4) { // For masked intrinsics. 1233 Value *VecSrc = NumArgs == 5 ? CI.getArgOperand(3) : 1234 ZeroMask ? ConstantAggregateZero::get(CI.getType()) : 1235 CI.getArgOperand(0); 1236 Value *Mask = CI.getOperand(NumArgs - 1); 1237 Res = EmitX86Select(Builder, Mask, Res, VecSrc); 1238 } 1239 return Res; 1240 } 1241 1242 static Value *UpgradeMaskedStore(IRBuilder<> &Builder, 1243 Value *Ptr, Value *Data, Value *Mask, 1244 bool Aligned) { 1245 // Cast the pointer to the right type. 1246 Ptr = Builder.CreateBitCast(Ptr, 1247 llvm::PointerType::getUnqual(Data->getType())); 1248 const Align Alignment = 1249 Aligned 1250 ? Align(Data->getType()->getPrimitiveSizeInBits().getFixedSize() / 8) 1251 : Align(1); 1252 1253 // If the mask is all ones just emit a regular store. 1254 if (const auto *C = dyn_cast<Constant>(Mask)) 1255 if (C->isAllOnesValue()) 1256 return Builder.CreateAlignedStore(Data, Ptr, Alignment); 1257 1258 // Convert the mask from an integer type to a vector of i1. 1259 unsigned NumElts = cast<VectorType>(Data->getType())->getNumElements(); 1260 Mask = getX86MaskVec(Builder, Mask, NumElts); 1261 return Builder.CreateMaskedStore(Data, Ptr, Alignment, Mask); 1262 } 1263 1264 static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, 1265 Value *Ptr, Value *Passthru, Value *Mask, 1266 bool Aligned) { 1267 Type *ValTy = Passthru->getType(); 1268 // Cast the pointer to the right type. 1269 Ptr = Builder.CreateBitCast(Ptr, llvm::PointerType::getUnqual(ValTy)); 1270 const Align Alignment = 1271 Aligned 1272 ? Align(Passthru->getType()->getPrimitiveSizeInBits().getFixedSize() / 1273 8) 1274 : Align(1); 1275 1276 // If the mask is all ones just emit a regular store. 1277 if (const auto *C = dyn_cast<Constant>(Mask)) 1278 if (C->isAllOnesValue()) 1279 return Builder.CreateAlignedLoad(ValTy, Ptr, Alignment); 1280 1281 // Convert the mask from an integer type to a vector of i1. 1282 unsigned NumElts = cast<VectorType>(Passthru->getType())->getNumElements(); 1283 Mask = getX86MaskVec(Builder, Mask, NumElts); 1284 return Builder.CreateMaskedLoad(Ptr, Alignment, Mask, Passthru); 1285 } 1286 1287 static Value *upgradeAbs(IRBuilder<> &Builder, CallInst &CI) { 1288 Value *Op0 = CI.getArgOperand(0); 1289 llvm::Type *Ty = Op0->getType(); 1290 Value *Zero = llvm::Constant::getNullValue(Ty); 1291 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_SGT, Op0, Zero); 1292 Value *Neg = Builder.CreateNeg(Op0); 1293 Value *Res = Builder.CreateSelect(Cmp, Op0, Neg); 1294 1295 if (CI.getNumArgOperands() == 3) 1296 Res = EmitX86Select(Builder,CI.getArgOperand(2), Res, CI.getArgOperand(1)); 1297 1298 return Res; 1299 } 1300 1301 static Value *upgradeIntMinMax(IRBuilder<> &Builder, CallInst &CI, 1302 ICmpInst::Predicate Pred) { 1303 Value *Op0 = CI.getArgOperand(0); 1304 Value *Op1 = CI.getArgOperand(1); 1305 Value *Cmp = Builder.CreateICmp(Pred, Op0, Op1); 1306 Value *Res = Builder.CreateSelect(Cmp, Op0, Op1); 1307 1308 if (CI.getNumArgOperands() == 4) 1309 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1310 1311 return Res; 1312 } 1313 1314 static Value *upgradePMULDQ(IRBuilder<> &Builder, CallInst &CI, bool IsSigned) { 1315 Type *Ty = CI.getType(); 1316 1317 // Arguments have a vXi32 type so cast to vXi64. 1318 Value *LHS = Builder.CreateBitCast(CI.getArgOperand(0), Ty); 1319 Value *RHS = Builder.CreateBitCast(CI.getArgOperand(1), Ty); 1320 1321 if (IsSigned) { 1322 // Shift left then arithmetic shift right. 1323 Constant *ShiftAmt = ConstantInt::get(Ty, 32); 1324 LHS = Builder.CreateShl(LHS, ShiftAmt); 1325 LHS = Builder.CreateAShr(LHS, ShiftAmt); 1326 RHS = Builder.CreateShl(RHS, ShiftAmt); 1327 RHS = Builder.CreateAShr(RHS, ShiftAmt); 1328 } else { 1329 // Clear the upper bits. 1330 Constant *Mask = ConstantInt::get(Ty, 0xffffffff); 1331 LHS = Builder.CreateAnd(LHS, Mask); 1332 RHS = Builder.CreateAnd(RHS, Mask); 1333 } 1334 1335 Value *Res = Builder.CreateMul(LHS, RHS); 1336 1337 if (CI.getNumArgOperands() == 4) 1338 Res = EmitX86Select(Builder, CI.getArgOperand(3), Res, CI.getArgOperand(2)); 1339 1340 return Res; 1341 } 1342 1343 // Applying mask on vector of i1's and make sure result is at least 8 bits wide. 1344 static Value *ApplyX86MaskOn1BitsVec(IRBuilder<> &Builder, Value *Vec, 1345 Value *Mask) { 1346 unsigned NumElts = cast<VectorType>(Vec->getType())->getNumElements(); 1347 if (Mask) { 1348 const auto *C = dyn_cast<Constant>(Mask); 1349 if (!C || !C->isAllOnesValue()) 1350 Vec = Builder.CreateAnd(Vec, getX86MaskVec(Builder, Mask, NumElts)); 1351 } 1352 1353 if (NumElts < 8) { 1354 int Indices[8]; 1355 for (unsigned i = 0; i != NumElts; ++i) 1356 Indices[i] = i; 1357 for (unsigned i = NumElts; i != 8; ++i) 1358 Indices[i] = NumElts + i % NumElts; 1359 Vec = Builder.CreateShuffleVector(Vec, 1360 Constant::getNullValue(Vec->getType()), 1361 Indices); 1362 } 1363 return Builder.CreateBitCast(Vec, Builder.getIntNTy(std::max(NumElts, 8U))); 1364 } 1365 1366 static Value *upgradeMaskedCompare(IRBuilder<> &Builder, CallInst &CI, 1367 unsigned CC, bool Signed) { 1368 Value *Op0 = CI.getArgOperand(0); 1369 unsigned NumElts = cast<VectorType>(Op0->getType())->getNumElements(); 1370 1371 Value *Cmp; 1372 if (CC == 3) { 1373 Cmp = Constant::getNullValue( 1374 FixedVectorType::get(Builder.getInt1Ty(), NumElts)); 1375 } else if (CC == 7) { 1376 Cmp = Constant::getAllOnesValue( 1377 FixedVectorType::get(Builder.getInt1Ty(), NumElts)); 1378 } else { 1379 ICmpInst::Predicate Pred; 1380 switch (CC) { 1381 default: llvm_unreachable("Unknown condition code"); 1382 case 0: Pred = ICmpInst::ICMP_EQ; break; 1383 case 1: Pred = Signed ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT; break; 1384 case 2: Pred = Signed ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE; break; 1385 case 4: Pred = ICmpInst::ICMP_NE; break; 1386 case 5: Pred = Signed ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE; break; 1387 case 6: Pred = Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT; break; 1388 } 1389 Cmp = Builder.CreateICmp(Pred, Op0, CI.getArgOperand(1)); 1390 } 1391 1392 Value *Mask = CI.getArgOperand(CI.getNumArgOperands() - 1); 1393 1394 return ApplyX86MaskOn1BitsVec(Builder, Cmp, Mask); 1395 } 1396 1397 // Replace a masked intrinsic with an older unmasked intrinsic. 1398 static Value *UpgradeX86MaskedShift(IRBuilder<> &Builder, CallInst &CI, 1399 Intrinsic::ID IID) { 1400 Function *Intrin = Intrinsic::getDeclaration(CI.getModule(), IID); 1401 Value *Rep = Builder.CreateCall(Intrin, 1402 { CI.getArgOperand(0), CI.getArgOperand(1) }); 1403 return EmitX86Select(Builder, CI.getArgOperand(3), Rep, CI.getArgOperand(2)); 1404 } 1405 1406 static Value* upgradeMaskedMove(IRBuilder<> &Builder, CallInst &CI) { 1407 Value* A = CI.getArgOperand(0); 1408 Value* B = CI.getArgOperand(1); 1409 Value* Src = CI.getArgOperand(2); 1410 Value* Mask = CI.getArgOperand(3); 1411 1412 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); 1413 Value* Cmp = Builder.CreateIsNotNull(AndNode); 1414 Value* Extract1 = Builder.CreateExtractElement(B, (uint64_t)0); 1415 Value* Extract2 = Builder.CreateExtractElement(Src, (uint64_t)0); 1416 Value* Select = Builder.CreateSelect(Cmp, Extract1, Extract2); 1417 return Builder.CreateInsertElement(A, Select, (uint64_t)0); 1418 } 1419 1420 1421 static Value* UpgradeMaskToInt(IRBuilder<> &Builder, CallInst &CI) { 1422 Value* Op = CI.getArgOperand(0); 1423 Type* ReturnOp = CI.getType(); 1424 unsigned NumElts = cast<VectorType>(CI.getType())->getNumElements(); 1425 Value *Mask = getX86MaskVec(Builder, Op, NumElts); 1426 return Builder.CreateSExt(Mask, ReturnOp, "vpmovm2"); 1427 } 1428 1429 // Replace intrinsic with unmasked version and a select. 1430 static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder, 1431 CallInst &CI, Value *&Rep) { 1432 Name = Name.substr(12); // Remove avx512.mask. 1433 1434 unsigned VecWidth = CI.getType()->getPrimitiveSizeInBits(); 1435 unsigned EltWidth = CI.getType()->getScalarSizeInBits(); 1436 Intrinsic::ID IID; 1437 if (Name.startswith("max.p")) { 1438 if (VecWidth == 128 && EltWidth == 32) 1439 IID = Intrinsic::x86_sse_max_ps; 1440 else if (VecWidth == 128 && EltWidth == 64) 1441 IID = Intrinsic::x86_sse2_max_pd; 1442 else if (VecWidth == 256 && EltWidth == 32) 1443 IID = Intrinsic::x86_avx_max_ps_256; 1444 else if (VecWidth == 256 && EltWidth == 64) 1445 IID = Intrinsic::x86_avx_max_pd_256; 1446 else 1447 llvm_unreachable("Unexpected intrinsic"); 1448 } else if (Name.startswith("min.p")) { 1449 if (VecWidth == 128 && EltWidth == 32) 1450 IID = Intrinsic::x86_sse_min_ps; 1451 else if (VecWidth == 128 && EltWidth == 64) 1452 IID = Intrinsic::x86_sse2_min_pd; 1453 else if (VecWidth == 256 && EltWidth == 32) 1454 IID = Intrinsic::x86_avx_min_ps_256; 1455 else if (VecWidth == 256 && EltWidth == 64) 1456 IID = Intrinsic::x86_avx_min_pd_256; 1457 else 1458 llvm_unreachable("Unexpected intrinsic"); 1459 } else if (Name.startswith("pshuf.b.")) { 1460 if (VecWidth == 128) 1461 IID = Intrinsic::x86_ssse3_pshuf_b_128; 1462 else if (VecWidth == 256) 1463 IID = Intrinsic::x86_avx2_pshuf_b; 1464 else if (VecWidth == 512) 1465 IID = Intrinsic::x86_avx512_pshuf_b_512; 1466 else 1467 llvm_unreachable("Unexpected intrinsic"); 1468 } else if (Name.startswith("pmul.hr.sw.")) { 1469 if (VecWidth == 128) 1470 IID = Intrinsic::x86_ssse3_pmul_hr_sw_128; 1471 else if (VecWidth == 256) 1472 IID = Intrinsic::x86_avx2_pmul_hr_sw; 1473 else if (VecWidth == 512) 1474 IID = Intrinsic::x86_avx512_pmul_hr_sw_512; 1475 else 1476 llvm_unreachable("Unexpected intrinsic"); 1477 } else if (Name.startswith("pmulh.w.")) { 1478 if (VecWidth == 128) 1479 IID = Intrinsic::x86_sse2_pmulh_w; 1480 else if (VecWidth == 256) 1481 IID = Intrinsic::x86_avx2_pmulh_w; 1482 else if (VecWidth == 512) 1483 IID = Intrinsic::x86_avx512_pmulh_w_512; 1484 else 1485 llvm_unreachable("Unexpected intrinsic"); 1486 } else if (Name.startswith("pmulhu.w.")) { 1487 if (VecWidth == 128) 1488 IID = Intrinsic::x86_sse2_pmulhu_w; 1489 else if (VecWidth == 256) 1490 IID = Intrinsic::x86_avx2_pmulhu_w; 1491 else if (VecWidth == 512) 1492 IID = Intrinsic::x86_avx512_pmulhu_w_512; 1493 else 1494 llvm_unreachable("Unexpected intrinsic"); 1495 } else if (Name.startswith("pmaddw.d.")) { 1496 if (VecWidth == 128) 1497 IID = Intrinsic::x86_sse2_pmadd_wd; 1498 else if (VecWidth == 256) 1499 IID = Intrinsic::x86_avx2_pmadd_wd; 1500 else if (VecWidth == 512) 1501 IID = Intrinsic::x86_avx512_pmaddw_d_512; 1502 else 1503 llvm_unreachable("Unexpected intrinsic"); 1504 } else if (Name.startswith("pmaddubs.w.")) { 1505 if (VecWidth == 128) 1506 IID = Intrinsic::x86_ssse3_pmadd_ub_sw_128; 1507 else if (VecWidth == 256) 1508 IID = Intrinsic::x86_avx2_pmadd_ub_sw; 1509 else if (VecWidth == 512) 1510 IID = Intrinsic::x86_avx512_pmaddubs_w_512; 1511 else 1512 llvm_unreachable("Unexpected intrinsic"); 1513 } else if (Name.startswith("packsswb.")) { 1514 if (VecWidth == 128) 1515 IID = Intrinsic::x86_sse2_packsswb_128; 1516 else if (VecWidth == 256) 1517 IID = Intrinsic::x86_avx2_packsswb; 1518 else if (VecWidth == 512) 1519 IID = Intrinsic::x86_avx512_packsswb_512; 1520 else 1521 llvm_unreachable("Unexpected intrinsic"); 1522 } else if (Name.startswith("packssdw.")) { 1523 if (VecWidth == 128) 1524 IID = Intrinsic::x86_sse2_packssdw_128; 1525 else if (VecWidth == 256) 1526 IID = Intrinsic::x86_avx2_packssdw; 1527 else if (VecWidth == 512) 1528 IID = Intrinsic::x86_avx512_packssdw_512; 1529 else 1530 llvm_unreachable("Unexpected intrinsic"); 1531 } else if (Name.startswith("packuswb.")) { 1532 if (VecWidth == 128) 1533 IID = Intrinsic::x86_sse2_packuswb_128; 1534 else if (VecWidth == 256) 1535 IID = Intrinsic::x86_avx2_packuswb; 1536 else if (VecWidth == 512) 1537 IID = Intrinsic::x86_avx512_packuswb_512; 1538 else 1539 llvm_unreachable("Unexpected intrinsic"); 1540 } else if (Name.startswith("packusdw.")) { 1541 if (VecWidth == 128) 1542 IID = Intrinsic::x86_sse41_packusdw; 1543 else if (VecWidth == 256) 1544 IID = Intrinsic::x86_avx2_packusdw; 1545 else if (VecWidth == 512) 1546 IID = Intrinsic::x86_avx512_packusdw_512; 1547 else 1548 llvm_unreachable("Unexpected intrinsic"); 1549 } else if (Name.startswith("vpermilvar.")) { 1550 if (VecWidth == 128 && EltWidth == 32) 1551 IID = Intrinsic::x86_avx_vpermilvar_ps; 1552 else if (VecWidth == 128 && EltWidth == 64) 1553 IID = Intrinsic::x86_avx_vpermilvar_pd; 1554 else if (VecWidth == 256 && EltWidth == 32) 1555 IID = Intrinsic::x86_avx_vpermilvar_ps_256; 1556 else if (VecWidth == 256 && EltWidth == 64) 1557 IID = Intrinsic::x86_avx_vpermilvar_pd_256; 1558 else if (VecWidth == 512 && EltWidth == 32) 1559 IID = Intrinsic::x86_avx512_vpermilvar_ps_512; 1560 else if (VecWidth == 512 && EltWidth == 64) 1561 IID = Intrinsic::x86_avx512_vpermilvar_pd_512; 1562 else 1563 llvm_unreachable("Unexpected intrinsic"); 1564 } else if (Name == "cvtpd2dq.256") { 1565 IID = Intrinsic::x86_avx_cvt_pd2dq_256; 1566 } else if (Name == "cvtpd2ps.256") { 1567 IID = Intrinsic::x86_avx_cvt_pd2_ps_256; 1568 } else if (Name == "cvttpd2dq.256") { 1569 IID = Intrinsic::x86_avx_cvtt_pd2dq_256; 1570 } else if (Name == "cvttps2dq.128") { 1571 IID = Intrinsic::x86_sse2_cvttps2dq; 1572 } else if (Name == "cvttps2dq.256") { 1573 IID = Intrinsic::x86_avx_cvtt_ps2dq_256; 1574 } else if (Name.startswith("permvar.")) { 1575 bool IsFloat = CI.getType()->isFPOrFPVectorTy(); 1576 if (VecWidth == 256 && EltWidth == 32 && IsFloat) 1577 IID = Intrinsic::x86_avx2_permps; 1578 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat) 1579 IID = Intrinsic::x86_avx2_permd; 1580 else if (VecWidth == 256 && EltWidth == 64 && IsFloat) 1581 IID = Intrinsic::x86_avx512_permvar_df_256; 1582 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat) 1583 IID = Intrinsic::x86_avx512_permvar_di_256; 1584 else if (VecWidth == 512 && EltWidth == 32 && IsFloat) 1585 IID = Intrinsic::x86_avx512_permvar_sf_512; 1586 else if (VecWidth == 512 && EltWidth == 32 && !IsFloat) 1587 IID = Intrinsic::x86_avx512_permvar_si_512; 1588 else if (VecWidth == 512 && EltWidth == 64 && IsFloat) 1589 IID = Intrinsic::x86_avx512_permvar_df_512; 1590 else if (VecWidth == 512 && EltWidth == 64 && !IsFloat) 1591 IID = Intrinsic::x86_avx512_permvar_di_512; 1592 else if (VecWidth == 128 && EltWidth == 16) 1593 IID = Intrinsic::x86_avx512_permvar_hi_128; 1594 else if (VecWidth == 256 && EltWidth == 16) 1595 IID = Intrinsic::x86_avx512_permvar_hi_256; 1596 else if (VecWidth == 512 && EltWidth == 16) 1597 IID = Intrinsic::x86_avx512_permvar_hi_512; 1598 else if (VecWidth == 128 && EltWidth == 8) 1599 IID = Intrinsic::x86_avx512_permvar_qi_128; 1600 else if (VecWidth == 256 && EltWidth == 8) 1601 IID = Intrinsic::x86_avx512_permvar_qi_256; 1602 else if (VecWidth == 512 && EltWidth == 8) 1603 IID = Intrinsic::x86_avx512_permvar_qi_512; 1604 else 1605 llvm_unreachable("Unexpected intrinsic"); 1606 } else if (Name.startswith("dbpsadbw.")) { 1607 if (VecWidth == 128) 1608 IID = Intrinsic::x86_avx512_dbpsadbw_128; 1609 else if (VecWidth == 256) 1610 IID = Intrinsic::x86_avx512_dbpsadbw_256; 1611 else if (VecWidth == 512) 1612 IID = Intrinsic::x86_avx512_dbpsadbw_512; 1613 else 1614 llvm_unreachable("Unexpected intrinsic"); 1615 } else if (Name.startswith("pmultishift.qb.")) { 1616 if (VecWidth == 128) 1617 IID = Intrinsic::x86_avx512_pmultishift_qb_128; 1618 else if (VecWidth == 256) 1619 IID = Intrinsic::x86_avx512_pmultishift_qb_256; 1620 else if (VecWidth == 512) 1621 IID = Intrinsic::x86_avx512_pmultishift_qb_512; 1622 else 1623 llvm_unreachable("Unexpected intrinsic"); 1624 } else if (Name.startswith("conflict.")) { 1625 if (Name[9] == 'd' && VecWidth == 128) 1626 IID = Intrinsic::x86_avx512_conflict_d_128; 1627 else if (Name[9] == 'd' && VecWidth == 256) 1628 IID = Intrinsic::x86_avx512_conflict_d_256; 1629 else if (Name[9] == 'd' && VecWidth == 512) 1630 IID = Intrinsic::x86_avx512_conflict_d_512; 1631 else if (Name[9] == 'q' && VecWidth == 128) 1632 IID = Intrinsic::x86_avx512_conflict_q_128; 1633 else if (Name[9] == 'q' && VecWidth == 256) 1634 IID = Intrinsic::x86_avx512_conflict_q_256; 1635 else if (Name[9] == 'q' && VecWidth == 512) 1636 IID = Intrinsic::x86_avx512_conflict_q_512; 1637 else 1638 llvm_unreachable("Unexpected intrinsic"); 1639 } else if (Name.startswith("pavg.")) { 1640 if (Name[5] == 'b' && VecWidth == 128) 1641 IID = Intrinsic::x86_sse2_pavg_b; 1642 else if (Name[5] == 'b' && VecWidth == 256) 1643 IID = Intrinsic::x86_avx2_pavg_b; 1644 else if (Name[5] == 'b' && VecWidth == 512) 1645 IID = Intrinsic::x86_avx512_pavg_b_512; 1646 else if (Name[5] == 'w' && VecWidth == 128) 1647 IID = Intrinsic::x86_sse2_pavg_w; 1648 else if (Name[5] == 'w' && VecWidth == 256) 1649 IID = Intrinsic::x86_avx2_pavg_w; 1650 else if (Name[5] == 'w' && VecWidth == 512) 1651 IID = Intrinsic::x86_avx512_pavg_w_512; 1652 else 1653 llvm_unreachable("Unexpected intrinsic"); 1654 } else 1655 return false; 1656 1657 SmallVector<Value *, 4> Args(CI.arg_operands().begin(), 1658 CI.arg_operands().end()); 1659 Args.pop_back(); 1660 Args.pop_back(); 1661 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI.getModule(), IID), 1662 Args); 1663 unsigned NumArgs = CI.getNumArgOperands(); 1664 Rep = EmitX86Select(Builder, CI.getArgOperand(NumArgs - 1), Rep, 1665 CI.getArgOperand(NumArgs - 2)); 1666 return true; 1667 } 1668 1669 /// Upgrade comment in call to inline asm that represents an objc retain release 1670 /// marker. 1671 void llvm::UpgradeInlineAsmString(std::string *AsmStr) { 1672 size_t Pos; 1673 if (AsmStr->find("mov\tfp") == 0 && 1674 AsmStr->find("objc_retainAutoreleaseReturnValue") != std::string::npos && 1675 (Pos = AsmStr->find("# marker")) != std::string::npos) { 1676 AsmStr->replace(Pos, 1, ";"); 1677 } 1678 return; 1679 } 1680 1681 /// Upgrade a call to an old intrinsic. All argument and return casting must be 1682 /// provided to seamlessly integrate with existing context. 1683 void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { 1684 Function *F = CI->getCalledFunction(); 1685 LLVMContext &C = CI->getContext(); 1686 IRBuilder<> Builder(C); 1687 Builder.SetInsertPoint(CI->getParent(), CI->getIterator()); 1688 1689 assert(F && "Intrinsic call is not direct?"); 1690 1691 if (!NewFn) { 1692 // Get the Function's name. 1693 StringRef Name = F->getName(); 1694 1695 assert(Name.startswith("llvm.") && "Intrinsic doesn't start with 'llvm.'"); 1696 Name = Name.substr(5); 1697 1698 bool IsX86 = Name.startswith("x86."); 1699 if (IsX86) 1700 Name = Name.substr(4); 1701 bool IsNVVM = Name.startswith("nvvm."); 1702 if (IsNVVM) 1703 Name = Name.substr(5); 1704 1705 if (IsX86 && Name.startswith("sse4a.movnt.")) { 1706 Module *M = F->getParent(); 1707 SmallVector<Metadata *, 1> Elts; 1708 Elts.push_back( 1709 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1710 MDNode *Node = MDNode::get(C, Elts); 1711 1712 Value *Arg0 = CI->getArgOperand(0); 1713 Value *Arg1 = CI->getArgOperand(1); 1714 1715 // Nontemporal (unaligned) store of the 0'th element of the float/double 1716 // vector. 1717 Type *SrcEltTy = cast<VectorType>(Arg1->getType())->getElementType(); 1718 PointerType *EltPtrTy = PointerType::getUnqual(SrcEltTy); 1719 Value *Addr = Builder.CreateBitCast(Arg0, EltPtrTy, "cast"); 1720 Value *Extract = 1721 Builder.CreateExtractElement(Arg1, (uint64_t)0, "extractelement"); 1722 1723 StoreInst *SI = Builder.CreateAlignedStore(Extract, Addr, Align(1)); 1724 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1725 1726 // Remove intrinsic. 1727 CI->eraseFromParent(); 1728 return; 1729 } 1730 1731 if (IsX86 && (Name.startswith("avx.movnt.") || 1732 Name.startswith("avx512.storent."))) { 1733 Module *M = F->getParent(); 1734 SmallVector<Metadata *, 1> Elts; 1735 Elts.push_back( 1736 ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 1737 MDNode *Node = MDNode::get(C, Elts); 1738 1739 Value *Arg0 = CI->getArgOperand(0); 1740 Value *Arg1 = CI->getArgOperand(1); 1741 1742 // Convert the type of the pointer to a pointer to the stored type. 1743 Value *BC = Builder.CreateBitCast(Arg0, 1744 PointerType::getUnqual(Arg1->getType()), 1745 "cast"); 1746 StoreInst *SI = Builder.CreateAlignedStore( 1747 Arg1, BC, 1748 Align(Arg1->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 1749 SI->setMetadata(M->getMDKindID("nontemporal"), Node); 1750 1751 // Remove intrinsic. 1752 CI->eraseFromParent(); 1753 return; 1754 } 1755 1756 if (IsX86 && Name == "sse2.storel.dq") { 1757 Value *Arg0 = CI->getArgOperand(0); 1758 Value *Arg1 = CI->getArgOperand(1); 1759 1760 auto *NewVecTy = FixedVectorType::get(Type::getInt64Ty(C), 2); 1761 Value *BC0 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 1762 Value *Elt = Builder.CreateExtractElement(BC0, (uint64_t)0); 1763 Value *BC = Builder.CreateBitCast(Arg0, 1764 PointerType::getUnqual(Elt->getType()), 1765 "cast"); 1766 Builder.CreateAlignedStore(Elt, BC, Align(1)); 1767 1768 // Remove intrinsic. 1769 CI->eraseFromParent(); 1770 return; 1771 } 1772 1773 if (IsX86 && (Name.startswith("sse.storeu.") || 1774 Name.startswith("sse2.storeu.") || 1775 Name.startswith("avx.storeu."))) { 1776 Value *Arg0 = CI->getArgOperand(0); 1777 Value *Arg1 = CI->getArgOperand(1); 1778 1779 Arg0 = Builder.CreateBitCast(Arg0, 1780 PointerType::getUnqual(Arg1->getType()), 1781 "cast"); 1782 Builder.CreateAlignedStore(Arg1, Arg0, Align(1)); 1783 1784 // Remove intrinsic. 1785 CI->eraseFromParent(); 1786 return; 1787 } 1788 1789 if (IsX86 && Name == "avx512.mask.store.ss") { 1790 Value *Mask = Builder.CreateAnd(CI->getArgOperand(2), Builder.getInt8(1)); 1791 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1792 Mask, false); 1793 1794 // Remove intrinsic. 1795 CI->eraseFromParent(); 1796 return; 1797 } 1798 1799 if (IsX86 && (Name.startswith("avx512.mask.store"))) { 1800 // "avx512.mask.storeu." or "avx512.mask.store." 1801 bool Aligned = Name[17] != 'u'; // "avx512.mask.storeu". 1802 UpgradeMaskedStore(Builder, CI->getArgOperand(0), CI->getArgOperand(1), 1803 CI->getArgOperand(2), Aligned); 1804 1805 // Remove intrinsic. 1806 CI->eraseFromParent(); 1807 return; 1808 } 1809 1810 Value *Rep; 1811 // Upgrade packed integer vector compare intrinsics to compare instructions. 1812 if (IsX86 && (Name.startswith("sse2.pcmp") || 1813 Name.startswith("avx2.pcmp"))) { 1814 // "sse2.pcpmpeq." "sse2.pcmpgt." "avx2.pcmpeq." or "avx2.pcmpgt." 1815 bool CmpEq = Name[9] == 'e'; 1816 Rep = Builder.CreateICmp(CmpEq ? ICmpInst::ICMP_EQ : ICmpInst::ICMP_SGT, 1817 CI->getArgOperand(0), CI->getArgOperand(1)); 1818 Rep = Builder.CreateSExt(Rep, CI->getType(), ""); 1819 } else if (IsX86 && (Name.startswith("avx512.broadcastm"))) { 1820 Type *ExtTy = Type::getInt32Ty(C); 1821 if (CI->getOperand(0)->getType()->isIntegerTy(8)) 1822 ExtTy = Type::getInt64Ty(C); 1823 unsigned NumElts = CI->getType()->getPrimitiveSizeInBits() / 1824 ExtTy->getPrimitiveSizeInBits(); 1825 Rep = Builder.CreateZExt(CI->getArgOperand(0), ExtTy); 1826 Rep = Builder.CreateVectorSplat(NumElts, Rep); 1827 } else if (IsX86 && (Name == "sse.sqrt.ss" || 1828 Name == "sse2.sqrt.sd")) { 1829 Value *Vec = CI->getArgOperand(0); 1830 Value *Elt0 = Builder.CreateExtractElement(Vec, (uint64_t)0); 1831 Function *Intr = Intrinsic::getDeclaration(F->getParent(), 1832 Intrinsic::sqrt, Elt0->getType()); 1833 Elt0 = Builder.CreateCall(Intr, Elt0); 1834 Rep = Builder.CreateInsertElement(Vec, Elt0, (uint64_t)0); 1835 } else if (IsX86 && (Name.startswith("avx.sqrt.p") || 1836 Name.startswith("sse2.sqrt.p") || 1837 Name.startswith("sse.sqrt.p"))) { 1838 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1839 Intrinsic::sqrt, 1840 CI->getType()), 1841 {CI->getArgOperand(0)}); 1842 } else if (IsX86 && (Name.startswith("avx512.mask.sqrt.p"))) { 1843 if (CI->getNumArgOperands() == 4 && 1844 (!isa<ConstantInt>(CI->getArgOperand(3)) || 1845 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 1846 Intrinsic::ID IID = Name[18] == 's' ? Intrinsic::x86_avx512_sqrt_ps_512 1847 : Intrinsic::x86_avx512_sqrt_pd_512; 1848 1849 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(3) }; 1850 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 1851 IID), Args); 1852 } else { 1853 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 1854 Intrinsic::sqrt, 1855 CI->getType()), 1856 {CI->getArgOperand(0)}); 1857 } 1858 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1859 CI->getArgOperand(1)); 1860 } else if (IsX86 && (Name.startswith("avx512.ptestm") || 1861 Name.startswith("avx512.ptestnm"))) { 1862 Value *Op0 = CI->getArgOperand(0); 1863 Value *Op1 = CI->getArgOperand(1); 1864 Value *Mask = CI->getArgOperand(2); 1865 Rep = Builder.CreateAnd(Op0, Op1); 1866 llvm::Type *Ty = Op0->getType(); 1867 Value *Zero = llvm::Constant::getNullValue(Ty); 1868 ICmpInst::Predicate Pred = 1869 Name.startswith("avx512.ptestm") ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ; 1870 Rep = Builder.CreateICmp(Pred, Rep, Zero); 1871 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, Mask); 1872 } else if (IsX86 && (Name.startswith("avx512.mask.pbroadcast"))){ 1873 unsigned NumElts = 1874 cast<VectorType>(CI->getArgOperand(1)->getType())->getNumElements(); 1875 Rep = Builder.CreateVectorSplat(NumElts, CI->getArgOperand(0)); 1876 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 1877 CI->getArgOperand(1)); 1878 } else if (IsX86 && (Name.startswith("avx512.kunpck"))) { 1879 unsigned NumElts = CI->getType()->getScalarSizeInBits(); 1880 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), NumElts); 1881 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), NumElts); 1882 int Indices[64]; 1883 for (unsigned i = 0; i != NumElts; ++i) 1884 Indices[i] = i; 1885 1886 // First extract half of each vector. This gives better codegen than 1887 // doing it in a single shuffle. 1888 LHS = Builder.CreateShuffleVector(LHS, LHS, 1889 makeArrayRef(Indices, NumElts / 2)); 1890 RHS = Builder.CreateShuffleVector(RHS, RHS, 1891 makeArrayRef(Indices, NumElts / 2)); 1892 // Concat the vectors. 1893 // NOTE: Operands have to be swapped to match intrinsic definition. 1894 Rep = Builder.CreateShuffleVector(RHS, LHS, 1895 makeArrayRef(Indices, NumElts)); 1896 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1897 } else if (IsX86 && Name == "avx512.kand.w") { 1898 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1899 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1900 Rep = Builder.CreateAnd(LHS, RHS); 1901 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1902 } else if (IsX86 && Name == "avx512.kandn.w") { 1903 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1904 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1905 LHS = Builder.CreateNot(LHS); 1906 Rep = Builder.CreateAnd(LHS, RHS); 1907 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1908 } else if (IsX86 && Name == "avx512.kor.w") { 1909 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1910 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1911 Rep = Builder.CreateOr(LHS, RHS); 1912 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1913 } else if (IsX86 && Name == "avx512.kxor.w") { 1914 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1915 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1916 Rep = Builder.CreateXor(LHS, RHS); 1917 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1918 } else if (IsX86 && Name == "avx512.kxnor.w") { 1919 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1920 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1921 LHS = Builder.CreateNot(LHS); 1922 Rep = Builder.CreateXor(LHS, RHS); 1923 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1924 } else if (IsX86 && Name == "avx512.knot.w") { 1925 Rep = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1926 Rep = Builder.CreateNot(Rep); 1927 Rep = Builder.CreateBitCast(Rep, CI->getType()); 1928 } else if (IsX86 && 1929 (Name == "avx512.kortestz.w" || Name == "avx512.kortestc.w")) { 1930 Value *LHS = getX86MaskVec(Builder, CI->getArgOperand(0), 16); 1931 Value *RHS = getX86MaskVec(Builder, CI->getArgOperand(1), 16); 1932 Rep = Builder.CreateOr(LHS, RHS); 1933 Rep = Builder.CreateBitCast(Rep, Builder.getInt16Ty()); 1934 Value *C; 1935 if (Name[14] == 'c') 1936 C = ConstantInt::getAllOnesValue(Builder.getInt16Ty()); 1937 else 1938 C = ConstantInt::getNullValue(Builder.getInt16Ty()); 1939 Rep = Builder.CreateICmpEQ(Rep, C); 1940 Rep = Builder.CreateZExt(Rep, Builder.getInt32Ty()); 1941 } else if (IsX86 && (Name == "sse.add.ss" || Name == "sse2.add.sd" || 1942 Name == "sse.sub.ss" || Name == "sse2.sub.sd" || 1943 Name == "sse.mul.ss" || Name == "sse2.mul.sd" || 1944 Name == "sse.div.ss" || Name == "sse2.div.sd")) { 1945 Type *I32Ty = Type::getInt32Ty(C); 1946 Value *Elt0 = Builder.CreateExtractElement(CI->getArgOperand(0), 1947 ConstantInt::get(I32Ty, 0)); 1948 Value *Elt1 = Builder.CreateExtractElement(CI->getArgOperand(1), 1949 ConstantInt::get(I32Ty, 0)); 1950 Value *EltOp; 1951 if (Name.contains(".add.")) 1952 EltOp = Builder.CreateFAdd(Elt0, Elt1); 1953 else if (Name.contains(".sub.")) 1954 EltOp = Builder.CreateFSub(Elt0, Elt1); 1955 else if (Name.contains(".mul.")) 1956 EltOp = Builder.CreateFMul(Elt0, Elt1); 1957 else 1958 EltOp = Builder.CreateFDiv(Elt0, Elt1); 1959 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), EltOp, 1960 ConstantInt::get(I32Ty, 0)); 1961 } else if (IsX86 && Name.startswith("avx512.mask.pcmp")) { 1962 // "avx512.mask.pcmpeq." or "avx512.mask.pcmpgt." 1963 bool CmpEq = Name[16] == 'e'; 1964 Rep = upgradeMaskedCompare(Builder, *CI, CmpEq ? 0 : 6, true); 1965 } else if (IsX86 && Name.startswith("avx512.mask.vpshufbitqmb.")) { 1966 Type *OpTy = CI->getArgOperand(0)->getType(); 1967 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1968 Intrinsic::ID IID; 1969 switch (VecWidth) { 1970 default: llvm_unreachable("Unexpected intrinsic"); 1971 case 128: IID = Intrinsic::x86_avx512_vpshufbitqmb_128; break; 1972 case 256: IID = Intrinsic::x86_avx512_vpshufbitqmb_256; break; 1973 case 512: IID = Intrinsic::x86_avx512_vpshufbitqmb_512; break; 1974 } 1975 1976 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 1977 { CI->getOperand(0), CI->getArgOperand(1) }); 1978 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 1979 } else if (IsX86 && Name.startswith("avx512.mask.fpclass.p")) { 1980 Type *OpTy = CI->getArgOperand(0)->getType(); 1981 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 1982 unsigned EltWidth = OpTy->getScalarSizeInBits(); 1983 Intrinsic::ID IID; 1984 if (VecWidth == 128 && EltWidth == 32) 1985 IID = Intrinsic::x86_avx512_fpclass_ps_128; 1986 else if (VecWidth == 256 && EltWidth == 32) 1987 IID = Intrinsic::x86_avx512_fpclass_ps_256; 1988 else if (VecWidth == 512 && EltWidth == 32) 1989 IID = Intrinsic::x86_avx512_fpclass_ps_512; 1990 else if (VecWidth == 128 && EltWidth == 64) 1991 IID = Intrinsic::x86_avx512_fpclass_pd_128; 1992 else if (VecWidth == 256 && EltWidth == 64) 1993 IID = Intrinsic::x86_avx512_fpclass_pd_256; 1994 else if (VecWidth == 512 && EltWidth == 64) 1995 IID = Intrinsic::x86_avx512_fpclass_pd_512; 1996 else 1997 llvm_unreachable("Unexpected intrinsic"); 1998 1999 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2000 { CI->getOperand(0), CI->getArgOperand(1) }); 2001 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(2)); 2002 } else if (IsX86 && Name.startswith("avx512.mask.cmp.p")) { 2003 Type *OpTy = CI->getArgOperand(0)->getType(); 2004 unsigned VecWidth = OpTy->getPrimitiveSizeInBits(); 2005 unsigned EltWidth = OpTy->getScalarSizeInBits(); 2006 Intrinsic::ID IID; 2007 if (VecWidth == 128 && EltWidth == 32) 2008 IID = Intrinsic::x86_avx512_cmp_ps_128; 2009 else if (VecWidth == 256 && EltWidth == 32) 2010 IID = Intrinsic::x86_avx512_cmp_ps_256; 2011 else if (VecWidth == 512 && EltWidth == 32) 2012 IID = Intrinsic::x86_avx512_cmp_ps_512; 2013 else if (VecWidth == 128 && EltWidth == 64) 2014 IID = Intrinsic::x86_avx512_cmp_pd_128; 2015 else if (VecWidth == 256 && EltWidth == 64) 2016 IID = Intrinsic::x86_avx512_cmp_pd_256; 2017 else if (VecWidth == 512 && EltWidth == 64) 2018 IID = Intrinsic::x86_avx512_cmp_pd_512; 2019 else 2020 llvm_unreachable("Unexpected intrinsic"); 2021 2022 SmallVector<Value *, 4> Args; 2023 Args.push_back(CI->getArgOperand(0)); 2024 Args.push_back(CI->getArgOperand(1)); 2025 Args.push_back(CI->getArgOperand(2)); 2026 if (CI->getNumArgOperands() == 5) 2027 Args.push_back(CI->getArgOperand(4)); 2028 2029 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2030 Args); 2031 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, CI->getArgOperand(3)); 2032 } else if (IsX86 && Name.startswith("avx512.mask.cmp.") && 2033 Name[16] != 'p') { 2034 // Integer compare intrinsics. 2035 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2036 Rep = upgradeMaskedCompare(Builder, *CI, Imm, true); 2037 } else if (IsX86 && Name.startswith("avx512.mask.ucmp.")) { 2038 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2039 Rep = upgradeMaskedCompare(Builder, *CI, Imm, false); 2040 } else if (IsX86 && (Name.startswith("avx512.cvtb2mask.") || 2041 Name.startswith("avx512.cvtw2mask.") || 2042 Name.startswith("avx512.cvtd2mask.") || 2043 Name.startswith("avx512.cvtq2mask."))) { 2044 Value *Op = CI->getArgOperand(0); 2045 Value *Zero = llvm::Constant::getNullValue(Op->getType()); 2046 Rep = Builder.CreateICmp(ICmpInst::ICMP_SLT, Op, Zero); 2047 Rep = ApplyX86MaskOn1BitsVec(Builder, Rep, nullptr); 2048 } else if(IsX86 && (Name == "ssse3.pabs.b.128" || 2049 Name == "ssse3.pabs.w.128" || 2050 Name == "ssse3.pabs.d.128" || 2051 Name.startswith("avx2.pabs") || 2052 Name.startswith("avx512.mask.pabs"))) { 2053 Rep = upgradeAbs(Builder, *CI); 2054 } else if (IsX86 && (Name == "sse41.pmaxsb" || 2055 Name == "sse2.pmaxs.w" || 2056 Name == "sse41.pmaxsd" || 2057 Name.startswith("avx2.pmaxs") || 2058 Name.startswith("avx512.mask.pmaxs"))) { 2059 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SGT); 2060 } else if (IsX86 && (Name == "sse2.pmaxu.b" || 2061 Name == "sse41.pmaxuw" || 2062 Name == "sse41.pmaxud" || 2063 Name.startswith("avx2.pmaxu") || 2064 Name.startswith("avx512.mask.pmaxu"))) { 2065 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_UGT); 2066 } else if (IsX86 && (Name == "sse41.pminsb" || 2067 Name == "sse2.pmins.w" || 2068 Name == "sse41.pminsd" || 2069 Name.startswith("avx2.pmins") || 2070 Name.startswith("avx512.mask.pmins"))) { 2071 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_SLT); 2072 } else if (IsX86 && (Name == "sse2.pminu.b" || 2073 Name == "sse41.pminuw" || 2074 Name == "sse41.pminud" || 2075 Name.startswith("avx2.pminu") || 2076 Name.startswith("avx512.mask.pminu"))) { 2077 Rep = upgradeIntMinMax(Builder, *CI, ICmpInst::ICMP_ULT); 2078 } else if (IsX86 && (Name == "sse2.pmulu.dq" || 2079 Name == "avx2.pmulu.dq" || 2080 Name == "avx512.pmulu.dq.512" || 2081 Name.startswith("avx512.mask.pmulu.dq."))) { 2082 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/false); 2083 } else if (IsX86 && (Name == "sse41.pmuldq" || 2084 Name == "avx2.pmul.dq" || 2085 Name == "avx512.pmul.dq.512" || 2086 Name.startswith("avx512.mask.pmul.dq."))) { 2087 Rep = upgradePMULDQ(Builder, *CI, /*Signed*/true); 2088 } else if (IsX86 && (Name == "sse.cvtsi2ss" || 2089 Name == "sse2.cvtsi2sd" || 2090 Name == "sse.cvtsi642ss" || 2091 Name == "sse2.cvtsi642sd")) { 2092 Rep = Builder.CreateSIToFP( 2093 CI->getArgOperand(1), 2094 cast<VectorType>(CI->getType())->getElementType()); 2095 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2096 } else if (IsX86 && Name == "avx512.cvtusi2sd") { 2097 Rep = Builder.CreateUIToFP( 2098 CI->getArgOperand(1), 2099 cast<VectorType>(CI->getType())->getElementType()); 2100 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2101 } else if (IsX86 && Name == "sse2.cvtss2sd") { 2102 Rep = Builder.CreateExtractElement(CI->getArgOperand(1), (uint64_t)0); 2103 Rep = Builder.CreateFPExt( 2104 Rep, cast<VectorType>(CI->getType())->getElementType()); 2105 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0); 2106 } else if (IsX86 && (Name == "sse2.cvtdq2pd" || 2107 Name == "sse2.cvtdq2ps" || 2108 Name == "avx.cvtdq2.pd.256" || 2109 Name == "avx.cvtdq2.ps.256" || 2110 Name.startswith("avx512.mask.cvtdq2pd.") || 2111 Name.startswith("avx512.mask.cvtudq2pd.") || 2112 Name.startswith("avx512.mask.cvtdq2ps.") || 2113 Name.startswith("avx512.mask.cvtudq2ps.") || 2114 Name.startswith("avx512.mask.cvtqq2pd.") || 2115 Name.startswith("avx512.mask.cvtuqq2pd.") || 2116 Name == "avx512.mask.cvtqq2ps.256" || 2117 Name == "avx512.mask.cvtqq2ps.512" || 2118 Name == "avx512.mask.cvtuqq2ps.256" || 2119 Name == "avx512.mask.cvtuqq2ps.512" || 2120 Name == "sse2.cvtps2pd" || 2121 Name == "avx.cvt.ps2.pd.256" || 2122 Name == "avx512.mask.cvtps2pd.128" || 2123 Name == "avx512.mask.cvtps2pd.256")) { 2124 auto *DstTy = cast<VectorType>(CI->getType()); 2125 Rep = CI->getArgOperand(0); 2126 auto *SrcTy = cast<VectorType>(Rep->getType()); 2127 2128 unsigned NumDstElts = DstTy->getNumElements(); 2129 if (NumDstElts < SrcTy->getNumElements()) { 2130 assert(NumDstElts == 2 && "Unexpected vector size"); 2131 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1}); 2132 } 2133 2134 bool IsPS2PD = SrcTy->getElementType()->isFloatTy(); 2135 bool IsUnsigned = (StringRef::npos != Name.find("cvtu")); 2136 if (IsPS2PD) 2137 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd"); 2138 else if (CI->getNumArgOperands() == 4 && 2139 (!isa<ConstantInt>(CI->getArgOperand(3)) || 2140 cast<ConstantInt>(CI->getArgOperand(3))->getZExtValue() != 4)) { 2141 Intrinsic::ID IID = IsUnsigned ? Intrinsic::x86_avx512_uitofp_round 2142 : Intrinsic::x86_avx512_sitofp_round; 2143 Function *F = Intrinsic::getDeclaration(CI->getModule(), IID, 2144 { DstTy, SrcTy }); 2145 Rep = Builder.CreateCall(F, { Rep, CI->getArgOperand(3) }); 2146 } else { 2147 Rep = IsUnsigned ? Builder.CreateUIToFP(Rep, DstTy, "cvt") 2148 : Builder.CreateSIToFP(Rep, DstTy, "cvt"); 2149 } 2150 2151 if (CI->getNumArgOperands() >= 3) 2152 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2153 CI->getArgOperand(1)); 2154 } else if (IsX86 && (Name.startswith("avx512.mask.vcvtph2ps.") || 2155 Name.startswith("vcvtph2ps."))) { 2156 auto *DstTy = cast<VectorType>(CI->getType()); 2157 Rep = CI->getArgOperand(0); 2158 auto *SrcTy = cast<VectorType>(Rep->getType()); 2159 unsigned NumDstElts = DstTy->getNumElements(); 2160 if (NumDstElts != SrcTy->getNumElements()) { 2161 assert(NumDstElts == 4 && "Unexpected vector size"); 2162 Rep = Builder.CreateShuffleVector(Rep, Rep, ArrayRef<int>{0, 1, 2, 3}); 2163 } 2164 Rep = Builder.CreateBitCast( 2165 Rep, FixedVectorType::get(Type::getHalfTy(C), NumDstElts)); 2166 Rep = Builder.CreateFPExt(Rep, DstTy, "cvtph2ps"); 2167 if (CI->getNumArgOperands() >= 3) 2168 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2169 CI->getArgOperand(1)); 2170 } else if (IsX86 && (Name.startswith("avx512.mask.loadu."))) { 2171 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2172 CI->getArgOperand(1), CI->getArgOperand(2), 2173 /*Aligned*/false); 2174 } else if (IsX86 && (Name.startswith("avx512.mask.load."))) { 2175 Rep = UpgradeMaskedLoad(Builder, CI->getArgOperand(0), 2176 CI->getArgOperand(1),CI->getArgOperand(2), 2177 /*Aligned*/true); 2178 } else if (IsX86 && Name.startswith("avx512.mask.expand.load.")) { 2179 auto *ResultTy = cast<VectorType>(CI->getType()); 2180 Type *PtrTy = ResultTy->getElementType(); 2181 2182 // Cast the pointer to element type. 2183 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2184 llvm::PointerType::getUnqual(PtrTy)); 2185 2186 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2187 ResultTy->getNumElements()); 2188 2189 Function *ELd = Intrinsic::getDeclaration(F->getParent(), 2190 Intrinsic::masked_expandload, 2191 ResultTy); 2192 Rep = Builder.CreateCall(ELd, { Ptr, MaskVec, CI->getOperand(1) }); 2193 } else if (IsX86 && Name.startswith("avx512.mask.compress.store.")) { 2194 auto *ResultTy = cast<VectorType>(CI->getArgOperand(1)->getType()); 2195 Type *PtrTy = ResultTy->getElementType(); 2196 2197 // Cast the pointer to element type. 2198 Value *Ptr = Builder.CreateBitCast(CI->getOperand(0), 2199 llvm::PointerType::getUnqual(PtrTy)); 2200 2201 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2202 ResultTy->getNumElements()); 2203 2204 Function *CSt = Intrinsic::getDeclaration(F->getParent(), 2205 Intrinsic::masked_compressstore, 2206 ResultTy); 2207 Rep = Builder.CreateCall(CSt, { CI->getArgOperand(1), Ptr, MaskVec }); 2208 } else if (IsX86 && (Name.startswith("avx512.mask.compress.") || 2209 Name.startswith("avx512.mask.expand."))) { 2210 auto *ResultTy = cast<VectorType>(CI->getType()); 2211 2212 Value *MaskVec = getX86MaskVec(Builder, CI->getArgOperand(2), 2213 ResultTy->getNumElements()); 2214 2215 bool IsCompress = Name[12] == 'c'; 2216 Intrinsic::ID IID = IsCompress ? Intrinsic::x86_avx512_mask_compress 2217 : Intrinsic::x86_avx512_mask_expand; 2218 Function *Intr = Intrinsic::getDeclaration(F->getParent(), IID, ResultTy); 2219 Rep = Builder.CreateCall(Intr, { CI->getOperand(0), CI->getOperand(1), 2220 MaskVec }); 2221 } else if (IsX86 && Name.startswith("xop.vpcom")) { 2222 bool IsSigned; 2223 if (Name.endswith("ub") || Name.endswith("uw") || Name.endswith("ud") || 2224 Name.endswith("uq")) 2225 IsSigned = false; 2226 else if (Name.endswith("b") || Name.endswith("w") || Name.endswith("d") || 2227 Name.endswith("q")) 2228 IsSigned = true; 2229 else 2230 llvm_unreachable("Unknown suffix"); 2231 2232 unsigned Imm; 2233 if (CI->getNumArgOperands() == 3) { 2234 Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2235 } else { 2236 Name = Name.substr(9); // strip off "xop.vpcom" 2237 if (Name.startswith("lt")) 2238 Imm = 0; 2239 else if (Name.startswith("le")) 2240 Imm = 1; 2241 else if (Name.startswith("gt")) 2242 Imm = 2; 2243 else if (Name.startswith("ge")) 2244 Imm = 3; 2245 else if (Name.startswith("eq")) 2246 Imm = 4; 2247 else if (Name.startswith("ne")) 2248 Imm = 5; 2249 else if (Name.startswith("false")) 2250 Imm = 6; 2251 else if (Name.startswith("true")) 2252 Imm = 7; 2253 else 2254 llvm_unreachable("Unknown condition"); 2255 } 2256 2257 Rep = upgradeX86vpcom(Builder, *CI, Imm, IsSigned); 2258 } else if (IsX86 && Name.startswith("xop.vpcmov")) { 2259 Value *Sel = CI->getArgOperand(2); 2260 Value *NotSel = Builder.CreateNot(Sel); 2261 Value *Sel0 = Builder.CreateAnd(CI->getArgOperand(0), Sel); 2262 Value *Sel1 = Builder.CreateAnd(CI->getArgOperand(1), NotSel); 2263 Rep = Builder.CreateOr(Sel0, Sel1); 2264 } else if (IsX86 && (Name.startswith("xop.vprot") || 2265 Name.startswith("avx512.prol") || 2266 Name.startswith("avx512.mask.prol"))) { 2267 Rep = upgradeX86Rotate(Builder, *CI, false); 2268 } else if (IsX86 && (Name.startswith("avx512.pror") || 2269 Name.startswith("avx512.mask.pror"))) { 2270 Rep = upgradeX86Rotate(Builder, *CI, true); 2271 } else if (IsX86 && (Name.startswith("avx512.vpshld.") || 2272 Name.startswith("avx512.mask.vpshld") || 2273 Name.startswith("avx512.maskz.vpshld"))) { 2274 bool ZeroMask = Name[11] == 'z'; 2275 Rep = upgradeX86ConcatShift(Builder, *CI, false, ZeroMask); 2276 } else if (IsX86 && (Name.startswith("avx512.vpshrd.") || 2277 Name.startswith("avx512.mask.vpshrd") || 2278 Name.startswith("avx512.maskz.vpshrd"))) { 2279 bool ZeroMask = Name[11] == 'z'; 2280 Rep = upgradeX86ConcatShift(Builder, *CI, true, ZeroMask); 2281 } else if (IsX86 && Name == "sse42.crc32.64.8") { 2282 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), 2283 Intrinsic::x86_sse42_crc32_32_8); 2284 Value *Trunc0 = Builder.CreateTrunc(CI->getArgOperand(0), Type::getInt32Ty(C)); 2285 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); 2286 Rep = Builder.CreateZExt(Rep, CI->getType(), ""); 2287 } else if (IsX86 && (Name.startswith("avx.vbroadcast.s") || 2288 Name.startswith("avx512.vbroadcast.s"))) { 2289 // Replace broadcasts with a series of insertelements. 2290 auto *VecTy = cast<VectorType>(CI->getType()); 2291 Type *EltTy = VecTy->getElementType(); 2292 unsigned EltNum = VecTy->getNumElements(); 2293 Value *Cast = Builder.CreateBitCast(CI->getArgOperand(0), 2294 EltTy->getPointerTo()); 2295 Value *Load = Builder.CreateLoad(EltTy, Cast); 2296 Type *I32Ty = Type::getInt32Ty(C); 2297 Rep = UndefValue::get(VecTy); 2298 for (unsigned I = 0; I < EltNum; ++I) 2299 Rep = Builder.CreateInsertElement(Rep, Load, 2300 ConstantInt::get(I32Ty, I)); 2301 } else if (IsX86 && (Name.startswith("sse41.pmovsx") || 2302 Name.startswith("sse41.pmovzx") || 2303 Name.startswith("avx2.pmovsx") || 2304 Name.startswith("avx2.pmovzx") || 2305 Name.startswith("avx512.mask.pmovsx") || 2306 Name.startswith("avx512.mask.pmovzx"))) { 2307 VectorType *SrcTy = cast<VectorType>(CI->getArgOperand(0)->getType()); 2308 VectorType *DstTy = cast<VectorType>(CI->getType()); 2309 unsigned NumDstElts = DstTy->getNumElements(); 2310 2311 // Extract a subvector of the first NumDstElts lanes and sign/zero extend. 2312 SmallVector<int, 8> ShuffleMask(NumDstElts); 2313 for (unsigned i = 0; i != NumDstElts; ++i) 2314 ShuffleMask[i] = i; 2315 2316 Value *SV = Builder.CreateShuffleVector( 2317 CI->getArgOperand(0), UndefValue::get(SrcTy), ShuffleMask); 2318 2319 bool DoSext = (StringRef::npos != Name.find("pmovsx")); 2320 Rep = DoSext ? Builder.CreateSExt(SV, DstTy) 2321 : Builder.CreateZExt(SV, DstTy); 2322 // If there are 3 arguments, it's a masked intrinsic so we need a select. 2323 if (CI->getNumArgOperands() == 3) 2324 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2325 CI->getArgOperand(1)); 2326 } else if (Name == "avx512.mask.pmov.qd.256" || 2327 Name == "avx512.mask.pmov.qd.512" || 2328 Name == "avx512.mask.pmov.wb.256" || 2329 Name == "avx512.mask.pmov.wb.512") { 2330 Type *Ty = CI->getArgOperand(1)->getType(); 2331 Rep = Builder.CreateTrunc(CI->getArgOperand(0), Ty); 2332 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2333 CI->getArgOperand(1)); 2334 } else if (IsX86 && (Name.startswith("avx.vbroadcastf128") || 2335 Name == "avx2.vbroadcasti128")) { 2336 // Replace vbroadcastf128/vbroadcasti128 with a vector load+shuffle. 2337 Type *EltTy = cast<VectorType>(CI->getType())->getElementType(); 2338 unsigned NumSrcElts = 128 / EltTy->getPrimitiveSizeInBits(); 2339 auto *VT = FixedVectorType::get(EltTy, NumSrcElts); 2340 Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0), 2341 PointerType::getUnqual(VT)); 2342 Value *Load = Builder.CreateAlignedLoad(VT, Op, Align(1)); 2343 if (NumSrcElts == 2) 2344 Rep = Builder.CreateShuffleVector( 2345 Load, UndefValue::get(Load->getType()), ArrayRef<int>{0, 1, 0, 1}); 2346 else 2347 Rep = 2348 Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()), 2349 ArrayRef<int>{0, 1, 2, 3, 0, 1, 2, 3}); 2350 } else if (IsX86 && (Name.startswith("avx512.mask.shuf.i") || 2351 Name.startswith("avx512.mask.shuf.f"))) { 2352 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2353 Type *VT = CI->getType(); 2354 unsigned NumLanes = VT->getPrimitiveSizeInBits() / 128; 2355 unsigned NumElementsInLane = 128 / VT->getScalarSizeInBits(); 2356 unsigned ControlBitsMask = NumLanes - 1; 2357 unsigned NumControlBits = NumLanes / 2; 2358 SmallVector<int, 8> ShuffleMask(0); 2359 2360 for (unsigned l = 0; l != NumLanes; ++l) { 2361 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask; 2362 // We actually need the other source. 2363 if (l >= NumLanes / 2) 2364 LaneMask += NumLanes; 2365 for (unsigned i = 0; i != NumElementsInLane; ++i) 2366 ShuffleMask.push_back(LaneMask * NumElementsInLane + i); 2367 } 2368 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2369 CI->getArgOperand(1), ShuffleMask); 2370 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2371 CI->getArgOperand(3)); 2372 }else if (IsX86 && (Name.startswith("avx512.mask.broadcastf") || 2373 Name.startswith("avx512.mask.broadcasti"))) { 2374 unsigned NumSrcElts = 2375 cast<VectorType>(CI->getArgOperand(0)->getType())->getNumElements(); 2376 unsigned NumDstElts = cast<VectorType>(CI->getType())->getNumElements(); 2377 2378 SmallVector<int, 8> ShuffleMask(NumDstElts); 2379 for (unsigned i = 0; i != NumDstElts; ++i) 2380 ShuffleMask[i] = i % NumSrcElts; 2381 2382 Rep = Builder.CreateShuffleVector(CI->getArgOperand(0), 2383 CI->getArgOperand(0), 2384 ShuffleMask); 2385 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2386 CI->getArgOperand(1)); 2387 } else if (IsX86 && (Name.startswith("avx2.pbroadcast") || 2388 Name.startswith("avx2.vbroadcast") || 2389 Name.startswith("avx512.pbroadcast") || 2390 Name.startswith("avx512.mask.broadcast.s"))) { 2391 // Replace vp?broadcasts with a vector shuffle. 2392 Value *Op = CI->getArgOperand(0); 2393 ElementCount EC = cast<VectorType>(CI->getType())->getElementCount(); 2394 Type *MaskTy = VectorType::get(Type::getInt32Ty(C), EC); 2395 Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), 2396 Constant::getNullValue(MaskTy)); 2397 2398 if (CI->getNumArgOperands() == 3) 2399 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2400 CI->getArgOperand(1)); 2401 } else if (IsX86 && (Name.startswith("sse2.padds.") || 2402 Name.startswith("sse2.psubs.") || 2403 Name.startswith("avx2.padds.") || 2404 Name.startswith("avx2.psubs.") || 2405 Name.startswith("avx512.padds.") || 2406 Name.startswith("avx512.psubs.") || 2407 Name.startswith("avx512.mask.padds.") || 2408 Name.startswith("avx512.mask.psubs."))) { 2409 bool IsAdd = Name.contains(".padds"); 2410 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true, IsAdd); 2411 } else if (IsX86 && (Name.startswith("sse2.paddus.") || 2412 Name.startswith("sse2.psubus.") || 2413 Name.startswith("avx2.paddus.") || 2414 Name.startswith("avx2.psubus.") || 2415 Name.startswith("avx512.mask.paddus.") || 2416 Name.startswith("avx512.mask.psubus."))) { 2417 bool IsAdd = Name.contains(".paddus"); 2418 Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false, IsAdd); 2419 } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { 2420 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2421 CI->getArgOperand(1), 2422 CI->getArgOperand(2), 2423 CI->getArgOperand(3), 2424 CI->getArgOperand(4), 2425 false); 2426 } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { 2427 Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), 2428 CI->getArgOperand(1), 2429 CI->getArgOperand(2), 2430 CI->getArgOperand(3), 2431 CI->getArgOperand(4), 2432 true); 2433 } else if (IsX86 && (Name == "sse2.psll.dq" || 2434 Name == "avx2.psll.dq")) { 2435 // 128/256-bit shift left specified in bits. 2436 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2437 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), 2438 Shift / 8); // Shift is in bits. 2439 } else if (IsX86 && (Name == "sse2.psrl.dq" || 2440 Name == "avx2.psrl.dq")) { 2441 // 128/256-bit shift right specified in bits. 2442 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2443 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), 2444 Shift / 8); // Shift is in bits. 2445 } else if (IsX86 && (Name == "sse2.psll.dq.bs" || 2446 Name == "avx2.psll.dq.bs" || 2447 Name == "avx512.psll.dq.512")) { 2448 // 128/256/512-bit shift left specified in bytes. 2449 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2450 Rep = UpgradeX86PSLLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2451 } else if (IsX86 && (Name == "sse2.psrl.dq.bs" || 2452 Name == "avx2.psrl.dq.bs" || 2453 Name == "avx512.psrl.dq.512")) { 2454 // 128/256/512-bit shift right specified in bytes. 2455 unsigned Shift = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2456 Rep = UpgradeX86PSRLDQIntrinsics(Builder, CI->getArgOperand(0), Shift); 2457 } else if (IsX86 && (Name == "sse41.pblendw" || 2458 Name.startswith("sse41.blendp") || 2459 Name.startswith("avx.blend.p") || 2460 Name == "avx2.pblendw" || 2461 Name.startswith("avx2.pblendd."))) { 2462 Value *Op0 = CI->getArgOperand(0); 2463 Value *Op1 = CI->getArgOperand(1); 2464 unsigned Imm = cast <ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2465 VectorType *VecTy = cast<VectorType>(CI->getType()); 2466 unsigned NumElts = VecTy->getNumElements(); 2467 2468 SmallVector<int, 16> Idxs(NumElts); 2469 for (unsigned i = 0; i != NumElts; ++i) 2470 Idxs[i] = ((Imm >> (i%8)) & 1) ? i + NumElts : i; 2471 2472 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2473 } else if (IsX86 && (Name.startswith("avx.vinsertf128.") || 2474 Name == "avx2.vinserti128" || 2475 Name.startswith("avx512.mask.insert"))) { 2476 Value *Op0 = CI->getArgOperand(0); 2477 Value *Op1 = CI->getArgOperand(1); 2478 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2479 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2480 unsigned SrcNumElts = cast<VectorType>(Op1->getType())->getNumElements(); 2481 unsigned Scale = DstNumElts / SrcNumElts; 2482 2483 // Mask off the high bits of the immediate value; hardware ignores those. 2484 Imm = Imm % Scale; 2485 2486 // Extend the second operand into a vector the size of the destination. 2487 Value *UndefV = UndefValue::get(Op1->getType()); 2488 SmallVector<int, 8> Idxs(DstNumElts); 2489 for (unsigned i = 0; i != SrcNumElts; ++i) 2490 Idxs[i] = i; 2491 for (unsigned i = SrcNumElts; i != DstNumElts; ++i) 2492 Idxs[i] = SrcNumElts; 2493 Rep = Builder.CreateShuffleVector(Op1, UndefV, Idxs); 2494 2495 // Insert the second operand into the first operand. 2496 2497 // Note that there is no guarantee that instruction lowering will actually 2498 // produce a vinsertf128 instruction for the created shuffles. In 2499 // particular, the 0 immediate case involves no lane changes, so it can 2500 // be handled as a blend. 2501 2502 // Example of shuffle mask for 32-bit elements: 2503 // Imm = 1 <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> 2504 // Imm = 0 <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7 > 2505 2506 // First fill with identify mask. 2507 for (unsigned i = 0; i != DstNumElts; ++i) 2508 Idxs[i] = i; 2509 // Then replace the elements where we need to insert. 2510 for (unsigned i = 0; i != SrcNumElts; ++i) 2511 Idxs[i + Imm * SrcNumElts] = i + DstNumElts; 2512 Rep = Builder.CreateShuffleVector(Op0, Rep, Idxs); 2513 2514 // If the intrinsic has a mask operand, handle that. 2515 if (CI->getNumArgOperands() == 5) 2516 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2517 CI->getArgOperand(3)); 2518 } else if (IsX86 && (Name.startswith("avx.vextractf128.") || 2519 Name == "avx2.vextracti128" || 2520 Name.startswith("avx512.mask.vextract"))) { 2521 Value *Op0 = CI->getArgOperand(0); 2522 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2523 unsigned DstNumElts = cast<VectorType>(CI->getType())->getNumElements(); 2524 unsigned SrcNumElts = cast<VectorType>(Op0->getType())->getNumElements(); 2525 unsigned Scale = SrcNumElts / DstNumElts; 2526 2527 // Mask off the high bits of the immediate value; hardware ignores those. 2528 Imm = Imm % Scale; 2529 2530 // Get indexes for the subvector of the input vector. 2531 SmallVector<int, 8> Idxs(DstNumElts); 2532 for (unsigned i = 0; i != DstNumElts; ++i) { 2533 Idxs[i] = i + (Imm * DstNumElts); 2534 } 2535 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2536 2537 // If the intrinsic has a mask operand, handle that. 2538 if (CI->getNumArgOperands() == 4) 2539 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2540 CI->getArgOperand(2)); 2541 } else if (!IsX86 && Name == "stackprotectorcheck") { 2542 Rep = nullptr; 2543 } else if (IsX86 && (Name.startswith("avx512.mask.perm.df.") || 2544 Name.startswith("avx512.mask.perm.di."))) { 2545 Value *Op0 = CI->getArgOperand(0); 2546 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2547 VectorType *VecTy = cast<VectorType>(CI->getType()); 2548 unsigned NumElts = VecTy->getNumElements(); 2549 2550 SmallVector<int, 8> Idxs(NumElts); 2551 for (unsigned i = 0; i != NumElts; ++i) 2552 Idxs[i] = (i & ~0x3) + ((Imm >> (2 * (i & 0x3))) & 3); 2553 2554 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2555 2556 if (CI->getNumArgOperands() == 4) 2557 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2558 CI->getArgOperand(2)); 2559 } else if (IsX86 && (Name.startswith("avx.vperm2f128.") || 2560 Name == "avx2.vperm2i128")) { 2561 // The immediate permute control byte looks like this: 2562 // [1:0] - select 128 bits from sources for low half of destination 2563 // [2] - ignore 2564 // [3] - zero low half of destination 2565 // [5:4] - select 128 bits from sources for high half of destination 2566 // [6] - ignore 2567 // [7] - zero high half of destination 2568 2569 uint8_t Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2570 2571 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2572 unsigned HalfSize = NumElts / 2; 2573 SmallVector<int, 8> ShuffleMask(NumElts); 2574 2575 // Determine which operand(s) are actually in use for this instruction. 2576 Value *V0 = (Imm & 0x02) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2577 Value *V1 = (Imm & 0x20) ? CI->getArgOperand(1) : CI->getArgOperand(0); 2578 2579 // If needed, replace operands based on zero mask. 2580 V0 = (Imm & 0x08) ? ConstantAggregateZero::get(CI->getType()) : V0; 2581 V1 = (Imm & 0x80) ? ConstantAggregateZero::get(CI->getType()) : V1; 2582 2583 // Permute low half of result. 2584 unsigned StartIndex = (Imm & 0x01) ? HalfSize : 0; 2585 for (unsigned i = 0; i < HalfSize; ++i) 2586 ShuffleMask[i] = StartIndex + i; 2587 2588 // Permute high half of result. 2589 StartIndex = (Imm & 0x10) ? HalfSize : 0; 2590 for (unsigned i = 0; i < HalfSize; ++i) 2591 ShuffleMask[i + HalfSize] = NumElts + StartIndex + i; 2592 2593 Rep = Builder.CreateShuffleVector(V0, V1, ShuffleMask); 2594 2595 } else if (IsX86 && (Name.startswith("avx.vpermil.") || 2596 Name == "sse2.pshuf.d" || 2597 Name.startswith("avx512.mask.vpermil.p") || 2598 Name.startswith("avx512.mask.pshuf.d."))) { 2599 Value *Op0 = CI->getArgOperand(0); 2600 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2601 VectorType *VecTy = cast<VectorType>(CI->getType()); 2602 unsigned NumElts = VecTy->getNumElements(); 2603 // Calculate the size of each index in the immediate. 2604 unsigned IdxSize = 64 / VecTy->getScalarSizeInBits(); 2605 unsigned IdxMask = ((1 << IdxSize) - 1); 2606 2607 SmallVector<int, 8> Idxs(NumElts); 2608 // Lookup the bits for this element, wrapping around the immediate every 2609 // 8-bits. Elements are grouped into sets of 2 or 4 elements so we need 2610 // to offset by the first index of each group. 2611 for (unsigned i = 0; i != NumElts; ++i) 2612 Idxs[i] = ((Imm >> ((i * IdxSize) % 8)) & IdxMask) | (i & ~IdxMask); 2613 2614 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2615 2616 if (CI->getNumArgOperands() == 4) 2617 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2618 CI->getArgOperand(2)); 2619 } else if (IsX86 && (Name == "sse2.pshufl.w" || 2620 Name.startswith("avx512.mask.pshufl.w."))) { 2621 Value *Op0 = CI->getArgOperand(0); 2622 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2623 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2624 2625 SmallVector<int, 16> Idxs(NumElts); 2626 for (unsigned l = 0; l != NumElts; l += 8) { 2627 for (unsigned i = 0; i != 4; ++i) 2628 Idxs[i + l] = ((Imm >> (2 * i)) & 0x3) + l; 2629 for (unsigned i = 4; i != 8; ++i) 2630 Idxs[i + l] = i + l; 2631 } 2632 2633 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2634 2635 if (CI->getNumArgOperands() == 4) 2636 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2637 CI->getArgOperand(2)); 2638 } else if (IsX86 && (Name == "sse2.pshufh.w" || 2639 Name.startswith("avx512.mask.pshufh.w."))) { 2640 Value *Op0 = CI->getArgOperand(0); 2641 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(1))->getZExtValue(); 2642 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2643 2644 SmallVector<int, 16> Idxs(NumElts); 2645 for (unsigned l = 0; l != NumElts; l += 8) { 2646 for (unsigned i = 0; i != 4; ++i) 2647 Idxs[i + l] = i + l; 2648 for (unsigned i = 0; i != 4; ++i) 2649 Idxs[i + l + 4] = ((Imm >> (2 * i)) & 0x3) + 4 + l; 2650 } 2651 2652 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2653 2654 if (CI->getNumArgOperands() == 4) 2655 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2656 CI->getArgOperand(2)); 2657 } else if (IsX86 && Name.startswith("avx512.mask.shuf.p")) { 2658 Value *Op0 = CI->getArgOperand(0); 2659 Value *Op1 = CI->getArgOperand(1); 2660 unsigned Imm = cast<ConstantInt>(CI->getArgOperand(2))->getZExtValue(); 2661 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2662 2663 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2664 unsigned HalfLaneElts = NumLaneElts / 2; 2665 2666 SmallVector<int, 16> Idxs(NumElts); 2667 for (unsigned i = 0; i != NumElts; ++i) { 2668 // Base index is the starting element of the lane. 2669 Idxs[i] = i - (i % NumLaneElts); 2670 // If we are half way through the lane switch to the other source. 2671 if ((i % NumLaneElts) >= HalfLaneElts) 2672 Idxs[i] += NumElts; 2673 // Now select the specific element. By adding HalfLaneElts bits from 2674 // the immediate. Wrapping around the immediate every 8-bits. 2675 Idxs[i] += (Imm >> ((i * HalfLaneElts) % 8)) & ((1 << HalfLaneElts) - 1); 2676 } 2677 2678 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2679 2680 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, 2681 CI->getArgOperand(3)); 2682 } else if (IsX86 && (Name.startswith("avx512.mask.movddup") || 2683 Name.startswith("avx512.mask.movshdup") || 2684 Name.startswith("avx512.mask.movsldup"))) { 2685 Value *Op0 = CI->getArgOperand(0); 2686 unsigned NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2687 unsigned NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2688 2689 unsigned Offset = 0; 2690 if (Name.startswith("avx512.mask.movshdup.")) 2691 Offset = 1; 2692 2693 SmallVector<int, 16> Idxs(NumElts); 2694 for (unsigned l = 0; l != NumElts; l += NumLaneElts) 2695 for (unsigned i = 0; i != NumLaneElts; i += 2) { 2696 Idxs[i + l + 0] = i + l + Offset; 2697 Idxs[i + l + 1] = i + l + Offset; 2698 } 2699 2700 Rep = Builder.CreateShuffleVector(Op0, Op0, Idxs); 2701 2702 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2703 CI->getArgOperand(1)); 2704 } else if (IsX86 && (Name.startswith("avx512.mask.punpckl") || 2705 Name.startswith("avx512.mask.unpckl."))) { 2706 Value *Op0 = CI->getArgOperand(0); 2707 Value *Op1 = CI->getArgOperand(1); 2708 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2709 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2710 2711 SmallVector<int, 64> Idxs(NumElts); 2712 for (int l = 0; l != NumElts; l += NumLaneElts) 2713 for (int i = 0; i != NumLaneElts; ++i) 2714 Idxs[i + l] = l + (i / 2) + NumElts * (i % 2); 2715 2716 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2717 2718 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2719 CI->getArgOperand(2)); 2720 } else if (IsX86 && (Name.startswith("avx512.mask.punpckh") || 2721 Name.startswith("avx512.mask.unpckh."))) { 2722 Value *Op0 = CI->getArgOperand(0); 2723 Value *Op1 = CI->getArgOperand(1); 2724 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 2725 int NumLaneElts = 128/CI->getType()->getScalarSizeInBits(); 2726 2727 SmallVector<int, 64> Idxs(NumElts); 2728 for (int l = 0; l != NumElts; l += NumLaneElts) 2729 for (int i = 0; i != NumLaneElts; ++i) 2730 Idxs[i + l] = (NumLaneElts / 2) + l + (i / 2) + NumElts * (i % 2); 2731 2732 Rep = Builder.CreateShuffleVector(Op0, Op1, Idxs); 2733 2734 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2735 CI->getArgOperand(2)); 2736 } else if (IsX86 && (Name.startswith("avx512.mask.and.") || 2737 Name.startswith("avx512.mask.pand."))) { 2738 VectorType *FTy = cast<VectorType>(CI->getType()); 2739 VectorType *ITy = VectorType::getInteger(FTy); 2740 Rep = Builder.CreateAnd(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2741 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2742 Rep = Builder.CreateBitCast(Rep, FTy); 2743 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2744 CI->getArgOperand(2)); 2745 } else if (IsX86 && (Name.startswith("avx512.mask.andn.") || 2746 Name.startswith("avx512.mask.pandn."))) { 2747 VectorType *FTy = cast<VectorType>(CI->getType()); 2748 VectorType *ITy = VectorType::getInteger(FTy); 2749 Rep = Builder.CreateNot(Builder.CreateBitCast(CI->getArgOperand(0), ITy)); 2750 Rep = Builder.CreateAnd(Rep, 2751 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2752 Rep = Builder.CreateBitCast(Rep, FTy); 2753 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2754 CI->getArgOperand(2)); 2755 } else if (IsX86 && (Name.startswith("avx512.mask.or.") || 2756 Name.startswith("avx512.mask.por."))) { 2757 VectorType *FTy = cast<VectorType>(CI->getType()); 2758 VectorType *ITy = VectorType::getInteger(FTy); 2759 Rep = Builder.CreateOr(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2760 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2761 Rep = Builder.CreateBitCast(Rep, FTy); 2762 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2763 CI->getArgOperand(2)); 2764 } else if (IsX86 && (Name.startswith("avx512.mask.xor.") || 2765 Name.startswith("avx512.mask.pxor."))) { 2766 VectorType *FTy = cast<VectorType>(CI->getType()); 2767 VectorType *ITy = VectorType::getInteger(FTy); 2768 Rep = Builder.CreateXor(Builder.CreateBitCast(CI->getArgOperand(0), ITy), 2769 Builder.CreateBitCast(CI->getArgOperand(1), ITy)); 2770 Rep = Builder.CreateBitCast(Rep, FTy); 2771 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2772 CI->getArgOperand(2)); 2773 } else if (IsX86 && Name.startswith("avx512.mask.padd.")) { 2774 Rep = Builder.CreateAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2775 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2776 CI->getArgOperand(2)); 2777 } else if (IsX86 && Name.startswith("avx512.mask.psub.")) { 2778 Rep = Builder.CreateSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2779 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2780 CI->getArgOperand(2)); 2781 } else if (IsX86 && Name.startswith("avx512.mask.pmull.")) { 2782 Rep = Builder.CreateMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2783 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2784 CI->getArgOperand(2)); 2785 } else if (IsX86 && Name.startswith("avx512.mask.add.p")) { 2786 if (Name.endswith(".512")) { 2787 Intrinsic::ID IID; 2788 if (Name[17] == 's') 2789 IID = Intrinsic::x86_avx512_add_ps_512; 2790 else 2791 IID = Intrinsic::x86_avx512_add_pd_512; 2792 2793 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2794 { CI->getArgOperand(0), CI->getArgOperand(1), 2795 CI->getArgOperand(4) }); 2796 } else { 2797 Rep = Builder.CreateFAdd(CI->getArgOperand(0), CI->getArgOperand(1)); 2798 } 2799 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2800 CI->getArgOperand(2)); 2801 } else if (IsX86 && Name.startswith("avx512.mask.div.p")) { 2802 if (Name.endswith(".512")) { 2803 Intrinsic::ID IID; 2804 if (Name[17] == 's') 2805 IID = Intrinsic::x86_avx512_div_ps_512; 2806 else 2807 IID = Intrinsic::x86_avx512_div_pd_512; 2808 2809 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2810 { CI->getArgOperand(0), CI->getArgOperand(1), 2811 CI->getArgOperand(4) }); 2812 } else { 2813 Rep = Builder.CreateFDiv(CI->getArgOperand(0), CI->getArgOperand(1)); 2814 } 2815 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2816 CI->getArgOperand(2)); 2817 } else if (IsX86 && Name.startswith("avx512.mask.mul.p")) { 2818 if (Name.endswith(".512")) { 2819 Intrinsic::ID IID; 2820 if (Name[17] == 's') 2821 IID = Intrinsic::x86_avx512_mul_ps_512; 2822 else 2823 IID = Intrinsic::x86_avx512_mul_pd_512; 2824 2825 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2826 { CI->getArgOperand(0), CI->getArgOperand(1), 2827 CI->getArgOperand(4) }); 2828 } else { 2829 Rep = Builder.CreateFMul(CI->getArgOperand(0), CI->getArgOperand(1)); 2830 } 2831 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2832 CI->getArgOperand(2)); 2833 } else if (IsX86 && Name.startswith("avx512.mask.sub.p")) { 2834 if (Name.endswith(".512")) { 2835 Intrinsic::ID IID; 2836 if (Name[17] == 's') 2837 IID = Intrinsic::x86_avx512_sub_ps_512; 2838 else 2839 IID = Intrinsic::x86_avx512_sub_pd_512; 2840 2841 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2842 { CI->getArgOperand(0), CI->getArgOperand(1), 2843 CI->getArgOperand(4) }); 2844 } else { 2845 Rep = Builder.CreateFSub(CI->getArgOperand(0), CI->getArgOperand(1)); 2846 } 2847 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2848 CI->getArgOperand(2)); 2849 } else if (IsX86 && (Name.startswith("avx512.mask.max.p") || 2850 Name.startswith("avx512.mask.min.p")) && 2851 Name.drop_front(18) == ".512") { 2852 bool IsDouble = Name[17] == 'd'; 2853 bool IsMin = Name[13] == 'i'; 2854 static const Intrinsic::ID MinMaxTbl[2][2] = { 2855 { Intrinsic::x86_avx512_max_ps_512, Intrinsic::x86_avx512_max_pd_512 }, 2856 { Intrinsic::x86_avx512_min_ps_512, Intrinsic::x86_avx512_min_pd_512 } 2857 }; 2858 Intrinsic::ID IID = MinMaxTbl[IsMin][IsDouble]; 2859 2860 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 2861 { CI->getArgOperand(0), CI->getArgOperand(1), 2862 CI->getArgOperand(4) }); 2863 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, 2864 CI->getArgOperand(2)); 2865 } else if (IsX86 && Name.startswith("avx512.mask.lzcnt.")) { 2866 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), 2867 Intrinsic::ctlz, 2868 CI->getType()), 2869 { CI->getArgOperand(0), Builder.getInt1(false) }); 2870 Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, 2871 CI->getArgOperand(1)); 2872 } else if (IsX86 && Name.startswith("avx512.mask.psll")) { 2873 bool IsImmediate = Name[16] == 'i' || 2874 (Name.size() > 18 && Name[18] == 'i'); 2875 bool IsVariable = Name[16] == 'v'; 2876 char Size = Name[16] == '.' ? Name[17] : 2877 Name[17] == '.' ? Name[18] : 2878 Name[18] == '.' ? Name[19] : 2879 Name[20]; 2880 2881 Intrinsic::ID IID; 2882 if (IsVariable && Name[17] != '.') { 2883 if (Size == 'd' && Name[17] == '2') // avx512.mask.psllv2.di 2884 IID = Intrinsic::x86_avx2_psllv_q; 2885 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psllv4.di 2886 IID = Intrinsic::x86_avx2_psllv_q_256; 2887 else if (Size == 's' && Name[17] == '4') // avx512.mask.psllv4.si 2888 IID = Intrinsic::x86_avx2_psllv_d; 2889 else if (Size == 's' && Name[17] == '8') // avx512.mask.psllv8.si 2890 IID = Intrinsic::x86_avx2_psllv_d_256; 2891 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psllv8.hi 2892 IID = Intrinsic::x86_avx512_psllv_w_128; 2893 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psllv16.hi 2894 IID = Intrinsic::x86_avx512_psllv_w_256; 2895 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psllv32hi 2896 IID = Intrinsic::x86_avx512_psllv_w_512; 2897 else 2898 llvm_unreachable("Unexpected size"); 2899 } else if (Name.endswith(".128")) { 2900 if (Size == 'd') // avx512.mask.psll.d.128, avx512.mask.psll.di.128 2901 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_d 2902 : Intrinsic::x86_sse2_psll_d; 2903 else if (Size == 'q') // avx512.mask.psll.q.128, avx512.mask.psll.qi.128 2904 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_q 2905 : Intrinsic::x86_sse2_psll_q; 2906 else if (Size == 'w') // avx512.mask.psll.w.128, avx512.mask.psll.wi.128 2907 IID = IsImmediate ? Intrinsic::x86_sse2_pslli_w 2908 : Intrinsic::x86_sse2_psll_w; 2909 else 2910 llvm_unreachable("Unexpected size"); 2911 } else if (Name.endswith(".256")) { 2912 if (Size == 'd') // avx512.mask.psll.d.256, avx512.mask.psll.di.256 2913 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_d 2914 : Intrinsic::x86_avx2_psll_d; 2915 else if (Size == 'q') // avx512.mask.psll.q.256, avx512.mask.psll.qi.256 2916 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_q 2917 : Intrinsic::x86_avx2_psll_q; 2918 else if (Size == 'w') // avx512.mask.psll.w.256, avx512.mask.psll.wi.256 2919 IID = IsImmediate ? Intrinsic::x86_avx2_pslli_w 2920 : Intrinsic::x86_avx2_psll_w; 2921 else 2922 llvm_unreachable("Unexpected size"); 2923 } else { 2924 if (Size == 'd') // psll.di.512, pslli.d, psll.d, psllv.d.512 2925 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_d_512 : 2926 IsVariable ? Intrinsic::x86_avx512_psllv_d_512 : 2927 Intrinsic::x86_avx512_psll_d_512; 2928 else if (Size == 'q') // psll.qi.512, pslli.q, psll.q, psllv.q.512 2929 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_q_512 : 2930 IsVariable ? Intrinsic::x86_avx512_psllv_q_512 : 2931 Intrinsic::x86_avx512_psll_q_512; 2932 else if (Size == 'w') // psll.wi.512, pslli.w, psll.w 2933 IID = IsImmediate ? Intrinsic::x86_avx512_pslli_w_512 2934 : Intrinsic::x86_avx512_psll_w_512; 2935 else 2936 llvm_unreachable("Unexpected size"); 2937 } 2938 2939 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 2940 } else if (IsX86 && Name.startswith("avx512.mask.psrl")) { 2941 bool IsImmediate = Name[16] == 'i' || 2942 (Name.size() > 18 && Name[18] == 'i'); 2943 bool IsVariable = Name[16] == 'v'; 2944 char Size = Name[16] == '.' ? Name[17] : 2945 Name[17] == '.' ? Name[18] : 2946 Name[18] == '.' ? Name[19] : 2947 Name[20]; 2948 2949 Intrinsic::ID IID; 2950 if (IsVariable && Name[17] != '.') { 2951 if (Size == 'd' && Name[17] == '2') // avx512.mask.psrlv2.di 2952 IID = Intrinsic::x86_avx2_psrlv_q; 2953 else if (Size == 'd' && Name[17] == '4') // avx512.mask.psrlv4.di 2954 IID = Intrinsic::x86_avx2_psrlv_q_256; 2955 else if (Size == 's' && Name[17] == '4') // avx512.mask.psrlv4.si 2956 IID = Intrinsic::x86_avx2_psrlv_d; 2957 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrlv8.si 2958 IID = Intrinsic::x86_avx2_psrlv_d_256; 2959 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrlv8.hi 2960 IID = Intrinsic::x86_avx512_psrlv_w_128; 2961 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrlv16.hi 2962 IID = Intrinsic::x86_avx512_psrlv_w_256; 2963 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrlv32hi 2964 IID = Intrinsic::x86_avx512_psrlv_w_512; 2965 else 2966 llvm_unreachable("Unexpected size"); 2967 } else if (Name.endswith(".128")) { 2968 if (Size == 'd') // avx512.mask.psrl.d.128, avx512.mask.psrl.di.128 2969 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_d 2970 : Intrinsic::x86_sse2_psrl_d; 2971 else if (Size == 'q') // avx512.mask.psrl.q.128, avx512.mask.psrl.qi.128 2972 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_q 2973 : Intrinsic::x86_sse2_psrl_q; 2974 else if (Size == 'w') // avx512.mask.psrl.w.128, avx512.mask.psrl.wi.128 2975 IID = IsImmediate ? Intrinsic::x86_sse2_psrli_w 2976 : Intrinsic::x86_sse2_psrl_w; 2977 else 2978 llvm_unreachable("Unexpected size"); 2979 } else if (Name.endswith(".256")) { 2980 if (Size == 'd') // avx512.mask.psrl.d.256, avx512.mask.psrl.di.256 2981 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_d 2982 : Intrinsic::x86_avx2_psrl_d; 2983 else if (Size == 'q') // avx512.mask.psrl.q.256, avx512.mask.psrl.qi.256 2984 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_q 2985 : Intrinsic::x86_avx2_psrl_q; 2986 else if (Size == 'w') // avx512.mask.psrl.w.256, avx512.mask.psrl.wi.256 2987 IID = IsImmediate ? Intrinsic::x86_avx2_psrli_w 2988 : Intrinsic::x86_avx2_psrl_w; 2989 else 2990 llvm_unreachable("Unexpected size"); 2991 } else { 2992 if (Size == 'd') // psrl.di.512, psrli.d, psrl.d, psrl.d.512 2993 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_d_512 : 2994 IsVariable ? Intrinsic::x86_avx512_psrlv_d_512 : 2995 Intrinsic::x86_avx512_psrl_d_512; 2996 else if (Size == 'q') // psrl.qi.512, psrli.q, psrl.q, psrl.q.512 2997 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_q_512 : 2998 IsVariable ? Intrinsic::x86_avx512_psrlv_q_512 : 2999 Intrinsic::x86_avx512_psrl_q_512; 3000 else if (Size == 'w') // psrl.wi.512, psrli.w, psrl.w) 3001 IID = IsImmediate ? Intrinsic::x86_avx512_psrli_w_512 3002 : Intrinsic::x86_avx512_psrl_w_512; 3003 else 3004 llvm_unreachable("Unexpected size"); 3005 } 3006 3007 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3008 } else if (IsX86 && Name.startswith("avx512.mask.psra")) { 3009 bool IsImmediate = Name[16] == 'i' || 3010 (Name.size() > 18 && Name[18] == 'i'); 3011 bool IsVariable = Name[16] == 'v'; 3012 char Size = Name[16] == '.' ? Name[17] : 3013 Name[17] == '.' ? Name[18] : 3014 Name[18] == '.' ? Name[19] : 3015 Name[20]; 3016 3017 Intrinsic::ID IID; 3018 if (IsVariable && Name[17] != '.') { 3019 if (Size == 's' && Name[17] == '4') // avx512.mask.psrav4.si 3020 IID = Intrinsic::x86_avx2_psrav_d; 3021 else if (Size == 's' && Name[17] == '8') // avx512.mask.psrav8.si 3022 IID = Intrinsic::x86_avx2_psrav_d_256; 3023 else if (Size == 'h' && Name[17] == '8') // avx512.mask.psrav8.hi 3024 IID = Intrinsic::x86_avx512_psrav_w_128; 3025 else if (Size == 'h' && Name[17] == '1') // avx512.mask.psrav16.hi 3026 IID = Intrinsic::x86_avx512_psrav_w_256; 3027 else if (Name[17] == '3' && Name[18] == '2') // avx512.mask.psrav32hi 3028 IID = Intrinsic::x86_avx512_psrav_w_512; 3029 else 3030 llvm_unreachable("Unexpected size"); 3031 } else if (Name.endswith(".128")) { 3032 if (Size == 'd') // avx512.mask.psra.d.128, avx512.mask.psra.di.128 3033 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_d 3034 : Intrinsic::x86_sse2_psra_d; 3035 else if (Size == 'q') // avx512.mask.psra.q.128, avx512.mask.psra.qi.128 3036 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_128 : 3037 IsVariable ? Intrinsic::x86_avx512_psrav_q_128 : 3038 Intrinsic::x86_avx512_psra_q_128; 3039 else if (Size == 'w') // avx512.mask.psra.w.128, avx512.mask.psra.wi.128 3040 IID = IsImmediate ? Intrinsic::x86_sse2_psrai_w 3041 : Intrinsic::x86_sse2_psra_w; 3042 else 3043 llvm_unreachable("Unexpected size"); 3044 } else if (Name.endswith(".256")) { 3045 if (Size == 'd') // avx512.mask.psra.d.256, avx512.mask.psra.di.256 3046 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_d 3047 : Intrinsic::x86_avx2_psra_d; 3048 else if (Size == 'q') // avx512.mask.psra.q.256, avx512.mask.psra.qi.256 3049 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_256 : 3050 IsVariable ? Intrinsic::x86_avx512_psrav_q_256 : 3051 Intrinsic::x86_avx512_psra_q_256; 3052 else if (Size == 'w') // avx512.mask.psra.w.256, avx512.mask.psra.wi.256 3053 IID = IsImmediate ? Intrinsic::x86_avx2_psrai_w 3054 : Intrinsic::x86_avx2_psra_w; 3055 else 3056 llvm_unreachable("Unexpected size"); 3057 } else { 3058 if (Size == 'd') // psra.di.512, psrai.d, psra.d, psrav.d.512 3059 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_d_512 : 3060 IsVariable ? Intrinsic::x86_avx512_psrav_d_512 : 3061 Intrinsic::x86_avx512_psra_d_512; 3062 else if (Size == 'q') // psra.qi.512, psrai.q, psra.q 3063 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_q_512 : 3064 IsVariable ? Intrinsic::x86_avx512_psrav_q_512 : 3065 Intrinsic::x86_avx512_psra_q_512; 3066 else if (Size == 'w') // psra.wi.512, psrai.w, psra.w 3067 IID = IsImmediate ? Intrinsic::x86_avx512_psrai_w_512 3068 : Intrinsic::x86_avx512_psra_w_512; 3069 else 3070 llvm_unreachable("Unexpected size"); 3071 } 3072 3073 Rep = UpgradeX86MaskedShift(Builder, *CI, IID); 3074 } else if (IsX86 && Name.startswith("avx512.mask.move.s")) { 3075 Rep = upgradeMaskedMove(Builder, *CI); 3076 } else if (IsX86 && Name.startswith("avx512.cvtmask2")) { 3077 Rep = UpgradeMaskToInt(Builder, *CI); 3078 } else if (IsX86 && Name.endswith(".movntdqa")) { 3079 Module *M = F->getParent(); 3080 MDNode *Node = MDNode::get( 3081 C, ConstantAsMetadata::get(ConstantInt::get(Type::getInt32Ty(C), 1))); 3082 3083 Value *Ptr = CI->getArgOperand(0); 3084 3085 // Convert the type of the pointer to a pointer to the stored type. 3086 Value *BC = Builder.CreateBitCast( 3087 Ptr, PointerType::getUnqual(CI->getType()), "cast"); 3088 LoadInst *LI = Builder.CreateAlignedLoad( 3089 CI->getType(), BC, 3090 Align(CI->getType()->getPrimitiveSizeInBits().getFixedSize() / 8)); 3091 LI->setMetadata(M->getMDKindID("nontemporal"), Node); 3092 Rep = LI; 3093 } else if (IsX86 && (Name.startswith("fma.vfmadd.") || 3094 Name.startswith("fma.vfmsub.") || 3095 Name.startswith("fma.vfnmadd.") || 3096 Name.startswith("fma.vfnmsub."))) { 3097 bool NegMul = Name[6] == 'n'; 3098 bool NegAcc = NegMul ? Name[8] == 's' : Name[7] == 's'; 3099 bool IsScalar = NegMul ? Name[12] == 's' : Name[11] == 's'; 3100 3101 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3102 CI->getArgOperand(2) }; 3103 3104 if (IsScalar) { 3105 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3106 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3107 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3108 } 3109 3110 if (NegMul && !IsScalar) 3111 Ops[0] = Builder.CreateFNeg(Ops[0]); 3112 if (NegMul && IsScalar) 3113 Ops[1] = Builder.CreateFNeg(Ops[1]); 3114 if (NegAcc) 3115 Ops[2] = Builder.CreateFNeg(Ops[2]); 3116 3117 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3118 Intrinsic::fma, 3119 Ops[0]->getType()), 3120 Ops); 3121 3122 if (IsScalar) 3123 Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, 3124 (uint64_t)0); 3125 } else if (IsX86 && Name.startswith("fma4.vfmadd.s")) { 3126 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3127 CI->getArgOperand(2) }; 3128 3129 Ops[0] = Builder.CreateExtractElement(Ops[0], (uint64_t)0); 3130 Ops[1] = Builder.CreateExtractElement(Ops[1], (uint64_t)0); 3131 Ops[2] = Builder.CreateExtractElement(Ops[2], (uint64_t)0); 3132 3133 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), 3134 Intrinsic::fma, 3135 Ops[0]->getType()), 3136 Ops); 3137 3138 Rep = Builder.CreateInsertElement(Constant::getNullValue(CI->getType()), 3139 Rep, (uint64_t)0); 3140 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.s") || 3141 Name.startswith("avx512.maskz.vfmadd.s") || 3142 Name.startswith("avx512.mask3.vfmadd.s") || 3143 Name.startswith("avx512.mask3.vfmsub.s") || 3144 Name.startswith("avx512.mask3.vfnmsub.s"))) { 3145 bool IsMask3 = Name[11] == '3'; 3146 bool IsMaskZ = Name[11] == 'z'; 3147 // Drop the "avx512.mask." to make it easier. 3148 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3149 bool NegMul = Name[2] == 'n'; 3150 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3151 3152 Value *A = CI->getArgOperand(0); 3153 Value *B = CI->getArgOperand(1); 3154 Value *C = CI->getArgOperand(2); 3155 3156 if (NegMul && (IsMask3 || IsMaskZ)) 3157 A = Builder.CreateFNeg(A); 3158 if (NegMul && !(IsMask3 || IsMaskZ)) 3159 B = Builder.CreateFNeg(B); 3160 if (NegAcc) 3161 C = Builder.CreateFNeg(C); 3162 3163 A = Builder.CreateExtractElement(A, (uint64_t)0); 3164 B = Builder.CreateExtractElement(B, (uint64_t)0); 3165 C = Builder.CreateExtractElement(C, (uint64_t)0); 3166 3167 if (!isa<ConstantInt>(CI->getArgOperand(4)) || 3168 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4) { 3169 Value *Ops[] = { A, B, C, CI->getArgOperand(4) }; 3170 3171 Intrinsic::ID IID; 3172 if (Name.back() == 'd') 3173 IID = Intrinsic::x86_avx512_vfmadd_f64; 3174 else 3175 IID = Intrinsic::x86_avx512_vfmadd_f32; 3176 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), IID); 3177 Rep = Builder.CreateCall(FMA, Ops); 3178 } else { 3179 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3180 Intrinsic::fma, 3181 A->getType()); 3182 Rep = Builder.CreateCall(FMA, { A, B, C }); 3183 } 3184 3185 Value *PassThru = IsMaskZ ? Constant::getNullValue(Rep->getType()) : 3186 IsMask3 ? C : A; 3187 3188 // For Mask3 with NegAcc, we need to create a new extractelement that 3189 // avoids the negation above. 3190 if (NegAcc && IsMask3) 3191 PassThru = Builder.CreateExtractElement(CI->getArgOperand(2), 3192 (uint64_t)0); 3193 3194 Rep = EmitX86ScalarSelect(Builder, CI->getArgOperand(3), 3195 Rep, PassThru); 3196 Rep = Builder.CreateInsertElement(CI->getArgOperand(IsMask3 ? 2 : 0), 3197 Rep, (uint64_t)0); 3198 } else if (IsX86 && (Name.startswith("avx512.mask.vfmadd.p") || 3199 Name.startswith("avx512.mask.vfnmadd.p") || 3200 Name.startswith("avx512.mask.vfnmsub.p") || 3201 Name.startswith("avx512.mask3.vfmadd.p") || 3202 Name.startswith("avx512.mask3.vfmsub.p") || 3203 Name.startswith("avx512.mask3.vfnmsub.p") || 3204 Name.startswith("avx512.maskz.vfmadd.p"))) { 3205 bool IsMask3 = Name[11] == '3'; 3206 bool IsMaskZ = Name[11] == 'z'; 3207 // Drop the "avx512.mask." to make it easier. 3208 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3209 bool NegMul = Name[2] == 'n'; 3210 bool NegAcc = NegMul ? Name[4] == 's' : Name[3] == 's'; 3211 3212 Value *A = CI->getArgOperand(0); 3213 Value *B = CI->getArgOperand(1); 3214 Value *C = CI->getArgOperand(2); 3215 3216 if (NegMul && (IsMask3 || IsMaskZ)) 3217 A = Builder.CreateFNeg(A); 3218 if (NegMul && !(IsMask3 || IsMaskZ)) 3219 B = Builder.CreateFNeg(B); 3220 if (NegAcc) 3221 C = Builder.CreateFNeg(C); 3222 3223 if (CI->getNumArgOperands() == 5 && 3224 (!isa<ConstantInt>(CI->getArgOperand(4)) || 3225 cast<ConstantInt>(CI->getArgOperand(4))->getZExtValue() != 4)) { 3226 Intrinsic::ID IID; 3227 // Check the character before ".512" in string. 3228 if (Name[Name.size()-5] == 's') 3229 IID = Intrinsic::x86_avx512_vfmadd_ps_512; 3230 else 3231 IID = Intrinsic::x86_avx512_vfmadd_pd_512; 3232 3233 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3234 { A, B, C, CI->getArgOperand(4) }); 3235 } else { 3236 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), 3237 Intrinsic::fma, 3238 A->getType()); 3239 Rep = Builder.CreateCall(FMA, { A, B, C }); 3240 } 3241 3242 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3243 IsMask3 ? CI->getArgOperand(2) : 3244 CI->getArgOperand(0); 3245 3246 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3247 } else if (IsX86 && Name.startswith("fma.vfmsubadd.p")) { 3248 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3249 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3250 Intrinsic::ID IID; 3251 if (VecWidth == 128 && EltWidth == 32) 3252 IID = Intrinsic::x86_fma_vfmaddsub_ps; 3253 else if (VecWidth == 256 && EltWidth == 32) 3254 IID = Intrinsic::x86_fma_vfmaddsub_ps_256; 3255 else if (VecWidth == 128 && EltWidth == 64) 3256 IID = Intrinsic::x86_fma_vfmaddsub_pd; 3257 else if (VecWidth == 256 && EltWidth == 64) 3258 IID = Intrinsic::x86_fma_vfmaddsub_pd_256; 3259 else 3260 llvm_unreachable("Unexpected intrinsic"); 3261 3262 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3263 CI->getArgOperand(2) }; 3264 Ops[2] = Builder.CreateFNeg(Ops[2]); 3265 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3266 Ops); 3267 } else if (IsX86 && (Name.startswith("avx512.mask.vfmaddsub.p") || 3268 Name.startswith("avx512.mask3.vfmaddsub.p") || 3269 Name.startswith("avx512.maskz.vfmaddsub.p") || 3270 Name.startswith("avx512.mask3.vfmsubadd.p"))) { 3271 bool IsMask3 = Name[11] == '3'; 3272 bool IsMaskZ = Name[11] == 'z'; 3273 // Drop the "avx512.mask." to make it easier. 3274 Name = Name.drop_front(IsMask3 || IsMaskZ ? 13 : 12); 3275 bool IsSubAdd = Name[3] == 's'; 3276 if (CI->getNumArgOperands() == 5) { 3277 Intrinsic::ID IID; 3278 // Check the character before ".512" in string. 3279 if (Name[Name.size()-5] == 's') 3280 IID = Intrinsic::x86_avx512_vfmaddsub_ps_512; 3281 else 3282 IID = Intrinsic::x86_avx512_vfmaddsub_pd_512; 3283 3284 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3285 CI->getArgOperand(2), CI->getArgOperand(4) }; 3286 if (IsSubAdd) 3287 Ops[2] = Builder.CreateFNeg(Ops[2]); 3288 3289 Rep = Builder.CreateCall(Intrinsic::getDeclaration(F->getParent(), IID), 3290 Ops); 3291 } else { 3292 int NumElts = cast<VectorType>(CI->getType())->getNumElements(); 3293 3294 Value *Ops[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3295 CI->getArgOperand(2) }; 3296 3297 Function *FMA = Intrinsic::getDeclaration(CI->getModule(), Intrinsic::fma, 3298 Ops[0]->getType()); 3299 Value *Odd = Builder.CreateCall(FMA, Ops); 3300 Ops[2] = Builder.CreateFNeg(Ops[2]); 3301 Value *Even = Builder.CreateCall(FMA, Ops); 3302 3303 if (IsSubAdd) 3304 std::swap(Even, Odd); 3305 3306 SmallVector<int, 32> Idxs(NumElts); 3307 for (int i = 0; i != NumElts; ++i) 3308 Idxs[i] = i + (i % 2) * NumElts; 3309 3310 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); 3311 } 3312 3313 Value *PassThru = IsMaskZ ? llvm::Constant::getNullValue(CI->getType()) : 3314 IsMask3 ? CI->getArgOperand(2) : 3315 CI->getArgOperand(0); 3316 3317 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3318 } else if (IsX86 && (Name.startswith("avx512.mask.pternlog.") || 3319 Name.startswith("avx512.maskz.pternlog."))) { 3320 bool ZeroMask = Name[11] == 'z'; 3321 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3322 unsigned EltWidth = CI->getType()->getScalarSizeInBits(); 3323 Intrinsic::ID IID; 3324 if (VecWidth == 128 && EltWidth == 32) 3325 IID = Intrinsic::x86_avx512_pternlog_d_128; 3326 else if (VecWidth == 256 && EltWidth == 32) 3327 IID = Intrinsic::x86_avx512_pternlog_d_256; 3328 else if (VecWidth == 512 && EltWidth == 32) 3329 IID = Intrinsic::x86_avx512_pternlog_d_512; 3330 else if (VecWidth == 128 && EltWidth == 64) 3331 IID = Intrinsic::x86_avx512_pternlog_q_128; 3332 else if (VecWidth == 256 && EltWidth == 64) 3333 IID = Intrinsic::x86_avx512_pternlog_q_256; 3334 else if (VecWidth == 512 && EltWidth == 64) 3335 IID = Intrinsic::x86_avx512_pternlog_q_512; 3336 else 3337 llvm_unreachable("Unexpected intrinsic"); 3338 3339 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3340 CI->getArgOperand(2), CI->getArgOperand(3) }; 3341 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3342 Args); 3343 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3344 : CI->getArgOperand(0); 3345 Rep = EmitX86Select(Builder, CI->getArgOperand(4), Rep, PassThru); 3346 } else if (IsX86 && (Name.startswith("avx512.mask.vpmadd52") || 3347 Name.startswith("avx512.maskz.vpmadd52"))) { 3348 bool ZeroMask = Name[11] == 'z'; 3349 bool High = Name[20] == 'h' || Name[21] == 'h'; 3350 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3351 Intrinsic::ID IID; 3352 if (VecWidth == 128 && !High) 3353 IID = Intrinsic::x86_avx512_vpmadd52l_uq_128; 3354 else if (VecWidth == 256 && !High) 3355 IID = Intrinsic::x86_avx512_vpmadd52l_uq_256; 3356 else if (VecWidth == 512 && !High) 3357 IID = Intrinsic::x86_avx512_vpmadd52l_uq_512; 3358 else if (VecWidth == 128 && High) 3359 IID = Intrinsic::x86_avx512_vpmadd52h_uq_128; 3360 else if (VecWidth == 256 && High) 3361 IID = Intrinsic::x86_avx512_vpmadd52h_uq_256; 3362 else if (VecWidth == 512 && High) 3363 IID = Intrinsic::x86_avx512_vpmadd52h_uq_512; 3364 else 3365 llvm_unreachable("Unexpected intrinsic"); 3366 3367 Value *Args[] = { CI->getArgOperand(0) , CI->getArgOperand(1), 3368 CI->getArgOperand(2) }; 3369 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3370 Args); 3371 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3372 : CI->getArgOperand(0); 3373 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3374 } else if (IsX86 && (Name.startswith("avx512.mask.vpermi2var.") || 3375 Name.startswith("avx512.mask.vpermt2var.") || 3376 Name.startswith("avx512.maskz.vpermt2var."))) { 3377 bool ZeroMask = Name[11] == 'z'; 3378 bool IndexForm = Name[17] == 'i'; 3379 Rep = UpgradeX86VPERMT2Intrinsics(Builder, *CI, ZeroMask, IndexForm); 3380 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpbusd.") || 3381 Name.startswith("avx512.maskz.vpdpbusd.") || 3382 Name.startswith("avx512.mask.vpdpbusds.") || 3383 Name.startswith("avx512.maskz.vpdpbusds."))) { 3384 bool ZeroMask = Name[11] == 'z'; 3385 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3386 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3387 Intrinsic::ID IID; 3388 if (VecWidth == 128 && !IsSaturating) 3389 IID = Intrinsic::x86_avx512_vpdpbusd_128; 3390 else if (VecWidth == 256 && !IsSaturating) 3391 IID = Intrinsic::x86_avx512_vpdpbusd_256; 3392 else if (VecWidth == 512 && !IsSaturating) 3393 IID = Intrinsic::x86_avx512_vpdpbusd_512; 3394 else if (VecWidth == 128 && IsSaturating) 3395 IID = Intrinsic::x86_avx512_vpdpbusds_128; 3396 else if (VecWidth == 256 && IsSaturating) 3397 IID = Intrinsic::x86_avx512_vpdpbusds_256; 3398 else if (VecWidth == 512 && IsSaturating) 3399 IID = Intrinsic::x86_avx512_vpdpbusds_512; 3400 else 3401 llvm_unreachable("Unexpected intrinsic"); 3402 3403 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3404 CI->getArgOperand(2) }; 3405 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3406 Args); 3407 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3408 : CI->getArgOperand(0); 3409 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3410 } else if (IsX86 && (Name.startswith("avx512.mask.vpdpwssd.") || 3411 Name.startswith("avx512.maskz.vpdpwssd.") || 3412 Name.startswith("avx512.mask.vpdpwssds.") || 3413 Name.startswith("avx512.maskz.vpdpwssds."))) { 3414 bool ZeroMask = Name[11] == 'z'; 3415 bool IsSaturating = Name[ZeroMask ? 21 : 20] == 's'; 3416 unsigned VecWidth = CI->getType()->getPrimitiveSizeInBits(); 3417 Intrinsic::ID IID; 3418 if (VecWidth == 128 && !IsSaturating) 3419 IID = Intrinsic::x86_avx512_vpdpwssd_128; 3420 else if (VecWidth == 256 && !IsSaturating) 3421 IID = Intrinsic::x86_avx512_vpdpwssd_256; 3422 else if (VecWidth == 512 && !IsSaturating) 3423 IID = Intrinsic::x86_avx512_vpdpwssd_512; 3424 else if (VecWidth == 128 && IsSaturating) 3425 IID = Intrinsic::x86_avx512_vpdpwssds_128; 3426 else if (VecWidth == 256 && IsSaturating) 3427 IID = Intrinsic::x86_avx512_vpdpwssds_256; 3428 else if (VecWidth == 512 && IsSaturating) 3429 IID = Intrinsic::x86_avx512_vpdpwssds_512; 3430 else 3431 llvm_unreachable("Unexpected intrinsic"); 3432 3433 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3434 CI->getArgOperand(2) }; 3435 Rep = Builder.CreateCall(Intrinsic::getDeclaration(CI->getModule(), IID), 3436 Args); 3437 Value *PassThru = ZeroMask ? ConstantAggregateZero::get(CI->getType()) 3438 : CI->getArgOperand(0); 3439 Rep = EmitX86Select(Builder, CI->getArgOperand(3), Rep, PassThru); 3440 } else if (IsX86 && (Name == "addcarryx.u32" || Name == "addcarryx.u64" || 3441 Name == "addcarry.u32" || Name == "addcarry.u64" || 3442 Name == "subborrow.u32" || Name == "subborrow.u64")) { 3443 Intrinsic::ID IID; 3444 if (Name[0] == 'a' && Name.back() == '2') 3445 IID = Intrinsic::x86_addcarry_32; 3446 else if (Name[0] == 'a' && Name.back() == '4') 3447 IID = Intrinsic::x86_addcarry_64; 3448 else if (Name[0] == 's' && Name.back() == '2') 3449 IID = Intrinsic::x86_subborrow_32; 3450 else if (Name[0] == 's' && Name.back() == '4') 3451 IID = Intrinsic::x86_subborrow_64; 3452 else 3453 llvm_unreachable("Unexpected intrinsic"); 3454 3455 // Make a call with 3 operands. 3456 Value *Args[] = { CI->getArgOperand(0), CI->getArgOperand(1), 3457 CI->getArgOperand(2)}; 3458 Value *NewCall = Builder.CreateCall( 3459 Intrinsic::getDeclaration(CI->getModule(), IID), 3460 Args); 3461 3462 // Extract the second result and store it. 3463 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3464 // Cast the pointer to the right type. 3465 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(3), 3466 llvm::PointerType::getUnqual(Data->getType())); 3467 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3468 // Replace the original call result with the first result of the new call. 3469 Value *CF = Builder.CreateExtractValue(NewCall, 0); 3470 3471 CI->replaceAllUsesWith(CF); 3472 Rep = nullptr; 3473 } else if (IsX86 && Name.startswith("avx512.mask.") && 3474 upgradeAVX512MaskToSelect(Name, Builder, *CI, Rep)) { 3475 // Rep will be updated by the call in the condition. 3476 } else if (IsNVVM && (Name == "abs.i" || Name == "abs.ll")) { 3477 Value *Arg = CI->getArgOperand(0); 3478 Value *Neg = Builder.CreateNeg(Arg, "neg"); 3479 Value *Cmp = Builder.CreateICmpSGE( 3480 Arg, llvm::Constant::getNullValue(Arg->getType()), "abs.cond"); 3481 Rep = Builder.CreateSelect(Cmp, Arg, Neg, "abs"); 3482 } else if (IsNVVM && (Name.startswith("atomic.load.add.f32.p") || 3483 Name.startswith("atomic.load.add.f64.p"))) { 3484 Value *Ptr = CI->getArgOperand(0); 3485 Value *Val = CI->getArgOperand(1); 3486 Rep = Builder.CreateAtomicRMW(AtomicRMWInst::FAdd, Ptr, Val, 3487 AtomicOrdering::SequentiallyConsistent); 3488 } else if (IsNVVM && (Name == "max.i" || Name == "max.ll" || 3489 Name == "max.ui" || Name == "max.ull")) { 3490 Value *Arg0 = CI->getArgOperand(0); 3491 Value *Arg1 = CI->getArgOperand(1); 3492 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3493 ? Builder.CreateICmpUGE(Arg0, Arg1, "max.cond") 3494 : Builder.CreateICmpSGE(Arg0, Arg1, "max.cond"); 3495 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "max"); 3496 } else if (IsNVVM && (Name == "min.i" || Name == "min.ll" || 3497 Name == "min.ui" || Name == "min.ull")) { 3498 Value *Arg0 = CI->getArgOperand(0); 3499 Value *Arg1 = CI->getArgOperand(1); 3500 Value *Cmp = Name.endswith(".ui") || Name.endswith(".ull") 3501 ? Builder.CreateICmpULE(Arg0, Arg1, "min.cond") 3502 : Builder.CreateICmpSLE(Arg0, Arg1, "min.cond"); 3503 Rep = Builder.CreateSelect(Cmp, Arg0, Arg1, "min"); 3504 } else if (IsNVVM && Name == "clz.ll") { 3505 // llvm.nvvm.clz.ll returns an i32, but llvm.ctlz.i64 and returns an i64. 3506 Value *Arg = CI->getArgOperand(0); 3507 Value *Ctlz = Builder.CreateCall( 3508 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctlz, 3509 {Arg->getType()}), 3510 {Arg, Builder.getFalse()}, "ctlz"); 3511 Rep = Builder.CreateTrunc(Ctlz, Builder.getInt32Ty(), "ctlz.trunc"); 3512 } else if (IsNVVM && Name == "popc.ll") { 3513 // llvm.nvvm.popc.ll returns an i32, but llvm.ctpop.i64 and returns an 3514 // i64. 3515 Value *Arg = CI->getArgOperand(0); 3516 Value *Popc = Builder.CreateCall( 3517 Intrinsic::getDeclaration(F->getParent(), Intrinsic::ctpop, 3518 {Arg->getType()}), 3519 Arg, "ctpop"); 3520 Rep = Builder.CreateTrunc(Popc, Builder.getInt32Ty(), "ctpop.trunc"); 3521 } else if (IsNVVM && Name == "h2f") { 3522 Rep = Builder.CreateCall(Intrinsic::getDeclaration( 3523 F->getParent(), Intrinsic::convert_from_fp16, 3524 {Builder.getFloatTy()}), 3525 CI->getArgOperand(0), "h2f"); 3526 } else { 3527 llvm_unreachable("Unknown function for CallInst upgrade."); 3528 } 3529 3530 if (Rep) 3531 CI->replaceAllUsesWith(Rep); 3532 CI->eraseFromParent(); 3533 return; 3534 } 3535 3536 const auto &DefaultCase = [&NewFn, &CI]() -> void { 3537 // Handle generic mangling change, but nothing else 3538 assert( 3539 (CI->getCalledFunction()->getName() != NewFn->getName()) && 3540 "Unknown function for CallInst upgrade and isn't just a name change"); 3541 CI->setCalledFunction(NewFn); 3542 }; 3543 CallInst *NewCall = nullptr; 3544 switch (NewFn->getIntrinsicID()) { 3545 default: { 3546 DefaultCase(); 3547 return; 3548 } 3549 case Intrinsic::experimental_vector_reduce_v2_fmul: { 3550 SmallVector<Value *, 2> Args; 3551 if (CI->isFast()) 3552 Args.push_back(ConstantFP::get(CI->getOperand(0)->getType(), 1.0)); 3553 else 3554 Args.push_back(CI->getOperand(0)); 3555 Args.push_back(CI->getOperand(1)); 3556 NewCall = Builder.CreateCall(NewFn, Args); 3557 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3558 break; 3559 } 3560 case Intrinsic::experimental_vector_reduce_v2_fadd: { 3561 SmallVector<Value *, 2> Args; 3562 if (CI->isFast()) 3563 Args.push_back(Constant::getNullValue(CI->getOperand(0)->getType())); 3564 else 3565 Args.push_back(CI->getOperand(0)); 3566 Args.push_back(CI->getOperand(1)); 3567 NewCall = Builder.CreateCall(NewFn, Args); 3568 cast<Instruction>(NewCall)->copyFastMathFlags(CI); 3569 break; 3570 } 3571 case Intrinsic::arm_neon_vld1: 3572 case Intrinsic::arm_neon_vld2: 3573 case Intrinsic::arm_neon_vld3: 3574 case Intrinsic::arm_neon_vld4: 3575 case Intrinsic::arm_neon_vld2lane: 3576 case Intrinsic::arm_neon_vld3lane: 3577 case Intrinsic::arm_neon_vld4lane: 3578 case Intrinsic::arm_neon_vst1: 3579 case Intrinsic::arm_neon_vst2: 3580 case Intrinsic::arm_neon_vst3: 3581 case Intrinsic::arm_neon_vst4: 3582 case Intrinsic::arm_neon_vst2lane: 3583 case Intrinsic::arm_neon_vst3lane: 3584 case Intrinsic::arm_neon_vst4lane: { 3585 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3586 CI->arg_operands().end()); 3587 NewCall = Builder.CreateCall(NewFn, Args); 3588 break; 3589 } 3590 3591 case Intrinsic::bitreverse: 3592 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3593 break; 3594 3595 case Intrinsic::ctlz: 3596 case Intrinsic::cttz: 3597 assert(CI->getNumArgOperands() == 1 && 3598 "Mismatch between function args and call args"); 3599 NewCall = 3600 Builder.CreateCall(NewFn, {CI->getArgOperand(0), Builder.getFalse()}); 3601 break; 3602 3603 case Intrinsic::objectsize: { 3604 Value *NullIsUnknownSize = CI->getNumArgOperands() == 2 3605 ? Builder.getFalse() 3606 : CI->getArgOperand(2); 3607 Value *Dynamic = 3608 CI->getNumArgOperands() < 4 ? Builder.getFalse() : CI->getArgOperand(3); 3609 NewCall = Builder.CreateCall( 3610 NewFn, {CI->getArgOperand(0), CI->getArgOperand(1), NullIsUnknownSize, Dynamic}); 3611 break; 3612 } 3613 3614 case Intrinsic::ctpop: 3615 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3616 break; 3617 3618 case Intrinsic::convert_from_fp16: 3619 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(0)}); 3620 break; 3621 3622 case Intrinsic::dbg_value: 3623 // Upgrade from the old version that had an extra offset argument. 3624 assert(CI->getNumArgOperands() == 4); 3625 // Drop nonzero offsets instead of attempting to upgrade them. 3626 if (auto *Offset = dyn_cast_or_null<Constant>(CI->getArgOperand(1))) 3627 if (Offset->isZeroValue()) { 3628 NewCall = Builder.CreateCall( 3629 NewFn, 3630 {CI->getArgOperand(0), CI->getArgOperand(2), CI->getArgOperand(3)}); 3631 break; 3632 } 3633 CI->eraseFromParent(); 3634 return; 3635 3636 case Intrinsic::x86_xop_vfrcz_ss: 3637 case Intrinsic::x86_xop_vfrcz_sd: 3638 NewCall = Builder.CreateCall(NewFn, {CI->getArgOperand(1)}); 3639 break; 3640 3641 case Intrinsic::x86_xop_vpermil2pd: 3642 case Intrinsic::x86_xop_vpermil2ps: 3643 case Intrinsic::x86_xop_vpermil2pd_256: 3644 case Intrinsic::x86_xop_vpermil2ps_256: { 3645 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3646 CI->arg_operands().end()); 3647 VectorType *FltIdxTy = cast<VectorType>(Args[2]->getType()); 3648 VectorType *IntIdxTy = VectorType::getInteger(FltIdxTy); 3649 Args[2] = Builder.CreateBitCast(Args[2], IntIdxTy); 3650 NewCall = Builder.CreateCall(NewFn, Args); 3651 break; 3652 } 3653 3654 case Intrinsic::x86_sse41_ptestc: 3655 case Intrinsic::x86_sse41_ptestz: 3656 case Intrinsic::x86_sse41_ptestnzc: { 3657 // The arguments for these intrinsics used to be v4f32, and changed 3658 // to v2i64. This is purely a nop, since those are bitwise intrinsics. 3659 // So, the only thing required is a bitcast for both arguments. 3660 // First, check the arguments have the old type. 3661 Value *Arg0 = CI->getArgOperand(0); 3662 if (Arg0->getType() != FixedVectorType::get(Type::getFloatTy(C), 4)) 3663 return; 3664 3665 // Old intrinsic, add bitcasts 3666 Value *Arg1 = CI->getArgOperand(1); 3667 3668 auto *NewVecTy = FixedVectorType::get(Type::getInt64Ty(C), 2); 3669 3670 Value *BC0 = Builder.CreateBitCast(Arg0, NewVecTy, "cast"); 3671 Value *BC1 = Builder.CreateBitCast(Arg1, NewVecTy, "cast"); 3672 3673 NewCall = Builder.CreateCall(NewFn, {BC0, BC1}); 3674 break; 3675 } 3676 3677 case Intrinsic::x86_rdtscp: { 3678 // This used to take 1 arguments. If we have no arguments, it is already 3679 // upgraded. 3680 if (CI->getNumOperands() == 0) 3681 return; 3682 3683 NewCall = Builder.CreateCall(NewFn); 3684 // Extract the second result and store it. 3685 Value *Data = Builder.CreateExtractValue(NewCall, 1); 3686 // Cast the pointer to the right type. 3687 Value *Ptr = Builder.CreateBitCast(CI->getArgOperand(0), 3688 llvm::PointerType::getUnqual(Data->getType())); 3689 Builder.CreateAlignedStore(Data, Ptr, Align(1)); 3690 // Replace the original call result with the first result of the new call. 3691 Value *TSC = Builder.CreateExtractValue(NewCall, 0); 3692 3693 std::string Name = std::string(CI->getName()); 3694 if (!Name.empty()) { 3695 CI->setName(Name + ".old"); 3696 NewCall->setName(Name); 3697 } 3698 CI->replaceAllUsesWith(TSC); 3699 CI->eraseFromParent(); 3700 return; 3701 } 3702 3703 case Intrinsic::x86_sse41_insertps: 3704 case Intrinsic::x86_sse41_dppd: 3705 case Intrinsic::x86_sse41_dpps: 3706 case Intrinsic::x86_sse41_mpsadbw: 3707 case Intrinsic::x86_avx_dp_ps_256: 3708 case Intrinsic::x86_avx2_mpsadbw: { 3709 // Need to truncate the last argument from i32 to i8 -- this argument models 3710 // an inherently 8-bit immediate operand to these x86 instructions. 3711 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3712 CI->arg_operands().end()); 3713 3714 // Replace the last argument with a trunc. 3715 Args.back() = Builder.CreateTrunc(Args.back(), Type::getInt8Ty(C), "trunc"); 3716 NewCall = Builder.CreateCall(NewFn, Args); 3717 break; 3718 } 3719 3720 case Intrinsic::thread_pointer: { 3721 NewCall = Builder.CreateCall(NewFn, {}); 3722 break; 3723 } 3724 3725 case Intrinsic::invariant_start: 3726 case Intrinsic::invariant_end: 3727 case Intrinsic::masked_load: 3728 case Intrinsic::masked_store: 3729 case Intrinsic::masked_gather: 3730 case Intrinsic::masked_scatter: { 3731 SmallVector<Value *, 4> Args(CI->arg_operands().begin(), 3732 CI->arg_operands().end()); 3733 NewCall = Builder.CreateCall(NewFn, Args); 3734 break; 3735 } 3736 3737 case Intrinsic::memcpy: 3738 case Intrinsic::memmove: 3739 case Intrinsic::memset: { 3740 // We have to make sure that the call signature is what we're expecting. 3741 // We only want to change the old signatures by removing the alignment arg: 3742 // @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i32, i1) 3743 // -> @llvm.mem[cpy|move]...(i8*, i8*, i[32|i64], i1) 3744 // @llvm.memset...(i8*, i8, i[32|64], i32, i1) 3745 // -> @llvm.memset...(i8*, i8, i[32|64], i1) 3746 // Note: i8*'s in the above can be any pointer type 3747 if (CI->getNumArgOperands() != 5) { 3748 DefaultCase(); 3749 return; 3750 } 3751 // Remove alignment argument (3), and add alignment attributes to the 3752 // dest/src pointers. 3753 Value *Args[4] = {CI->getArgOperand(0), CI->getArgOperand(1), 3754 CI->getArgOperand(2), CI->getArgOperand(4)}; 3755 NewCall = Builder.CreateCall(NewFn, Args); 3756 auto *MemCI = cast<MemIntrinsic>(NewCall); 3757 // All mem intrinsics support dest alignment. 3758 const ConstantInt *Align = cast<ConstantInt>(CI->getArgOperand(3)); 3759 MemCI->setDestAlignment(Align->getZExtValue()); 3760 // Memcpy/Memmove also support source alignment. 3761 if (auto *MTI = dyn_cast<MemTransferInst>(MemCI)) 3762 MTI->setSourceAlignment(Align->getZExtValue()); 3763 break; 3764 } 3765 } 3766 assert(NewCall && "Should have either set this variable or returned through " 3767 "the default case"); 3768 std::string Name = std::string(CI->getName()); 3769 if (!Name.empty()) { 3770 CI->setName(Name + ".old"); 3771 NewCall->setName(Name); 3772 } 3773 CI->replaceAllUsesWith(NewCall); 3774 CI->eraseFromParent(); 3775 } 3776 3777 void llvm::UpgradeCallsToIntrinsic(Function *F) { 3778 assert(F && "Illegal attempt to upgrade a non-existent intrinsic."); 3779 3780 // Check if this function should be upgraded and get the replacement function 3781 // if there is one. 3782 Function *NewFn; 3783 if (UpgradeIntrinsicFunction(F, NewFn)) { 3784 // Replace all users of the old function with the new function or new 3785 // instructions. This is not a range loop because the call is deleted. 3786 for (auto UI = F->user_begin(), UE = F->user_end(); UI != UE; ) 3787 if (CallInst *CI = dyn_cast<CallInst>(*UI++)) 3788 UpgradeIntrinsicCall(CI, NewFn); 3789 3790 // Remove old function, no longer used, from the module. 3791 F->eraseFromParent(); 3792 } 3793 } 3794 3795 MDNode *llvm::UpgradeTBAANode(MDNode &MD) { 3796 // Check if the tag uses struct-path aware TBAA format. 3797 if (isa<MDNode>(MD.getOperand(0)) && MD.getNumOperands() >= 3) 3798 return &MD; 3799 3800 auto &Context = MD.getContext(); 3801 if (MD.getNumOperands() == 3) { 3802 Metadata *Elts[] = {MD.getOperand(0), MD.getOperand(1)}; 3803 MDNode *ScalarType = MDNode::get(Context, Elts); 3804 // Create a MDNode <ScalarType, ScalarType, offset 0, const> 3805 Metadata *Elts2[] = {ScalarType, ScalarType, 3806 ConstantAsMetadata::get( 3807 Constant::getNullValue(Type::getInt64Ty(Context))), 3808 MD.getOperand(2)}; 3809 return MDNode::get(Context, Elts2); 3810 } 3811 // Create a MDNode <MD, MD, offset 0> 3812 Metadata *Elts[] = {&MD, &MD, ConstantAsMetadata::get(Constant::getNullValue( 3813 Type::getInt64Ty(Context)))}; 3814 return MDNode::get(Context, Elts); 3815 } 3816 3817 Instruction *llvm::UpgradeBitCastInst(unsigned Opc, Value *V, Type *DestTy, 3818 Instruction *&Temp) { 3819 if (Opc != Instruction::BitCast) 3820 return nullptr; 3821 3822 Temp = nullptr; 3823 Type *SrcTy = V->getType(); 3824 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3825 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3826 LLVMContext &Context = V->getContext(); 3827 3828 // We have no information about target data layout, so we assume that 3829 // the maximum pointer size is 64bit. 3830 Type *MidTy = Type::getInt64Ty(Context); 3831 Temp = CastInst::Create(Instruction::PtrToInt, V, MidTy); 3832 3833 return CastInst::Create(Instruction::IntToPtr, Temp, DestTy); 3834 } 3835 3836 return nullptr; 3837 } 3838 3839 Value *llvm::UpgradeBitCastExpr(unsigned Opc, Constant *C, Type *DestTy) { 3840 if (Opc != Instruction::BitCast) 3841 return nullptr; 3842 3843 Type *SrcTy = C->getType(); 3844 if (SrcTy->isPtrOrPtrVectorTy() && DestTy->isPtrOrPtrVectorTy() && 3845 SrcTy->getPointerAddressSpace() != DestTy->getPointerAddressSpace()) { 3846 LLVMContext &Context = C->getContext(); 3847 3848 // We have no information about target data layout, so we assume that 3849 // the maximum pointer size is 64bit. 3850 Type *MidTy = Type::getInt64Ty(Context); 3851 3852 return ConstantExpr::getIntToPtr(ConstantExpr::getPtrToInt(C, MidTy), 3853 DestTy); 3854 } 3855 3856 return nullptr; 3857 } 3858 3859 /// Check the debug info version number, if it is out-dated, drop the debug 3860 /// info. Return true if module is modified. 3861 bool llvm::UpgradeDebugInfo(Module &M) { 3862 unsigned Version = getDebugMetadataVersionFromModule(M); 3863 if (Version == DEBUG_METADATA_VERSION) { 3864 bool BrokenDebugInfo = false; 3865 if (verifyModule(M, &llvm::errs(), &BrokenDebugInfo)) 3866 report_fatal_error("Broken module found, compilation aborted!"); 3867 if (!BrokenDebugInfo) 3868 // Everything is ok. 3869 return false; 3870 else { 3871 // Diagnose malformed debug info. 3872 DiagnosticInfoIgnoringInvalidDebugMetadata Diag(M); 3873 M.getContext().diagnose(Diag); 3874 } 3875 } 3876 bool Modified = StripDebugInfo(M); 3877 if (Modified && Version != DEBUG_METADATA_VERSION) { 3878 // Diagnose a version mismatch. 3879 DiagnosticInfoDebugMetadataVersion DiagVersion(M, Version); 3880 M.getContext().diagnose(DiagVersion); 3881 } 3882 return Modified; 3883 } 3884 3885 /// This checks for objc retain release marker which should be upgraded. It 3886 /// returns true if module is modified. 3887 static bool UpgradeRetainReleaseMarker(Module &M) { 3888 bool Changed = false; 3889 const char *MarkerKey = "clang.arc.retainAutoreleasedReturnValueMarker"; 3890 NamedMDNode *ModRetainReleaseMarker = M.getNamedMetadata(MarkerKey); 3891 if (ModRetainReleaseMarker) { 3892 MDNode *Op = ModRetainReleaseMarker->getOperand(0); 3893 if (Op) { 3894 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(0)); 3895 if (ID) { 3896 SmallVector<StringRef, 4> ValueComp; 3897 ID->getString().split(ValueComp, "#"); 3898 if (ValueComp.size() == 2) { 3899 std::string NewValue = ValueComp[0].str() + ";" + ValueComp[1].str(); 3900 ID = MDString::get(M.getContext(), NewValue); 3901 } 3902 M.addModuleFlag(Module::Error, MarkerKey, ID); 3903 M.eraseNamedMetadata(ModRetainReleaseMarker); 3904 Changed = true; 3905 } 3906 } 3907 } 3908 return Changed; 3909 } 3910 3911 void llvm::UpgradeARCRuntime(Module &M) { 3912 // This lambda converts normal function calls to ARC runtime functions to 3913 // intrinsic calls. 3914 auto UpgradeToIntrinsic = [&](const char *OldFunc, 3915 llvm::Intrinsic::ID IntrinsicFunc) { 3916 Function *Fn = M.getFunction(OldFunc); 3917 3918 if (!Fn) 3919 return; 3920 3921 Function *NewFn = llvm::Intrinsic::getDeclaration(&M, IntrinsicFunc); 3922 3923 for (auto I = Fn->user_begin(), E = Fn->user_end(); I != E;) { 3924 CallInst *CI = dyn_cast<CallInst>(*I++); 3925 if (!CI || CI->getCalledFunction() != Fn) 3926 continue; 3927 3928 IRBuilder<> Builder(CI->getParent(), CI->getIterator()); 3929 FunctionType *NewFuncTy = NewFn->getFunctionType(); 3930 SmallVector<Value *, 2> Args; 3931 3932 // Don't upgrade the intrinsic if it's not valid to bitcast the return 3933 // value to the return type of the old function. 3934 if (NewFuncTy->getReturnType() != CI->getType() && 3935 !CastInst::castIsValid(Instruction::BitCast, CI, 3936 NewFuncTy->getReturnType())) 3937 continue; 3938 3939 bool InvalidCast = false; 3940 3941 for (unsigned I = 0, E = CI->getNumArgOperands(); I != E; ++I) { 3942 Value *Arg = CI->getArgOperand(I); 3943 3944 // Bitcast argument to the parameter type of the new function if it's 3945 // not a variadic argument. 3946 if (I < NewFuncTy->getNumParams()) { 3947 // Don't upgrade the intrinsic if it's not valid to bitcast the argument 3948 // to the parameter type of the new function. 3949 if (!CastInst::castIsValid(Instruction::BitCast, Arg, 3950 NewFuncTy->getParamType(I))) { 3951 InvalidCast = true; 3952 break; 3953 } 3954 Arg = Builder.CreateBitCast(Arg, NewFuncTy->getParamType(I)); 3955 } 3956 Args.push_back(Arg); 3957 } 3958 3959 if (InvalidCast) 3960 continue; 3961 3962 // Create a call instruction that calls the new function. 3963 CallInst *NewCall = Builder.CreateCall(NewFuncTy, NewFn, Args); 3964 NewCall->setTailCallKind(cast<CallInst>(CI)->getTailCallKind()); 3965 NewCall->setName(CI->getName()); 3966 3967 // Bitcast the return value back to the type of the old call. 3968 Value *NewRetVal = Builder.CreateBitCast(NewCall, CI->getType()); 3969 3970 if (!CI->use_empty()) 3971 CI->replaceAllUsesWith(NewRetVal); 3972 CI->eraseFromParent(); 3973 } 3974 3975 if (Fn->use_empty()) 3976 Fn->eraseFromParent(); 3977 }; 3978 3979 // Unconditionally convert a call to "clang.arc.use" to a call to 3980 // "llvm.objc.clang.arc.use". 3981 UpgradeToIntrinsic("clang.arc.use", llvm::Intrinsic::objc_clang_arc_use); 3982 3983 // Upgrade the retain release marker. If there is no need to upgrade 3984 // the marker, that means either the module is already new enough to contain 3985 // new intrinsics or it is not ARC. There is no need to upgrade runtime call. 3986 if (!UpgradeRetainReleaseMarker(M)) 3987 return; 3988 3989 std::pair<const char *, llvm::Intrinsic::ID> RuntimeFuncs[] = { 3990 {"objc_autorelease", llvm::Intrinsic::objc_autorelease}, 3991 {"objc_autoreleasePoolPop", llvm::Intrinsic::objc_autoreleasePoolPop}, 3992 {"objc_autoreleasePoolPush", llvm::Intrinsic::objc_autoreleasePoolPush}, 3993 {"objc_autoreleaseReturnValue", 3994 llvm::Intrinsic::objc_autoreleaseReturnValue}, 3995 {"objc_copyWeak", llvm::Intrinsic::objc_copyWeak}, 3996 {"objc_destroyWeak", llvm::Intrinsic::objc_destroyWeak}, 3997 {"objc_initWeak", llvm::Intrinsic::objc_initWeak}, 3998 {"objc_loadWeak", llvm::Intrinsic::objc_loadWeak}, 3999 {"objc_loadWeakRetained", llvm::Intrinsic::objc_loadWeakRetained}, 4000 {"objc_moveWeak", llvm::Intrinsic::objc_moveWeak}, 4001 {"objc_release", llvm::Intrinsic::objc_release}, 4002 {"objc_retain", llvm::Intrinsic::objc_retain}, 4003 {"objc_retainAutorelease", llvm::Intrinsic::objc_retainAutorelease}, 4004 {"objc_retainAutoreleaseReturnValue", 4005 llvm::Intrinsic::objc_retainAutoreleaseReturnValue}, 4006 {"objc_retainAutoreleasedReturnValue", 4007 llvm::Intrinsic::objc_retainAutoreleasedReturnValue}, 4008 {"objc_retainBlock", llvm::Intrinsic::objc_retainBlock}, 4009 {"objc_storeStrong", llvm::Intrinsic::objc_storeStrong}, 4010 {"objc_storeWeak", llvm::Intrinsic::objc_storeWeak}, 4011 {"objc_unsafeClaimAutoreleasedReturnValue", 4012 llvm::Intrinsic::objc_unsafeClaimAutoreleasedReturnValue}, 4013 {"objc_retainedObject", llvm::Intrinsic::objc_retainedObject}, 4014 {"objc_unretainedObject", llvm::Intrinsic::objc_unretainedObject}, 4015 {"objc_unretainedPointer", llvm::Intrinsic::objc_unretainedPointer}, 4016 {"objc_retain_autorelease", llvm::Intrinsic::objc_retain_autorelease}, 4017 {"objc_sync_enter", llvm::Intrinsic::objc_sync_enter}, 4018 {"objc_sync_exit", llvm::Intrinsic::objc_sync_exit}, 4019 {"objc_arc_annotation_topdown_bbstart", 4020 llvm::Intrinsic::objc_arc_annotation_topdown_bbstart}, 4021 {"objc_arc_annotation_topdown_bbend", 4022 llvm::Intrinsic::objc_arc_annotation_topdown_bbend}, 4023 {"objc_arc_annotation_bottomup_bbstart", 4024 llvm::Intrinsic::objc_arc_annotation_bottomup_bbstart}, 4025 {"objc_arc_annotation_bottomup_bbend", 4026 llvm::Intrinsic::objc_arc_annotation_bottomup_bbend}}; 4027 4028 for (auto &I : RuntimeFuncs) 4029 UpgradeToIntrinsic(I.first, I.second); 4030 } 4031 4032 bool llvm::UpgradeModuleFlags(Module &M) { 4033 NamedMDNode *ModFlags = M.getModuleFlagsMetadata(); 4034 if (!ModFlags) 4035 return false; 4036 4037 bool HasObjCFlag = false, HasClassProperties = false, Changed = false; 4038 bool HasSwiftVersionFlag = false; 4039 uint8_t SwiftMajorVersion, SwiftMinorVersion; 4040 uint32_t SwiftABIVersion; 4041 auto Int8Ty = Type::getInt8Ty(M.getContext()); 4042 auto Int32Ty = Type::getInt32Ty(M.getContext()); 4043 4044 for (unsigned I = 0, E = ModFlags->getNumOperands(); I != E; ++I) { 4045 MDNode *Op = ModFlags->getOperand(I); 4046 if (Op->getNumOperands() != 3) 4047 continue; 4048 MDString *ID = dyn_cast_or_null<MDString>(Op->getOperand(1)); 4049 if (!ID) 4050 continue; 4051 if (ID->getString() == "Objective-C Image Info Version") 4052 HasObjCFlag = true; 4053 if (ID->getString() == "Objective-C Class Properties") 4054 HasClassProperties = true; 4055 // Upgrade PIC/PIE Module Flags. The module flag behavior for these two 4056 // field was Error and now they are Max. 4057 if (ID->getString() == "PIC Level" || ID->getString() == "PIE Level") { 4058 if (auto *Behavior = 4059 mdconst::dyn_extract_or_null<ConstantInt>(Op->getOperand(0))) { 4060 if (Behavior->getLimitedValue() == Module::Error) { 4061 Type *Int32Ty = Type::getInt32Ty(M.getContext()); 4062 Metadata *Ops[3] = { 4063 ConstantAsMetadata::get(ConstantInt::get(Int32Ty, Module::Max)), 4064 MDString::get(M.getContext(), ID->getString()), 4065 Op->getOperand(2)}; 4066 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4067 Changed = true; 4068 } 4069 } 4070 } 4071 // Upgrade Objective-C Image Info Section. Removed the whitespce in the 4072 // section name so that llvm-lto will not complain about mismatching 4073 // module flags that is functionally the same. 4074 if (ID->getString() == "Objective-C Image Info Section") { 4075 if (auto *Value = dyn_cast_or_null<MDString>(Op->getOperand(2))) { 4076 SmallVector<StringRef, 4> ValueComp; 4077 Value->getString().split(ValueComp, " "); 4078 if (ValueComp.size() != 1) { 4079 std::string NewValue; 4080 for (auto &S : ValueComp) 4081 NewValue += S.str(); 4082 Metadata *Ops[3] = {Op->getOperand(0), Op->getOperand(1), 4083 MDString::get(M.getContext(), NewValue)}; 4084 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4085 Changed = true; 4086 } 4087 } 4088 } 4089 4090 // IRUpgrader turns a i32 type "Objective-C Garbage Collection" into i8 value. 4091 // If the higher bits are set, it adds new module flag for swift info. 4092 if (ID->getString() == "Objective-C Garbage Collection") { 4093 auto Md = dyn_cast<ConstantAsMetadata>(Op->getOperand(2)); 4094 if (Md) { 4095 assert(Md->getValue() && "Expected non-empty metadata"); 4096 auto Type = Md->getValue()->getType(); 4097 if (Type == Int8Ty) 4098 continue; 4099 unsigned Val = Md->getValue()->getUniqueInteger().getZExtValue(); 4100 if ((Val & 0xff) != Val) { 4101 HasSwiftVersionFlag = true; 4102 SwiftABIVersion = (Val & 0xff00) >> 8; 4103 SwiftMajorVersion = (Val & 0xff000000) >> 24; 4104 SwiftMinorVersion = (Val & 0xff0000) >> 16; 4105 } 4106 Metadata *Ops[3] = { 4107 ConstantAsMetadata::get(ConstantInt::get(Int32Ty,Module::Error)), 4108 Op->getOperand(1), 4109 ConstantAsMetadata::get(ConstantInt::get(Int8Ty,Val & 0xff))}; 4110 ModFlags->setOperand(I, MDNode::get(M.getContext(), Ops)); 4111 Changed = true; 4112 } 4113 } 4114 } 4115 4116 // "Objective-C Class Properties" is recently added for Objective-C. We 4117 // upgrade ObjC bitcodes to contain a "Objective-C Class Properties" module 4118 // flag of value 0, so we can correclty downgrade this flag when trying to 4119 // link an ObjC bitcode without this module flag with an ObjC bitcode with 4120 // this module flag. 4121 if (HasObjCFlag && !HasClassProperties) { 4122 M.addModuleFlag(llvm::Module::Override, "Objective-C Class Properties", 4123 (uint32_t)0); 4124 Changed = true; 4125 } 4126 4127 if (HasSwiftVersionFlag) { 4128 M.addModuleFlag(Module::Error, "Swift ABI Version", 4129 SwiftABIVersion); 4130 M.addModuleFlag(Module::Error, "Swift Major Version", 4131 ConstantInt::get(Int8Ty, SwiftMajorVersion)); 4132 M.addModuleFlag(Module::Error, "Swift Minor Version", 4133 ConstantInt::get(Int8Ty, SwiftMinorVersion)); 4134 Changed = true; 4135 } 4136 4137 return Changed; 4138 } 4139 4140 void llvm::UpgradeSectionAttributes(Module &M) { 4141 auto TrimSpaces = [](StringRef Section) -> std::string { 4142 SmallVector<StringRef, 5> Components; 4143 Section.split(Components, ','); 4144 4145 SmallString<32> Buffer; 4146 raw_svector_ostream OS(Buffer); 4147 4148 for (auto Component : Components) 4149 OS << ',' << Component.trim(); 4150 4151 return std::string(OS.str().substr(1)); 4152 }; 4153 4154 for (auto &GV : M.globals()) { 4155 if (!GV.hasSection()) 4156 continue; 4157 4158 StringRef Section = GV.getSection(); 4159 4160 if (!Section.startswith("__DATA, __objc_catlist")) 4161 continue; 4162 4163 // __DATA, __objc_catlist, regular, no_dead_strip 4164 // __DATA,__objc_catlist,regular,no_dead_strip 4165 GV.setSection(TrimSpaces(Section)); 4166 } 4167 } 4168 4169 static bool isOldLoopArgument(Metadata *MD) { 4170 auto *T = dyn_cast_or_null<MDTuple>(MD); 4171 if (!T) 4172 return false; 4173 if (T->getNumOperands() < 1) 4174 return false; 4175 auto *S = dyn_cast_or_null<MDString>(T->getOperand(0)); 4176 if (!S) 4177 return false; 4178 return S->getString().startswith("llvm.vectorizer."); 4179 } 4180 4181 static MDString *upgradeLoopTag(LLVMContext &C, StringRef OldTag) { 4182 StringRef OldPrefix = "llvm.vectorizer."; 4183 assert(OldTag.startswith(OldPrefix) && "Expected old prefix"); 4184 4185 if (OldTag == "llvm.vectorizer.unroll") 4186 return MDString::get(C, "llvm.loop.interleave.count"); 4187 4188 return MDString::get( 4189 C, (Twine("llvm.loop.vectorize.") + OldTag.drop_front(OldPrefix.size())) 4190 .str()); 4191 } 4192 4193 static Metadata *upgradeLoopArgument(Metadata *MD) { 4194 auto *T = dyn_cast_or_null<MDTuple>(MD); 4195 if (!T) 4196 return MD; 4197 if (T->getNumOperands() < 1) 4198 return MD; 4199 auto *OldTag = dyn_cast_or_null<MDString>(T->getOperand(0)); 4200 if (!OldTag) 4201 return MD; 4202 if (!OldTag->getString().startswith("llvm.vectorizer.")) 4203 return MD; 4204 4205 // This has an old tag. Upgrade it. 4206 SmallVector<Metadata *, 8> Ops; 4207 Ops.reserve(T->getNumOperands()); 4208 Ops.push_back(upgradeLoopTag(T->getContext(), OldTag->getString())); 4209 for (unsigned I = 1, E = T->getNumOperands(); I != E; ++I) 4210 Ops.push_back(T->getOperand(I)); 4211 4212 return MDTuple::get(T->getContext(), Ops); 4213 } 4214 4215 MDNode *llvm::upgradeInstructionLoopAttachment(MDNode &N) { 4216 auto *T = dyn_cast<MDTuple>(&N); 4217 if (!T) 4218 return &N; 4219 4220 if (none_of(T->operands(), isOldLoopArgument)) 4221 return &N; 4222 4223 SmallVector<Metadata *, 8> Ops; 4224 Ops.reserve(T->getNumOperands()); 4225 for (Metadata *MD : T->operands()) 4226 Ops.push_back(upgradeLoopArgument(MD)); 4227 4228 return MDTuple::get(T->getContext(), Ops); 4229 } 4230 4231 std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { 4232 std::string AddrSpaces = "-p270:32:32-p271:32:32-p272:64:64"; 4233 4234 // If X86, and the datalayout matches the expected format, add pointer size 4235 // address spaces to the datalayout. 4236 if (!Triple(TT).isX86() || DL.contains(AddrSpaces)) 4237 return std::string(DL); 4238 4239 SmallVector<StringRef, 4> Groups; 4240 Regex R("(e-m:[a-z](-p:32:32)?)(-[if]64:.*$)"); 4241 if (!R.match(DL, &Groups)) 4242 return std::string(DL); 4243 4244 SmallString<1024> Buf; 4245 std::string Res = (Groups[1] + AddrSpaces + Groups[3]).toStringRef(Buf).str(); 4246 return Res; 4247 } 4248 4249 void llvm::UpgradeAttributes(AttrBuilder &B) { 4250 StringRef FramePointer; 4251 if (B.contains("no-frame-pointer-elim")) { 4252 // The value can be "true" or "false". 4253 for (const auto &I : B.td_attrs()) 4254 if (I.first == "no-frame-pointer-elim") 4255 FramePointer = I.second == "true" ? "all" : "none"; 4256 B.removeAttribute("no-frame-pointer-elim"); 4257 } 4258 if (B.contains("no-frame-pointer-elim-non-leaf")) { 4259 // The value is ignored. "no-frame-pointer-elim"="true" takes priority. 4260 if (FramePointer != "all") 4261 FramePointer = "non-leaf"; 4262 B.removeAttribute("no-frame-pointer-elim-non-leaf"); 4263 } 4264 if (!FramePointer.empty()) 4265 B.addAttribute("frame-pointer", FramePointer); 4266 4267 if (B.contains("null-pointer-is-valid")) { 4268 // The value can be "true" or "false". 4269 bool NullPointerIsValid = false; 4270 for (const auto &I : B.td_attrs()) 4271 if (I.first == "null-pointer-is-valid") 4272 NullPointerIsValid = I.second == "true"; 4273 B.removeAttribute("null-pointer-is-valid"); 4274 if (NullPointerIsValid) 4275 B.addAttribute(Attribute::NullPointerIsValid); 4276 } 4277 } 4278