1 //===-- DWARFExpression.cpp -----------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/DebugInfo/DWARF/DWARFExpression.h" 10 #include "llvm/DebugInfo/DWARF/DWARFUnit.h" 11 #include "llvm/BinaryFormat/Dwarf.h" 12 #include "llvm/MC/MCRegisterInfo.h" 13 #include "llvm/Support/Format.h" 14 #include <cassert> 15 #include <cstdint> 16 #include <vector> 17 18 using namespace llvm; 19 using namespace dwarf; 20 21 namespace llvm { 22 23 typedef std::vector<DWARFExpression::Operation::Description> DescVector; 24 25 static DescVector getDescriptions() { 26 DescVector Descriptions; 27 typedef DWARFExpression::Operation Op; 28 typedef Op::Description Desc; 29 30 Descriptions.resize(0xff); 31 Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr); 32 Descriptions[DW_OP_deref] = Desc(Op::Dwarf2); 33 Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1); 34 Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1); 35 Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2); 36 Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2); 37 Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4); 38 Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4); 39 Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8); 40 Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8); 41 Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB); 42 Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB); 43 Descriptions[DW_OP_dup] = Desc(Op::Dwarf2); 44 Descriptions[DW_OP_drop] = Desc(Op::Dwarf2); 45 Descriptions[DW_OP_over] = Desc(Op::Dwarf2); 46 Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1); 47 Descriptions[DW_OP_swap] = Desc(Op::Dwarf2); 48 Descriptions[DW_OP_rot] = Desc(Op::Dwarf2); 49 Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2); 50 Descriptions[DW_OP_abs] = Desc(Op::Dwarf2); 51 Descriptions[DW_OP_and] = Desc(Op::Dwarf2); 52 Descriptions[DW_OP_div] = Desc(Op::Dwarf2); 53 Descriptions[DW_OP_minus] = Desc(Op::Dwarf2); 54 Descriptions[DW_OP_mod] = Desc(Op::Dwarf2); 55 Descriptions[DW_OP_mul] = Desc(Op::Dwarf2); 56 Descriptions[DW_OP_neg] = Desc(Op::Dwarf2); 57 Descriptions[DW_OP_not] = Desc(Op::Dwarf2); 58 Descriptions[DW_OP_or] = Desc(Op::Dwarf2); 59 Descriptions[DW_OP_plus] = Desc(Op::Dwarf2); 60 Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB); 61 Descriptions[DW_OP_shl] = Desc(Op::Dwarf2); 62 Descriptions[DW_OP_shr] = Desc(Op::Dwarf2); 63 Descriptions[DW_OP_shra] = Desc(Op::Dwarf2); 64 Descriptions[DW_OP_xor] = Desc(Op::Dwarf2); 65 Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2); 66 Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2); 67 Descriptions[DW_OP_eq] = Desc(Op::Dwarf2); 68 Descriptions[DW_OP_ge] = Desc(Op::Dwarf2); 69 Descriptions[DW_OP_gt] = Desc(Op::Dwarf2); 70 Descriptions[DW_OP_le] = Desc(Op::Dwarf2); 71 Descriptions[DW_OP_lt] = Desc(Op::Dwarf2); 72 Descriptions[DW_OP_ne] = Desc(Op::Dwarf2); 73 for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA) 74 Descriptions[LA] = Desc(Op::Dwarf2); 75 for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA) 76 Descriptions[LA] = Desc(Op::Dwarf2); 77 for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA) 78 Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB); 79 Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB); 80 Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB); 81 Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB); 82 Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB); 83 Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1); 84 Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1); 85 Descriptions[DW_OP_nop] = Desc(Op::Dwarf2); 86 Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3); 87 Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2); 88 Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4); 89 Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr); 90 Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3); 91 Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3); 92 Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB); 93 Descriptions[DW_OP_implicit_value] = 94 Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock); 95 Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3); 96 Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3); 97 Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB); 98 Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB); 99 Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB); 100 101 Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef); 102 103 return Descriptions; 104 } 105 106 static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode) { 107 // FIXME: Make this constexpr once all compilers are smart enough to do it. 108 static DescVector Descriptions = getDescriptions(); 109 // Handle possible corrupted or unsupported operation. 110 if (OpCode >= Descriptions.size()) 111 return {}; 112 return Descriptions[OpCode]; 113 } 114 115 static uint8_t getRefAddrSize(uint8_t AddrSize, uint16_t Version) { 116 return (Version == 2) ? AddrSize : 4; 117 } 118 119 bool DWARFExpression::Operation::extract(DataExtractor Data, uint16_t Version, 120 uint8_t AddressSize, uint32_t Offset) { 121 Opcode = Data.getU8(&Offset); 122 123 Desc = getOpDesc(Opcode); 124 if (Desc.Version == Operation::DwarfNA) { 125 EndOffset = Offset; 126 return false; 127 } 128 129 for (unsigned Operand = 0; Operand < 2; ++Operand) { 130 unsigned Size = Desc.Op[Operand]; 131 unsigned Signed = Size & Operation::SignBit; 132 133 if (Size == Operation::SizeNA) 134 break; 135 136 switch (Size & ~Operation::SignBit) { 137 case Operation::Size1: 138 Operands[Operand] = Data.getU8(&Offset); 139 if (Signed) 140 Operands[Operand] = (int8_t)Operands[Operand]; 141 break; 142 case Operation::Size2: 143 Operands[Operand] = Data.getU16(&Offset); 144 if (Signed) 145 Operands[Operand] = (int16_t)Operands[Operand]; 146 break; 147 case Operation::Size4: 148 Operands[Operand] = Data.getU32(&Offset); 149 if (Signed) 150 Operands[Operand] = (int32_t)Operands[Operand]; 151 break; 152 case Operation::Size8: 153 Operands[Operand] = Data.getU64(&Offset); 154 break; 155 case Operation::SizeAddr: 156 if (AddressSize == 8) { 157 Operands[Operand] = Data.getU64(&Offset); 158 } else { 159 assert(AddressSize == 4); 160 Operands[Operand] = Data.getU32(&Offset); 161 } 162 break; 163 case Operation::SizeRefAddr: 164 if (getRefAddrSize(AddressSize, Version) == 8) { 165 Operands[Operand] = Data.getU64(&Offset); 166 } else { 167 assert(getRefAddrSize(AddressSize, Version) == 4); 168 Operands[Operand] = Data.getU32(&Offset); 169 } 170 break; 171 case Operation::SizeLEB: 172 if (Signed) 173 Operands[Operand] = Data.getSLEB128(&Offset); 174 else 175 Operands[Operand] = Data.getULEB128(&Offset); 176 break; 177 case Operation::BaseTypeRef: 178 Operands[Operand] = Data.getULEB128(&Offset); 179 break; 180 case Operation::SizeBlock: 181 // We need a size, so this cannot be the first operand 182 if (Operand == 0) 183 return false; 184 // Store the offset of the block as the value. 185 Operands[Operand] = Offset; 186 Offset += Operands[Operand - 1]; 187 break; 188 default: 189 llvm_unreachable("Unknown DWARFExpression Op size"); 190 } 191 } 192 193 EndOffset = Offset; 194 return true; 195 } 196 197 static bool prettyPrintRegisterOp(raw_ostream &OS, uint8_t Opcode, 198 uint64_t Operands[2], 199 const MCRegisterInfo *MRI, bool isEH) { 200 if (!MRI) 201 return false; 202 203 uint64_t DwarfRegNum; 204 unsigned OpNum = 0; 205 206 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx) 207 DwarfRegNum = Operands[OpNum++]; 208 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx) 209 DwarfRegNum = Opcode - DW_OP_breg0; 210 else 211 DwarfRegNum = Opcode - DW_OP_reg0; 212 213 int LLVMRegNum = MRI->getLLVMRegNum(DwarfRegNum, isEH); 214 if (LLVMRegNum >= 0) { 215 if (const char *RegName = MRI->getName(LLVMRegNum)) { 216 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || 217 Opcode == DW_OP_bregx) 218 OS << format(" %s%+" PRId64, RegName, Operands[OpNum]); 219 else 220 OS << ' ' << RegName; 221 return true; 222 } 223 } 224 225 return false; 226 } 227 228 bool DWARFExpression::Operation::print(raw_ostream &OS, 229 const DWARFExpression *Expr, 230 const MCRegisterInfo *RegInfo, 231 DWARFUnit *U, 232 bool isEH) { 233 if (Error) { 234 OS << "<decoding error>"; 235 return false; 236 } 237 238 StringRef Name = OperationEncodingString(Opcode); 239 assert(!Name.empty() && "DW_OP has no name!"); 240 OS << Name; 241 242 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || 243 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) || 244 Opcode == DW_OP_bregx || Opcode == DW_OP_regx) 245 if (prettyPrintRegisterOp(OS, Opcode, Operands, RegInfo, isEH)) 246 return true; 247 248 for (unsigned Operand = 0; Operand < 2; ++Operand) { 249 unsigned Size = Desc.Op[Operand]; 250 unsigned Signed = Size & Operation::SignBit; 251 252 if (Size == Operation::SizeNA) 253 break; 254 255 if (Size == Operation::BaseTypeRef && U) { 256 auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]); 257 if (Die && Die.getTag() == dwarf::DW_TAG_base_type) { 258 OS << format(" (0x%08x)", U->getOffset() + Operands[Operand]); 259 if (auto Name = Die.find(dwarf::DW_AT_name)) 260 OS << " \"" << Name->getAsCString() << "\""; 261 } else { 262 OS << format(" <invalid base_type ref: 0x%" PRIx64 ">", 263 Operands[Operand]); 264 } 265 } else if (Size == Operation::SizeBlock) { 266 uint32_t Offset = Operands[Operand]; 267 for (unsigned i = 0; i < Operands[Operand - 1]; ++i) 268 OS << format(" 0x%02x", Expr->Data.getU8(&Offset)); 269 } else { 270 if (Signed) 271 OS << format(" %+" PRId64, (int64_t)Operands[Operand]); 272 else 273 OS << format(" 0x%" PRIx64, Operands[Operand]); 274 } 275 } 276 return true; 277 } 278 279 void DWARFExpression::print(raw_ostream &OS, const MCRegisterInfo *RegInfo, 280 DWARFUnit *U, bool IsEH) const { 281 for (auto &Op : *this) { 282 if (!Op.print(OS, this, RegInfo, U, IsEH)) { 283 uint32_t FailOffset = Op.getEndOffset(); 284 while (FailOffset < Data.getData().size()) 285 OS << format(" %02x", Data.getU8(&FailOffset)); 286 return; 287 } 288 if (Op.getEndOffset() < Data.getData().size()) 289 OS << ", "; 290 } 291 } 292 293 bool DWARFExpression::Operation::verify(DWARFUnit *U) { 294 295 for (unsigned Operand = 0; Operand < 2; ++Operand) { 296 unsigned Size = Desc.Op[Operand]; 297 298 if (Size == Operation::SizeNA) 299 break; 300 301 if (Size == Operation::BaseTypeRef) { 302 auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]); 303 if (!Die || Die.getTag() != dwarf::DW_TAG_base_type) { 304 Error = true; 305 return false; 306 } 307 } 308 } 309 310 return true; 311 } 312 313 bool DWARFExpression::verify(DWARFUnit *U) { 314 for (auto &Op : *this) 315 if (!Op.verify(U)) 316 return false; 317 318 return true; 319 } 320 321 } // namespace llvm 322