1 //===- TargetSubtargetInfo.cpp - General Target Information ----------------==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file This file describes the general parts of a Subtarget.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/CodeGen/TargetSubtargetInfo.h"
15 #include "llvm/ADT/Optional.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/TargetInstrInfo.h"
18 #include "llvm/CodeGen/TargetSchedule.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/Support/Format.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include <string>
23 
24 using namespace llvm;
25 
26 TargetSubtargetInfo::TargetSubtargetInfo(
27     const Triple &TT, StringRef CPU, StringRef FS,
28     ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD,
29     const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR,
30     const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
31     const InstrStage *IS, const unsigned *OC, const unsigned *FP)
32     : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) {
33 }
34 
35 TargetSubtargetInfo::~TargetSubtargetInfo() = default;
36 
37 bool TargetSubtargetInfo::enableAtomicExpand() const {
38   return true;
39 }
40 
41 bool TargetSubtargetInfo::enableMachineScheduler() const {
42   return false;
43 }
44 
45 bool TargetSubtargetInfo::enableJoinGlobalCopies() const {
46   return enableMachineScheduler();
47 }
48 
49 bool TargetSubtargetInfo::enableRALocalReassignment(
50     CodeGenOpt::Level OptLevel) const {
51   return true;
52 }
53 
54 bool TargetSubtargetInfo::enableAdvancedRASplitCost() const {
55   return false;
56 }
57 
58 bool TargetSubtargetInfo::enablePostRAScheduler() const {
59   return getSchedModel().PostRAScheduler;
60 }
61 
62 bool TargetSubtargetInfo::useAA() const {
63   return false;
64 }
65 
66 static std::string createSchedInfoStr(unsigned Latency,
67                                      Optional<double> RThroughput) {
68   static const char *SchedPrefix = " sched: [";
69   std::string Comment;
70   raw_string_ostream CS(Comment);
71   if (Latency > 0 && RThroughput.hasValue())
72     CS << SchedPrefix << Latency << format(":%2.2f", RThroughput.getValue())
73        << "]";
74   else if (Latency > 0)
75     CS << SchedPrefix << Latency << ":?]";
76   else if (RThroughput.hasValue())
77     CS << SchedPrefix << "?:" << RThroughput.getValue() << "]";
78   CS.flush();
79   return Comment;
80 }
81 
82 /// Returns string representation of scheduler comment
83 std::string TargetSubtargetInfo::getSchedInfoStr(const MachineInstr &MI) const {
84   if (MI.isPseudo() || MI.isTerminator())
85     return std::string();
86   // We don't cache TSchedModel because it depends on TargetInstrInfo
87   // that could be changed during the compilation
88   TargetSchedModel TSchedModel;
89   TSchedModel.init(getSchedModel(), this, getInstrInfo());
90   unsigned Latency = TSchedModel.computeInstrLatency(&MI);
91   Optional<double> RThroughput = TSchedModel.computeInstrRThroughput(&MI);
92   return createSchedInfoStr(Latency, RThroughput);
93 }
94 
95 /// Returns string representation of scheduler comment
96 std::string TargetSubtargetInfo::getSchedInfoStr(MCInst const &MCI) const {
97   // We don't cache TSchedModel because it depends on TargetInstrInfo
98   // that could be changed during the compilation
99   TargetSchedModel TSchedModel;
100   TSchedModel.init(getSchedModel(), this, getInstrInfo());
101   unsigned Latency;
102   if (TSchedModel.hasInstrSchedModel())
103     Latency = TSchedModel.computeInstrLatency(MCI.getOpcode());
104   else if (TSchedModel.hasInstrItineraries()) {
105     auto *ItinData = TSchedModel.getInstrItineraries();
106     Latency = ItinData->getStageLatency(
107         getInstrInfo()->get(MCI.getOpcode()).getSchedClass());
108   } else
109     return std::string();
110   Optional<double> RThroughput =
111       TSchedModel.computeInstrRThroughput(MCI.getOpcode());
112   return createSchedInfoStr(Latency, RThroughput);
113 }
114