1 //===- SplitKit.h - Toolkit for splitting live ranges -----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the SplitAnalysis class as well as mutator functions for 11 // live range splitting. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_CODEGEN_SPLITKIT_H 16 #define LLVM_LIB_CODEGEN_SPLITKIT_H 17 18 #include "LiveRangeCalc.h" 19 #include "llvm/ADT/ArrayRef.h" 20 #include "llvm/ADT/BitVector.h" 21 #include "llvm/ADT/DenseMap.h" 22 #include "llvm/ADT/DenseSet.h" 23 #include "llvm/ADT/IntervalMap.h" 24 #include "llvm/ADT/PointerIntPair.h" 25 #include "llvm/ADT/SmallPtrSet.h" 26 #include "llvm/ADT/SmallVector.h" 27 #include "llvm/CodeGen/LiveInterval.h" 28 #include "llvm/CodeGen/MachineBasicBlock.h" 29 #include "llvm/CodeGen/MachineFunction.h" 30 #include "llvm/CodeGen/SlotIndexes.h" 31 #include "llvm/MC/LaneBitmask.h" 32 #include "llvm/Support/Compiler.h" 33 #include <utility> 34 35 namespace llvm { 36 37 class LiveIntervals; 38 class LiveRangeEdit; 39 class MachineBlockFrequencyInfo; 40 class MachineDominatorTree; 41 class MachineLoopInfo; 42 class MachineRegisterInfo; 43 class TargetInstrInfo; 44 class TargetRegisterInfo; 45 class VirtRegMap; 46 47 /// Determines the latest safe point in a block in which we can insert a split, 48 /// spill or other instruction related with CurLI. 49 class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis { 50 private: 51 const LiveIntervals &LIS; 52 53 /// Last legal insert point in each basic block in the current function. 54 /// The first entry is the first terminator, the second entry is the 55 /// last valid point to insert a split or spill for a variable that is 56 /// live into a landing pad successor. 57 SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastInsertPoint; 58 59 SlotIndex computeLastInsertPoint(const LiveInterval &CurLI, 60 const MachineBasicBlock &MBB); 61 62 public: 63 InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum); 64 65 /// Return the base index of the last valid insert point for \pCurLI in \pMBB. 66 SlotIndex getLastInsertPoint(const LiveInterval &CurLI, 67 const MachineBasicBlock &MBB) { 68 unsigned Num = MBB.getNumber(); 69 // Inline the common simple case. 70 if (LastInsertPoint[Num].first.isValid() && 71 !LastInsertPoint[Num].second.isValid()) 72 return LastInsertPoint[Num].first; 73 return computeLastInsertPoint(CurLI, MBB); 74 } 75 76 /// Returns the last insert point as an iterator for \pCurLI in \pMBB. 77 MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI, 78 MachineBasicBlock &MBB); 79 }; 80 81 /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting 82 /// opportunities. 83 class LLVM_LIBRARY_VISIBILITY SplitAnalysis { 84 public: 85 const MachineFunction &MF; 86 const VirtRegMap &VRM; 87 const LiveIntervals &LIS; 88 const MachineLoopInfo &Loops; 89 const TargetInstrInfo &TII; 90 91 /// Additional information about basic blocks where the current variable is 92 /// live. Such a block will look like one of these templates: 93 /// 94 /// 1. | o---x | Internal to block. Variable is only live in this block. 95 /// 2. |---x | Live-in, kill. 96 /// 3. | o---| Def, live-out. 97 /// 4. |---x o---| Live-in, kill, def, live-out. Counted by NumGapBlocks. 98 /// 5. |---o---o---| Live-through with uses or defs. 99 /// 6. |-----------| Live-through without uses. Counted by NumThroughBlocks. 100 /// 101 /// Two BlockInfo entries are created for template 4. One for the live-in 102 /// segment, and one for the live-out segment. These entries look as if the 103 /// block were split in the middle where the live range isn't live. 104 /// 105 /// Live-through blocks without any uses don't get BlockInfo entries. They 106 /// are simply listed in ThroughBlocks instead. 107 /// 108 struct BlockInfo { 109 MachineBasicBlock *MBB; 110 SlotIndex FirstInstr; ///< First instr accessing current reg. 111 SlotIndex LastInstr; ///< Last instr accessing current reg. 112 SlotIndex FirstDef; ///< First non-phi valno->def, or SlotIndex(). 113 bool LiveIn; ///< Current reg is live in. 114 bool LiveOut; ///< Current reg is live out. 115 116 /// isOneInstr - Returns true when this BlockInfo describes a single 117 /// instruction. 118 bool isOneInstr() const { 119 return SlotIndex::isSameInstr(FirstInstr, LastInstr); 120 } 121 }; 122 123 private: 124 // Current live interval. 125 const LiveInterval *CurLI = nullptr; 126 127 /// Insert Point Analysis. 128 InsertPointAnalysis IPA; 129 130 // Sorted slot indexes of using instructions. 131 SmallVector<SlotIndex, 8> UseSlots; 132 133 /// UseBlocks - Blocks where CurLI has uses. 134 SmallVector<BlockInfo, 8> UseBlocks; 135 136 /// NumGapBlocks - Number of duplicate entries in UseBlocks for blocks where 137 /// the live range has a gap. 138 unsigned NumGapBlocks; 139 140 /// ThroughBlocks - Block numbers where CurLI is live through without uses. 141 BitVector ThroughBlocks; 142 143 /// NumThroughBlocks - Number of live-through blocks. 144 unsigned NumThroughBlocks; 145 146 /// DidRepairRange - analyze was forced to shrinkToUses(). 147 bool DidRepairRange; 148 149 // Sumarize statistics by counting instructions using CurLI. 150 void analyzeUses(); 151 152 /// calcLiveBlockInfo - Compute per-block information about CurLI. 153 bool calcLiveBlockInfo(); 154 155 public: 156 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis, 157 const MachineLoopInfo &mli); 158 159 /// analyze - set CurLI to the specified interval, and analyze how it may be 160 /// split. 161 void analyze(const LiveInterval *li); 162 163 /// didRepairRange() - Returns true if CurLI was invalid and has been repaired 164 /// by analyze(). This really shouldn't happen, but sometimes the coalescer 165 /// can create live ranges that end in mid-air. 166 bool didRepairRange() const { return DidRepairRange; } 167 168 /// clear - clear all data structures so SplitAnalysis is ready to analyze a 169 /// new interval. 170 void clear(); 171 172 /// getParent - Return the last analyzed interval. 173 const LiveInterval &getParent() const { return *CurLI; } 174 175 /// isOriginalEndpoint - Return true if the original live range was killed or 176 /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def, 177 /// and 'use' for an early-clobber def. 178 /// This can be used to recognize code inserted by earlier live range 179 /// splitting. 180 bool isOriginalEndpoint(SlotIndex Idx) const; 181 182 /// getUseSlots - Return an array of SlotIndexes of instructions using CurLI. 183 /// This include both use and def operands, at most one entry per instruction. 184 ArrayRef<SlotIndex> getUseSlots() const { return UseSlots; } 185 186 /// getUseBlocks - Return an array of BlockInfo objects for the basic blocks 187 /// where CurLI has uses. 188 ArrayRef<BlockInfo> getUseBlocks() const { return UseBlocks; } 189 190 /// getNumThroughBlocks - Return the number of through blocks. 191 unsigned getNumThroughBlocks() const { return NumThroughBlocks; } 192 193 /// isThroughBlock - Return true if CurLI is live through MBB without uses. 194 bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); } 195 196 /// getThroughBlocks - Return the set of through blocks. 197 const BitVector &getThroughBlocks() const { return ThroughBlocks; } 198 199 /// getNumLiveBlocks - Return the number of blocks where CurLI is live. 200 unsigned getNumLiveBlocks() const { 201 return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks(); 202 } 203 204 /// countLiveBlocks - Return the number of blocks where li is live. This is 205 /// guaranteed to return the same number as getNumLiveBlocks() after calling 206 /// analyze(li). 207 unsigned countLiveBlocks(const LiveInterval *li) const; 208 209 using BlockPtrSet = SmallPtrSet<const MachineBasicBlock *, 16>; 210 211 /// shouldSplitSingleBlock - Returns true if it would help to create a local 212 /// live range for the instructions in BI. There is normally no benefit to 213 /// creating a live range for a single instruction, but it does enable 214 /// register class inflation if the instruction has a restricted register 215 /// class. 216 /// 217 /// @param BI The block to be isolated. 218 /// @param SingleInstrs True when single instructions should be isolated. 219 bool shouldSplitSingleBlock(const BlockInfo &BI, bool SingleInstrs) const; 220 221 SlotIndex getLastSplitPoint(unsigned Num) { 222 return IPA.getLastInsertPoint(*CurLI, *MF.getBlockNumbered(Num)); 223 } 224 225 MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB) { 226 return IPA.getLastInsertPointIter(*CurLI, *BB); 227 } 228 }; 229 230 /// SplitEditor - Edit machine code and LiveIntervals for live range 231 /// splitting. 232 /// 233 /// - Create a SplitEditor from a SplitAnalysis. 234 /// - Start a new live interval with openIntv. 235 /// - Mark the places where the new interval is entered using enterIntv* 236 /// - Mark the ranges where the new interval is used with useIntv* 237 /// - Mark the places where the interval is exited with exitIntv*. 238 /// - Finish the current interval with closeIntv and repeat from 2. 239 /// - Rewrite instructions with finish(). 240 /// 241 class LLVM_LIBRARY_VISIBILITY SplitEditor { 242 SplitAnalysis &SA; 243 AliasAnalysis &AA; 244 LiveIntervals &LIS; 245 VirtRegMap &VRM; 246 MachineRegisterInfo &MRI; 247 MachineDominatorTree &MDT; 248 const TargetInstrInfo &TII; 249 const TargetRegisterInfo &TRI; 250 const MachineBlockFrequencyInfo &MBFI; 251 252 public: 253 /// ComplementSpillMode - Select how the complement live range should be 254 /// created. SplitEditor automatically creates interval 0 to contain 255 /// anything that isn't added to another interval. This complement interval 256 /// can get quite complicated, and it can sometimes be an advantage to allow 257 /// it to overlap the other intervals. If it is going to spill anyway, no 258 /// registers are wasted by keeping a value in two places at the same time. 259 enum ComplementSpillMode { 260 /// SM_Partition(Default) - Try to create the complement interval so it 261 /// doesn't overlap any other intervals, and the original interval is 262 /// partitioned. This may require a large number of back copies and extra 263 /// PHI-defs. Only segments marked with overlapIntv will be overlapping. 264 SM_Partition, 265 266 /// SM_Size - Overlap intervals to minimize the number of inserted COPY 267 /// instructions. Copies to the complement interval are hoisted to their 268 /// common dominator, so only one COPY is required per value in the 269 /// complement interval. This also means that no extra PHI-defs need to be 270 /// inserted in the complement interval. 271 SM_Size, 272 273 /// SM_Speed - Overlap intervals to minimize the expected execution 274 /// frequency of the inserted copies. This is very similar to SM_Size, but 275 /// the complement interval may get some extra PHI-defs. 276 SM_Speed 277 }; 278 279 private: 280 /// Edit - The current parent register and new intervals created. 281 LiveRangeEdit *Edit = nullptr; 282 283 /// Index into Edit of the currently open interval. 284 /// The index 0 is used for the complement, so the first interval started by 285 /// openIntv will be 1. 286 unsigned OpenIdx = 0; 287 288 /// The current spill mode, selected by reset(). 289 ComplementSpillMode SpillMode = SM_Partition; 290 291 using RegAssignMap = IntervalMap<SlotIndex, unsigned>; 292 293 /// Allocator for the interval map. This will eventually be shared with 294 /// SlotIndexes and LiveIntervals. 295 RegAssignMap::Allocator Allocator; 296 297 /// RegAssign - Map of the assigned register indexes. 298 /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at 299 /// Idx. 300 RegAssignMap RegAssign; 301 302 using ValueForcePair = PointerIntPair<VNInfo *, 1>; 303 using ValueMap = DenseMap<std::pair<unsigned, unsigned>, ValueForcePair>; 304 305 /// Values - keep track of the mapping from parent values to values in the new 306 /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains: 307 /// 308 /// 1. No entry - the value is not mapped to Edit.get(RegIdx). 309 /// 2. (Null, false) - the value is mapped to multiple values in 310 /// Edit.get(RegIdx). Each value is represented by a minimal live range at 311 /// its def. The full live range can be inferred exactly from the range 312 /// of RegIdx in RegAssign. 313 /// 3. (Null, true). As above, but the ranges in RegAssign are too large, and 314 /// the live range must be recomputed using LiveRangeCalc::extend(). 315 /// 4. (VNI, false) The value is mapped to a single new value. 316 /// The new value has no live ranges anywhere. 317 ValueMap Values; 318 319 /// LRCalc - Cache for computing live ranges and SSA update. Each instance 320 /// can only handle non-overlapping live ranges, so use a separate 321 /// LiveRangeCalc instance for the complement interval when in spill mode. 322 LiveRangeCalc LRCalc[2]; 323 324 /// getLRCalc - Return the LRCalc to use for RegIdx. In spill mode, the 325 /// complement interval can overlap the other intervals, so it gets its own 326 /// LRCalc instance. When not in spill mode, all intervals can share one. 327 LiveRangeCalc &getLRCalc(unsigned RegIdx) { 328 return LRCalc[SpillMode != SM_Partition && RegIdx != 0]; 329 } 330 331 /// Find a subrange corresponding to the lane mask @p LM in the live 332 /// interval @p LI. The interval @p LI is assumed to contain such a subrange. 333 /// This function is used to find corresponding subranges between the 334 /// original interval and the new intervals. 335 LiveInterval::SubRange &getSubRangeForMask(LaneBitmask LM, LiveInterval &LI); 336 337 /// Add a segment to the interval LI for the value number VNI. If LI has 338 /// subranges, corresponding segments will be added to them as well, but 339 /// with newly created value numbers. If Original is true, dead def will 340 /// only be added a subrange of LI if the corresponding subrange of the 341 /// original interval has a def at this index. Otherwise, all subranges 342 /// of LI will be updated. 343 void addDeadDef(LiveInterval &LI, VNInfo *VNI, bool Original); 344 345 /// defValue - define a value in RegIdx from ParentVNI at Idx. 346 /// Idx does not have to be ParentVNI->def, but it must be contained within 347 /// ParentVNI's live range in ParentLI. The new value is added to the value 348 /// map. The value being defined may either come from rematerialization 349 /// (or an inserted copy), or it may be coming from the original interval. 350 /// The parameter Original should be true in the latter case, otherwise 351 /// it should be false. 352 /// Return the new LI value. 353 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx, 354 bool Original); 355 356 /// forceRecompute - Force the live range of ParentVNI in RegIdx to be 357 /// recomputed by LiveRangeCalc::extend regardless of the number of defs. 358 /// This is used for values whose live range doesn't match RegAssign exactly. 359 /// They could have rematerialized, or back-copies may have been moved. 360 void forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI); 361 362 /// defFromParent - Define Reg from ParentVNI at UseIdx using either 363 /// rematerialization or a COPY from parent. Return the new value. 364 VNInfo *defFromParent(unsigned RegIdx, 365 VNInfo *ParentVNI, 366 SlotIndex UseIdx, 367 MachineBasicBlock &MBB, 368 MachineBasicBlock::iterator I); 369 370 /// removeBackCopies - Remove the copy instructions that defines the values 371 /// in the vector in the complement interval. 372 void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies); 373 374 /// getShallowDominator - Returns the least busy dominator of MBB that is 375 /// also dominated by DefMBB. Busy is measured by loop depth. 376 MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB, 377 MachineBasicBlock *DefMBB); 378 379 /// Find out all the backCopies dominated by others. 380 void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet, 381 SmallVectorImpl<VNInfo *> &BackCopies); 382 383 /// Hoist back-copies to the complement interval. It tries to hoist all 384 /// the back-copies to one BB if it is beneficial, or else simply remove 385 /// redundant backcopies dominated by others. 386 void hoistCopies(); 387 388 /// transferValues - Transfer values to the new ranges. 389 /// Return true if any ranges were skipped. 390 bool transferValues(); 391 392 /// Live range @p LR corresponding to the lane Mask @p LM has a live 393 /// PHI def at the beginning of block @p B. Extend the range @p LR of 394 /// all predecessor values that reach this def. If @p LR is a subrange, 395 /// the array @p Undefs is the set of all locations where it is undefined 396 /// via <def,read-undef> in other subranges for the same register. 397 void extendPHIRange(MachineBasicBlock &B, LiveRangeCalc &LRC, 398 LiveRange &LR, LaneBitmask LM, 399 ArrayRef<SlotIndex> Undefs); 400 401 /// extendPHIKillRanges - Extend the ranges of all values killed by original 402 /// parent PHIDefs. 403 void extendPHIKillRanges(); 404 405 /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers. 406 void rewriteAssigned(bool ExtendRanges); 407 408 /// deleteRematVictims - Delete defs that are dead after rematerializing. 409 void deleteRematVictims(); 410 411 /// Add a copy instruction copying \p FromReg to \p ToReg before 412 /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it 413 /// necessary to construct a sequence of copies to cover it exactly. 414 SlotIndex buildCopy(unsigned FromReg, unsigned ToReg, LaneBitmask LaneMask, 415 MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, 416 bool Late, unsigned RegIdx); 417 418 SlotIndex buildSingleSubRegCopy(unsigned FromReg, unsigned ToReg, 419 MachineBasicBlock &MB, MachineBasicBlock::iterator InsertBefore, 420 unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex PrevCopy); 421 422 public: 423 /// Create a new SplitEditor for editing the LiveInterval analyzed by SA. 424 /// Newly created intervals will be appended to newIntervals. 425 SplitEditor(SplitAnalysis &sa, AliasAnalysis &aa, LiveIntervals &lis, 426 VirtRegMap &vrm, MachineDominatorTree &mdt, 427 MachineBlockFrequencyInfo &mbfi); 428 429 /// reset - Prepare for a new split. 430 void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition); 431 432 /// Create a new virtual register and live interval. 433 /// Return the interval index, starting from 1. Interval index 0 is the 434 /// implicit complement interval. 435 unsigned openIntv(); 436 437 /// currentIntv - Return the current interval index. 438 unsigned currentIntv() const { return OpenIdx; } 439 440 /// selectIntv - Select a previously opened interval index. 441 void selectIntv(unsigned Idx); 442 443 /// enterIntvBefore - Enter the open interval before the instruction at Idx. 444 /// If the parent interval is not live before Idx, a COPY is not inserted. 445 /// Return the beginning of the new live range. 446 SlotIndex enterIntvBefore(SlotIndex Idx); 447 448 /// enterIntvAfter - Enter the open interval after the instruction at Idx. 449 /// Return the beginning of the new live range. 450 SlotIndex enterIntvAfter(SlotIndex Idx); 451 452 /// enterIntvAtEnd - Enter the open interval at the end of MBB. 453 /// Use the open interval from the inserted copy to the MBB end. 454 /// Return the beginning of the new live range. 455 SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB); 456 457 /// useIntv - indicate that all instructions in MBB should use OpenLI. 458 void useIntv(const MachineBasicBlock &MBB); 459 460 /// useIntv - indicate that all instructions in range should use OpenLI. 461 void useIntv(SlotIndex Start, SlotIndex End); 462 463 /// leaveIntvAfter - Leave the open interval after the instruction at Idx. 464 /// Return the end of the live range. 465 SlotIndex leaveIntvAfter(SlotIndex Idx); 466 467 /// leaveIntvBefore - Leave the open interval before the instruction at Idx. 468 /// Return the end of the live range. 469 SlotIndex leaveIntvBefore(SlotIndex Idx); 470 471 /// leaveIntvAtTop - Leave the interval at the top of MBB. 472 /// Add liveness from the MBB top to the copy. 473 /// Return the end of the live range. 474 SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB); 475 476 /// overlapIntv - Indicate that all instructions in range should use the open 477 /// interval, but also let the complement interval be live. 478 /// 479 /// This doubles the register pressure, but is sometimes required to deal with 480 /// register uses after the last valid split point. 481 /// 482 /// The Start index should be a return value from a leaveIntv* call, and End 483 /// should be in the same basic block. The parent interval must have the same 484 /// value across the range. 485 /// 486 void overlapIntv(SlotIndex Start, SlotIndex End); 487 488 /// finish - after all the new live ranges have been created, compute the 489 /// remaining live range, and rewrite instructions to use the new registers. 490 /// @param LRMap When not null, this vector will map each live range in Edit 491 /// back to the indices returned by openIntv. 492 /// There may be extra indices created by dead code elimination. 493 void finish(SmallVectorImpl<unsigned> *LRMap = nullptr); 494 495 /// dump - print the current interval mapping to dbgs(). 496 void dump() const; 497 498 // ===--- High level methods ---=== 499 500 /// splitSingleBlock - Split CurLI into a separate live interval around the 501 /// uses in a single block. This is intended to be used as part of a larger 502 /// split, and doesn't call finish(). 503 void splitSingleBlock(const SplitAnalysis::BlockInfo &BI); 504 505 /// splitLiveThroughBlock - Split CurLI in the given block such that it 506 /// enters the block in IntvIn and leaves it in IntvOut. There may be uses in 507 /// the block, but they will be ignored when placing split points. 508 /// 509 /// @param MBBNum Block number. 510 /// @param IntvIn Interval index entering the block. 511 /// @param LeaveBefore When set, leave IntvIn before this point. 512 /// @param IntvOut Interval index leaving the block. 513 /// @param EnterAfter When set, enter IntvOut after this point. 514 void splitLiveThroughBlock(unsigned MBBNum, 515 unsigned IntvIn, SlotIndex LeaveBefore, 516 unsigned IntvOut, SlotIndex EnterAfter); 517 518 /// splitRegInBlock - Split CurLI in the given block such that it enters the 519 /// block in IntvIn and leaves it on the stack (or not at all). Split points 520 /// are placed in a way that avoids putting uses in the stack interval. This 521 /// may require creating a local interval when there is interference. 522 /// 523 /// @param BI Block descriptor. 524 /// @param IntvIn Interval index entering the block. Not 0. 525 /// @param LeaveBefore When set, leave IntvIn before this point. 526 void splitRegInBlock(const SplitAnalysis::BlockInfo &BI, 527 unsigned IntvIn, SlotIndex LeaveBefore); 528 529 /// splitRegOutBlock - Split CurLI in the given block such that it enters the 530 /// block on the stack (or isn't live-in at all) and leaves it in IntvOut. 531 /// Split points are placed to avoid interference and such that the uses are 532 /// not in the stack interval. This may require creating a local interval 533 /// when there is interference. 534 /// 535 /// @param BI Block descriptor. 536 /// @param IntvOut Interval index leaving the block. 537 /// @param EnterAfter When set, enter IntvOut after this point. 538 void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI, 539 unsigned IntvOut, SlotIndex EnterAfter); 540 }; 541 542 } // end namespace llvm 543 544 #endif // LLVM_LIB_CODEGEN_SPLITKIT_H 545