1 //===- SplitKit.h - Toolkit for splitting live ranges -----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the SplitAnalysis class as well as mutator functions for
10 // live range splitting.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_CODEGEN_SPLITKIT_H
15 #define LLVM_LIB_CODEGEN_SPLITKIT_H
16 
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/BitVector.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/DenseSet.h"
21 #include "llvm/ADT/IntervalMap.h"
22 #include "llvm/ADT/PointerIntPair.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/CodeGen/LiveInterval.h"
26 #include "llvm/CodeGen/LiveIntervalCalc.h"
27 #include "llvm/CodeGen/LiveIntervals.h"
28 #include "llvm/CodeGen/MachineBasicBlock.h"
29 #include "llvm/CodeGen/MachineFunction.h"
30 #include "llvm/CodeGen/SlotIndexes.h"
31 #include "llvm/MC/LaneBitmask.h"
32 #include "llvm/Support/Compiler.h"
33 #include <utility>
34 
35 namespace llvm {
36 
37 class AAResults;
38 class LiveIntervals;
39 class LiveRangeEdit;
40 class MachineBlockFrequencyInfo;
41 class MachineDominatorTree;
42 class MachineLoopInfo;
43 class MachineRegisterInfo;
44 class TargetInstrInfo;
45 class TargetRegisterInfo;
46 class VirtRegMap;
47 
48 /// Determines the latest safe point in a block in which we can insert a split,
49 /// spill or other instruction related with CurLI.
50 class LLVM_LIBRARY_VISIBILITY InsertPointAnalysis {
51 private:
52   const LiveIntervals &LIS;
53 
54   /// Last legal insert point in each basic block in the current function.
55   /// The first entry is the first terminator, the second entry is the
56   /// last valid point to insert a split or spill for a variable that is
57   /// live into a landing pad or inlineasm_br successor.
58   SmallVector<std::pair<SlotIndex, SlotIndex>, 8> LastInsertPoint;
59 
60   SlotIndex computeLastInsertPoint(const LiveInterval &CurLI,
61                                    const MachineBasicBlock &MBB);
62 
63 public:
64   InsertPointAnalysis(const LiveIntervals &lis, unsigned BBNum);
65 
66   /// Return the base index of the last valid insert point for \pCurLI in \pMBB.
67   SlotIndex getLastInsertPoint(const LiveInterval &CurLI,
68                                const MachineBasicBlock &MBB) {
69     unsigned Num = MBB.getNumber();
70     // Inline the common simple case.
71     if (LastInsertPoint[Num].first.isValid() &&
72         !LastInsertPoint[Num].second.isValid())
73       return LastInsertPoint[Num].first;
74     return computeLastInsertPoint(CurLI, MBB);
75   }
76 
77   /// Returns the last insert point as an iterator for \pCurLI in \pMBB.
78   MachineBasicBlock::iterator getLastInsertPointIter(const LiveInterval &CurLI,
79                                                      MachineBasicBlock &MBB);
80 
81   /// Return the base index of the first insert point in \pMBB.
82   SlotIndex getFirstInsertPoint(MachineBasicBlock &MBB) {
83     SlotIndex Res = LIS.getMBBStartIdx(&MBB);
84     if (!MBB.empty()) {
85       MachineBasicBlock::iterator MII = MBB.SkipPHIsLabelsAndDebug(MBB.begin());
86       if (MII != MBB.end())
87         Res = LIS.getInstructionIndex(*MII);
88     }
89     return Res;
90   }
91 
92 };
93 
94 /// SplitAnalysis - Analyze a LiveInterval, looking for live range splitting
95 /// opportunities.
96 class LLVM_LIBRARY_VISIBILITY SplitAnalysis {
97 public:
98   const MachineFunction &MF;
99   const VirtRegMap &VRM;
100   const LiveIntervals &LIS;
101   const MachineLoopInfo &Loops;
102   const TargetInstrInfo &TII;
103 
104   /// Additional information about basic blocks where the current variable is
105   /// live. Such a block will look like one of these templates:
106   ///
107   ///  1. |   o---x   | Internal to block. Variable is only live in this block.
108   ///  2. |---x       | Live-in, kill.
109   ///  3. |       o---| Def, live-out.
110   ///  4. |---x   o---| Live-in, kill, def, live-out. Counted by NumGapBlocks.
111   ///  5. |---o---o---| Live-through with uses or defs.
112   ///  6. |-----------| Live-through without uses. Counted by NumThroughBlocks.
113   ///
114   /// Two BlockInfo entries are created for template 4. One for the live-in
115   /// segment, and one for the live-out segment. These entries look as if the
116   /// block were split in the middle where the live range isn't live.
117   ///
118   /// Live-through blocks without any uses don't get BlockInfo entries. They
119   /// are simply listed in ThroughBlocks instead.
120   ///
121   struct BlockInfo {
122     MachineBasicBlock *MBB;
123     SlotIndex FirstInstr; ///< First instr accessing current reg.
124     SlotIndex LastInstr;  ///< Last instr accessing current reg.
125     SlotIndex FirstDef;   ///< First non-phi valno->def, or SlotIndex().
126     bool LiveIn;          ///< Current reg is live in.
127     bool LiveOut;         ///< Current reg is live out.
128 
129     /// isOneInstr - Returns true when this BlockInfo describes a single
130     /// instruction.
131     bool isOneInstr() const {
132       return SlotIndex::isSameInstr(FirstInstr, LastInstr);
133     }
134 
135     void print(raw_ostream &OS) const;
136     void dump() const;
137   };
138 
139 private:
140   // Current live interval.
141   const LiveInterval *CurLI = nullptr;
142 
143   /// Insert Point Analysis.
144   InsertPointAnalysis IPA;
145 
146   // Sorted slot indexes of using instructions.
147   SmallVector<SlotIndex, 8> UseSlots;
148 
149   /// UseBlocks - Blocks where CurLI has uses.
150   SmallVector<BlockInfo, 8> UseBlocks;
151 
152   /// NumGapBlocks - Number of duplicate entries in UseBlocks for blocks where
153   /// the live range has a gap.
154   unsigned NumGapBlocks;
155 
156   /// ThroughBlocks - Block numbers where CurLI is live through without uses.
157   BitVector ThroughBlocks;
158 
159   /// NumThroughBlocks - Number of live-through blocks.
160   unsigned NumThroughBlocks;
161 
162   /// DidRepairRange - analyze was forced to shrinkToUses().
163   bool DidRepairRange;
164 
165   // Sumarize statistics by counting instructions using CurLI.
166   void analyzeUses();
167 
168   /// calcLiveBlockInfo - Compute per-block information about CurLI.
169   bool calcLiveBlockInfo();
170 
171 public:
172   SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
173                 const MachineLoopInfo &mli);
174 
175   /// analyze - set CurLI to the specified interval, and analyze how it may be
176   /// split.
177   void analyze(const LiveInterval *li);
178 
179   /// didRepairRange() - Returns true if CurLI was invalid and has been repaired
180   /// by analyze(). This really shouldn't happen, but sometimes the coalescer
181   /// can create live ranges that end in mid-air.
182   bool didRepairRange() const { return DidRepairRange; }
183 
184   /// clear - clear all data structures so SplitAnalysis is ready to analyze a
185   /// new interval.
186   void clear();
187 
188   /// getParent - Return the last analyzed interval.
189   const LiveInterval &getParent() const { return *CurLI; }
190 
191   /// isOriginalEndpoint - Return true if the original live range was killed or
192   /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def,
193   /// and 'use' for an early-clobber def.
194   /// This can be used to recognize code inserted by earlier live range
195   /// splitting.
196   bool isOriginalEndpoint(SlotIndex Idx) const;
197 
198   /// getUseSlots - Return an array of SlotIndexes of instructions using CurLI.
199   /// This include both use and def operands, at most one entry per instruction.
200   ArrayRef<SlotIndex> getUseSlots() const { return UseSlots; }
201 
202   /// getUseBlocks - Return an array of BlockInfo objects for the basic blocks
203   /// where CurLI has uses.
204   ArrayRef<BlockInfo> getUseBlocks() const { return UseBlocks; }
205 
206   /// getNumThroughBlocks - Return the number of through blocks.
207   unsigned getNumThroughBlocks() const { return NumThroughBlocks; }
208 
209   /// isThroughBlock - Return true if CurLI is live through MBB without uses.
210   bool isThroughBlock(unsigned MBB) const { return ThroughBlocks.test(MBB); }
211 
212   /// getThroughBlocks - Return the set of through blocks.
213   const BitVector &getThroughBlocks() const { return ThroughBlocks; }
214 
215   /// getNumLiveBlocks - Return the number of blocks where CurLI is live.
216   unsigned getNumLiveBlocks() const {
217     return getUseBlocks().size() - NumGapBlocks + getNumThroughBlocks();
218   }
219 
220   /// countLiveBlocks - Return the number of blocks where li is live. This is
221   /// guaranteed to return the same number as getNumLiveBlocks() after calling
222   /// analyze(li).
223   unsigned countLiveBlocks(const LiveInterval *li) const;
224 
225   using BlockPtrSet = SmallPtrSet<const MachineBasicBlock *, 16>;
226 
227   /// shouldSplitSingleBlock - Returns true if it would help to create a local
228   /// live range for the instructions in BI. There is normally no benefit to
229   /// creating a live range for a single instruction, but it does enable
230   /// register class inflation if the instruction has a restricted register
231   /// class.
232   ///
233   /// @param BI           The block to be isolated.
234   /// @param SingleInstrs True when single instructions should be isolated.
235   bool shouldSplitSingleBlock(const BlockInfo &BI, bool SingleInstrs) const;
236 
237   SlotIndex getLastSplitPoint(unsigned Num) {
238     return IPA.getLastInsertPoint(*CurLI, *MF.getBlockNumbered(Num));
239   }
240 
241   SlotIndex getLastSplitPoint(MachineBasicBlock *BB) {
242     return IPA.getLastInsertPoint(*CurLI, *BB);
243   }
244 
245   MachineBasicBlock::iterator getLastSplitPointIter(MachineBasicBlock *BB) {
246     return IPA.getLastInsertPointIter(*CurLI, *BB);
247   }
248 
249   SlotIndex getFirstSplitPoint(unsigned Num) {
250     return IPA.getFirstInsertPoint(*MF.getBlockNumbered(Num));
251   }
252 };
253 
254 /// SplitEditor - Edit machine code and LiveIntervals for live range
255 /// splitting.
256 ///
257 /// - Create a SplitEditor from a SplitAnalysis.
258 /// - Start a new live interval with openIntv.
259 /// - Mark the places where the new interval is entered using enterIntv*
260 /// - Mark the ranges where the new interval is used with useIntv*
261 /// - Mark the places where the interval is exited with exitIntv*.
262 /// - Finish the current interval with closeIntv and repeat from 2.
263 /// - Rewrite instructions with finish().
264 ///
265 class LLVM_LIBRARY_VISIBILITY SplitEditor {
266   SplitAnalysis &SA;
267   AAResults &AA;
268   LiveIntervals &LIS;
269   VirtRegMap &VRM;
270   MachineRegisterInfo &MRI;
271   MachineDominatorTree &MDT;
272   const TargetInstrInfo &TII;
273   const TargetRegisterInfo &TRI;
274   const MachineBlockFrequencyInfo &MBFI;
275 
276 public:
277   /// ComplementSpillMode - Select how the complement live range should be
278   /// created.  SplitEditor automatically creates interval 0 to contain
279   /// anything that isn't added to another interval.  This complement interval
280   /// can get quite complicated, and it can sometimes be an advantage to allow
281   /// it to overlap the other intervals.  If it is going to spill anyway, no
282   /// registers are wasted by keeping a value in two places at the same time.
283   enum ComplementSpillMode {
284     /// SM_Partition(Default) - Try to create the complement interval so it
285     /// doesn't overlap any other intervals, and the original interval is
286     /// partitioned.  This may require a large number of back copies and extra
287     /// PHI-defs.  Only segments marked with overlapIntv will be overlapping.
288     SM_Partition,
289 
290     /// SM_Size - Overlap intervals to minimize the number of inserted COPY
291     /// instructions.  Copies to the complement interval are hoisted to their
292     /// common dominator, so only one COPY is required per value in the
293     /// complement interval.  This also means that no extra PHI-defs need to be
294     /// inserted in the complement interval.
295     SM_Size,
296 
297     /// SM_Speed - Overlap intervals to minimize the expected execution
298     /// frequency of the inserted copies.  This is very similar to SM_Size, but
299     /// the complement interval may get some extra PHI-defs.
300     SM_Speed
301   };
302 
303 private:
304   /// Edit - The current parent register and new intervals created.
305   LiveRangeEdit *Edit = nullptr;
306 
307   /// Index into Edit of the currently open interval.
308   /// The index 0 is used for the complement, so the first interval started by
309   /// openIntv will be 1.
310   unsigned OpenIdx = 0;
311 
312   /// The current spill mode, selected by reset().
313   ComplementSpillMode SpillMode = SM_Partition;
314 
315   using RegAssignMap = IntervalMap<SlotIndex, unsigned>;
316 
317   /// Allocator for the interval map. This will eventually be shared with
318   /// SlotIndexes and LiveIntervals.
319   RegAssignMap::Allocator Allocator;
320 
321   /// RegAssign - Map of the assigned register indexes.
322   /// Edit.get(RegAssign.lookup(Idx)) is the register that should be live at
323   /// Idx.
324   RegAssignMap RegAssign;
325 
326   using ValueForcePair = PointerIntPair<VNInfo *, 1>;
327   using ValueMap = DenseMap<std::pair<unsigned, unsigned>, ValueForcePair>;
328 
329   /// Values - keep track of the mapping from parent values to values in the new
330   /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains:
331   ///
332   /// 1. No entry - the value is not mapped to Edit.get(RegIdx).
333   /// 2. (Null, false) - the value is mapped to multiple values in
334   ///    Edit.get(RegIdx).  Each value is represented by a minimal live range at
335   ///    its def.  The full live range can be inferred exactly from the range
336   ///    of RegIdx in RegAssign.
337   /// 3. (Null, true).  As above, but the ranges in RegAssign are too large, and
338   ///    the live range must be recomputed using ::extend().
339   /// 4. (VNI, false) The value is mapped to a single new value.
340   ///    The new value has no live ranges anywhere.
341   ValueMap Values;
342 
343   /// LICalc - Cache for computing live ranges and SSA update.  Each instance
344   /// can only handle non-overlapping live ranges, so use a separate
345   /// LiveIntervalCalc instance for the complement interval when in spill mode.
346   LiveIntervalCalc LICalc[2];
347 
348   /// getLICalc - Return the LICalc to use for RegIdx.  In spill mode, the
349   /// complement interval can overlap the other intervals, so it gets its own
350   /// LICalc instance.  When not in spill mode, all intervals can share one.
351   LiveIntervalCalc &getLICalc(unsigned RegIdx) {
352     return LICalc[SpillMode != SM_Partition && RegIdx != 0];
353   }
354 
355   /// Find a subrange corresponding to the exact lane mask @p LM in the live
356   /// interval @p LI. The interval @p LI is assumed to contain such a subrange.
357   /// This function is used to find corresponding subranges between the
358   /// original interval and the new intervals.
359   LiveInterval::SubRange &getSubRangeForMaskExact(LaneBitmask LM,
360                                                   LiveInterval &LI);
361 
362   /// Find a subrange corresponding to the lane mask @p LM, or a superset of it,
363   /// in the live interval @p LI. The interval @p LI is assumed to contain such
364   /// a subrange.  This function is used to find corresponding subranges between
365   /// the original interval and the new intervals.
366   LiveInterval::SubRange &getSubRangeForMask(LaneBitmask LM, LiveInterval &LI);
367 
368   /// Add a segment to the interval LI for the value number VNI. If LI has
369   /// subranges, corresponding segments will be added to them as well, but
370   /// with newly created value numbers. If Original is true, dead def will
371   /// only be added a subrange of LI if the corresponding subrange of the
372   /// original interval has a def at this index. Otherwise, all subranges
373   /// of LI will be updated.
374   void addDeadDef(LiveInterval &LI, VNInfo *VNI, bool Original);
375 
376   /// defValue - define a value in RegIdx from ParentVNI at Idx.
377   /// Idx does not have to be ParentVNI->def, but it must be contained within
378   /// ParentVNI's live range in ParentLI. The new value is added to the value
379   /// map. The value being defined may either come from rematerialization
380   /// (or an inserted copy), or it may be coming from the original interval.
381   /// The parameter Original should be true in the latter case, otherwise
382   /// it should be false.
383   /// Return the new LI value.
384   VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx,
385                    bool Original);
386 
387   /// forceRecompute - Force the live range of ParentVNI in RegIdx to be
388   /// recomputed by LiveRangeCalc::extend regardless of the number of defs.
389   /// This is used for values whose live range doesn't match RegAssign exactly.
390   /// They could have rematerialized, or back-copies may have been moved.
391   void forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI);
392 
393   /// Calls forceRecompute() on any affected regidx and on ParentVNI
394   /// predecessors in case of a phi definition.
395   void forceRecomputeVNI(const VNInfo &ParentVNI);
396 
397   /// defFromParent - Define Reg from ParentVNI at UseIdx using either
398   /// rematerialization or a COPY from parent. Return the new value.
399   VNInfo *defFromParent(unsigned RegIdx,
400                         VNInfo *ParentVNI,
401                         SlotIndex UseIdx,
402                         MachineBasicBlock &MBB,
403                         MachineBasicBlock::iterator I);
404 
405   /// removeBackCopies - Remove the copy instructions that defines the values
406   /// in the vector in the complement interval.
407   void removeBackCopies(SmallVectorImpl<VNInfo*> &Copies);
408 
409   /// getShallowDominator - Returns the least busy dominator of MBB that is
410   /// also dominated by DefMBB.  Busy is measured by loop depth.
411   MachineBasicBlock *findShallowDominator(MachineBasicBlock *MBB,
412                                           MachineBasicBlock *DefMBB);
413 
414   /// Find out all the backCopies dominated by others.
415   void computeRedundantBackCopies(DenseSet<unsigned> &NotToHoistSet,
416                                   SmallVectorImpl<VNInfo *> &BackCopies);
417 
418   /// Hoist back-copies to the complement interval. It tries to hoist all
419   /// the back-copies to one BB if it is beneficial, or else simply remove
420   /// redundant backcopies dominated by others.
421   void hoistCopies();
422 
423   /// transferValues - Transfer values to the new ranges.
424   /// Return true if any ranges were skipped.
425   bool transferValues();
426 
427   /// Live range @p LR corresponding to the lane Mask @p LM has a live
428   /// PHI def at the beginning of block @p B. Extend the range @p LR of
429   /// all predecessor values that reach this def. If @p LR is a subrange,
430   /// the array @p Undefs is the set of all locations where it is undefined
431   /// via <def,read-undef> in other subranges for the same register.
432   void extendPHIRange(MachineBasicBlock &B, LiveIntervalCalc &LIC,
433                       LiveRange &LR, LaneBitmask LM,
434                       ArrayRef<SlotIndex> Undefs);
435 
436   /// extendPHIKillRanges - Extend the ranges of all values killed by original
437   /// parent PHIDefs.
438   void extendPHIKillRanges();
439 
440   /// rewriteAssigned - Rewrite all uses of Edit.getReg() to assigned registers.
441   void rewriteAssigned(bool ExtendRanges);
442 
443   /// deleteRematVictims - Delete defs that are dead after rematerializing.
444   void deleteRematVictims();
445 
446   /// Add a copy instruction copying \p FromReg to \p ToReg before
447   /// \p InsertBefore. This can be invoked with a \p LaneMask which may make it
448   /// necessary to construct a sequence of copies to cover it exactly.
449   SlotIndex buildCopy(Register FromReg, Register ToReg, LaneBitmask LaneMask,
450       MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore,
451       bool Late, unsigned RegIdx);
452 
453   SlotIndex buildSingleSubRegCopy(Register FromReg, Register ToReg,
454       MachineBasicBlock &MB, MachineBasicBlock::iterator InsertBefore,
455       unsigned SubIdx, LiveInterval &DestLI, bool Late, SlotIndex Def);
456 
457 public:
458   /// Create a new SplitEditor for editing the LiveInterval analyzed by SA.
459   /// Newly created intervals will be appended to newIntervals.
460   SplitEditor(SplitAnalysis &sa, AAResults &aa, LiveIntervals &lis,
461               VirtRegMap &vrm, MachineDominatorTree &mdt,
462               MachineBlockFrequencyInfo &mbfi);
463 
464   /// reset - Prepare for a new split.
465   void reset(LiveRangeEdit&, ComplementSpillMode = SM_Partition);
466 
467   /// Create a new virtual register and live interval.
468   /// Return the interval index, starting from 1. Interval index 0 is the
469   /// implicit complement interval.
470   unsigned openIntv();
471 
472   /// currentIntv - Return the current interval index.
473   unsigned currentIntv() const { return OpenIdx; }
474 
475   /// selectIntv - Select a previously opened interval index.
476   void selectIntv(unsigned Idx);
477 
478   /// enterIntvBefore - Enter the open interval before the instruction at Idx.
479   /// If the parent interval is not live before Idx, a COPY is not inserted.
480   /// Return the beginning of the new live range.
481   SlotIndex enterIntvBefore(SlotIndex Idx);
482 
483   /// enterIntvAfter - Enter the open interval after the instruction at Idx.
484   /// Return the beginning of the new live range.
485   SlotIndex enterIntvAfter(SlotIndex Idx);
486 
487   /// enterIntvAtEnd - Enter the open interval at the end of MBB.
488   /// Use the open interval from the inserted copy to the MBB end.
489   /// Return the beginning of the new live range.
490   SlotIndex enterIntvAtEnd(MachineBasicBlock &MBB);
491 
492   /// useIntv - indicate that all instructions in MBB should use OpenLI.
493   void useIntv(const MachineBasicBlock &MBB);
494 
495   /// useIntv - indicate that all instructions in range should use OpenLI.
496   void useIntv(SlotIndex Start, SlotIndex End);
497 
498   /// leaveIntvAfter - Leave the open interval after the instruction at Idx.
499   /// Return the end of the live range.
500   SlotIndex leaveIntvAfter(SlotIndex Idx);
501 
502   /// leaveIntvBefore - Leave the open interval before the instruction at Idx.
503   /// Return the end of the live range.
504   SlotIndex leaveIntvBefore(SlotIndex Idx);
505 
506   /// leaveIntvAtTop - Leave the interval at the top of MBB.
507   /// Add liveness from the MBB top to the copy.
508   /// Return the end of the live range.
509   SlotIndex leaveIntvAtTop(MachineBasicBlock &MBB);
510 
511   /// overlapIntv - Indicate that all instructions in range should use the open
512   /// interval, but also let the complement interval be live.
513   ///
514   /// This doubles the register pressure, but is sometimes required to deal with
515   /// register uses after the last valid split point.
516   ///
517   /// The Start index should be a return value from a leaveIntv* call, and End
518   /// should be in the same basic block. The parent interval must have the same
519   /// value across the range.
520   ///
521   void overlapIntv(SlotIndex Start, SlotIndex End);
522 
523   /// finish - after all the new live ranges have been created, compute the
524   /// remaining live range, and rewrite instructions to use the new registers.
525   /// @param LRMap When not null, this vector will map each live range in Edit
526   ///              back to the indices returned by openIntv.
527   ///              There may be extra indices created by dead code elimination.
528   void finish(SmallVectorImpl<unsigned> *LRMap = nullptr);
529 
530   /// dump - print the current interval mapping to dbgs().
531   void dump() const;
532 
533   // ===--- High level methods ---===
534 
535   /// splitSingleBlock - Split CurLI into a separate live interval around the
536   /// uses in a single block. This is intended to be used as part of a larger
537   /// split, and doesn't call finish().
538   void splitSingleBlock(const SplitAnalysis::BlockInfo &BI);
539 
540   /// splitLiveThroughBlock - Split CurLI in the given block such that it
541   /// enters the block in IntvIn and leaves it in IntvOut. There may be uses in
542   /// the block, but they will be ignored when placing split points.
543   ///
544   /// @param MBBNum      Block number.
545   /// @param IntvIn      Interval index entering the block.
546   /// @param LeaveBefore When set, leave IntvIn before this point.
547   /// @param IntvOut     Interval index leaving the block.
548   /// @param EnterAfter  When set, enter IntvOut after this point.
549   void splitLiveThroughBlock(unsigned MBBNum,
550                              unsigned IntvIn, SlotIndex LeaveBefore,
551                              unsigned IntvOut, SlotIndex EnterAfter);
552 
553   /// splitRegInBlock - Split CurLI in the given block such that it enters the
554   /// block in IntvIn and leaves it on the stack (or not at all). Split points
555   /// are placed in a way that avoids putting uses in the stack interval. This
556   /// may require creating a local interval when there is interference.
557   ///
558   /// @param BI          Block descriptor.
559   /// @param IntvIn      Interval index entering the block. Not 0.
560   /// @param LeaveBefore When set, leave IntvIn before this point.
561   void splitRegInBlock(const SplitAnalysis::BlockInfo &BI,
562                        unsigned IntvIn, SlotIndex LeaveBefore);
563 
564   /// splitRegOutBlock - Split CurLI in the given block such that it enters the
565   /// block on the stack (or isn't live-in at all) and leaves it in IntvOut.
566   /// Split points are placed to avoid interference and such that the uses are
567   /// not in the stack interval. This may require creating a local interval
568   /// when there is interference.
569   ///
570   /// @param BI          Block descriptor.
571   /// @param IntvOut     Interval index leaving the block.
572   /// @param EnterAfter  When set, enter IntvOut after this point.
573   void splitRegOutBlock(const SplitAnalysis::BlockInfo &BI,
574                         unsigned IntvOut, SlotIndex EnterAfter);
575 };
576 
577 } // end namespace llvm
578 
579 #endif // LLVM_LIB_CODEGEN_SPLITKIT_H
580