1 //===- RegisterUsageInfo.cpp - Register Usage Information Storage ---------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// This pass is required to take advantage of the interprocedural register
11 /// allocation infrastructure.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/CodeGen/RegisterUsageInfo.h"
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/CodeGen/TargetRegisterInfo.h"
19 #include "llvm/CodeGen/TargetSubtargetInfo.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/IR/Module.h"
22 #include "llvm/Pass.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/raw_ostream.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include <algorithm>
27 #include <cassert>
28 #include <cstdint>
29 #include <utility>
30 #include <vector>
31 
32 using namespace llvm;
33 
34 #define DEBUG_TYPE "ip-regalloc"
35 
36 static cl::opt<bool> DumpRegUsage(
37     "print-regusage", cl::init(false), cl::Hidden,
38     cl::desc("print register usage details collected for analysis."));
39 
40 INITIALIZE_PASS(PhysicalRegisterUsageInfo, "reg-usage-info",
41                 "Register Usage Information Storage", false, true)
42 
43 char PhysicalRegisterUsageInfo::ID = 0;
44 
45 void PhysicalRegisterUsageInfo::anchor() {}
46 
47 bool PhysicalRegisterUsageInfo::doInitialization(Module &M) {
48   RegMasks.grow(M.size());
49   return false;
50 }
51 
52 bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
53   if (DumpRegUsage)
54     print(errs());
55 
56   RegMasks.shrink_and_clear();
57   return false;
58 }
59 
60 void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
61     const Function *FP, std::vector<uint32_t> RegMask) {
62   assert(FP != nullptr && "Function * can't be nullptr.");
63   RegMasks[FP] = std::move(RegMask);
64 }
65 
66 const std::vector<uint32_t> *
67 PhysicalRegisterUsageInfo::getRegUsageInfo(const Function *FP) {
68   auto It = RegMasks.find(FP);
69   if (It != RegMasks.end())
70     return &(It->second);
71   return nullptr;
72 }
73 
74 void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const {
75   const TargetRegisterInfo *TRI;
76 
77   using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;
78 
79   SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector;
80 
81   // Create a vector of pointer to RegMasks entries
82   for (const auto &RegMask : RegMasks)
83     FPRMPairVector.push_back(&RegMask);
84 
85   // sort the vector to print analysis in alphabatic order of function name.
86   std::sort(
87       FPRMPairVector.begin(), FPRMPairVector.end(),
88       [](const FuncPtrRegMaskPair *A, const FuncPtrRegMaskPair *B) -> bool {
89         return A->first->getName() < B->first->getName();
90       });
91 
92   for (const FuncPtrRegMaskPair *FPRMPair : FPRMPairVector) {
93     OS << FPRMPair->first->getName() << " "
94        << "Clobbered Registers: ";
95     TRI = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
96               .getRegisterInfo();
97 
98     for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
99       if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg))
100         OS << TRI->getName(PReg) << " ";
101     }
102     OS << "\n";
103   }
104 }
105