1 //===-- RegisterPressure.cpp - Dynamic Register Pressure ------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the RegisterPressure class which can be used to track 11 // MachineInstr level register pressure. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/CodeGen/RegisterPressure.h" 16 #include "llvm/CodeGen/LiveInterval.h" 17 #include "llvm/CodeGen/LiveIntervalAnalysis.h" 18 #include "llvm/CodeGen/MachineRegisterInfo.h" 19 #include "llvm/CodeGen/RegisterClassInfo.h" 20 #include "llvm/Support/Debug.h" 21 #include "llvm/Support/raw_ostream.h" 22 23 using namespace llvm; 24 25 /// Increase pressure for each pressure set provided by TargetRegisterInfo. 26 static void increaseSetPressure(std::vector<unsigned> &CurrSetPressure, 27 const MachineRegisterInfo &MRI, unsigned Reg, 28 LaneBitmask PrevMask, LaneBitmask NewMask) { 29 assert((PrevMask & ~NewMask) == 0 && "Must not remove bits"); 30 if (PrevMask != 0 || NewMask == 0) 31 return; 32 33 PSetIterator PSetI = MRI.getPressureSets(Reg); 34 unsigned Weight = PSetI.getWeight(); 35 for (; PSetI.isValid(); ++PSetI) 36 CurrSetPressure[*PSetI] += Weight; 37 } 38 39 /// Decrease pressure for each pressure set provided by TargetRegisterInfo. 40 static void decreaseSetPressure(std::vector<unsigned> &CurrSetPressure, 41 const MachineRegisterInfo &MRI, unsigned Reg, 42 LaneBitmask PrevMask, LaneBitmask NewMask) { 43 assert((NewMask & !PrevMask) == 0 && "Must not add bits"); 44 if (NewMask != 0 || PrevMask == 0) 45 return; 46 47 PSetIterator PSetI = MRI.getPressureSets(Reg); 48 unsigned Weight = PSetI.getWeight(); 49 for (; PSetI.isValid(); ++PSetI) { 50 assert(CurrSetPressure[*PSetI] >= Weight && "register pressure underflow"); 51 CurrSetPressure[*PSetI] -= Weight; 52 } 53 } 54 55 LLVM_DUMP_METHOD 56 void llvm::dumpRegSetPressure(ArrayRef<unsigned> SetPressure, 57 const TargetRegisterInfo *TRI) { 58 bool Empty = true; 59 for (unsigned i = 0, e = SetPressure.size(); i < e; ++i) { 60 if (SetPressure[i] != 0) { 61 dbgs() << TRI->getRegPressureSetName(i) << "=" << SetPressure[i] << '\n'; 62 Empty = false; 63 } 64 } 65 if (Empty) 66 dbgs() << "\n"; 67 } 68 69 LLVM_DUMP_METHOD 70 void RegisterPressure::dump(const TargetRegisterInfo *TRI) const { 71 dbgs() << "Max Pressure: "; 72 dumpRegSetPressure(MaxSetPressure, TRI); 73 dbgs() << "Live In: "; 74 for (const RegisterMaskPair &P : LiveInRegs) { 75 dbgs() << PrintVRegOrUnit(P.RegUnit, TRI); 76 if (P.LaneMask != ~0u) 77 dbgs() << ':' << PrintLaneMask(P.LaneMask); 78 dbgs() << ' '; 79 } 80 dbgs() << '\n'; 81 dbgs() << "Live Out: "; 82 for (const RegisterMaskPair &P : LiveOutRegs) { 83 dbgs() << PrintVRegOrUnit(P.RegUnit, TRI); 84 if (P.LaneMask != ~0u) 85 dbgs() << ':' << PrintLaneMask(P.LaneMask); 86 dbgs() << ' '; 87 } 88 dbgs() << '\n'; 89 } 90 91 LLVM_DUMP_METHOD 92 void RegPressureTracker::dump() const { 93 if (!isTopClosed() || !isBottomClosed()) { 94 dbgs() << "Curr Pressure: "; 95 dumpRegSetPressure(CurrSetPressure, TRI); 96 } 97 P.dump(TRI); 98 } 99 100 void PressureDiff::dump(const TargetRegisterInfo &TRI) const { 101 const char *sep = ""; 102 for (const PressureChange &Change : *this) { 103 if (!Change.isValid()) 104 break; 105 dbgs() << sep << TRI.getRegPressureSetName(Change.getPSet()) 106 << " " << Change.getUnitInc(); 107 sep = " "; 108 } 109 dbgs() << '\n'; 110 } 111 112 void RegPressureTracker::increaseRegPressure(unsigned RegUnit, 113 LaneBitmask PreviousMask, 114 LaneBitmask NewMask) { 115 if (PreviousMask != 0 || NewMask == 0) 116 return; 117 118 PSetIterator PSetI = MRI->getPressureSets(RegUnit); 119 unsigned Weight = PSetI.getWeight(); 120 for (; PSetI.isValid(); ++PSetI) { 121 CurrSetPressure[*PSetI] += Weight; 122 P.MaxSetPressure[*PSetI] = 123 std::max(P.MaxSetPressure[*PSetI], CurrSetPressure[*PSetI]); 124 } 125 } 126 127 void RegPressureTracker::decreaseRegPressure(unsigned RegUnit, 128 LaneBitmask PreviousMask, 129 LaneBitmask NewMask) { 130 decreaseSetPressure(CurrSetPressure, *MRI, RegUnit, PreviousMask, NewMask); 131 } 132 133 /// Clear the result so it can be used for another round of pressure tracking. 134 void IntervalPressure::reset() { 135 TopIdx = BottomIdx = SlotIndex(); 136 MaxSetPressure.clear(); 137 LiveInRegs.clear(); 138 LiveOutRegs.clear(); 139 } 140 141 /// Clear the result so it can be used for another round of pressure tracking. 142 void RegionPressure::reset() { 143 TopPos = BottomPos = MachineBasicBlock::const_iterator(); 144 MaxSetPressure.clear(); 145 LiveInRegs.clear(); 146 LiveOutRegs.clear(); 147 } 148 149 /// If the current top is not less than or equal to the next index, open it. 150 /// We happen to need the SlotIndex for the next top for pressure update. 151 void IntervalPressure::openTop(SlotIndex NextTop) { 152 if (TopIdx <= NextTop) 153 return; 154 TopIdx = SlotIndex(); 155 LiveInRegs.clear(); 156 } 157 158 /// If the current top is the previous instruction (before receding), open it. 159 void RegionPressure::openTop(MachineBasicBlock::const_iterator PrevTop) { 160 if (TopPos != PrevTop) 161 return; 162 TopPos = MachineBasicBlock::const_iterator(); 163 LiveInRegs.clear(); 164 } 165 166 /// If the current bottom is not greater than the previous index, open it. 167 void IntervalPressure::openBottom(SlotIndex PrevBottom) { 168 if (BottomIdx > PrevBottom) 169 return; 170 BottomIdx = SlotIndex(); 171 LiveInRegs.clear(); 172 } 173 174 /// If the current bottom is the previous instr (before advancing), open it. 175 void RegionPressure::openBottom(MachineBasicBlock::const_iterator PrevBottom) { 176 if (BottomPos != PrevBottom) 177 return; 178 BottomPos = MachineBasicBlock::const_iterator(); 179 LiveInRegs.clear(); 180 } 181 182 void LiveRegSet::init(const MachineRegisterInfo &MRI) { 183 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); 184 unsigned NumRegUnits = TRI.getNumRegs(); 185 unsigned NumVirtRegs = MRI.getNumVirtRegs(); 186 Regs.setUniverse(NumRegUnits + NumVirtRegs); 187 this->NumRegUnits = NumRegUnits; 188 } 189 190 void LiveRegSet::clear() { 191 Regs.clear(); 192 } 193 194 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { 195 if (TargetRegisterInfo::isVirtualRegister(Reg)) 196 return &LIS.getInterval(Reg); 197 return LIS.getCachedRegUnit(Reg); 198 } 199 200 void RegPressureTracker::reset() { 201 MBB = nullptr; 202 LIS = nullptr; 203 204 CurrSetPressure.clear(); 205 LiveThruPressure.clear(); 206 P.MaxSetPressure.clear(); 207 208 if (RequireIntervals) 209 static_cast<IntervalPressure&>(P).reset(); 210 else 211 static_cast<RegionPressure&>(P).reset(); 212 213 LiveRegs.clear(); 214 UntiedDefs.clear(); 215 } 216 217 /// Setup the RegPressureTracker. 218 /// 219 /// TODO: Add support for pressure without LiveIntervals. 220 void RegPressureTracker::init(const MachineFunction *mf, 221 const RegisterClassInfo *rci, 222 const LiveIntervals *lis, 223 const MachineBasicBlock *mbb, 224 MachineBasicBlock::const_iterator pos, 225 bool TrackLaneMasks, bool TrackUntiedDefs) { 226 reset(); 227 228 MF = mf; 229 TRI = MF->getSubtarget().getRegisterInfo(); 230 RCI = rci; 231 MRI = &MF->getRegInfo(); 232 MBB = mbb; 233 this->TrackUntiedDefs = TrackUntiedDefs; 234 this->TrackLaneMasks = TrackLaneMasks; 235 236 if (RequireIntervals) { 237 assert(lis && "IntervalPressure requires LiveIntervals"); 238 LIS = lis; 239 } 240 241 CurrPos = pos; 242 CurrSetPressure.assign(TRI->getNumRegPressureSets(), 0); 243 244 P.MaxSetPressure = CurrSetPressure; 245 246 LiveRegs.init(*MRI); 247 if (TrackUntiedDefs) 248 UntiedDefs.setUniverse(MRI->getNumVirtRegs()); 249 } 250 251 /// Does this pressure result have a valid top position and live ins. 252 bool RegPressureTracker::isTopClosed() const { 253 if (RequireIntervals) 254 return static_cast<IntervalPressure&>(P).TopIdx.isValid(); 255 return (static_cast<RegionPressure&>(P).TopPos == 256 MachineBasicBlock::const_iterator()); 257 } 258 259 /// Does this pressure result have a valid bottom position and live outs. 260 bool RegPressureTracker::isBottomClosed() const { 261 if (RequireIntervals) 262 return static_cast<IntervalPressure&>(P).BottomIdx.isValid(); 263 return (static_cast<RegionPressure&>(P).BottomPos == 264 MachineBasicBlock::const_iterator()); 265 } 266 267 268 SlotIndex RegPressureTracker::getCurrSlot() const { 269 MachineBasicBlock::const_iterator IdxPos = CurrPos; 270 while (IdxPos != MBB->end() && IdxPos->isDebugValue()) 271 ++IdxPos; 272 if (IdxPos == MBB->end()) 273 return LIS->getMBBEndIdx(MBB); 274 return LIS->getInstructionIndex(*IdxPos).getRegSlot(); 275 } 276 277 /// Set the boundary for the top of the region and summarize live ins. 278 void RegPressureTracker::closeTop() { 279 if (RequireIntervals) 280 static_cast<IntervalPressure&>(P).TopIdx = getCurrSlot(); 281 else 282 static_cast<RegionPressure&>(P).TopPos = CurrPos; 283 284 assert(P.LiveInRegs.empty() && "inconsistent max pressure result"); 285 P.LiveInRegs.reserve(LiveRegs.size()); 286 LiveRegs.appendTo(P.LiveInRegs); 287 } 288 289 /// Set the boundary for the bottom of the region and summarize live outs. 290 void RegPressureTracker::closeBottom() { 291 if (RequireIntervals) 292 static_cast<IntervalPressure&>(P).BottomIdx = getCurrSlot(); 293 else 294 static_cast<RegionPressure&>(P).BottomPos = CurrPos; 295 296 assert(P.LiveOutRegs.empty() && "inconsistent max pressure result"); 297 P.LiveOutRegs.reserve(LiveRegs.size()); 298 LiveRegs.appendTo(P.LiveOutRegs); 299 } 300 301 /// Finalize the region boundaries and record live ins and live outs. 302 void RegPressureTracker::closeRegion() { 303 if (!isTopClosed() && !isBottomClosed()) { 304 assert(LiveRegs.size() == 0 && "no region boundary"); 305 return; 306 } 307 if (!isBottomClosed()) 308 closeBottom(); 309 else if (!isTopClosed()) 310 closeTop(); 311 // If both top and bottom are closed, do nothing. 312 } 313 314 /// The register tracker is unaware of global liveness so ignores normal 315 /// live-thru ranges. However, two-address or coalesced chains can also lead 316 /// to live ranges with no holes. Count these to inform heuristics that we 317 /// can never drop below this pressure. 318 void RegPressureTracker::initLiveThru(const RegPressureTracker &RPTracker) { 319 LiveThruPressure.assign(TRI->getNumRegPressureSets(), 0); 320 assert(isBottomClosed() && "need bottom-up tracking to intialize."); 321 for (const RegisterMaskPair &Pair : P.LiveOutRegs) { 322 unsigned RegUnit = Pair.RegUnit; 323 if (TargetRegisterInfo::isVirtualRegister(RegUnit) 324 && !RPTracker.hasUntiedDef(RegUnit)) 325 increaseSetPressure(LiveThruPressure, *MRI, RegUnit, 0, Pair.LaneMask); 326 } 327 } 328 329 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, 330 unsigned RegUnit) { 331 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 332 [RegUnit](const RegisterMaskPair Other) { 333 return Other.RegUnit == RegUnit; 334 }); 335 if (I == RegUnits.end()) 336 return 0; 337 return I->LaneMask; 338 } 339 340 static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, 341 RegisterMaskPair Pair) { 342 unsigned RegUnit = Pair.RegUnit; 343 assert(Pair.LaneMask != 0); 344 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 345 [RegUnit](const RegisterMaskPair Other) { 346 return Other.RegUnit == RegUnit; 347 }); 348 if (I == RegUnits.end()) { 349 RegUnits.push_back(Pair); 350 } else { 351 I->LaneMask |= Pair.LaneMask; 352 } 353 } 354 355 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits, 356 unsigned RegUnit) { 357 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 358 [RegUnit](const RegisterMaskPair Other) { 359 return Other.RegUnit == RegUnit; 360 }); 361 if (I == RegUnits.end()) { 362 RegUnits.push_back(RegisterMaskPair(RegUnit, 0)); 363 } else { 364 I->LaneMask = 0; 365 } 366 } 367 368 static void removeRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, 369 RegisterMaskPair Pair) { 370 unsigned RegUnit = Pair.RegUnit; 371 assert(Pair.LaneMask != 0); 372 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 373 [RegUnit](const RegisterMaskPair Other) { 374 return Other.RegUnit == RegUnit; 375 }); 376 if (I != RegUnits.end()) { 377 I->LaneMask &= ~Pair.LaneMask; 378 if (I->LaneMask == 0) 379 RegUnits.erase(I); 380 } 381 } 382 383 static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS, 384 const MachineRegisterInfo &MRI, bool TrackLaneMasks, unsigned RegUnit, 385 SlotIndex Pos, 386 bool(*Property)(const LiveRange &LR, SlotIndex Pos)) { 387 if (TargetRegisterInfo::isVirtualRegister(RegUnit)) { 388 const LiveInterval &LI = LIS.getInterval(RegUnit); 389 LaneBitmask Result = 0; 390 if (TrackLaneMasks && LI.hasSubRanges()) { 391 for (const LiveInterval::SubRange &SR : LI.subranges()) { 392 if (Property(SR, Pos)) 393 Result |= SR.LaneMask; 394 } 395 } else if (Property(LI, Pos)) 396 Result = MRI.getMaxLaneMaskForVReg(RegUnit); 397 398 return Result; 399 } else { 400 const LiveRange *LR = LIS.getCachedRegUnit(RegUnit); 401 // Be prepared for missing liveranges: We usually do not compute liveranges 402 // for physical registers on targets with many registers (GPUs). 403 if (LR == nullptr) 404 return 0; 405 return Property(*LR, Pos) ? ~0u : 0; 406 } 407 } 408 409 static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS, 410 const MachineRegisterInfo &MRI, 411 bool TrackLaneMasks, unsigned RegUnit, 412 SlotIndex Pos) { 413 return getLanesWithProperty(LIS, MRI, TrackLaneMasks, RegUnit, Pos, 414 [](const LiveRange &LR, SlotIndex Pos) { 415 return LR.liveAt(Pos); 416 }); 417 } 418 419 420 namespace { 421 422 /// Collect this instruction's unique uses and defs into SmallVectors for 423 /// processing defs and uses in order. 424 /// 425 /// FIXME: always ignore tied opers 426 class RegisterOperandsCollector { 427 RegisterOperands &RegOpers; 428 const TargetRegisterInfo &TRI; 429 const MachineRegisterInfo &MRI; 430 bool TrackLaneMasks; 431 bool IgnoreDead; 432 433 RegisterOperandsCollector(RegisterOperands &RegOpers, 434 const TargetRegisterInfo &TRI, 435 const MachineRegisterInfo &MRI, 436 bool TrackLaneMasks, bool IgnoreDead) 437 : RegOpers(RegOpers), TRI(TRI), MRI(MRI), 438 TrackLaneMasks(TrackLaneMasks), IgnoreDead(IgnoreDead) {} 439 440 void collectInstr(const MachineInstr &MI) const { 441 for (ConstMIBundleOperands OperI(MI); OperI.isValid(); ++OperI) 442 collectOperand(*OperI); 443 444 // Remove redundant physreg dead defs. 445 for (const RegisterMaskPair &P : RegOpers.Defs) 446 removeRegLanes(RegOpers.DeadDefs, P); 447 } 448 449 /// Push this operand's register onto the correct vectors. 450 void collectOperand(const MachineOperand &MO) const { 451 if (!MO.isReg() || !MO.getReg()) 452 return; 453 unsigned Reg = MO.getReg(); 454 unsigned SubRegIdx = MO.getSubReg(); 455 if (MO.isUse()) { 456 if (!MO.isUndef() && !MO.isInternalRead()) 457 pushRegUnits(Reg, SubRegIdx, RegOpers.Uses); 458 } else { 459 assert(MO.isDef()); 460 if (MO.isUndef()) { 461 // Treat read-undef subreg defs as definitions of the whole register. 462 SubRegIdx = 0; 463 } else if (!TrackLaneMasks && SubRegIdx != 0 && !MO.isInternalRead()) { 464 // Interpret the subregister def as read-modify-store: A use+def of the 465 // full register. 466 pushRegUnits(Reg, SubRegIdx, RegOpers.Uses); 467 } 468 469 if (MO.isDead()) { 470 if (!IgnoreDead) 471 pushRegUnits(Reg, SubRegIdx, RegOpers.DeadDefs); 472 } else 473 pushRegUnits(Reg, SubRegIdx, RegOpers.Defs); 474 } 475 } 476 477 void pushRegUnits(unsigned Reg, unsigned SubRegIdx, 478 SmallVectorImpl<RegisterMaskPair> &RegUnits) const { 479 if (TargetRegisterInfo::isVirtualRegister(Reg)) { 480 LaneBitmask LaneMask = TrackLaneMasks && SubRegIdx != 0 481 ? TRI.getSubRegIndexLaneMask(SubRegIdx) 482 : MRI.getMaxLaneMaskForVReg(Reg); 483 addRegLanes(RegUnits, RegisterMaskPair(Reg, LaneMask)); 484 } else if (MRI.isAllocatable(Reg)) { 485 for (MCRegUnitIterator Units(Reg, &TRI); Units.isValid(); ++Units) 486 addRegLanes(RegUnits, RegisterMaskPair(*Units, ~0u)); 487 } 488 } 489 490 friend class llvm::RegisterOperands; 491 }; 492 493 } // namespace 494 495 void RegisterOperands::collect(const MachineInstr &MI, 496 const TargetRegisterInfo &TRI, 497 const MachineRegisterInfo &MRI, 498 bool TrackLaneMasks, bool IgnoreDead) { 499 RegisterOperandsCollector Collector(*this, TRI, MRI, TrackLaneMasks, 500 IgnoreDead); 501 Collector.collectInstr(MI); 502 } 503 504 void RegisterOperands::detectDeadDefs(const MachineInstr &MI, 505 const LiveIntervals &LIS) { 506 SlotIndex SlotIdx = LIS.getInstructionIndex(MI); 507 for (auto RI = Defs.begin(); RI != Defs.end(); /*empty*/) { 508 unsigned Reg = RI->RegUnit; 509 const LiveRange *LR = getLiveRange(LIS, Reg); 510 if (LR != nullptr) { 511 LiveQueryResult LRQ = LR->Query(SlotIdx); 512 if (LRQ.isDeadDef()) { 513 // LiveIntervals knows this is a dead even though it's MachineOperand is 514 // not flagged as such. 515 DeadDefs.push_back(*RI); 516 RI = Defs.erase(RI); 517 continue; 518 } 519 } 520 ++RI; 521 } 522 } 523 524 void RegisterOperands::adjustLaneLiveness(const LiveIntervals &LIS, 525 const MachineRegisterInfo &MRI, 526 SlotIndex Pos, 527 MachineInstr *AddFlagsMI) { 528 for (auto I = Defs.begin(); I != Defs.end(); ) { 529 LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, I->RegUnit, 530 Pos.getDeadSlot()); 531 // If the the def is all that is live after the instruction, then in case 532 // of a subregister def we need a read-undef flag. 533 unsigned RegUnit = I->RegUnit; 534 if (TargetRegisterInfo::isVirtualRegister(RegUnit) && 535 AddFlagsMI != nullptr && (LiveAfter & ~I->LaneMask) == 0) 536 AddFlagsMI->setRegisterDefReadUndef(RegUnit); 537 538 LaneBitmask LaneMask = I->LaneMask & LiveAfter; 539 if (LaneMask == 0) { 540 I = Defs.erase(I); 541 // Make sure the operand is properly marked as Dead. 542 if (AddFlagsMI != nullptr) 543 AddFlagsMI->addRegisterDead(RegUnit, MRI.getTargetRegisterInfo()); 544 } else { 545 I->LaneMask = LaneMask; 546 ++I; 547 } 548 } 549 for (auto I = Uses.begin(); I != Uses.end(); ) { 550 LaneBitmask LiveBefore = getLiveLanesAt(LIS, MRI, true, I->RegUnit, 551 Pos.getBaseIndex()); 552 LaneBitmask LaneMask = I->LaneMask & LiveBefore; 553 if (LaneMask == 0) { 554 I = Uses.erase(I); 555 } else { 556 I->LaneMask = LaneMask; 557 ++I; 558 } 559 } 560 if (AddFlagsMI != nullptr) { 561 for (const RegisterMaskPair &P : DeadDefs) { 562 unsigned RegUnit = P.RegUnit; 563 LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, RegUnit, 564 Pos.getDeadSlot()); 565 if (LiveAfter == 0) 566 AddFlagsMI->setRegisterDefReadUndef(RegUnit); 567 } 568 } 569 } 570 571 /// Initialize an array of N PressureDiffs. 572 void PressureDiffs::init(unsigned N) { 573 Size = N; 574 if (N <= Max) { 575 memset(PDiffArray, 0, N * sizeof(PressureDiff)); 576 return; 577 } 578 Max = Size; 579 free(PDiffArray); 580 PDiffArray = reinterpret_cast<PressureDiff*>(calloc(N, sizeof(PressureDiff))); 581 } 582 583 void PressureDiffs::addInstruction(unsigned Idx, 584 const RegisterOperands &RegOpers, 585 const MachineRegisterInfo &MRI) { 586 PressureDiff &PDiff = (*this)[Idx]; 587 assert(!PDiff.begin()->isValid() && "stale PDiff"); 588 for (const RegisterMaskPair &P : RegOpers.Defs) 589 PDiff.addPressureChange(P.RegUnit, true, &MRI); 590 591 for (const RegisterMaskPair &P : RegOpers.Uses) 592 PDiff.addPressureChange(P.RegUnit, false, &MRI); 593 } 594 595 /// Add a change in pressure to the pressure diff of a given instruction. 596 void PressureDiff::addPressureChange(unsigned RegUnit, bool IsDec, 597 const MachineRegisterInfo *MRI) { 598 PSetIterator PSetI = MRI->getPressureSets(RegUnit); 599 int Weight = IsDec ? -PSetI.getWeight() : PSetI.getWeight(); 600 for (; PSetI.isValid(); ++PSetI) { 601 // Find an existing entry in the pressure diff for this PSet. 602 PressureDiff::iterator I = nonconst_begin(), E = nonconst_end(); 603 for (; I != E && I->isValid(); ++I) { 604 if (I->getPSet() >= *PSetI) 605 break; 606 } 607 // If all pressure sets are more constrained, skip the remaining PSets. 608 if (I == E) 609 break; 610 // Insert this PressureChange. 611 if (!I->isValid() || I->getPSet() != *PSetI) { 612 PressureChange PTmp = PressureChange(*PSetI); 613 for (PressureDiff::iterator J = I; J != E && PTmp.isValid(); ++J) 614 std::swap(*J, PTmp); 615 } 616 // Update the units for this pressure set. 617 unsigned NewUnitInc = I->getUnitInc() + Weight; 618 if (NewUnitInc != 0) { 619 I->setUnitInc(NewUnitInc); 620 } else { 621 // Remove entry 622 PressureDiff::iterator J; 623 for (J = std::next(I); J != E && J->isValid(); ++J, ++I) 624 *I = *J; 625 if (J != E) 626 *I = *J; 627 } 628 } 629 } 630 631 /// Force liveness of registers. 632 void RegPressureTracker::addLiveRegs(ArrayRef<RegisterMaskPair> Regs) { 633 for (const RegisterMaskPair &P : Regs) { 634 LaneBitmask PrevMask = LiveRegs.insert(P); 635 LaneBitmask NewMask = PrevMask | P.LaneMask; 636 increaseRegPressure(P.RegUnit, PrevMask, NewMask); 637 } 638 } 639 640 void RegPressureTracker::discoverLiveInOrOut(RegisterMaskPair Pair, 641 SmallVectorImpl<RegisterMaskPair> &LiveInOrOut) { 642 if (Pair.LaneMask == 0) 643 return; 644 645 unsigned RegUnit = Pair.RegUnit; 646 auto I = std::find_if(LiveInOrOut.begin(), LiveInOrOut.end(), 647 [RegUnit](const RegisterMaskPair &Other) { 648 return Other.RegUnit == RegUnit; 649 }); 650 LaneBitmask PrevMask; 651 LaneBitmask NewMask; 652 if (I == LiveInOrOut.end()) { 653 PrevMask = 0; 654 NewMask = Pair.LaneMask; 655 LiveInOrOut.push_back(Pair); 656 } else { 657 PrevMask = I->LaneMask; 658 NewMask = PrevMask | Pair.LaneMask; 659 I->LaneMask = NewMask; 660 } 661 increaseSetPressure(P.MaxSetPressure, *MRI, RegUnit, PrevMask, NewMask); 662 } 663 664 void RegPressureTracker::discoverLiveIn(RegisterMaskPair Pair) { 665 discoverLiveInOrOut(Pair, P.LiveInRegs); 666 } 667 668 void RegPressureTracker::discoverLiveOut(RegisterMaskPair Pair) { 669 discoverLiveInOrOut(Pair, P.LiveOutRegs); 670 } 671 672 void RegPressureTracker::bumpDeadDefs(ArrayRef<RegisterMaskPair> DeadDefs) { 673 for (const RegisterMaskPair &P : DeadDefs) { 674 unsigned Reg = P.RegUnit; 675 LaneBitmask LiveMask = LiveRegs.contains(Reg); 676 LaneBitmask BumpedMask = LiveMask | P.LaneMask; 677 increaseRegPressure(Reg, LiveMask, BumpedMask); 678 } 679 for (const RegisterMaskPair &P : DeadDefs) { 680 unsigned Reg = P.RegUnit; 681 LaneBitmask LiveMask = LiveRegs.contains(Reg); 682 LaneBitmask BumpedMask = LiveMask | P.LaneMask; 683 decreaseRegPressure(Reg, BumpedMask, LiveMask); 684 } 685 } 686 687 /// Recede across the previous instruction. If LiveUses is provided, record any 688 /// RegUnits that are made live by the current instruction's uses. This includes 689 /// registers that are both defined and used by the instruction. If a pressure 690 /// difference pointer is provided record the changes is pressure caused by this 691 /// instruction independent of liveness. 692 void RegPressureTracker::recede(const RegisterOperands &RegOpers, 693 SmallVectorImpl<RegisterMaskPair> *LiveUses) { 694 assert(!CurrPos->isDebugValue()); 695 696 // Boost pressure for all dead defs together. 697 bumpDeadDefs(RegOpers.DeadDefs); 698 699 // Kill liveness at live defs. 700 // TODO: consider earlyclobbers? 701 for (const RegisterMaskPair &Def : RegOpers.Defs) { 702 unsigned Reg = Def.RegUnit; 703 704 LaneBitmask PreviousMask = LiveRegs.erase(Def); 705 LaneBitmask NewMask = PreviousMask & ~Def.LaneMask; 706 707 LaneBitmask LiveOut = Def.LaneMask & ~PreviousMask; 708 if (LiveOut != 0) { 709 discoverLiveOut(RegisterMaskPair(Reg, LiveOut)); 710 // Retroactively model effects on pressure of the live out lanes. 711 increaseSetPressure(CurrSetPressure, *MRI, Reg, 0, LiveOut); 712 PreviousMask = LiveOut; 713 } 714 715 if (NewMask == 0) { 716 // Add a 0 entry to LiveUses as a marker that the complete vreg has become 717 // dead. 718 if (TrackLaneMasks && LiveUses != nullptr) 719 setRegZero(*LiveUses, Reg); 720 } 721 722 decreaseRegPressure(Reg, PreviousMask, NewMask); 723 } 724 725 SlotIndex SlotIdx; 726 if (RequireIntervals) 727 SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot(); 728 729 // Generate liveness for uses. 730 for (const RegisterMaskPair &Use : RegOpers.Uses) { 731 unsigned Reg = Use.RegUnit; 732 assert(Use.LaneMask != 0); 733 LaneBitmask PreviousMask = LiveRegs.insert(Use); 734 LaneBitmask NewMask = PreviousMask | Use.LaneMask; 735 if (NewMask == PreviousMask) 736 continue; 737 738 // Did the register just become live? 739 if (PreviousMask == 0) { 740 if (LiveUses != nullptr) { 741 if (!TrackLaneMasks) { 742 addRegLanes(*LiveUses, RegisterMaskPair(Reg, NewMask)); 743 } else { 744 auto I = std::find_if(LiveUses->begin(), LiveUses->end(), 745 [Reg](const RegisterMaskPair Other) { 746 return Other.RegUnit == Reg; 747 }); 748 bool IsRedef = I != LiveUses->end(); 749 if (IsRedef) { 750 // ignore re-defs here... 751 assert(I->LaneMask == 0); 752 removeRegLanes(*LiveUses, RegisterMaskPair(Reg, NewMask)); 753 } else { 754 addRegLanes(*LiveUses, RegisterMaskPair(Reg, NewMask)); 755 } 756 } 757 } 758 759 // Discover live outs if this may be the first occurance of this register. 760 LaneBitmask LiveOut = getLiveThroughAt(Reg, SlotIdx); 761 discoverLiveOut(RegisterMaskPair(Reg, LiveOut)); 762 } 763 764 increaseRegPressure(Reg, PreviousMask, NewMask); 765 } 766 if (TrackUntiedDefs) { 767 for (const RegisterMaskPair &Def : RegOpers.Defs) { 768 unsigned RegUnit = Def.RegUnit; 769 if (TargetRegisterInfo::isVirtualRegister(RegUnit) && 770 (LiveRegs.contains(RegUnit) & Def.LaneMask) == 0) 771 UntiedDefs.insert(RegUnit); 772 } 773 } 774 } 775 776 void RegPressureTracker::recedeSkipDebugValues() { 777 assert(CurrPos != MBB->begin()); 778 if (!isBottomClosed()) 779 closeBottom(); 780 781 // Open the top of the region using block iterators. 782 if (!RequireIntervals && isTopClosed()) 783 static_cast<RegionPressure&>(P).openTop(CurrPos); 784 785 // Find the previous instruction. 786 do 787 --CurrPos; 788 while (CurrPos != MBB->begin() && CurrPos->isDebugValue()); 789 790 SlotIndex SlotIdx; 791 if (RequireIntervals) 792 SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot(); 793 794 // Open the top of the region using slot indexes. 795 if (RequireIntervals && isTopClosed()) 796 static_cast<IntervalPressure&>(P).openTop(SlotIdx); 797 } 798 799 void RegPressureTracker::recede(SmallVectorImpl<RegisterMaskPair> *LiveUses) { 800 recedeSkipDebugValues(); 801 802 const MachineInstr &MI = *CurrPos; 803 RegisterOperands RegOpers; 804 RegOpers.collect(MI, *TRI, *MRI, TrackLaneMasks, false); 805 if (TrackLaneMasks) { 806 SlotIndex SlotIdx = LIS->getInstructionIndex(*CurrPos).getRegSlot(); 807 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 808 } else if (RequireIntervals) { 809 RegOpers.detectDeadDefs(MI, *LIS); 810 } 811 812 recede(RegOpers, LiveUses); 813 } 814 815 /// Advance across the current instruction. 816 void RegPressureTracker::advance(const RegisterOperands &RegOpers) { 817 assert(!TrackUntiedDefs && "unsupported mode"); 818 assert(CurrPos != MBB->end()); 819 if (!isTopClosed()) 820 closeTop(); 821 822 SlotIndex SlotIdx; 823 if (RequireIntervals) 824 SlotIdx = getCurrSlot(); 825 826 // Open the bottom of the region using slot indexes. 827 if (isBottomClosed()) { 828 if (RequireIntervals) 829 static_cast<IntervalPressure&>(P).openBottom(SlotIdx); 830 else 831 static_cast<RegionPressure&>(P).openBottom(CurrPos); 832 } 833 834 for (const RegisterMaskPair &Use : RegOpers.Uses) { 835 unsigned Reg = Use.RegUnit; 836 LaneBitmask LiveMask = LiveRegs.contains(Reg); 837 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask; 838 if (LiveIn != 0) { 839 discoverLiveIn(RegisterMaskPair(Reg, LiveIn)); 840 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn); 841 LiveRegs.insert(RegisterMaskPair(Reg, LiveIn)); 842 } 843 // Kill liveness at last uses. 844 LaneBitmask LastUseMask = getLastUsedLanes(Reg, SlotIdx); 845 if (LastUseMask != 0) { 846 LiveRegs.erase(RegisterMaskPair(Reg, LastUseMask)); 847 decreaseRegPressure(Reg, LiveMask, LiveMask & ~LastUseMask); 848 } 849 } 850 851 // Generate liveness for defs. 852 for (const RegisterMaskPair &Def : RegOpers.Defs) { 853 LaneBitmask PreviousMask = LiveRegs.insert(Def); 854 LaneBitmask NewMask = PreviousMask | Def.LaneMask; 855 increaseRegPressure(Def.RegUnit, PreviousMask, NewMask); 856 } 857 858 // Boost pressure for all dead defs together. 859 bumpDeadDefs(RegOpers.DeadDefs); 860 861 // Find the next instruction. 862 do 863 ++CurrPos; 864 while (CurrPos != MBB->end() && CurrPos->isDebugValue()); 865 } 866 867 void RegPressureTracker::advance() { 868 const MachineInstr &MI = *CurrPos; 869 RegisterOperands RegOpers; 870 RegOpers.collect(MI, *TRI, *MRI, TrackLaneMasks, false); 871 if (TrackLaneMasks) { 872 SlotIndex SlotIdx = getCurrSlot(); 873 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 874 } 875 advance(RegOpers); 876 } 877 878 /// Find the max change in excess pressure across all sets. 879 static void computeExcessPressureDelta(ArrayRef<unsigned> OldPressureVec, 880 ArrayRef<unsigned> NewPressureVec, 881 RegPressureDelta &Delta, 882 const RegisterClassInfo *RCI, 883 ArrayRef<unsigned> LiveThruPressureVec) { 884 Delta.Excess = PressureChange(); 885 for (unsigned i = 0, e = OldPressureVec.size(); i < e; ++i) { 886 unsigned POld = OldPressureVec[i]; 887 unsigned PNew = NewPressureVec[i]; 888 int PDiff = (int)PNew - (int)POld; 889 if (!PDiff) // No change in this set in the common case. 890 continue; 891 // Only consider change beyond the limit. 892 unsigned Limit = RCI->getRegPressureSetLimit(i); 893 if (!LiveThruPressureVec.empty()) 894 Limit += LiveThruPressureVec[i]; 895 896 if (Limit > POld) { 897 if (Limit > PNew) 898 PDiff = 0; // Under the limit 899 else 900 PDiff = PNew - Limit; // Just exceeded limit. 901 } else if (Limit > PNew) 902 PDiff = Limit - POld; // Just obeyed limit. 903 904 if (PDiff) { 905 Delta.Excess = PressureChange(i); 906 Delta.Excess.setUnitInc(PDiff); 907 break; 908 } 909 } 910 } 911 912 /// Find the max change in max pressure that either surpasses a critical PSet 913 /// limit or exceeds the current MaxPressureLimit. 914 /// 915 /// FIXME: comparing each element of the old and new MaxPressure vectors here is 916 /// silly. It's done now to demonstrate the concept but will go away with a 917 /// RegPressureTracker API change to work with pressure differences. 918 static void computeMaxPressureDelta(ArrayRef<unsigned> OldMaxPressureVec, 919 ArrayRef<unsigned> NewMaxPressureVec, 920 ArrayRef<PressureChange> CriticalPSets, 921 ArrayRef<unsigned> MaxPressureLimit, 922 RegPressureDelta &Delta) { 923 Delta.CriticalMax = PressureChange(); 924 Delta.CurrentMax = PressureChange(); 925 926 unsigned CritIdx = 0, CritEnd = CriticalPSets.size(); 927 for (unsigned i = 0, e = OldMaxPressureVec.size(); i < e; ++i) { 928 unsigned POld = OldMaxPressureVec[i]; 929 unsigned PNew = NewMaxPressureVec[i]; 930 if (PNew == POld) // No change in this set in the common case. 931 continue; 932 933 if (!Delta.CriticalMax.isValid()) { 934 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() < i) 935 ++CritIdx; 936 937 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == i) { 938 int PDiff = (int)PNew - (int)CriticalPSets[CritIdx].getUnitInc(); 939 if (PDiff > 0) { 940 Delta.CriticalMax = PressureChange(i); 941 Delta.CriticalMax.setUnitInc(PDiff); 942 } 943 } 944 } 945 // Find the first increase above MaxPressureLimit. 946 // (Ignores negative MDiff). 947 if (!Delta.CurrentMax.isValid() && PNew > MaxPressureLimit[i]) { 948 Delta.CurrentMax = PressureChange(i); 949 Delta.CurrentMax.setUnitInc(PNew - POld); 950 if (CritIdx == CritEnd || Delta.CriticalMax.isValid()) 951 break; 952 } 953 } 954 } 955 956 /// Record the upward impact of a single instruction on current register 957 /// pressure. Unlike the advance/recede pressure tracking interface, this does 958 /// not discover live in/outs. 959 /// 960 /// This is intended for speculative queries. It leaves pressure inconsistent 961 /// with the current position, so must be restored by the caller. 962 void RegPressureTracker::bumpUpwardPressure(const MachineInstr *MI) { 963 assert(!MI->isDebugValue() && "Expect a nondebug instruction."); 964 965 SlotIndex SlotIdx; 966 if (RequireIntervals) 967 SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot(); 968 969 // Account for register pressure similar to RegPressureTracker::recede(). 970 RegisterOperands RegOpers; 971 RegOpers.collect(*MI, *TRI, *MRI, TrackLaneMasks, /*IgnoreDead=*/true); 972 assert(RegOpers.DeadDefs.size() == 0); 973 if (TrackLaneMasks) 974 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 975 else if (RequireIntervals) 976 RegOpers.detectDeadDefs(*MI, *LIS); 977 978 // Boost max pressure for all dead defs together. 979 // Since CurrSetPressure and MaxSetPressure 980 bumpDeadDefs(RegOpers.DeadDefs); 981 982 // Kill liveness at live defs. 983 for (const RegisterMaskPair &P : RegOpers.Defs) { 984 unsigned Reg = P.RegUnit; 985 LaneBitmask LiveLanes = LiveRegs.contains(Reg); 986 LaneBitmask UseLanes = getRegLanes(RegOpers.Uses, Reg); 987 LaneBitmask DefLanes = P.LaneMask; 988 LaneBitmask LiveAfter = (LiveLanes & ~DefLanes) | UseLanes; 989 decreaseRegPressure(Reg, LiveLanes, LiveAfter); 990 } 991 // Generate liveness for uses. 992 for (const RegisterMaskPair &P : RegOpers.Uses) { 993 unsigned Reg = P.RegUnit; 994 LaneBitmask LiveLanes = LiveRegs.contains(Reg); 995 LaneBitmask LiveAfter = LiveLanes | P.LaneMask; 996 increaseRegPressure(Reg, LiveLanes, LiveAfter); 997 } 998 } 999 1000 /// Consider the pressure increase caused by traversing this instruction 1001 /// bottom-up. Find the pressure set with the most change beyond its pressure 1002 /// limit based on the tracker's current pressure, and return the change in 1003 /// number of register units of that pressure set introduced by this 1004 /// instruction. 1005 /// 1006 /// This assumes that the current LiveOut set is sufficient. 1007 /// 1008 /// This is expensive for an on-the-fly query because it calls 1009 /// bumpUpwardPressure to recompute the pressure sets based on current 1010 /// liveness. This mainly exists to verify correctness, e.g. with 1011 /// -verify-misched. getUpwardPressureDelta is the fast version of this query 1012 /// that uses the per-SUnit cache of the PressureDiff. 1013 void RegPressureTracker:: 1014 getMaxUpwardPressureDelta(const MachineInstr *MI, PressureDiff *PDiff, 1015 RegPressureDelta &Delta, 1016 ArrayRef<PressureChange> CriticalPSets, 1017 ArrayRef<unsigned> MaxPressureLimit) { 1018 // Snapshot Pressure. 1019 // FIXME: The snapshot heap space should persist. But I'm planning to 1020 // summarize the pressure effect so we don't need to snapshot at all. 1021 std::vector<unsigned> SavedPressure = CurrSetPressure; 1022 std::vector<unsigned> SavedMaxPressure = P.MaxSetPressure; 1023 1024 bumpUpwardPressure(MI); 1025 1026 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI, 1027 LiveThruPressure); 1028 computeMaxPressureDelta(SavedMaxPressure, P.MaxSetPressure, CriticalPSets, 1029 MaxPressureLimit, Delta); 1030 assert(Delta.CriticalMax.getUnitInc() >= 0 && 1031 Delta.CurrentMax.getUnitInc() >= 0 && "cannot decrease max pressure"); 1032 1033 // Restore the tracker's state. 1034 P.MaxSetPressure.swap(SavedMaxPressure); 1035 CurrSetPressure.swap(SavedPressure); 1036 1037 #ifndef NDEBUG 1038 if (!PDiff) 1039 return; 1040 1041 // Check if the alternate algorithm yields the same result. 1042 RegPressureDelta Delta2; 1043 getUpwardPressureDelta(MI, *PDiff, Delta2, CriticalPSets, MaxPressureLimit); 1044 if (Delta != Delta2) { 1045 dbgs() << "PDiff: "; 1046 PDiff->dump(*TRI); 1047 dbgs() << "DELTA: " << *MI; 1048 if (Delta.Excess.isValid()) 1049 dbgs() << "Excess1 " << TRI->getRegPressureSetName(Delta.Excess.getPSet()) 1050 << " " << Delta.Excess.getUnitInc() << "\n"; 1051 if (Delta.CriticalMax.isValid()) 1052 dbgs() << "Critic1 " << TRI->getRegPressureSetName(Delta.CriticalMax.getPSet()) 1053 << " " << Delta.CriticalMax.getUnitInc() << "\n"; 1054 if (Delta.CurrentMax.isValid()) 1055 dbgs() << "CurrMx1 " << TRI->getRegPressureSetName(Delta.CurrentMax.getPSet()) 1056 << " " << Delta.CurrentMax.getUnitInc() << "\n"; 1057 if (Delta2.Excess.isValid()) 1058 dbgs() << "Excess2 " << TRI->getRegPressureSetName(Delta2.Excess.getPSet()) 1059 << " " << Delta2.Excess.getUnitInc() << "\n"; 1060 if (Delta2.CriticalMax.isValid()) 1061 dbgs() << "Critic2 " << TRI->getRegPressureSetName(Delta2.CriticalMax.getPSet()) 1062 << " " << Delta2.CriticalMax.getUnitInc() << "\n"; 1063 if (Delta2.CurrentMax.isValid()) 1064 dbgs() << "CurrMx2 " << TRI->getRegPressureSetName(Delta2.CurrentMax.getPSet()) 1065 << " " << Delta2.CurrentMax.getUnitInc() << "\n"; 1066 llvm_unreachable("RegP Delta Mismatch"); 1067 } 1068 #endif 1069 } 1070 1071 /// This is the fast version of querying register pressure that does not 1072 /// directly depend on current liveness. 1073 /// 1074 /// @param Delta captures information needed for heuristics. 1075 /// 1076 /// @param CriticalPSets Are the pressure sets that are known to exceed some 1077 /// limit within the region, not necessarily at the current position. 1078 /// 1079 /// @param MaxPressureLimit Is the max pressure within the region, not 1080 /// necessarily at the current position. 1081 void RegPressureTracker:: 1082 getUpwardPressureDelta(const MachineInstr *MI, /*const*/ PressureDiff &PDiff, 1083 RegPressureDelta &Delta, 1084 ArrayRef<PressureChange> CriticalPSets, 1085 ArrayRef<unsigned> MaxPressureLimit) const { 1086 unsigned CritIdx = 0, CritEnd = CriticalPSets.size(); 1087 for (PressureDiff::const_iterator 1088 PDiffI = PDiff.begin(), PDiffE = PDiff.end(); 1089 PDiffI != PDiffE && PDiffI->isValid(); ++PDiffI) { 1090 1091 unsigned PSetID = PDiffI->getPSet(); 1092 unsigned Limit = RCI->getRegPressureSetLimit(PSetID); 1093 if (!LiveThruPressure.empty()) 1094 Limit += LiveThruPressure[PSetID]; 1095 1096 unsigned POld = CurrSetPressure[PSetID]; 1097 unsigned MOld = P.MaxSetPressure[PSetID]; 1098 unsigned MNew = MOld; 1099 // Ignore DeadDefs here because they aren't captured by PressureChange. 1100 unsigned PNew = POld + PDiffI->getUnitInc(); 1101 assert((PDiffI->getUnitInc() >= 0) == (PNew >= POld) 1102 && "PSet overflow/underflow"); 1103 if (PNew > MOld) 1104 MNew = PNew; 1105 // Check if current pressure has exceeded the limit. 1106 if (!Delta.Excess.isValid()) { 1107 unsigned ExcessInc = 0; 1108 if (PNew > Limit) 1109 ExcessInc = POld > Limit ? PNew - POld : PNew - Limit; 1110 else if (POld > Limit) 1111 ExcessInc = Limit - POld; 1112 if (ExcessInc) { 1113 Delta.Excess = PressureChange(PSetID); 1114 Delta.Excess.setUnitInc(ExcessInc); 1115 } 1116 } 1117 // Check if max pressure has exceeded a critical pressure set max. 1118 if (MNew == MOld) 1119 continue; 1120 if (!Delta.CriticalMax.isValid()) { 1121 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() < PSetID) 1122 ++CritIdx; 1123 1124 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == PSetID) { 1125 int CritInc = (int)MNew - (int)CriticalPSets[CritIdx].getUnitInc(); 1126 if (CritInc > 0 && CritInc <= INT16_MAX) { 1127 Delta.CriticalMax = PressureChange(PSetID); 1128 Delta.CriticalMax.setUnitInc(CritInc); 1129 } 1130 } 1131 } 1132 // Check if max pressure has exceeded the current max. 1133 if (!Delta.CurrentMax.isValid() && MNew > MaxPressureLimit[PSetID]) { 1134 Delta.CurrentMax = PressureChange(PSetID); 1135 Delta.CurrentMax.setUnitInc(MNew - MOld); 1136 } 1137 } 1138 } 1139 1140 /// Helper to find a vreg use between two indices [PriorUseIdx, NextUseIdx). 1141 /// The query starts with a lane bitmask which gets lanes/bits removed for every 1142 /// use we find. 1143 static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask, 1144 SlotIndex PriorUseIdx, SlotIndex NextUseIdx, 1145 const MachineRegisterInfo &MRI, 1146 const LiveIntervals *LIS) { 1147 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); 1148 for (const MachineOperand &MO : MRI.use_nodbg_operands(Reg)) { 1149 if (MO.isUndef()) 1150 continue; 1151 const MachineInstr *MI = MO.getParent(); 1152 SlotIndex InstSlot = LIS->getInstructionIndex(*MI).getRegSlot(); 1153 if (InstSlot >= PriorUseIdx && InstSlot < NextUseIdx) { 1154 unsigned SubRegIdx = MO.getSubReg(); 1155 LaneBitmask UseMask = TRI.getSubRegIndexLaneMask(SubRegIdx); 1156 LastUseMask &= ~UseMask; 1157 if (LastUseMask == 0) 1158 return 0; 1159 } 1160 } 1161 return LastUseMask; 1162 } 1163 1164 LaneBitmask RegPressureTracker::getLiveLanesAt(unsigned RegUnit, 1165 SlotIndex Pos) const { 1166 if (!RequireIntervals) 1167 return 0; 1168 1169 return getLanesWithProperty(*LIS, *MRI, TrackLaneMasks, RegUnit, Pos, 1170 [](const LiveRange &LR, SlotIndex Pos) { 1171 return LR.liveAt(Pos); 1172 }); 1173 } 1174 1175 LaneBitmask RegPressureTracker::getLastUsedLanes(unsigned RegUnit, 1176 SlotIndex Pos) const { 1177 if (!RequireIntervals) 1178 return 0; 1179 1180 return getLanesWithProperty(*LIS, *MRI, TrackLaneMasks, RegUnit, 1181 Pos.getBaseIndex(), 1182 [](const LiveRange &LR, SlotIndex Pos) { 1183 const LiveRange::Segment *S = LR.getSegmentContaining(Pos); 1184 return S != nullptr && S->end == Pos.getRegSlot(); 1185 }); 1186 } 1187 1188 LaneBitmask RegPressureTracker::getLiveThroughAt(unsigned RegUnit, 1189 SlotIndex Pos) const { 1190 if (!RequireIntervals) 1191 return 0; 1192 1193 return getLanesWithProperty(*LIS, *MRI, TrackLaneMasks, RegUnit, Pos, 1194 [](const LiveRange &LR, SlotIndex Pos) { 1195 const LiveRange::Segment *S = LR.getSegmentContaining(Pos); 1196 return S != nullptr && S->start < Pos.getRegSlot(true) && 1197 S->end != Pos.getDeadSlot(); 1198 }); 1199 } 1200 1201 /// Record the downward impact of a single instruction on current register 1202 /// pressure. Unlike the advance/recede pressure tracking interface, this does 1203 /// not discover live in/outs. 1204 /// 1205 /// This is intended for speculative queries. It leaves pressure inconsistent 1206 /// with the current position, so must be restored by the caller. 1207 void RegPressureTracker::bumpDownwardPressure(const MachineInstr *MI) { 1208 assert(!MI->isDebugValue() && "Expect a nondebug instruction."); 1209 1210 SlotIndex SlotIdx; 1211 if (RequireIntervals) 1212 SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot(); 1213 1214 // Account for register pressure similar to RegPressureTracker::recede(). 1215 RegisterOperands RegOpers; 1216 RegOpers.collect(*MI, *TRI, *MRI, TrackLaneMasks, false); 1217 if (TrackLaneMasks) 1218 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 1219 1220 for (const RegisterMaskPair &Use : RegOpers.Uses) { 1221 unsigned Reg = Use.RegUnit; 1222 LaneBitmask LastUseMask = getLastUsedLanes(Reg, SlotIdx); 1223 if (LastUseMask == 0) 1224 continue; 1225 if (RequireIntervals) { 1226 // The LastUseMask is queried from the liveness information of instruction 1227 // which may be further down the schedule. Some lanes may actually not be 1228 // last uses for the current position. 1229 // FIXME: allow the caller to pass in the list of vreg uses that remain 1230 // to be bottom-scheduled to avoid searching uses at each query. 1231 SlotIndex CurrIdx = getCurrSlot(); 1232 LastUseMask 1233 = findUseBetween(Reg, LastUseMask, CurrIdx, SlotIdx, *MRI, LIS); 1234 if (LastUseMask == 0) 1235 continue; 1236 } 1237 1238 LaneBitmask LiveMask = LiveRegs.contains(Reg); 1239 LaneBitmask NewMask = LiveMask & ~LastUseMask; 1240 decreaseRegPressure(Reg, LiveMask, NewMask); 1241 } 1242 1243 // Generate liveness for defs. 1244 for (const RegisterMaskPair &Def : RegOpers.Defs) { 1245 unsigned Reg = Def.RegUnit; 1246 LaneBitmask LiveMask = LiveRegs.contains(Reg); 1247 LaneBitmask NewMask = LiveMask | Def.LaneMask; 1248 increaseRegPressure(Reg, LiveMask, NewMask); 1249 } 1250 1251 // Boost pressure for all dead defs together. 1252 bumpDeadDefs(RegOpers.DeadDefs); 1253 } 1254 1255 /// Consider the pressure increase caused by traversing this instruction 1256 /// top-down. Find the register class with the most change in its pressure limit 1257 /// based on the tracker's current pressure, and return the number of excess 1258 /// register units of that pressure set introduced by this instruction. 1259 /// 1260 /// This assumes that the current LiveIn set is sufficient. 1261 /// 1262 /// This is expensive for an on-the-fly query because it calls 1263 /// bumpDownwardPressure to recompute the pressure sets based on current 1264 /// liveness. We don't yet have a fast version of downward pressure tracking 1265 /// analogous to getUpwardPressureDelta. 1266 void RegPressureTracker:: 1267 getMaxDownwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta, 1268 ArrayRef<PressureChange> CriticalPSets, 1269 ArrayRef<unsigned> MaxPressureLimit) { 1270 // Snapshot Pressure. 1271 std::vector<unsigned> SavedPressure = CurrSetPressure; 1272 std::vector<unsigned> SavedMaxPressure = P.MaxSetPressure; 1273 1274 bumpDownwardPressure(MI); 1275 1276 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI, 1277 LiveThruPressure); 1278 computeMaxPressureDelta(SavedMaxPressure, P.MaxSetPressure, CriticalPSets, 1279 MaxPressureLimit, Delta); 1280 assert(Delta.CriticalMax.getUnitInc() >= 0 && 1281 Delta.CurrentMax.getUnitInc() >= 0 && "cannot decrease max pressure"); 1282 1283 // Restore the tracker's state. 1284 P.MaxSetPressure.swap(SavedMaxPressure); 1285 CurrSetPressure.swap(SavedPressure); 1286 } 1287 1288 /// Get the pressure of each PSet after traversing this instruction bottom-up. 1289 void RegPressureTracker:: 1290 getUpwardPressure(const MachineInstr *MI, 1291 std::vector<unsigned> &PressureResult, 1292 std::vector<unsigned> &MaxPressureResult) { 1293 // Snapshot pressure. 1294 PressureResult = CurrSetPressure; 1295 MaxPressureResult = P.MaxSetPressure; 1296 1297 bumpUpwardPressure(MI); 1298 1299 // Current pressure becomes the result. Restore current pressure. 1300 P.MaxSetPressure.swap(MaxPressureResult); 1301 CurrSetPressure.swap(PressureResult); 1302 } 1303 1304 /// Get the pressure of each PSet after traversing this instruction top-down. 1305 void RegPressureTracker:: 1306 getDownwardPressure(const MachineInstr *MI, 1307 std::vector<unsigned> &PressureResult, 1308 std::vector<unsigned> &MaxPressureResult) { 1309 // Snapshot pressure. 1310 PressureResult = CurrSetPressure; 1311 MaxPressureResult = P.MaxSetPressure; 1312 1313 bumpDownwardPressure(MI); 1314 1315 // Current pressure becomes the result. Restore current pressure. 1316 P.MaxSetPressure.swap(MaxPressureResult); 1317 CurrSetPressure.swap(PressureResult); 1318 } 1319