1 //===-- RegisterPressure.cpp - Dynamic Register Pressure ------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the RegisterPressure class which can be used to track 11 // MachineInstr level register pressure. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #include "llvm/CodeGen/RegisterPressure.h" 16 #include "llvm/CodeGen/LiveInterval.h" 17 #include "llvm/CodeGen/LiveIntervalAnalysis.h" 18 #include "llvm/CodeGen/MachineRegisterInfo.h" 19 #include "llvm/CodeGen/RegisterClassInfo.h" 20 #include "llvm/Support/Debug.h" 21 #include "llvm/Support/raw_ostream.h" 22 23 using namespace llvm; 24 25 /// Increase pressure for each pressure set provided by TargetRegisterInfo. 26 static void increaseSetPressure(std::vector<unsigned> &CurrSetPressure, 27 const MachineRegisterInfo &MRI, unsigned Reg, 28 LaneBitmask PrevMask, LaneBitmask NewMask) { 29 assert((PrevMask & ~NewMask) == 0 && "Must not remove bits"); 30 if (PrevMask != 0 || NewMask == 0) 31 return; 32 33 PSetIterator PSetI = MRI.getPressureSets(Reg); 34 unsigned Weight = PSetI.getWeight(); 35 for (; PSetI.isValid(); ++PSetI) 36 CurrSetPressure[*PSetI] += Weight; 37 } 38 39 /// Decrease pressure for each pressure set provided by TargetRegisterInfo. 40 static void decreaseSetPressure(std::vector<unsigned> &CurrSetPressure, 41 const MachineRegisterInfo &MRI, unsigned Reg, 42 LaneBitmask PrevMask, LaneBitmask NewMask) { 43 assert((NewMask & !PrevMask) == 0 && "Must not add bits"); 44 if (NewMask != 0 || PrevMask == 0) 45 return; 46 47 PSetIterator PSetI = MRI.getPressureSets(Reg); 48 unsigned Weight = PSetI.getWeight(); 49 for (; PSetI.isValid(); ++PSetI) { 50 assert(CurrSetPressure[*PSetI] >= Weight && "register pressure underflow"); 51 CurrSetPressure[*PSetI] -= Weight; 52 } 53 } 54 55 LLVM_DUMP_METHOD 56 void llvm::dumpRegSetPressure(ArrayRef<unsigned> SetPressure, 57 const TargetRegisterInfo *TRI) { 58 bool Empty = true; 59 for (unsigned i = 0, e = SetPressure.size(); i < e; ++i) { 60 if (SetPressure[i] != 0) { 61 dbgs() << TRI->getRegPressureSetName(i) << "=" << SetPressure[i] << '\n'; 62 Empty = false; 63 } 64 } 65 if (Empty) 66 dbgs() << "\n"; 67 } 68 69 LLVM_DUMP_METHOD 70 void RegisterPressure::dump(const TargetRegisterInfo *TRI) const { 71 dbgs() << "Max Pressure: "; 72 dumpRegSetPressure(MaxSetPressure, TRI); 73 dbgs() << "Live In: "; 74 for (const RegisterMaskPair &P : LiveInRegs) { 75 dbgs() << PrintVRegOrUnit(P.RegUnit, TRI); 76 if (P.LaneMask != ~0u) 77 dbgs() << ':' << PrintLaneMask(P.LaneMask); 78 dbgs() << ' '; 79 } 80 dbgs() << '\n'; 81 dbgs() << "Live Out: "; 82 for (const RegisterMaskPair &P : LiveOutRegs) { 83 dbgs() << PrintVRegOrUnit(P.RegUnit, TRI); 84 if (P.LaneMask != ~0u) 85 dbgs() << ':' << PrintLaneMask(P.LaneMask); 86 dbgs() << ' '; 87 } 88 dbgs() << '\n'; 89 } 90 91 LLVM_DUMP_METHOD 92 void RegPressureTracker::dump() const { 93 if (!isTopClosed() || !isBottomClosed()) { 94 dbgs() << "Curr Pressure: "; 95 dumpRegSetPressure(CurrSetPressure, TRI); 96 } 97 P.dump(TRI); 98 } 99 100 void PressureDiff::dump(const TargetRegisterInfo &TRI) const { 101 const char *sep = ""; 102 for (const PressureChange &Change : *this) { 103 if (!Change.isValid()) 104 break; 105 dbgs() << sep << TRI.getRegPressureSetName(Change.getPSet()) 106 << " " << Change.getUnitInc(); 107 sep = " "; 108 } 109 dbgs() << '\n'; 110 } 111 112 void RegPressureTracker::increaseRegPressure(unsigned RegUnit, 113 LaneBitmask PreviousMask, 114 LaneBitmask NewMask) { 115 if (PreviousMask != 0 || NewMask == 0) 116 return; 117 118 PSetIterator PSetI = MRI->getPressureSets(RegUnit); 119 unsigned Weight = PSetI.getWeight(); 120 for (; PSetI.isValid(); ++PSetI) { 121 CurrSetPressure[*PSetI] += Weight; 122 P.MaxSetPressure[*PSetI] = 123 std::max(P.MaxSetPressure[*PSetI], CurrSetPressure[*PSetI]); 124 } 125 } 126 127 void RegPressureTracker::decreaseRegPressure(unsigned RegUnit, 128 LaneBitmask PreviousMask, 129 LaneBitmask NewMask) { 130 decreaseSetPressure(CurrSetPressure, *MRI, RegUnit, PreviousMask, NewMask); 131 } 132 133 /// Clear the result so it can be used for another round of pressure tracking. 134 void IntervalPressure::reset() { 135 TopIdx = BottomIdx = SlotIndex(); 136 MaxSetPressure.clear(); 137 LiveInRegs.clear(); 138 LiveOutRegs.clear(); 139 } 140 141 /// Clear the result so it can be used for another round of pressure tracking. 142 void RegionPressure::reset() { 143 TopPos = BottomPos = MachineBasicBlock::const_iterator(); 144 MaxSetPressure.clear(); 145 LiveInRegs.clear(); 146 LiveOutRegs.clear(); 147 } 148 149 /// If the current top is not less than or equal to the next index, open it. 150 /// We happen to need the SlotIndex for the next top for pressure update. 151 void IntervalPressure::openTop(SlotIndex NextTop) { 152 if (TopIdx <= NextTop) 153 return; 154 TopIdx = SlotIndex(); 155 LiveInRegs.clear(); 156 } 157 158 /// If the current top is the previous instruction (before receding), open it. 159 void RegionPressure::openTop(MachineBasicBlock::const_iterator PrevTop) { 160 if (TopPos != PrevTop) 161 return; 162 TopPos = MachineBasicBlock::const_iterator(); 163 LiveInRegs.clear(); 164 } 165 166 /// If the current bottom is not greater than the previous index, open it. 167 void IntervalPressure::openBottom(SlotIndex PrevBottom) { 168 if (BottomIdx > PrevBottom) 169 return; 170 BottomIdx = SlotIndex(); 171 LiveInRegs.clear(); 172 } 173 174 /// If the current bottom is the previous instr (before advancing), open it. 175 void RegionPressure::openBottom(MachineBasicBlock::const_iterator PrevBottom) { 176 if (BottomPos != PrevBottom) 177 return; 178 BottomPos = MachineBasicBlock::const_iterator(); 179 LiveInRegs.clear(); 180 } 181 182 void LiveRegSet::init(const MachineRegisterInfo &MRI) { 183 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); 184 unsigned NumRegUnits = TRI.getNumRegs(); 185 unsigned NumVirtRegs = MRI.getNumVirtRegs(); 186 Regs.setUniverse(NumRegUnits + NumVirtRegs); 187 this->NumRegUnits = NumRegUnits; 188 } 189 190 void LiveRegSet::clear() { 191 Regs.clear(); 192 } 193 194 static const LiveRange *getLiveRange(const LiveIntervals &LIS, unsigned Reg) { 195 if (TargetRegisterInfo::isVirtualRegister(Reg)) 196 return &LIS.getInterval(Reg); 197 return LIS.getCachedRegUnit(Reg); 198 } 199 200 void RegPressureTracker::reset() { 201 MBB = nullptr; 202 LIS = nullptr; 203 204 CurrSetPressure.clear(); 205 LiveThruPressure.clear(); 206 P.MaxSetPressure.clear(); 207 208 if (RequireIntervals) 209 static_cast<IntervalPressure&>(P).reset(); 210 else 211 static_cast<RegionPressure&>(P).reset(); 212 213 LiveRegs.clear(); 214 UntiedDefs.clear(); 215 } 216 217 /// Setup the RegPressureTracker. 218 /// 219 /// TODO: Add support for pressure without LiveIntervals. 220 void RegPressureTracker::init(const MachineFunction *mf, 221 const RegisterClassInfo *rci, 222 const LiveIntervals *lis, 223 const MachineBasicBlock *mbb, 224 MachineBasicBlock::const_iterator pos, 225 bool TrackLaneMasks, bool TrackUntiedDefs) { 226 reset(); 227 228 MF = mf; 229 TRI = MF->getSubtarget().getRegisterInfo(); 230 RCI = rci; 231 MRI = &MF->getRegInfo(); 232 MBB = mbb; 233 this->TrackUntiedDefs = TrackUntiedDefs; 234 this->TrackLaneMasks = TrackLaneMasks; 235 236 if (RequireIntervals) { 237 assert(lis && "IntervalPressure requires LiveIntervals"); 238 LIS = lis; 239 } 240 241 CurrPos = pos; 242 CurrSetPressure.assign(TRI->getNumRegPressureSets(), 0); 243 244 P.MaxSetPressure = CurrSetPressure; 245 246 LiveRegs.init(*MRI); 247 if (TrackUntiedDefs) 248 UntiedDefs.setUniverse(MRI->getNumVirtRegs()); 249 } 250 251 /// Does this pressure result have a valid top position and live ins. 252 bool RegPressureTracker::isTopClosed() const { 253 if (RequireIntervals) 254 return static_cast<IntervalPressure&>(P).TopIdx.isValid(); 255 return (static_cast<RegionPressure&>(P).TopPos == 256 MachineBasicBlock::const_iterator()); 257 } 258 259 /// Does this pressure result have a valid bottom position and live outs. 260 bool RegPressureTracker::isBottomClosed() const { 261 if (RequireIntervals) 262 return static_cast<IntervalPressure&>(P).BottomIdx.isValid(); 263 return (static_cast<RegionPressure&>(P).BottomPos == 264 MachineBasicBlock::const_iterator()); 265 } 266 267 268 SlotIndex RegPressureTracker::getCurrSlot() const { 269 MachineBasicBlock::const_iterator IdxPos = CurrPos; 270 while (IdxPos != MBB->end() && IdxPos->isDebugValue()) 271 ++IdxPos; 272 if (IdxPos == MBB->end()) 273 return LIS->getMBBEndIdx(MBB); 274 return LIS->getInstructionIndex(IdxPos).getRegSlot(); 275 } 276 277 /// Set the boundary for the top of the region and summarize live ins. 278 void RegPressureTracker::closeTop() { 279 if (RequireIntervals) 280 static_cast<IntervalPressure&>(P).TopIdx = getCurrSlot(); 281 else 282 static_cast<RegionPressure&>(P).TopPos = CurrPos; 283 284 assert(P.LiveInRegs.empty() && "inconsistent max pressure result"); 285 P.LiveInRegs.reserve(LiveRegs.size()); 286 LiveRegs.appendTo(P.LiveInRegs); 287 } 288 289 /// Set the boundary for the bottom of the region and summarize live outs. 290 void RegPressureTracker::closeBottom() { 291 if (RequireIntervals) 292 static_cast<IntervalPressure&>(P).BottomIdx = getCurrSlot(); 293 else 294 static_cast<RegionPressure&>(P).BottomPos = CurrPos; 295 296 assert(P.LiveOutRegs.empty() && "inconsistent max pressure result"); 297 P.LiveOutRegs.reserve(LiveRegs.size()); 298 LiveRegs.appendTo(P.LiveOutRegs); 299 } 300 301 /// Finalize the region boundaries and record live ins and live outs. 302 void RegPressureTracker::closeRegion() { 303 if (!isTopClosed() && !isBottomClosed()) { 304 assert(LiveRegs.size() == 0 && "no region boundary"); 305 return; 306 } 307 if (!isBottomClosed()) 308 closeBottom(); 309 else if (!isTopClosed()) 310 closeTop(); 311 // If both top and bottom are closed, do nothing. 312 } 313 314 /// The register tracker is unaware of global liveness so ignores normal 315 /// live-thru ranges. However, two-address or coalesced chains can also lead 316 /// to live ranges with no holes. Count these to inform heuristics that we 317 /// can never drop below this pressure. 318 void RegPressureTracker::initLiveThru(const RegPressureTracker &RPTracker) { 319 LiveThruPressure.assign(TRI->getNumRegPressureSets(), 0); 320 assert(isBottomClosed() && "need bottom-up tracking to intialize."); 321 for (const RegisterMaskPair &Pair : P.LiveOutRegs) { 322 unsigned RegUnit = Pair.RegUnit; 323 if (TargetRegisterInfo::isVirtualRegister(RegUnit) 324 && !RPTracker.hasUntiedDef(RegUnit)) 325 increaseSetPressure(LiveThruPressure, *MRI, RegUnit, 0, Pair.LaneMask); 326 } 327 } 328 329 static unsigned getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, 330 unsigned RegUnit) { 331 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 332 [RegUnit](const RegisterMaskPair Other) { 333 return Other.RegUnit == RegUnit; 334 }); 335 if (I == RegUnits.end()) 336 return 0; 337 return I->LaneMask; 338 } 339 340 static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, 341 RegisterMaskPair Pair) { 342 unsigned RegUnit = Pair.RegUnit; 343 assert(Pair.LaneMask != 0); 344 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 345 [RegUnit](const RegisterMaskPair Other) { 346 return Other.RegUnit == RegUnit; 347 }); 348 if (I == RegUnits.end()) { 349 RegUnits.push_back(Pair); 350 } else { 351 I->LaneMask |= Pair.LaneMask; 352 } 353 } 354 355 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits, 356 unsigned RegUnit) { 357 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 358 [RegUnit](const RegisterMaskPair Other) { 359 return Other.RegUnit == RegUnit; 360 }); 361 if (I == RegUnits.end()) { 362 RegUnits.push_back(RegisterMaskPair(RegUnit, 0)); 363 } else { 364 I->LaneMask = 0; 365 } 366 } 367 368 static void removeRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, 369 RegisterMaskPair Pair) { 370 unsigned RegUnit = Pair.RegUnit; 371 assert(Pair.LaneMask != 0); 372 auto I = std::find_if(RegUnits.begin(), RegUnits.end(), 373 [RegUnit](const RegisterMaskPair Other) { 374 return Other.RegUnit == RegUnit; 375 }); 376 if (I != RegUnits.end()) { 377 I->LaneMask &= ~Pair.LaneMask; 378 if (I->LaneMask == 0) 379 RegUnits.erase(I); 380 } 381 } 382 383 static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS, 384 const MachineRegisterInfo &MRI, bool TrackLaneMasks, unsigned RegUnit, 385 SlotIndex Pos, 386 bool(*Property)(const LiveRange &LR, SlotIndex Pos)) { 387 if (TargetRegisterInfo::isVirtualRegister(RegUnit)) { 388 const LiveInterval &LI = LIS.getInterval(RegUnit); 389 LaneBitmask Result = 0; 390 if (TrackLaneMasks && LI.hasSubRanges()) { 391 for (const LiveInterval::SubRange &SR : LI.subranges()) { 392 if (Property(SR, Pos)) 393 Result |= SR.LaneMask; 394 } 395 } else if (Property(LI, Pos)) 396 Result = MRI.getMaxLaneMaskForVReg(RegUnit); 397 398 return Result; 399 } else { 400 const LiveRange *LR = LIS.getCachedRegUnit(RegUnit); 401 // Be prepared for missing liveranges: We usually do not compute liveranges 402 // for physical registers on targets with many registers (GPUs). 403 if (LR == nullptr) 404 return 0; 405 return Property(*LR, Pos) ? ~0u : 0; 406 } 407 } 408 409 static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS, 410 const MachineRegisterInfo &MRI, 411 bool TrackLaneMasks, unsigned RegUnit, 412 SlotIndex Pos) { 413 return getLanesWithProperty(LIS, MRI, TrackLaneMasks, RegUnit, Pos, 414 [](const LiveRange &LR, SlotIndex Pos) { 415 return LR.liveAt(Pos); 416 }); 417 } 418 419 420 namespace { 421 422 /// Collect this instruction's unique uses and defs into SmallVectors for 423 /// processing defs and uses in order. 424 /// 425 /// FIXME: always ignore tied opers 426 class RegisterOperandsCollector { 427 RegisterOperands &RegOpers; 428 const TargetRegisterInfo &TRI; 429 const MachineRegisterInfo &MRI; 430 bool TrackLaneMasks; 431 bool IgnoreDead; 432 433 RegisterOperandsCollector(RegisterOperands &RegOpers, 434 const TargetRegisterInfo &TRI, 435 const MachineRegisterInfo &MRI, 436 bool TrackLaneMasks, bool IgnoreDead) 437 : RegOpers(RegOpers), TRI(TRI), MRI(MRI), 438 TrackLaneMasks(TrackLaneMasks), IgnoreDead(IgnoreDead) {} 439 440 void collectInstr(const MachineInstr &MI) const { 441 for (ConstMIBundleOperands OperI(&MI); OperI.isValid(); ++OperI) 442 collectOperand(*OperI); 443 444 // Remove redundant physreg dead defs. 445 for (const RegisterMaskPair &P : RegOpers.Defs) 446 removeRegLanes(RegOpers.DeadDefs, P); 447 } 448 449 /// Push this operand's register onto the correct vectors. 450 void collectOperand(const MachineOperand &MO) const { 451 if (!MO.isReg() || !MO.getReg()) 452 return; 453 unsigned Reg = MO.getReg(); 454 unsigned SubRegIdx = MO.getSubReg(); 455 if (MO.isUse()) { 456 if (!MO.isUndef() && !MO.isInternalRead()) 457 pushRegUnits(Reg, SubRegIdx, RegOpers.Uses); 458 } else { 459 assert(MO.isDef()); 460 if (MO.isUndef()) { 461 // Treat read-undef subreg defs as definitions of the whole register. 462 SubRegIdx = 0; 463 } else if (!TrackLaneMasks && SubRegIdx != 0 && !MO.isInternalRead()) { 464 // Interpret the subregister def as read-modify-store: A use+def of the 465 // full register. 466 pushRegUnits(Reg, SubRegIdx, RegOpers.Uses); 467 } 468 469 if (MO.isDead()) { 470 if (!IgnoreDead) 471 pushRegUnits(Reg, SubRegIdx, RegOpers.DeadDefs); 472 } else 473 pushRegUnits(Reg, SubRegIdx, RegOpers.Defs); 474 } 475 } 476 477 void pushRegUnits(unsigned Reg, unsigned SubRegIdx, 478 SmallVectorImpl<RegisterMaskPair> &RegUnits) const { 479 if (TargetRegisterInfo::isVirtualRegister(Reg)) { 480 LaneBitmask LaneMask = TrackLaneMasks && SubRegIdx != 0 481 ? TRI.getSubRegIndexLaneMask(SubRegIdx) 482 : MRI.getMaxLaneMaskForVReg(Reg); 483 addRegLanes(RegUnits, RegisterMaskPair(Reg, LaneMask)); 484 } else if (MRI.isAllocatable(Reg)) { 485 for (MCRegUnitIterator Units(Reg, &TRI); Units.isValid(); ++Units) 486 addRegLanes(RegUnits, RegisterMaskPair(*Units, ~0u)); 487 } 488 } 489 490 friend class llvm::RegisterOperands; 491 }; 492 493 } // namespace 494 495 void RegisterOperands::collect(const MachineInstr &MI, 496 const TargetRegisterInfo &TRI, 497 const MachineRegisterInfo &MRI, 498 bool TrackLaneMasks, bool IgnoreDead) { 499 RegisterOperandsCollector Collector(*this, TRI, MRI, TrackLaneMasks, 500 IgnoreDead); 501 Collector.collectInstr(MI); 502 } 503 504 void RegisterOperands::detectDeadDefs(const MachineInstr &MI, 505 const LiveIntervals &LIS) { 506 SlotIndex SlotIdx = LIS.getInstructionIndex(&MI); 507 for (auto RI = Defs.begin(); RI != Defs.end(); /*empty*/) { 508 unsigned Reg = RI->RegUnit; 509 const LiveRange *LR = getLiveRange(LIS, Reg); 510 if (LR != nullptr) { 511 LiveQueryResult LRQ = LR->Query(SlotIdx); 512 if (LRQ.isDeadDef()) { 513 // LiveIntervals knows this is a dead even though it's MachineOperand is 514 // not flagged as such. 515 DeadDefs.push_back(*RI); 516 RI = Defs.erase(RI); 517 continue; 518 } 519 } 520 ++RI; 521 } 522 } 523 524 void RegisterOperands::adjustLaneLiveness(const LiveIntervals &LIS, 525 const MachineRegisterInfo &MRI, 526 SlotIndex Pos, 527 MachineInstr *AddFlagsMI) { 528 for (auto I = Defs.begin(); I != Defs.end(); ) { 529 LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, I->RegUnit, 530 Pos.getDeadSlot()); 531 #if 0 532 unsigned DeadDef = I->LaneMask & ~LiveAfter; 533 if (DeadDef != 0) 534 addRegLanes(DeadDefs, RegisterMaskPair(I->RegUnit, DeadDef)); 535 #endif 536 // If the the def is all that is live after the instruction, then in case 537 // of a subregister def we need a read-undef flag. 538 unsigned RegUnit = I->RegUnit; 539 if (TargetRegisterInfo::isVirtualRegister(RegUnit) && 540 AddFlagsMI != nullptr && (LiveAfter & ~I->LaneMask) == 0) 541 AddFlagsMI->setRegisterDefReadUndef(RegUnit); 542 543 unsigned LaneMask = I->LaneMask & LiveAfter; 544 if (LaneMask == 0) { 545 I = Defs.erase(I); 546 // Make sure the operand is properly marked as Dead. 547 if (AddFlagsMI != nullptr) 548 AddFlagsMI->addRegisterDead(RegUnit, MRI.getTargetRegisterInfo()); 549 } else { 550 I->LaneMask = LaneMask; 551 ++I; 552 } 553 } 554 for (auto I = Uses.begin(); I != Uses.end(); ) { 555 LaneBitmask LiveBefore = getLiveLanesAt(LIS, MRI, true, I->RegUnit, 556 Pos.getBaseIndex()); 557 unsigned LaneMask = I->LaneMask & LiveBefore; 558 if (LaneMask == 0) { 559 I = Uses.erase(I); 560 } else { 561 I->LaneMask = LaneMask; 562 ++I; 563 } 564 } 565 if (AddFlagsMI != nullptr) { 566 for (const RegisterMaskPair &P : DeadDefs) { 567 unsigned RegUnit = P.RegUnit; 568 LaneBitmask LiveAfter = getLiveLanesAt(LIS, MRI, true, RegUnit, 569 Pos.getDeadSlot()); 570 if (LiveAfter == 0) 571 AddFlagsMI->setRegisterDefReadUndef(RegUnit); 572 } 573 } 574 } 575 576 /// Initialize an array of N PressureDiffs. 577 void PressureDiffs::init(unsigned N) { 578 Size = N; 579 if (N <= Max) { 580 memset(PDiffArray, 0, N * sizeof(PressureDiff)); 581 return; 582 } 583 Max = Size; 584 free(PDiffArray); 585 PDiffArray = reinterpret_cast<PressureDiff*>(calloc(N, sizeof(PressureDiff))); 586 } 587 588 void PressureDiffs::addInstruction(unsigned Idx, 589 const RegisterOperands &RegOpers, 590 const MachineRegisterInfo &MRI) { 591 PressureDiff &PDiff = (*this)[Idx]; 592 assert(!PDiff.begin()->isValid() && "stale PDiff"); 593 for (const RegisterMaskPair &P : RegOpers.Defs) 594 PDiff.addPressureChange(P.RegUnit, true, &MRI); 595 596 for (const RegisterMaskPair &P : RegOpers.Uses) 597 PDiff.addPressureChange(P.RegUnit, false, &MRI); 598 } 599 600 /// Add a change in pressure to the pressure diff of a given instruction. 601 void PressureDiff::addPressureChange(unsigned RegUnit, bool IsDec, 602 const MachineRegisterInfo *MRI) { 603 PSetIterator PSetI = MRI->getPressureSets(RegUnit); 604 int Weight = IsDec ? -PSetI.getWeight() : PSetI.getWeight(); 605 for (; PSetI.isValid(); ++PSetI) { 606 // Find an existing entry in the pressure diff for this PSet. 607 PressureDiff::iterator I = nonconst_begin(), E = nonconst_end(); 608 for (; I != E && I->isValid(); ++I) { 609 if (I->getPSet() >= *PSetI) 610 break; 611 } 612 // If all pressure sets are more constrained, skip the remaining PSets. 613 if (I == E) 614 break; 615 // Insert this PressureChange. 616 if (!I->isValid() || I->getPSet() != *PSetI) { 617 PressureChange PTmp = PressureChange(*PSetI); 618 for (PressureDiff::iterator J = I; J != E && PTmp.isValid(); ++J) 619 std::swap(*J, PTmp); 620 } 621 // Update the units for this pressure set. 622 unsigned NewUnitInc = I->getUnitInc() + Weight; 623 if (NewUnitInc != 0) { 624 I->setUnitInc(NewUnitInc); 625 } else { 626 // Remove entry 627 PressureDiff::iterator J; 628 for (J = std::next(I); J != E && J->isValid(); ++J, ++I) 629 *I = *J; 630 if (J != E) 631 *I = *J; 632 } 633 } 634 } 635 636 /// Force liveness of registers. 637 void RegPressureTracker::addLiveRegs(ArrayRef<RegisterMaskPair> Regs) { 638 for (const RegisterMaskPair &P : Regs) { 639 unsigned PrevMask = LiveRegs.insert(P); 640 unsigned NewMask = PrevMask | P.LaneMask; 641 increaseRegPressure(P.RegUnit, PrevMask, NewMask); 642 } 643 } 644 645 void RegPressureTracker::discoverLiveInOrOut(RegisterMaskPair Pair, 646 SmallVectorImpl<RegisterMaskPair> &LiveInOrOut) { 647 if (Pair.LaneMask == 0) 648 return; 649 650 unsigned RegUnit = Pair.RegUnit; 651 auto I = std::find_if(LiveInOrOut.begin(), LiveInOrOut.end(), 652 [RegUnit](const RegisterMaskPair &Other) { 653 return Other.RegUnit == RegUnit; 654 }); 655 LaneBitmask PrevMask; 656 LaneBitmask NewMask; 657 if (I == LiveInOrOut.end()) { 658 PrevMask = 0; 659 NewMask = Pair.LaneMask; 660 LiveInOrOut.push_back(Pair); 661 } else { 662 PrevMask = I->LaneMask; 663 NewMask = PrevMask | Pair.LaneMask; 664 I->LaneMask = NewMask; 665 } 666 increaseSetPressure(P.MaxSetPressure, *MRI, RegUnit, PrevMask, NewMask); 667 } 668 669 void RegPressureTracker::discoverLiveIn(RegisterMaskPair Pair) { 670 discoverLiveInOrOut(Pair, P.LiveInRegs); 671 } 672 673 void RegPressureTracker::discoverLiveOut(RegisterMaskPair Pair) { 674 discoverLiveInOrOut(Pair, P.LiveOutRegs); 675 } 676 677 void RegPressureTracker::bumpDeadDefs(ArrayRef<RegisterMaskPair> DeadDefs) { 678 for (const RegisterMaskPair &P : DeadDefs) { 679 unsigned Reg = P.RegUnit; 680 LaneBitmask LiveMask = LiveRegs.contains(Reg); 681 LaneBitmask BumpedMask = LiveMask | P.LaneMask; 682 increaseRegPressure(Reg, LiveMask, BumpedMask); 683 } 684 for (const RegisterMaskPair &P : DeadDefs) { 685 unsigned Reg = P.RegUnit; 686 LaneBitmask LiveMask = LiveRegs.contains(Reg); 687 LaneBitmask BumpedMask = LiveMask | P.LaneMask; 688 decreaseRegPressure(Reg, BumpedMask, LiveMask); 689 } 690 } 691 692 /// Recede across the previous instruction. If LiveUses is provided, record any 693 /// RegUnits that are made live by the current instruction's uses. This includes 694 /// registers that are both defined and used by the instruction. If a pressure 695 /// difference pointer is provided record the changes is pressure caused by this 696 /// instruction independent of liveness. 697 void RegPressureTracker::recede(const RegisterOperands &RegOpers, 698 SmallVectorImpl<RegisterMaskPair> *LiveUses) { 699 assert(!CurrPos->isDebugValue()); 700 701 // Boost pressure for all dead defs together. 702 bumpDeadDefs(RegOpers.DeadDefs); 703 704 // Kill liveness at live defs. 705 // TODO: consider earlyclobbers? 706 for (const RegisterMaskPair &Def : RegOpers.Defs) { 707 unsigned Reg = Def.RegUnit; 708 709 LaneBitmask PreviousMask = LiveRegs.erase(Def); 710 LaneBitmask NewMask = PreviousMask & ~Def.LaneMask; 711 712 LaneBitmask LiveOut = Def.LaneMask & ~PreviousMask; 713 if (LiveOut != 0) { 714 discoverLiveOut(RegisterMaskPair(Reg, LiveOut)); 715 // Retroactively model effects on pressure of the live out lanes. 716 increaseSetPressure(CurrSetPressure, *MRI, Reg, 0, LiveOut); 717 PreviousMask = LiveOut; 718 } 719 720 if (NewMask == 0) { 721 // Add a 0 entry to LiveUses as a marker that the complete vreg has become 722 // dead. 723 if (TrackLaneMasks && LiveUses != nullptr) 724 setRegZero(*LiveUses, Reg); 725 } 726 727 decreaseRegPressure(Reg, PreviousMask, NewMask); 728 } 729 730 SlotIndex SlotIdx; 731 if (RequireIntervals) 732 SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot(); 733 734 // Generate liveness for uses. 735 for (const RegisterMaskPair &Use : RegOpers.Uses) { 736 unsigned Reg = Use.RegUnit; 737 assert(Use.LaneMask != 0); 738 LaneBitmask PreviousMask = LiveRegs.insert(Use); 739 LaneBitmask NewMask = PreviousMask | Use.LaneMask; 740 if (NewMask == PreviousMask) 741 continue; 742 743 // Did the register just become live? 744 if (PreviousMask == 0) { 745 if (LiveUses != nullptr) { 746 if (!TrackLaneMasks) { 747 addRegLanes(*LiveUses, RegisterMaskPair(Reg, NewMask)); 748 } else { 749 auto I = std::find_if(LiveUses->begin(), LiveUses->end(), 750 [Reg](const RegisterMaskPair Other) { 751 return Other.RegUnit == Reg; 752 }); 753 bool IsRedef = I != LiveUses->end(); 754 if (IsRedef) { 755 // ignore re-defs here... 756 assert(I->LaneMask == 0); 757 removeRegLanes(*LiveUses, RegisterMaskPair(Reg, NewMask)); 758 } else { 759 addRegLanes(*LiveUses, RegisterMaskPair(Reg, NewMask)); 760 } 761 } 762 } 763 764 // Discover live outs if this may be the first occurance of this register. 765 LaneBitmask LiveOut = getLiveThroughAt(Reg, SlotIdx); 766 discoverLiveOut(RegisterMaskPair(Reg, LiveOut)); 767 } 768 769 increaseRegPressure(Reg, PreviousMask, NewMask); 770 } 771 if (TrackUntiedDefs) { 772 for (const RegisterMaskPair &Def : RegOpers.Defs) { 773 unsigned RegUnit = Def.RegUnit; 774 if (TargetRegisterInfo::isVirtualRegister(RegUnit) && 775 (LiveRegs.contains(RegUnit) & Def.LaneMask) == 0) 776 UntiedDefs.insert(RegUnit); 777 } 778 } 779 } 780 781 void RegPressureTracker::recedeSkipDebugValues() { 782 assert(CurrPos != MBB->begin()); 783 if (!isBottomClosed()) 784 closeBottom(); 785 786 // Open the top of the region using block iterators. 787 if (!RequireIntervals && isTopClosed()) 788 static_cast<RegionPressure&>(P).openTop(CurrPos); 789 790 // Find the previous instruction. 791 do 792 --CurrPos; 793 while (CurrPos != MBB->begin() && CurrPos->isDebugValue()); 794 795 SlotIndex SlotIdx; 796 if (RequireIntervals) 797 SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot(); 798 799 // Open the top of the region using slot indexes. 800 if (RequireIntervals && isTopClosed()) 801 static_cast<IntervalPressure&>(P).openTop(SlotIdx); 802 } 803 804 void RegPressureTracker::recede(SmallVectorImpl<RegisterMaskPair> *LiveUses) { 805 recedeSkipDebugValues(); 806 807 const MachineInstr &MI = *CurrPos; 808 RegisterOperands RegOpers; 809 RegOpers.collect(MI, *TRI, *MRI, TrackLaneMasks, false); 810 if (TrackLaneMasks) { 811 SlotIndex SlotIdx = LIS->getInstructionIndex(CurrPos).getRegSlot(); 812 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 813 } else if (RequireIntervals) { 814 RegOpers.detectDeadDefs(MI, *LIS); 815 } 816 817 recede(RegOpers, LiveUses); 818 } 819 820 /// Advance across the current instruction. 821 void RegPressureTracker::advance(const RegisterOperands &RegOpers) { 822 assert(!TrackUntiedDefs && "unsupported mode"); 823 assert(CurrPos != MBB->end()); 824 if (!isTopClosed()) 825 closeTop(); 826 827 SlotIndex SlotIdx; 828 if (RequireIntervals) 829 SlotIdx = getCurrSlot(); 830 831 // Open the bottom of the region using slot indexes. 832 if (isBottomClosed()) { 833 if (RequireIntervals) 834 static_cast<IntervalPressure&>(P).openBottom(SlotIdx); 835 else 836 static_cast<RegionPressure&>(P).openBottom(CurrPos); 837 } 838 839 for (const RegisterMaskPair &Use : RegOpers.Uses) { 840 unsigned Reg = Use.RegUnit; 841 LaneBitmask LiveMask = LiveRegs.contains(Reg); 842 LaneBitmask LiveIn = Use.LaneMask & ~LiveMask; 843 if (LiveIn != 0) { 844 discoverLiveIn(RegisterMaskPair(Reg, LiveIn)); 845 increaseRegPressure(Reg, LiveMask, LiveMask | LiveIn); 846 LiveRegs.insert(RegisterMaskPair(Reg, LiveIn)); 847 } 848 // Kill liveness at last uses. 849 LaneBitmask LastUseMask = getLastUsedLanes(Reg, SlotIdx); 850 if (LastUseMask != 0) { 851 LiveRegs.erase(RegisterMaskPair(Reg, LastUseMask)); 852 decreaseRegPressure(Reg, LiveMask, LiveMask & ~LastUseMask); 853 } 854 } 855 856 // Generate liveness for defs. 857 for (const RegisterMaskPair &Def : RegOpers.Defs) { 858 LaneBitmask PreviousMask = LiveRegs.insert(Def); 859 LaneBitmask NewMask = PreviousMask | Def.LaneMask; 860 increaseRegPressure(Def.RegUnit, PreviousMask, NewMask); 861 } 862 863 // Boost pressure for all dead defs together. 864 bumpDeadDefs(RegOpers.DeadDefs); 865 866 // Find the next instruction. 867 do 868 ++CurrPos; 869 while (CurrPos != MBB->end() && CurrPos->isDebugValue()); 870 } 871 872 void RegPressureTracker::advance() { 873 const MachineInstr &MI = *CurrPos; 874 RegisterOperands RegOpers; 875 RegOpers.collect(MI, *TRI, *MRI, TrackLaneMasks, false); 876 if (TrackLaneMasks) { 877 SlotIndex SlotIdx = getCurrSlot(); 878 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 879 } 880 advance(RegOpers); 881 } 882 883 /// Find the max change in excess pressure across all sets. 884 static void computeExcessPressureDelta(ArrayRef<unsigned> OldPressureVec, 885 ArrayRef<unsigned> NewPressureVec, 886 RegPressureDelta &Delta, 887 const RegisterClassInfo *RCI, 888 ArrayRef<unsigned> LiveThruPressureVec) { 889 Delta.Excess = PressureChange(); 890 for (unsigned i = 0, e = OldPressureVec.size(); i < e; ++i) { 891 unsigned POld = OldPressureVec[i]; 892 unsigned PNew = NewPressureVec[i]; 893 int PDiff = (int)PNew - (int)POld; 894 if (!PDiff) // No change in this set in the common case. 895 continue; 896 // Only consider change beyond the limit. 897 unsigned Limit = RCI->getRegPressureSetLimit(i); 898 if (!LiveThruPressureVec.empty()) 899 Limit += LiveThruPressureVec[i]; 900 901 if (Limit > POld) { 902 if (Limit > PNew) 903 PDiff = 0; // Under the limit 904 else 905 PDiff = PNew - Limit; // Just exceeded limit. 906 } else if (Limit > PNew) 907 PDiff = Limit - POld; // Just obeyed limit. 908 909 if (PDiff) { 910 Delta.Excess = PressureChange(i); 911 Delta.Excess.setUnitInc(PDiff); 912 break; 913 } 914 } 915 } 916 917 /// Find the max change in max pressure that either surpasses a critical PSet 918 /// limit or exceeds the current MaxPressureLimit. 919 /// 920 /// FIXME: comparing each element of the old and new MaxPressure vectors here is 921 /// silly. It's done now to demonstrate the concept but will go away with a 922 /// RegPressureTracker API change to work with pressure differences. 923 static void computeMaxPressureDelta(ArrayRef<unsigned> OldMaxPressureVec, 924 ArrayRef<unsigned> NewMaxPressureVec, 925 ArrayRef<PressureChange> CriticalPSets, 926 ArrayRef<unsigned> MaxPressureLimit, 927 RegPressureDelta &Delta) { 928 Delta.CriticalMax = PressureChange(); 929 Delta.CurrentMax = PressureChange(); 930 931 unsigned CritIdx = 0, CritEnd = CriticalPSets.size(); 932 for (unsigned i = 0, e = OldMaxPressureVec.size(); i < e; ++i) { 933 unsigned POld = OldMaxPressureVec[i]; 934 unsigned PNew = NewMaxPressureVec[i]; 935 if (PNew == POld) // No change in this set in the common case. 936 continue; 937 938 if (!Delta.CriticalMax.isValid()) { 939 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() < i) 940 ++CritIdx; 941 942 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == i) { 943 int PDiff = (int)PNew - (int)CriticalPSets[CritIdx].getUnitInc(); 944 if (PDiff > 0) { 945 Delta.CriticalMax = PressureChange(i); 946 Delta.CriticalMax.setUnitInc(PDiff); 947 } 948 } 949 } 950 // Find the first increase above MaxPressureLimit. 951 // (Ignores negative MDiff). 952 if (!Delta.CurrentMax.isValid() && PNew > MaxPressureLimit[i]) { 953 Delta.CurrentMax = PressureChange(i); 954 Delta.CurrentMax.setUnitInc(PNew - POld); 955 if (CritIdx == CritEnd || Delta.CriticalMax.isValid()) 956 break; 957 } 958 } 959 } 960 961 /// Record the upward impact of a single instruction on current register 962 /// pressure. Unlike the advance/recede pressure tracking interface, this does 963 /// not discover live in/outs. 964 /// 965 /// This is intended for speculative queries. It leaves pressure inconsistent 966 /// with the current position, so must be restored by the caller. 967 void RegPressureTracker::bumpUpwardPressure(const MachineInstr *MI) { 968 assert(!MI->isDebugValue() && "Expect a nondebug instruction."); 969 970 SlotIndex SlotIdx; 971 if (RequireIntervals) 972 SlotIdx = LIS->getInstructionIndex(MI).getRegSlot(); 973 974 // Account for register pressure similar to RegPressureTracker::recede(). 975 RegisterOperands RegOpers; 976 RegOpers.collect(*MI, *TRI, *MRI, TrackLaneMasks, /*IgnoreDead=*/true); 977 assert(RegOpers.DeadDefs.size() == 0); 978 if (TrackLaneMasks) 979 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 980 else if (RequireIntervals) 981 RegOpers.detectDeadDefs(*MI, *LIS); 982 983 // Boost max pressure for all dead defs together. 984 // Since CurrSetPressure and MaxSetPressure 985 bumpDeadDefs(RegOpers.DeadDefs); 986 987 // Kill liveness at live defs. 988 for (const RegisterMaskPair &P : RegOpers.Defs) { 989 unsigned Reg = P.RegUnit; 990 LaneBitmask LiveLanes = LiveRegs.contains(Reg); 991 LaneBitmask UseLanes = getRegLanes(RegOpers.Uses, Reg); 992 LaneBitmask DefLanes = P.LaneMask; 993 LaneBitmask LiveAfter = (LiveLanes & ~DefLanes) | UseLanes; 994 decreaseRegPressure(Reg, LiveLanes, LiveAfter); 995 } 996 // Generate liveness for uses. 997 for (const RegisterMaskPair &P : RegOpers.Uses) { 998 unsigned Reg = P.RegUnit; 999 LaneBitmask LiveLanes = LiveRegs.contains(Reg); 1000 LaneBitmask LiveAfter = LiveLanes | P.LaneMask; 1001 increaseRegPressure(Reg, LiveLanes, LiveAfter); 1002 } 1003 } 1004 1005 /// Consider the pressure increase caused by traversing this instruction 1006 /// bottom-up. Find the pressure set with the most change beyond its pressure 1007 /// limit based on the tracker's current pressure, and return the change in 1008 /// number of register units of that pressure set introduced by this 1009 /// instruction. 1010 /// 1011 /// This assumes that the current LiveOut set is sufficient. 1012 /// 1013 /// This is expensive for an on-the-fly query because it calls 1014 /// bumpUpwardPressure to recompute the pressure sets based on current 1015 /// liveness. This mainly exists to verify correctness, e.g. with 1016 /// -verify-misched. getUpwardPressureDelta is the fast version of this query 1017 /// that uses the per-SUnit cache of the PressureDiff. 1018 void RegPressureTracker:: 1019 getMaxUpwardPressureDelta(const MachineInstr *MI, PressureDiff *PDiff, 1020 RegPressureDelta &Delta, 1021 ArrayRef<PressureChange> CriticalPSets, 1022 ArrayRef<unsigned> MaxPressureLimit) { 1023 // Snapshot Pressure. 1024 // FIXME: The snapshot heap space should persist. But I'm planning to 1025 // summarize the pressure effect so we don't need to snapshot at all. 1026 std::vector<unsigned> SavedPressure = CurrSetPressure; 1027 std::vector<unsigned> SavedMaxPressure = P.MaxSetPressure; 1028 1029 bumpUpwardPressure(MI); 1030 1031 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI, 1032 LiveThruPressure); 1033 computeMaxPressureDelta(SavedMaxPressure, P.MaxSetPressure, CriticalPSets, 1034 MaxPressureLimit, Delta); 1035 assert(Delta.CriticalMax.getUnitInc() >= 0 && 1036 Delta.CurrentMax.getUnitInc() >= 0 && "cannot decrease max pressure"); 1037 1038 // Restore the tracker's state. 1039 P.MaxSetPressure.swap(SavedMaxPressure); 1040 CurrSetPressure.swap(SavedPressure); 1041 1042 #ifndef NDEBUG 1043 if (!PDiff) 1044 return; 1045 1046 // Check if the alternate algorithm yields the same result. 1047 RegPressureDelta Delta2; 1048 getUpwardPressureDelta(MI, *PDiff, Delta2, CriticalPSets, MaxPressureLimit); 1049 if (Delta != Delta2) { 1050 dbgs() << "PDiff: "; 1051 PDiff->dump(*TRI); 1052 dbgs() << "DELTA: " << *MI; 1053 if (Delta.Excess.isValid()) 1054 dbgs() << "Excess1 " << TRI->getRegPressureSetName(Delta.Excess.getPSet()) 1055 << " " << Delta.Excess.getUnitInc() << "\n"; 1056 if (Delta.CriticalMax.isValid()) 1057 dbgs() << "Critic1 " << TRI->getRegPressureSetName(Delta.CriticalMax.getPSet()) 1058 << " " << Delta.CriticalMax.getUnitInc() << "\n"; 1059 if (Delta.CurrentMax.isValid()) 1060 dbgs() << "CurrMx1 " << TRI->getRegPressureSetName(Delta.CurrentMax.getPSet()) 1061 << " " << Delta.CurrentMax.getUnitInc() << "\n"; 1062 if (Delta2.Excess.isValid()) 1063 dbgs() << "Excess2 " << TRI->getRegPressureSetName(Delta2.Excess.getPSet()) 1064 << " " << Delta2.Excess.getUnitInc() << "\n"; 1065 if (Delta2.CriticalMax.isValid()) 1066 dbgs() << "Critic2 " << TRI->getRegPressureSetName(Delta2.CriticalMax.getPSet()) 1067 << " " << Delta2.CriticalMax.getUnitInc() << "\n"; 1068 if (Delta2.CurrentMax.isValid()) 1069 dbgs() << "CurrMx2 " << TRI->getRegPressureSetName(Delta2.CurrentMax.getPSet()) 1070 << " " << Delta2.CurrentMax.getUnitInc() << "\n"; 1071 llvm_unreachable("RegP Delta Mismatch"); 1072 } 1073 #endif 1074 } 1075 1076 /// This is the fast version of querying register pressure that does not 1077 /// directly depend on current liveness. 1078 /// 1079 /// @param Delta captures information needed for heuristics. 1080 /// 1081 /// @param CriticalPSets Are the pressure sets that are known to exceed some 1082 /// limit within the region, not necessarily at the current position. 1083 /// 1084 /// @param MaxPressureLimit Is the max pressure within the region, not 1085 /// necessarily at the current position. 1086 void RegPressureTracker:: 1087 getUpwardPressureDelta(const MachineInstr *MI, /*const*/ PressureDiff &PDiff, 1088 RegPressureDelta &Delta, 1089 ArrayRef<PressureChange> CriticalPSets, 1090 ArrayRef<unsigned> MaxPressureLimit) const { 1091 unsigned CritIdx = 0, CritEnd = CriticalPSets.size(); 1092 for (PressureDiff::const_iterator 1093 PDiffI = PDiff.begin(), PDiffE = PDiff.end(); 1094 PDiffI != PDiffE && PDiffI->isValid(); ++PDiffI) { 1095 1096 unsigned PSetID = PDiffI->getPSet(); 1097 unsigned Limit = RCI->getRegPressureSetLimit(PSetID); 1098 if (!LiveThruPressure.empty()) 1099 Limit += LiveThruPressure[PSetID]; 1100 1101 unsigned POld = CurrSetPressure[PSetID]; 1102 unsigned MOld = P.MaxSetPressure[PSetID]; 1103 unsigned MNew = MOld; 1104 // Ignore DeadDefs here because they aren't captured by PressureChange. 1105 unsigned PNew = POld + PDiffI->getUnitInc(); 1106 assert((PDiffI->getUnitInc() >= 0) == (PNew >= POld) 1107 && "PSet overflow/underflow"); 1108 if (PNew > MOld) 1109 MNew = PNew; 1110 // Check if current pressure has exceeded the limit. 1111 if (!Delta.Excess.isValid()) { 1112 unsigned ExcessInc = 0; 1113 if (PNew > Limit) 1114 ExcessInc = POld > Limit ? PNew - POld : PNew - Limit; 1115 else if (POld > Limit) 1116 ExcessInc = Limit - POld; 1117 if (ExcessInc) { 1118 Delta.Excess = PressureChange(PSetID); 1119 Delta.Excess.setUnitInc(ExcessInc); 1120 } 1121 } 1122 // Check if max pressure has exceeded a critical pressure set max. 1123 if (MNew == MOld) 1124 continue; 1125 if (!Delta.CriticalMax.isValid()) { 1126 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() < PSetID) 1127 ++CritIdx; 1128 1129 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == PSetID) { 1130 int CritInc = (int)MNew - (int)CriticalPSets[CritIdx].getUnitInc(); 1131 if (CritInc > 0 && CritInc <= INT16_MAX) { 1132 Delta.CriticalMax = PressureChange(PSetID); 1133 Delta.CriticalMax.setUnitInc(CritInc); 1134 } 1135 } 1136 } 1137 // Check if max pressure has exceeded the current max. 1138 if (!Delta.CurrentMax.isValid() && MNew > MaxPressureLimit[PSetID]) { 1139 Delta.CurrentMax = PressureChange(PSetID); 1140 Delta.CurrentMax.setUnitInc(MNew - MOld); 1141 } 1142 } 1143 } 1144 1145 /// Helper to find a vreg use between two indices [PriorUseIdx, NextUseIdx). 1146 /// The query starts with a lane bitmask which gets lanes/bits removed for every 1147 /// use we find. 1148 static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask, 1149 SlotIndex PriorUseIdx, SlotIndex NextUseIdx, 1150 const MachineRegisterInfo &MRI, 1151 const LiveIntervals *LIS) { 1152 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); 1153 for (const MachineOperand &MO : MRI.use_nodbg_operands(Reg)) { 1154 if (MO.isUndef()) 1155 continue; 1156 const MachineInstr *MI = MO.getParent(); 1157 SlotIndex InstSlot = LIS->getInstructionIndex(MI).getRegSlot(); 1158 if (InstSlot >= PriorUseIdx && InstSlot < NextUseIdx) { 1159 unsigned SubRegIdx = MO.getSubReg(); 1160 LaneBitmask UseMask = TRI.getSubRegIndexLaneMask(SubRegIdx); 1161 LastUseMask &= ~UseMask; 1162 if (LastUseMask == 0) 1163 return 0; 1164 } 1165 } 1166 return LastUseMask; 1167 } 1168 1169 LaneBitmask RegPressureTracker::getLiveLanesAt(unsigned RegUnit, 1170 SlotIndex Pos) const { 1171 if (!RequireIntervals) 1172 return 0; 1173 1174 return getLanesWithProperty(*LIS, *MRI, TrackLaneMasks, RegUnit, Pos, 1175 [](const LiveRange &LR, SlotIndex Pos) { 1176 return LR.liveAt(Pos); 1177 }); 1178 } 1179 1180 LaneBitmask RegPressureTracker::getLastUsedLanes(unsigned RegUnit, 1181 SlotIndex Pos) const { 1182 if (!RequireIntervals) 1183 return 0; 1184 1185 return getLanesWithProperty(*LIS, *MRI, TrackLaneMasks, RegUnit, 1186 Pos.getBaseIndex(), 1187 [](const LiveRange &LR, SlotIndex Pos) { 1188 const LiveRange::Segment *S = LR.getSegmentContaining(Pos); 1189 return S != nullptr && S->end == Pos.getRegSlot(); 1190 }); 1191 } 1192 1193 LaneBitmask RegPressureTracker::getLiveThroughAt(unsigned RegUnit, 1194 SlotIndex Pos) const { 1195 if (!RequireIntervals) 1196 return 0; 1197 1198 return getLanesWithProperty(*LIS, *MRI, TrackLaneMasks, RegUnit, Pos, 1199 [](const LiveRange &LR, SlotIndex Pos) { 1200 const LiveRange::Segment *S = LR.getSegmentContaining(Pos); 1201 return S != nullptr && S->start < Pos.getRegSlot(true) && 1202 S->end != Pos.getDeadSlot(); 1203 }); 1204 } 1205 1206 /// Record the downward impact of a single instruction on current register 1207 /// pressure. Unlike the advance/recede pressure tracking interface, this does 1208 /// not discover live in/outs. 1209 /// 1210 /// This is intended for speculative queries. It leaves pressure inconsistent 1211 /// with the current position, so must be restored by the caller. 1212 void RegPressureTracker::bumpDownwardPressure(const MachineInstr *MI) { 1213 assert(!MI->isDebugValue() && "Expect a nondebug instruction."); 1214 1215 SlotIndex SlotIdx; 1216 if (RequireIntervals) 1217 SlotIdx = LIS->getInstructionIndex(MI).getRegSlot(); 1218 1219 // Account for register pressure similar to RegPressureTracker::recede(). 1220 RegisterOperands RegOpers; 1221 RegOpers.collect(*MI, *TRI, *MRI, TrackLaneMasks, false); 1222 if (TrackLaneMasks) 1223 RegOpers.adjustLaneLiveness(*LIS, *MRI, SlotIdx); 1224 1225 for (const RegisterMaskPair &Use : RegOpers.Uses) { 1226 unsigned Reg = Use.RegUnit; 1227 LaneBitmask LastUseMask = getLastUsedLanes(Reg, SlotIdx); 1228 if (LastUseMask == 0) 1229 continue; 1230 if (RequireIntervals) { 1231 // The LastUseMask is queried from the liveness information of instruction 1232 // which may be further down the schedule. Some lanes may actually not be 1233 // last uses for the current position. 1234 // FIXME: allow the caller to pass in the list of vreg uses that remain 1235 // to be bottom-scheduled to avoid searching uses at each query. 1236 SlotIndex CurrIdx = getCurrSlot(); 1237 LastUseMask 1238 = findUseBetween(Reg, LastUseMask, CurrIdx, SlotIdx, *MRI, LIS); 1239 if (LastUseMask == 0) 1240 continue; 1241 } 1242 1243 LaneBitmask LiveMask = LiveRegs.contains(Reg); 1244 LaneBitmask NewMask = LiveMask & ~LastUseMask; 1245 decreaseRegPressure(Reg, LiveMask, NewMask); 1246 } 1247 1248 // Generate liveness for defs. 1249 for (const RegisterMaskPair &Def : RegOpers.Defs) { 1250 unsigned Reg = Def.RegUnit; 1251 LaneBitmask LiveMask = LiveRegs.contains(Reg); 1252 LaneBitmask NewMask = LiveMask | Def.LaneMask; 1253 increaseRegPressure(Reg, LiveMask, NewMask); 1254 } 1255 1256 // Boost pressure for all dead defs together. 1257 bumpDeadDefs(RegOpers.DeadDefs); 1258 } 1259 1260 /// Consider the pressure increase caused by traversing this instruction 1261 /// top-down. Find the register class with the most change in its pressure limit 1262 /// based on the tracker's current pressure, and return the number of excess 1263 /// register units of that pressure set introduced by this instruction. 1264 /// 1265 /// This assumes that the current LiveIn set is sufficient. 1266 /// 1267 /// This is expensive for an on-the-fly query because it calls 1268 /// bumpDownwardPressure to recompute the pressure sets based on current 1269 /// liveness. We don't yet have a fast version of downward pressure tracking 1270 /// analogous to getUpwardPressureDelta. 1271 void RegPressureTracker:: 1272 getMaxDownwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta, 1273 ArrayRef<PressureChange> CriticalPSets, 1274 ArrayRef<unsigned> MaxPressureLimit) { 1275 // Snapshot Pressure. 1276 std::vector<unsigned> SavedPressure = CurrSetPressure; 1277 std::vector<unsigned> SavedMaxPressure = P.MaxSetPressure; 1278 1279 bumpDownwardPressure(MI); 1280 1281 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI, 1282 LiveThruPressure); 1283 computeMaxPressureDelta(SavedMaxPressure, P.MaxSetPressure, CriticalPSets, 1284 MaxPressureLimit, Delta); 1285 assert(Delta.CriticalMax.getUnitInc() >= 0 && 1286 Delta.CurrentMax.getUnitInc() >= 0 && "cannot decrease max pressure"); 1287 1288 // Restore the tracker's state. 1289 P.MaxSetPressure.swap(SavedMaxPressure); 1290 CurrSetPressure.swap(SavedPressure); 1291 } 1292 1293 /// Get the pressure of each PSet after traversing this instruction bottom-up. 1294 void RegPressureTracker:: 1295 getUpwardPressure(const MachineInstr *MI, 1296 std::vector<unsigned> &PressureResult, 1297 std::vector<unsigned> &MaxPressureResult) { 1298 // Snapshot pressure. 1299 PressureResult = CurrSetPressure; 1300 MaxPressureResult = P.MaxSetPressure; 1301 1302 bumpUpwardPressure(MI); 1303 1304 // Current pressure becomes the result. Restore current pressure. 1305 P.MaxSetPressure.swap(MaxPressureResult); 1306 CurrSetPressure.swap(PressureResult); 1307 } 1308 1309 /// Get the pressure of each PSet after traversing this instruction top-down. 1310 void RegPressureTracker:: 1311 getDownwardPressure(const MachineInstr *MI, 1312 std::vector<unsigned> &PressureResult, 1313 std::vector<unsigned> &MaxPressureResult) { 1314 // Snapshot pressure. 1315 PressureResult = CurrSetPressure; 1316 MaxPressureResult = P.MaxSetPressure; 1317 1318 bumpDownwardPressure(MI); 1319 1320 // Current pressure becomes the result. Restore current pressure. 1321 P.MaxSetPressure.swap(MaxPressureResult); 1322 CurrSetPressure.swap(PressureResult); 1323 } 1324