1 //===-- OptimizePHIs.cpp - Optimize machine instruction PHIs --------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass optimizes machine instruction PHIs to take advantage of
11 // opportunities created during DAG legalization.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #define DEBUG_TYPE "phi-opt"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/Statistic.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/IR/Function.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 using namespace llvm;
25 
26 STATISTIC(NumPHICycles, "Number of PHI cycles replaced");
27 STATISTIC(NumDeadPHICycles, "Number of dead PHI cycles");
28 
29 namespace {
30   class OptimizePHIs : public MachineFunctionPass {
31     MachineRegisterInfo *MRI;
32     const TargetInstrInfo *TII;
33 
34   public:
35     static char ID; // Pass identification
36     OptimizePHIs() : MachineFunctionPass(ID) {
37       initializeOptimizePHIsPass(*PassRegistry::getPassRegistry());
38     }
39 
40     bool runOnMachineFunction(MachineFunction &MF) override;
41 
42     void getAnalysisUsage(AnalysisUsage &AU) const override {
43       AU.setPreservesCFG();
44       MachineFunctionPass::getAnalysisUsage(AU);
45     }
46 
47   private:
48     typedef SmallPtrSet<MachineInstr*, 16> InstrSet;
49     typedef SmallPtrSetIterator<MachineInstr*> InstrSetIterator;
50 
51     bool IsSingleValuePHICycle(MachineInstr *MI, unsigned &SingleValReg,
52                                InstrSet &PHIsInCycle);
53     bool IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle);
54     bool OptimizeBB(MachineBasicBlock &MBB);
55   };
56 }
57 
58 char OptimizePHIs::ID = 0;
59 char &llvm::OptimizePHIsID = OptimizePHIs::ID;
60 INITIALIZE_PASS(OptimizePHIs, "opt-phis",
61                 "Optimize machine instruction PHIs", false, false)
62 
63 bool OptimizePHIs::runOnMachineFunction(MachineFunction &Fn) {
64   if (skipOptnoneFunction(*Fn.getFunction()))
65     return false;
66 
67   MRI = &Fn.getRegInfo();
68   TII = Fn.getTarget().getInstrInfo();
69 
70   // Find dead PHI cycles and PHI cycles that can be replaced by a single
71   // value.  InstCombine does these optimizations, but DAG legalization may
72   // introduce new opportunities, e.g., when i64 values are split up for
73   // 32-bit targets.
74   bool Changed = false;
75   for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
76     Changed |= OptimizeBB(*I);
77 
78   return Changed;
79 }
80 
81 /// IsSingleValuePHICycle - Check if MI is a PHI where all the source operands
82 /// are copies of SingleValReg, possibly via copies through other PHIs.  If
83 /// SingleValReg is zero on entry, it is set to the register with the single
84 /// non-copy value.  PHIsInCycle is a set used to keep track of the PHIs that
85 /// have been scanned.
86 bool OptimizePHIs::IsSingleValuePHICycle(MachineInstr *MI,
87                                          unsigned &SingleValReg,
88                                          InstrSet &PHIsInCycle) {
89   assert(MI->isPHI() && "IsSingleValuePHICycle expects a PHI instruction");
90   unsigned DstReg = MI->getOperand(0).getReg();
91 
92   // See if we already saw this register.
93   if (!PHIsInCycle.insert(MI))
94     return true;
95 
96   // Don't scan crazily complex things.
97   if (PHIsInCycle.size() == 16)
98     return false;
99 
100   // Scan the PHI operands.
101   for (unsigned i = 1; i != MI->getNumOperands(); i += 2) {
102     unsigned SrcReg = MI->getOperand(i).getReg();
103     if (SrcReg == DstReg)
104       continue;
105     MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
106 
107     // Skip over register-to-register moves.
108     if (SrcMI && SrcMI->isCopy() &&
109         !SrcMI->getOperand(0).getSubReg() &&
110         !SrcMI->getOperand(1).getSubReg() &&
111         TargetRegisterInfo::isVirtualRegister(SrcMI->getOperand(1).getReg()))
112       SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
113     if (!SrcMI)
114       return false;
115 
116     if (SrcMI->isPHI()) {
117       if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle))
118         return false;
119     } else {
120       // Fail if there is more than one non-phi/non-move register.
121       if (SingleValReg != 0)
122         return false;
123       SingleValReg = SrcReg;
124     }
125   }
126   return true;
127 }
128 
129 /// IsDeadPHICycle - Check if the register defined by a PHI is only used by
130 /// other PHIs in a cycle.
131 bool OptimizePHIs::IsDeadPHICycle(MachineInstr *MI, InstrSet &PHIsInCycle) {
132   assert(MI->isPHI() && "IsDeadPHICycle expects a PHI instruction");
133   unsigned DstReg = MI->getOperand(0).getReg();
134   assert(TargetRegisterInfo::isVirtualRegister(DstReg) &&
135          "PHI destination is not a virtual register");
136 
137   // See if we already saw this register.
138   if (!PHIsInCycle.insert(MI))
139     return true;
140 
141   // Don't scan crazily complex things.
142   if (PHIsInCycle.size() == 16)
143     return false;
144 
145   for (MachineInstr &UseMI : MRI->use_instructions(DstReg)) {
146     if (!UseMI.isPHI() || !IsDeadPHICycle(&UseMI, PHIsInCycle))
147       return false;
148   }
149 
150   return true;
151 }
152 
153 /// OptimizeBB - Remove dead PHI cycles and PHI cycles that can be replaced by
154 /// a single value.
155 bool OptimizePHIs::OptimizeBB(MachineBasicBlock &MBB) {
156   bool Changed = false;
157   for (MachineBasicBlock::iterator
158          MII = MBB.begin(), E = MBB.end(); MII != E; ) {
159     MachineInstr *MI = &*MII++;
160     if (!MI->isPHI())
161       break;
162 
163     // Check for single-value PHI cycles.
164     unsigned SingleValReg = 0;
165     InstrSet PHIsInCycle;
166     if (IsSingleValuePHICycle(MI, SingleValReg, PHIsInCycle) &&
167         SingleValReg != 0) {
168       unsigned OldReg = MI->getOperand(0).getReg();
169       if (!MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))
170         continue;
171 
172       MRI->replaceRegWith(OldReg, SingleValReg);
173       MI->eraseFromParent();
174       ++NumPHICycles;
175       Changed = true;
176       continue;
177     }
178 
179     // Check for dead PHI cycles.
180     PHIsInCycle.clear();
181     if (IsDeadPHICycle(MI, PHIsInCycle)) {
182       for (InstrSetIterator PI = PHIsInCycle.begin(), PE = PHIsInCycle.end();
183            PI != PE; ++PI) {
184         MachineInstr *PhiMI = *PI;
185         if (&*MII == PhiMI)
186           ++MII;
187         PhiMI->eraseFromParent();
188       }
189       ++NumDeadPHICycles;
190       Changed = true;
191     }
192   }
193   return Changed;
194 }
195