1 //===-- MachineSink.cpp - Sinking for machine instructions ----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This pass moves instructions into successor blocks when possible, so that 11 // they aren't executed on paths where their results aren't needed. 12 // 13 // This pass is not intended to be a replacement or a complete alternative 14 // for an LLVM-IR-level sinking pass. It is only designed to sink simple 15 // constructs that are not exposed before lowering and instruction selection. 16 // 17 //===----------------------------------------------------------------------===// 18 19 #define DEBUG_TYPE "machine-sink" 20 #include "llvm/CodeGen/Passes.h" 21 #include "llvm/ADT/SmallSet.h" 22 #include "llvm/ADT/Statistic.h" 23 #include "llvm/Analysis/AliasAnalysis.h" 24 #include "llvm/CodeGen/MachineDominators.h" 25 #include "llvm/CodeGen/MachineLoopInfo.h" 26 #include "llvm/CodeGen/MachineRegisterInfo.h" 27 #include "llvm/Support/CommandLine.h" 28 #include "llvm/Support/Debug.h" 29 #include "llvm/Support/raw_ostream.h" 30 #include "llvm/Target/TargetInstrInfo.h" 31 #include "llvm/Target/TargetMachine.h" 32 #include "llvm/Target/TargetRegisterInfo.h" 33 using namespace llvm; 34 35 static cl::opt<bool> 36 SplitEdges("machine-sink-split", 37 cl::desc("Split critical edges during machine sinking"), 38 cl::init(true), cl::Hidden); 39 40 STATISTIC(NumSunk, "Number of machine instructions sunk"); 41 STATISTIC(NumSplit, "Number of critical edges split"); 42 STATISTIC(NumCoalesces, "Number of copies coalesced"); 43 44 namespace { 45 class MachineSinking : public MachineFunctionPass { 46 const TargetInstrInfo *TII; 47 const TargetRegisterInfo *TRI; 48 MachineRegisterInfo *MRI; // Machine register information 49 MachineDominatorTree *DT; // Machine dominator tree 50 MachineLoopInfo *LI; 51 AliasAnalysis *AA; 52 53 // Remember which edges have been considered for breaking. 54 SmallSet<std::pair<MachineBasicBlock*,MachineBasicBlock*>, 8> 55 CEBCandidates; 56 57 public: 58 static char ID; // Pass identification 59 MachineSinking() : MachineFunctionPass(ID) { 60 initializeMachineSinkingPass(*PassRegistry::getPassRegistry()); 61 } 62 63 bool runOnMachineFunction(MachineFunction &MF) override; 64 65 void getAnalysisUsage(AnalysisUsage &AU) const override { 66 AU.setPreservesCFG(); 67 MachineFunctionPass::getAnalysisUsage(AU); 68 AU.addRequired<AliasAnalysis>(); 69 AU.addRequired<MachineDominatorTree>(); 70 AU.addRequired<MachineLoopInfo>(); 71 AU.addPreserved<MachineDominatorTree>(); 72 AU.addPreserved<MachineLoopInfo>(); 73 } 74 75 void releaseMemory() override { 76 CEBCandidates.clear(); 77 } 78 79 private: 80 bool ProcessBlock(MachineBasicBlock &MBB); 81 bool isWorthBreakingCriticalEdge(MachineInstr *MI, 82 MachineBasicBlock *From, 83 MachineBasicBlock *To); 84 MachineBasicBlock *SplitCriticalEdge(MachineInstr *MI, 85 MachineBasicBlock *From, 86 MachineBasicBlock *To, 87 bool BreakPHIEdge); 88 bool SinkInstruction(MachineInstr *MI, bool &SawStore); 89 bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB, 90 MachineBasicBlock *DefMBB, 91 bool &BreakPHIEdge, bool &LocalUse) const; 92 MachineBasicBlock *FindSuccToSinkTo(MachineInstr *MI, MachineBasicBlock *MBB, 93 bool &BreakPHIEdge); 94 bool isProfitableToSinkTo(unsigned Reg, MachineInstr *MI, 95 MachineBasicBlock *MBB, 96 MachineBasicBlock *SuccToSinkTo); 97 98 bool PerformTrivialForwardCoalescing(MachineInstr *MI, 99 MachineBasicBlock *MBB); 100 }; 101 } // end anonymous namespace 102 103 char MachineSinking::ID = 0; 104 char &llvm::MachineSinkingID = MachineSinking::ID; 105 INITIALIZE_PASS_BEGIN(MachineSinking, "machine-sink", 106 "Machine code sinking", false, false) 107 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) 108 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) 109 INITIALIZE_AG_DEPENDENCY(AliasAnalysis) 110 INITIALIZE_PASS_END(MachineSinking, "machine-sink", 111 "Machine code sinking", false, false) 112 113 bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr *MI, 114 MachineBasicBlock *MBB) { 115 if (!MI->isCopy()) 116 return false; 117 118 unsigned SrcReg = MI->getOperand(1).getReg(); 119 unsigned DstReg = MI->getOperand(0).getReg(); 120 if (!TargetRegisterInfo::isVirtualRegister(SrcReg) || 121 !TargetRegisterInfo::isVirtualRegister(DstReg) || 122 !MRI->hasOneNonDBGUse(SrcReg)) 123 return false; 124 125 const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg); 126 const TargetRegisterClass *DRC = MRI->getRegClass(DstReg); 127 if (SRC != DRC) 128 return false; 129 130 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); 131 if (DefMI->isCopyLike()) 132 return false; 133 DEBUG(dbgs() << "Coalescing: " << *DefMI); 134 DEBUG(dbgs() << "*** to: " << *MI); 135 MRI->replaceRegWith(DstReg, SrcReg); 136 MI->eraseFromParent(); 137 ++NumCoalesces; 138 return true; 139 } 140 141 /// AllUsesDominatedByBlock - Return true if all uses of the specified register 142 /// occur in blocks dominated by the specified block. If any use is in the 143 /// definition block, then return false since it is never legal to move def 144 /// after uses. 145 bool 146 MachineSinking::AllUsesDominatedByBlock(unsigned Reg, 147 MachineBasicBlock *MBB, 148 MachineBasicBlock *DefMBB, 149 bool &BreakPHIEdge, 150 bool &LocalUse) const { 151 assert(TargetRegisterInfo::isVirtualRegister(Reg) && 152 "Only makes sense for vregs"); 153 154 // Ignore debug uses because debug info doesn't affect the code. 155 if (MRI->use_nodbg_empty(Reg)) 156 return true; 157 158 // BreakPHIEdge is true if all the uses are in the successor MBB being sunken 159 // into and they are all PHI nodes. In this case, machine-sink must break 160 // the critical edge first. e.g. 161 // 162 // BB#1: derived from LLVM BB %bb4.preheader 163 // Predecessors according to CFG: BB#0 164 // ... 165 // %reg16385<def> = DEC64_32r %reg16437, %EFLAGS<imp-def,dead> 166 // ... 167 // JE_4 <BB#37>, %EFLAGS<imp-use> 168 // Successors according to CFG: BB#37 BB#2 169 // 170 // BB#2: derived from LLVM BB %bb.nph 171 // Predecessors according to CFG: BB#0 BB#1 172 // %reg16386<def> = PHI %reg16434, <BB#0>, %reg16385, <BB#1> 173 BreakPHIEdge = true; 174 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { 175 MachineInstr *UseInst = MO.getParent(); 176 unsigned OpNo = &MO - &UseInst->getOperand(0); 177 MachineBasicBlock *UseBlock = UseInst->getParent(); 178 if (!(UseBlock == MBB && UseInst->isPHI() && 179 UseInst->getOperand(OpNo+1).getMBB() == DefMBB)) { 180 BreakPHIEdge = false; 181 break; 182 } 183 } 184 if (BreakPHIEdge) 185 return true; 186 187 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { 188 // Determine the block of the use. 189 MachineInstr *UseInst = MO.getParent(); 190 unsigned OpNo = &MO - &UseInst->getOperand(0); 191 MachineBasicBlock *UseBlock = UseInst->getParent(); 192 if (UseInst->isPHI()) { 193 // PHI nodes use the operand in the predecessor block, not the block with 194 // the PHI. 195 UseBlock = UseInst->getOperand(OpNo+1).getMBB(); 196 } else if (UseBlock == DefMBB) { 197 LocalUse = true; 198 return false; 199 } 200 201 // Check that it dominates. 202 if (!DT->dominates(MBB, UseBlock)) 203 return false; 204 } 205 206 return true; 207 } 208 209 bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { 210 DEBUG(dbgs() << "******** Machine Sinking ********\n"); 211 212 const TargetMachine &TM = MF.getTarget(); 213 TII = TM.getInstrInfo(); 214 TRI = TM.getRegisterInfo(); 215 MRI = &MF.getRegInfo(); 216 DT = &getAnalysis<MachineDominatorTree>(); 217 LI = &getAnalysis<MachineLoopInfo>(); 218 AA = &getAnalysis<AliasAnalysis>(); 219 220 bool EverMadeChange = false; 221 222 while (1) { 223 bool MadeChange = false; 224 225 // Process all basic blocks. 226 CEBCandidates.clear(); 227 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); 228 I != E; ++I) 229 MadeChange |= ProcessBlock(*I); 230 231 // If this iteration over the code changed anything, keep iterating. 232 if (!MadeChange) break; 233 EverMadeChange = true; 234 } 235 return EverMadeChange; 236 } 237 238 bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) { 239 // Can't sink anything out of a block that has less than two successors. 240 if (MBB.succ_size() <= 1 || MBB.empty()) return false; 241 242 // Don't bother sinking code out of unreachable blocks. In addition to being 243 // unprofitable, it can also lead to infinite looping, because in an 244 // unreachable loop there may be nowhere to stop. 245 if (!DT->isReachableFromEntry(&MBB)) return false; 246 247 bool MadeChange = false; 248 249 // Walk the basic block bottom-up. Remember if we saw a store. 250 MachineBasicBlock::iterator I = MBB.end(); 251 --I; 252 bool ProcessedBegin, SawStore = false; 253 do { 254 MachineInstr *MI = I; // The instruction to sink. 255 256 // Predecrement I (if it's not begin) so that it isn't invalidated by 257 // sinking. 258 ProcessedBegin = I == MBB.begin(); 259 if (!ProcessedBegin) 260 --I; 261 262 if (MI->isDebugValue()) 263 continue; 264 265 bool Joined = PerformTrivialForwardCoalescing(MI, &MBB); 266 if (Joined) { 267 MadeChange = true; 268 continue; 269 } 270 271 if (SinkInstruction(MI, SawStore)) 272 ++NumSunk, MadeChange = true; 273 274 // If we just processed the first instruction in the block, we're done. 275 } while (!ProcessedBegin); 276 277 return MadeChange; 278 } 279 280 bool MachineSinking::isWorthBreakingCriticalEdge(MachineInstr *MI, 281 MachineBasicBlock *From, 282 MachineBasicBlock *To) { 283 // FIXME: Need much better heuristics. 284 285 // If the pass has already considered breaking this edge (during this pass 286 // through the function), then let's go ahead and break it. This means 287 // sinking multiple "cheap" instructions into the same block. 288 if (!CEBCandidates.insert(std::make_pair(From, To))) 289 return true; 290 291 if (!MI->isCopy() && !MI->isAsCheapAsAMove()) 292 return true; 293 294 // MI is cheap, we probably don't want to break the critical edge for it. 295 // However, if this would allow some definitions of its source operands 296 // to be sunk then it's probably worth it. 297 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 298 const MachineOperand &MO = MI->getOperand(i); 299 if (!MO.isReg() || !MO.isUse()) 300 continue; 301 unsigned Reg = MO.getReg(); 302 if (Reg == 0) 303 continue; 304 305 // We don't move live definitions of physical registers, 306 // so sinking their uses won't enable any opportunities. 307 if (TargetRegisterInfo::isPhysicalRegister(Reg)) 308 continue; 309 310 // If this instruction is the only user of a virtual register, 311 // check if breaking the edge will enable sinking 312 // both this instruction and the defining instruction. 313 if (MRI->hasOneNonDBGUse(Reg)) { 314 // If the definition resides in same MBB, 315 // claim it's likely we can sink these together. 316 // If definition resides elsewhere, we aren't 317 // blocking it from being sunk so don't break the edge. 318 MachineInstr *DefMI = MRI->getVRegDef(Reg); 319 if (DefMI->getParent() == MI->getParent()) 320 return true; 321 } 322 } 323 324 return false; 325 } 326 327 MachineBasicBlock *MachineSinking::SplitCriticalEdge(MachineInstr *MI, 328 MachineBasicBlock *FromBB, 329 MachineBasicBlock *ToBB, 330 bool BreakPHIEdge) { 331 if (!isWorthBreakingCriticalEdge(MI, FromBB, ToBB)) 332 return 0; 333 334 // Avoid breaking back edge. From == To means backedge for single BB loop. 335 if (!SplitEdges || FromBB == ToBB) 336 return 0; 337 338 // Check for backedges of more "complex" loops. 339 if (LI->getLoopFor(FromBB) == LI->getLoopFor(ToBB) && 340 LI->isLoopHeader(ToBB)) 341 return 0; 342 343 // It's not always legal to break critical edges and sink the computation 344 // to the edge. 345 // 346 // BB#1: 347 // v1024 348 // Beq BB#3 349 // <fallthrough> 350 // BB#2: 351 // ... no uses of v1024 352 // <fallthrough> 353 // BB#3: 354 // ... 355 // = v1024 356 // 357 // If BB#1 -> BB#3 edge is broken and computation of v1024 is inserted: 358 // 359 // BB#1: 360 // ... 361 // Bne BB#2 362 // BB#4: 363 // v1024 = 364 // B BB#3 365 // BB#2: 366 // ... no uses of v1024 367 // <fallthrough> 368 // BB#3: 369 // ... 370 // = v1024 371 // 372 // This is incorrect since v1024 is not computed along the BB#1->BB#2->BB#3 373 // flow. We need to ensure the new basic block where the computation is 374 // sunk to dominates all the uses. 375 // It's only legal to break critical edge and sink the computation to the 376 // new block if all the predecessors of "To", except for "From", are 377 // not dominated by "From". Given SSA property, this means these 378 // predecessors are dominated by "To". 379 // 380 // There is no need to do this check if all the uses are PHI nodes. PHI 381 // sources are only defined on the specific predecessor edges. 382 if (!BreakPHIEdge) { 383 for (MachineBasicBlock::pred_iterator PI = ToBB->pred_begin(), 384 E = ToBB->pred_end(); PI != E; ++PI) { 385 if (*PI == FromBB) 386 continue; 387 if (!DT->dominates(ToBB, *PI)) 388 return 0; 389 } 390 } 391 392 return FromBB->SplitCriticalEdge(ToBB, this); 393 } 394 395 static bool AvoidsSinking(MachineInstr *MI, MachineRegisterInfo *MRI) { 396 return MI->isInsertSubreg() || MI->isSubregToReg() || MI->isRegSequence(); 397 } 398 399 /// collectDebgValues - Scan instructions following MI and collect any 400 /// matching DBG_VALUEs. 401 static void collectDebugValues(MachineInstr *MI, 402 SmallVectorImpl<MachineInstr *> &DbgValues) { 403 DbgValues.clear(); 404 if (!MI->getOperand(0).isReg()) 405 return; 406 407 MachineBasicBlock::iterator DI = MI; ++DI; 408 for (MachineBasicBlock::iterator DE = MI->getParent()->end(); 409 DI != DE; ++DI) { 410 if (!DI->isDebugValue()) 411 return; 412 if (DI->getOperand(0).isReg() && 413 DI->getOperand(0).getReg() == MI->getOperand(0).getReg()) 414 DbgValues.push_back(DI); 415 } 416 } 417 418 /// isPostDominatedBy - Return true if A is post dominated by B. 419 static bool isPostDominatedBy(MachineBasicBlock *A, MachineBasicBlock *B) { 420 421 // FIXME - Use real post dominator. 422 if (A->succ_size() != 2) 423 return false; 424 MachineBasicBlock::succ_iterator I = A->succ_begin(); 425 if (B == *I) 426 ++I; 427 MachineBasicBlock *OtherSuccBlock = *I; 428 if (OtherSuccBlock->succ_size() != 1 || 429 *(OtherSuccBlock->succ_begin()) != B) 430 return false; 431 432 return true; 433 } 434 435 /// isProfitableToSinkTo - Return true if it is profitable to sink MI. 436 bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr *MI, 437 MachineBasicBlock *MBB, 438 MachineBasicBlock *SuccToSinkTo) { 439 assert (MI && "Invalid MachineInstr!"); 440 assert (SuccToSinkTo && "Invalid SinkTo Candidate BB"); 441 442 if (MBB == SuccToSinkTo) 443 return false; 444 445 // It is profitable if SuccToSinkTo does not post dominate current block. 446 if (!isPostDominatedBy(MBB, SuccToSinkTo)) 447 return true; 448 449 // Check if only use in post dominated block is PHI instruction. 450 bool NonPHIUse = false; 451 for (MachineInstr &UseInst : MRI->use_nodbg_instructions(Reg)) { 452 MachineBasicBlock *UseBlock = UseInst.getParent(); 453 if (UseBlock == SuccToSinkTo && !UseInst.isPHI()) 454 NonPHIUse = true; 455 } 456 if (!NonPHIUse) 457 return true; 458 459 // If SuccToSinkTo post dominates then also it may be profitable if MI 460 // can further profitably sinked into another block in next round. 461 bool BreakPHIEdge = false; 462 // FIXME - If finding successor is compile time expensive then catch results. 463 if (MachineBasicBlock *MBB2 = FindSuccToSinkTo(MI, SuccToSinkTo, BreakPHIEdge)) 464 return isProfitableToSinkTo(Reg, MI, SuccToSinkTo, MBB2); 465 466 // If SuccToSinkTo is final destination and it is a post dominator of current 467 // block then it is not profitable to sink MI into SuccToSinkTo block. 468 return false; 469 } 470 471 /// FindSuccToSinkTo - Find a successor to sink this instruction to. 472 MachineBasicBlock *MachineSinking::FindSuccToSinkTo(MachineInstr *MI, 473 MachineBasicBlock *MBB, 474 bool &BreakPHIEdge) { 475 476 assert (MI && "Invalid MachineInstr!"); 477 assert (MBB && "Invalid MachineBasicBlock!"); 478 479 // Loop over all the operands of the specified instruction. If there is 480 // anything we can't handle, bail out. 481 482 // SuccToSinkTo - This is the successor to sink this instruction to, once we 483 // decide. 484 MachineBasicBlock *SuccToSinkTo = 0; 485 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 486 const MachineOperand &MO = MI->getOperand(i); 487 if (!MO.isReg()) continue; // Ignore non-register operands. 488 489 unsigned Reg = MO.getReg(); 490 if (Reg == 0) continue; 491 492 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 493 if (MO.isUse()) { 494 // If the physreg has no defs anywhere, it's just an ambient register 495 // and we can freely move its uses. Alternatively, if it's allocatable, 496 // it could get allocated to something with a def during allocation. 497 if (!MRI->isConstantPhysReg(Reg, *MBB->getParent())) 498 return NULL; 499 } else if (!MO.isDead()) { 500 // A def that isn't dead. We can't move it. 501 return NULL; 502 } 503 } else { 504 // Virtual register uses are always safe to sink. 505 if (MO.isUse()) continue; 506 507 // If it's not safe to move defs of the register class, then abort. 508 if (!TII->isSafeToMoveRegClassDefs(MRI->getRegClass(Reg))) 509 return NULL; 510 511 // FIXME: This picks a successor to sink into based on having one 512 // successor that dominates all the uses. However, there are cases where 513 // sinking can happen but where the sink point isn't a successor. For 514 // example: 515 // 516 // x = computation 517 // if () {} else {} 518 // use x 519 // 520 // the instruction could be sunk over the whole diamond for the 521 // if/then/else (or loop, etc), allowing it to be sunk into other blocks 522 // after that. 523 524 // Virtual register defs can only be sunk if all their uses are in blocks 525 // dominated by one of the successors. 526 if (SuccToSinkTo) { 527 // If a previous operand picked a block to sink to, then this operand 528 // must be sinkable to the same block. 529 bool LocalUse = false; 530 if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo, MBB, 531 BreakPHIEdge, LocalUse)) 532 return NULL; 533 534 continue; 535 } 536 537 // Otherwise, we should look at all the successors and decide which one 538 // we should sink to. 539 // We give successors with smaller loop depth higher priority. 540 SmallVector<MachineBasicBlock*, 4> Succs(MBB->succ_begin(), MBB->succ_end()); 541 // Sort Successors according to their loop depth. 542 std::stable_sort( 543 Succs.begin(), Succs.end(), 544 [this](const MachineBasicBlock *LHS, const MachineBasicBlock *RHS) { 545 return LI->getLoopDepth(LHS) < LI->getLoopDepth(RHS); 546 }); 547 for (SmallVectorImpl<MachineBasicBlock *>::iterator SI = Succs.begin(), 548 E = Succs.end(); SI != E; ++SI) { 549 MachineBasicBlock *SuccBlock = *SI; 550 bool LocalUse = false; 551 if (AllUsesDominatedByBlock(Reg, SuccBlock, MBB, 552 BreakPHIEdge, LocalUse)) { 553 SuccToSinkTo = SuccBlock; 554 break; 555 } 556 if (LocalUse) 557 // Def is used locally, it's never safe to move this def. 558 return NULL; 559 } 560 561 // If we couldn't find a block to sink to, ignore this instruction. 562 if (SuccToSinkTo == 0) 563 return NULL; 564 else if (!isProfitableToSinkTo(Reg, MI, MBB, SuccToSinkTo)) 565 return NULL; 566 } 567 } 568 569 // It is not possible to sink an instruction into its own block. This can 570 // happen with loops. 571 if (MBB == SuccToSinkTo) 572 return NULL; 573 574 // It's not safe to sink instructions to EH landing pad. Control flow into 575 // landing pad is implicitly defined. 576 if (SuccToSinkTo && SuccToSinkTo->isLandingPad()) 577 return NULL; 578 579 return SuccToSinkTo; 580 } 581 582 /// SinkInstruction - Determine whether it is safe to sink the specified machine 583 /// instruction out of its current block into a successor. 584 bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) { 585 // Don't sink insert_subreg, subreg_to_reg, reg_sequence. These are meant to 586 // be close to the source to make it easier to coalesce. 587 if (AvoidsSinking(MI, MRI)) 588 return false; 589 590 // Check if it's safe to move the instruction. 591 if (!MI->isSafeToMove(TII, AA, SawStore)) 592 return false; 593 594 // FIXME: This should include support for sinking instructions within the 595 // block they are currently in to shorten the live ranges. We often get 596 // instructions sunk into the top of a large block, but it would be better to 597 // also sink them down before their first use in the block. This xform has to 598 // be careful not to *increase* register pressure though, e.g. sinking 599 // "x = y + z" down if it kills y and z would increase the live ranges of y 600 // and z and only shrink the live range of x. 601 602 bool BreakPHIEdge = false; 603 MachineBasicBlock *ParentBlock = MI->getParent(); 604 MachineBasicBlock *SuccToSinkTo = FindSuccToSinkTo(MI, ParentBlock, BreakPHIEdge); 605 606 // If there are no outputs, it must have side-effects. 607 if (SuccToSinkTo == 0) 608 return false; 609 610 611 // If the instruction to move defines a dead physical register which is live 612 // when leaving the basic block, don't move it because it could turn into a 613 // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>) 614 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { 615 const MachineOperand &MO = MI->getOperand(I); 616 if (!MO.isReg()) continue; 617 unsigned Reg = MO.getReg(); 618 if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; 619 if (SuccToSinkTo->isLiveIn(Reg)) 620 return false; 621 } 622 623 DEBUG(dbgs() << "Sink instr " << *MI << "\tinto block " << *SuccToSinkTo); 624 625 // If the block has multiple predecessors, this is a critical edge. 626 // Decide if we can sink along it or need to break the edge. 627 if (SuccToSinkTo->pred_size() > 1) { 628 // We cannot sink a load across a critical edge - there may be stores in 629 // other code paths. 630 bool TryBreak = false; 631 bool store = true; 632 if (!MI->isSafeToMove(TII, AA, store)) { 633 DEBUG(dbgs() << " *** NOTE: Won't sink load along critical edge.\n"); 634 TryBreak = true; 635 } 636 637 // We don't want to sink across a critical edge if we don't dominate the 638 // successor. We could be introducing calculations to new code paths. 639 if (!TryBreak && !DT->dominates(ParentBlock, SuccToSinkTo)) { 640 DEBUG(dbgs() << " *** NOTE: Critical edge found\n"); 641 TryBreak = true; 642 } 643 644 // Don't sink instructions into a loop. 645 if (!TryBreak && LI->isLoopHeader(SuccToSinkTo)) { 646 DEBUG(dbgs() << " *** NOTE: Loop header found\n"); 647 TryBreak = true; 648 } 649 650 // Otherwise we are OK with sinking along a critical edge. 651 if (!TryBreak) 652 DEBUG(dbgs() << "Sinking along critical edge.\n"); 653 else { 654 MachineBasicBlock *NewSucc = 655 SplitCriticalEdge(MI, ParentBlock, SuccToSinkTo, BreakPHIEdge); 656 if (!NewSucc) { 657 DEBUG(dbgs() << " *** PUNTING: Not legal or profitable to " 658 "break critical edge\n"); 659 return false; 660 } else { 661 DEBUG(dbgs() << " *** Splitting critical edge:" 662 " BB#" << ParentBlock->getNumber() 663 << " -- BB#" << NewSucc->getNumber() 664 << " -- BB#" << SuccToSinkTo->getNumber() << '\n'); 665 SuccToSinkTo = NewSucc; 666 ++NumSplit; 667 BreakPHIEdge = false; 668 } 669 } 670 } 671 672 if (BreakPHIEdge) { 673 // BreakPHIEdge is true if all the uses are in the successor MBB being 674 // sunken into and they are all PHI nodes. In this case, machine-sink must 675 // break the critical edge first. 676 MachineBasicBlock *NewSucc = SplitCriticalEdge(MI, ParentBlock, 677 SuccToSinkTo, BreakPHIEdge); 678 if (!NewSucc) { 679 DEBUG(dbgs() << " *** PUNTING: Not legal or profitable to " 680 "break critical edge\n"); 681 return false; 682 } 683 684 DEBUG(dbgs() << " *** Splitting critical edge:" 685 " BB#" << ParentBlock->getNumber() 686 << " -- BB#" << NewSucc->getNumber() 687 << " -- BB#" << SuccToSinkTo->getNumber() << '\n'); 688 SuccToSinkTo = NewSucc; 689 ++NumSplit; 690 } 691 692 // Determine where to insert into. Skip phi nodes. 693 MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin(); 694 while (InsertPos != SuccToSinkTo->end() && InsertPos->isPHI()) 695 ++InsertPos; 696 697 // collect matching debug values. 698 SmallVector<MachineInstr *, 2> DbgValuesToSink; 699 collectDebugValues(MI, DbgValuesToSink); 700 701 // Move the instruction. 702 SuccToSinkTo->splice(InsertPos, ParentBlock, MI, 703 ++MachineBasicBlock::iterator(MI)); 704 705 // Move debug values. 706 for (SmallVectorImpl<MachineInstr *>::iterator DBI = DbgValuesToSink.begin(), 707 DBE = DbgValuesToSink.end(); DBI != DBE; ++DBI) { 708 MachineInstr *DbgMI = *DBI; 709 SuccToSinkTo->splice(InsertPos, ParentBlock, DbgMI, 710 ++MachineBasicBlock::iterator(DbgMI)); 711 } 712 713 // Conservatively, clear any kill flags, since it's possible that they are no 714 // longer correct. 715 MI->clearKillInfo(); 716 717 return true; 718 } 719