1 //===- MIParser.cpp - Machine instructions parser implementation ----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the parsing of machine instructions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MIParser.h" 15 #include "MILexer.h" 16 #include "llvm/ADT/StringMap.h" 17 #include "llvm/AsmParser/SlotMapping.h" 18 #include "llvm/CodeGen/MachineBasicBlock.h" 19 #include "llvm/CodeGen/MachineFunction.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineInstr.h" 22 #include "llvm/CodeGen/MachineInstrBuilder.h" 23 #include "llvm/CodeGen/MachineModuleInfo.h" 24 #include "llvm/IR/Instructions.h" 25 #include "llvm/IR/Constants.h" 26 #include "llvm/IR/Module.h" 27 #include "llvm/IR/ModuleSlotTracker.h" 28 #include "llvm/IR/ValueSymbolTable.h" 29 #include "llvm/Support/raw_ostream.h" 30 #include "llvm/Support/SourceMgr.h" 31 #include "llvm/Target/TargetSubtargetInfo.h" 32 #include "llvm/Target/TargetInstrInfo.h" 33 34 using namespace llvm; 35 36 namespace { 37 38 struct StringValueUtility { 39 StringRef String; 40 std::string UnescapedString; 41 42 StringValueUtility(const MIToken &Token) { 43 if (Token.isStringValueQuoted()) { 44 Token.unescapeQuotedStringValue(UnescapedString); 45 String = UnescapedString; 46 return; 47 } 48 String = Token.stringValue(); 49 } 50 51 operator StringRef() const { return String; } 52 }; 53 54 /// A wrapper struct around the 'MachineOperand' struct that includes a source 55 /// range. 56 struct MachineOperandWithLocation { 57 MachineOperand Operand; 58 StringRef::iterator Begin; 59 StringRef::iterator End; 60 61 MachineOperandWithLocation(const MachineOperand &Operand, 62 StringRef::iterator Begin, StringRef::iterator End) 63 : Operand(Operand), Begin(Begin), End(End) {} 64 }; 65 66 class MIParser { 67 SourceMgr &SM; 68 MachineFunction &MF; 69 SMDiagnostic &Error; 70 StringRef Source, CurrentSource; 71 MIToken Token; 72 const PerFunctionMIParsingState &PFS; 73 /// Maps from indices to unnamed global values and metadata nodes. 74 const SlotMapping &IRSlots; 75 /// Maps from instruction names to op codes. 76 StringMap<unsigned> Names2InstrOpCodes; 77 /// Maps from register names to registers. 78 StringMap<unsigned> Names2Regs; 79 /// Maps from register mask names to register masks. 80 StringMap<const uint32_t *> Names2RegMasks; 81 /// Maps from subregister names to subregister indices. 82 StringMap<unsigned> Names2SubRegIndices; 83 /// Maps from slot numbers to function's unnamed basic blocks. 84 DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks; 85 /// Maps from target index names to target indices. 86 StringMap<int> Names2TargetIndices; 87 88 public: 89 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error, 90 StringRef Source, const PerFunctionMIParsingState &PFS, 91 const SlotMapping &IRSlots); 92 93 void lex(); 94 95 /// Report an error at the current location with the given message. 96 /// 97 /// This function always return true. 98 bool error(const Twine &Msg); 99 100 /// Report an error at the given location with the given message. 101 /// 102 /// This function always return true. 103 bool error(StringRef::iterator Loc, const Twine &Msg); 104 105 bool parse(MachineInstr *&MI); 106 bool parseStandaloneMBB(MachineBasicBlock *&MBB); 107 bool parseStandaloneNamedRegister(unsigned &Reg); 108 bool parseStandaloneVirtualRegister(unsigned &Reg); 109 bool parseStandaloneIRBlockReference(const BasicBlock *&BB); 110 111 bool parseRegister(unsigned &Reg); 112 bool parseRegisterFlag(unsigned &Flags); 113 bool parseSubRegisterIndex(unsigned &SubReg); 114 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false); 115 bool parseImmediateOperand(MachineOperand &Dest); 116 bool parseMBBReference(MachineBasicBlock *&MBB); 117 bool parseMBBOperand(MachineOperand &Dest); 118 bool parseStackObjectOperand(MachineOperand &Dest); 119 bool parseFixedStackObjectOperand(MachineOperand &Dest); 120 bool parseGlobalValue(GlobalValue *&GV); 121 bool parseGlobalAddressOperand(MachineOperand &Dest); 122 bool parseConstantPoolIndexOperand(MachineOperand &Dest); 123 bool parseJumpTableIndexOperand(MachineOperand &Dest); 124 bool parseExternalSymbolOperand(MachineOperand &Dest); 125 bool parseMDNode(MDNode *&Node); 126 bool parseMetadataOperand(MachineOperand &Dest); 127 bool parseCFIOffset(int &Offset); 128 bool parseCFIRegister(unsigned &Reg); 129 bool parseCFIOperand(MachineOperand &Dest); 130 bool parseIRBlock(BasicBlock *&BB, const Function &F); 131 bool parseBlockAddressOperand(MachineOperand &Dest); 132 bool parseTargetIndexOperand(MachineOperand &Dest); 133 bool parseMachineOperand(MachineOperand &Dest); 134 135 private: 136 /// Convert the integer literal in the current token into an unsigned integer. 137 /// 138 /// Return true if an error occurred. 139 bool getUnsigned(unsigned &Result); 140 141 /// If the current token is of the given kind, consume it and return false. 142 /// Otherwise report an error and return true. 143 bool expectAndConsume(MIToken::TokenKind TokenKind); 144 145 void initNames2InstrOpCodes(); 146 147 /// Try to convert an instruction name to an opcode. Return true if the 148 /// instruction name is invalid. 149 bool parseInstrName(StringRef InstrName, unsigned &OpCode); 150 151 bool parseInstruction(unsigned &OpCode, unsigned &Flags); 152 153 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands, 154 const MCInstrDesc &MCID); 155 156 void initNames2Regs(); 157 158 /// Try to convert a register name to a register number. Return true if the 159 /// register name is invalid. 160 bool getRegisterByName(StringRef RegName, unsigned &Reg); 161 162 void initNames2RegMasks(); 163 164 /// Check if the given identifier is a name of a register mask. 165 /// 166 /// Return null if the identifier isn't a register mask. 167 const uint32_t *getRegMask(StringRef Identifier); 168 169 void initNames2SubRegIndices(); 170 171 /// Check if the given identifier is a name of a subregister index. 172 /// 173 /// Return 0 if the name isn't a subregister index class. 174 unsigned getSubRegIndex(StringRef Name); 175 176 void initSlots2BasicBlocks(); 177 178 const BasicBlock *getIRBlock(unsigned Slot); 179 180 void initNames2TargetIndices(); 181 182 /// Try to convert a name of target index to the corresponding target index. 183 /// 184 /// Return true if the name isn't a name of a target index. 185 bool getTargetIndex(StringRef Name, int &Index); 186 }; 187 188 } // end anonymous namespace 189 190 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error, 191 StringRef Source, const PerFunctionMIParsingState &PFS, 192 const SlotMapping &IRSlots) 193 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source), 194 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {} 195 196 void MIParser::lex() { 197 CurrentSource = lexMIToken( 198 CurrentSource, Token, 199 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); }); 200 } 201 202 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); } 203 204 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) { 205 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size())); 206 Error = SMDiagnostic( 207 SM, SMLoc(), 208 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1, 209 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None); 210 return true; 211 } 212 213 static const char *toString(MIToken::TokenKind TokenKind) { 214 switch (TokenKind) { 215 case MIToken::comma: 216 return "','"; 217 case MIToken::equal: 218 return "'='"; 219 case MIToken::lparen: 220 return "'('"; 221 case MIToken::rparen: 222 return "')'"; 223 default: 224 return "<unknown token>"; 225 } 226 } 227 228 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) { 229 if (Token.isNot(TokenKind)) 230 return error(Twine("expected ") + toString(TokenKind)); 231 lex(); 232 return false; 233 } 234 235 bool MIParser::parse(MachineInstr *&MI) { 236 lex(); 237 238 // Parse any register operands before '=' 239 MachineOperand MO = MachineOperand::CreateImm(0); 240 SmallVector<MachineOperandWithLocation, 8> Operands; 241 while (Token.isRegister() || Token.isRegisterFlag()) { 242 auto Loc = Token.location(); 243 if (parseRegisterOperand(MO, /*IsDef=*/true)) 244 return true; 245 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location())); 246 if (Token.isNot(MIToken::comma)) 247 break; 248 lex(); 249 } 250 if (!Operands.empty() && expectAndConsume(MIToken::equal)) 251 return true; 252 253 unsigned OpCode, Flags = 0; 254 if (Token.isError() || parseInstruction(OpCode, Flags)) 255 return true; 256 257 // TODO: Parse the bundle instruction flags and memory operands. 258 259 // Parse the remaining machine operands. 260 while (Token.isNot(MIToken::Eof) && Token.isNot(MIToken::kw_debug_location)) { 261 auto Loc = Token.location(); 262 if (parseMachineOperand(MO)) 263 return true; 264 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location())); 265 if (Token.is(MIToken::Eof)) 266 break; 267 if (Token.isNot(MIToken::comma)) 268 return error("expected ',' before the next machine operand"); 269 lex(); 270 } 271 272 DebugLoc DebugLocation; 273 if (Token.is(MIToken::kw_debug_location)) { 274 lex(); 275 if (Token.isNot(MIToken::exclaim)) 276 return error("expected a metadata node after 'debug-location'"); 277 MDNode *Node = nullptr; 278 if (parseMDNode(Node)) 279 return true; 280 DebugLocation = DebugLoc(Node); 281 } 282 283 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode); 284 if (!MCID.isVariadic()) { 285 // FIXME: Move the implicit operand verification to the machine verifier. 286 if (verifyImplicitOperands(Operands, MCID)) 287 return true; 288 } 289 290 // TODO: Check for extraneous machine operands. 291 MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true); 292 MI->setFlags(Flags); 293 for (const auto &Operand : Operands) 294 MI->addOperand(MF, Operand.Operand); 295 return false; 296 } 297 298 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) { 299 lex(); 300 if (Token.isNot(MIToken::MachineBasicBlock)) 301 return error("expected a machine basic block reference"); 302 if (parseMBBReference(MBB)) 303 return true; 304 lex(); 305 if (Token.isNot(MIToken::Eof)) 306 return error( 307 "expected end of string after the machine basic block reference"); 308 return false; 309 } 310 311 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) { 312 lex(); 313 if (Token.isNot(MIToken::NamedRegister)) 314 return error("expected a named register"); 315 if (parseRegister(Reg)) 316 return 0; 317 lex(); 318 if (Token.isNot(MIToken::Eof)) 319 return error("expected end of string after the register reference"); 320 return false; 321 } 322 323 bool MIParser::parseStandaloneVirtualRegister(unsigned &Reg) { 324 lex(); 325 if (Token.isNot(MIToken::VirtualRegister)) 326 return error("expected a virtual register"); 327 if (parseRegister(Reg)) 328 return 0; 329 lex(); 330 if (Token.isNot(MIToken::Eof)) 331 return error("expected end of string after the register reference"); 332 return false; 333 } 334 335 bool MIParser::parseStandaloneIRBlockReference(const BasicBlock *&BB) { 336 lex(); 337 if (Token.isNot(MIToken::IRBlock)) 338 return error("expected an IR block reference"); 339 unsigned SlotNumber = 0; 340 if (getUnsigned(SlotNumber)) 341 return true; 342 BB = getIRBlock(SlotNumber); 343 if (!BB) 344 return error(Twine("use of undefined IR block '%ir-block.") + 345 Twine(SlotNumber) + "'"); 346 lex(); 347 if (Token.isNot(MIToken::Eof)) 348 return error("expected end of string after the IR block reference"); 349 return false; 350 } 351 352 static const char *printImplicitRegisterFlag(const MachineOperand &MO) { 353 assert(MO.isImplicit()); 354 return MO.isDef() ? "implicit-def" : "implicit"; 355 } 356 357 static std::string getRegisterName(const TargetRegisterInfo *TRI, 358 unsigned Reg) { 359 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg"); 360 return StringRef(TRI->getName(Reg)).lower(); 361 } 362 363 bool MIParser::verifyImplicitOperands( 364 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) { 365 if (MCID.isCall()) 366 // We can't verify call instructions as they can contain arbitrary implicit 367 // register and register mask operands. 368 return false; 369 370 // Gather all the expected implicit operands. 371 SmallVector<MachineOperand, 4> ImplicitOperands; 372 if (MCID.ImplicitDefs) 373 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs) 374 ImplicitOperands.push_back( 375 MachineOperand::CreateReg(*ImpDefs, true, true)); 376 if (MCID.ImplicitUses) 377 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses) 378 ImplicitOperands.push_back( 379 MachineOperand::CreateReg(*ImpUses, false, true)); 380 381 const auto *TRI = MF.getSubtarget().getRegisterInfo(); 382 assert(TRI && "Expected target register info"); 383 size_t I = ImplicitOperands.size(), J = Operands.size(); 384 while (I) { 385 --I; 386 if (J) { 387 --J; 388 const auto &ImplicitOperand = ImplicitOperands[I]; 389 const auto &Operand = Operands[J].Operand; 390 if (ImplicitOperand.isIdenticalTo(Operand)) 391 continue; 392 if (Operand.isReg() && Operand.isImplicit()) { 393 return error(Operands[J].Begin, 394 Twine("expected an implicit register operand '") + 395 printImplicitRegisterFlag(ImplicitOperand) + " %" + 396 getRegisterName(TRI, ImplicitOperand.getReg()) + "'"); 397 } 398 } 399 // TODO: Fix source location when Operands[J].end is right before '=', i.e: 400 // insead of reporting an error at this location: 401 // %eax = MOV32r0 402 // ^ 403 // report the error at the following location: 404 // %eax = MOV32r0 405 // ^ 406 return error(J < Operands.size() ? Operands[J].End : Token.location(), 407 Twine("missing implicit register operand '") + 408 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" + 409 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'"); 410 } 411 return false; 412 } 413 414 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) { 415 if (Token.is(MIToken::kw_frame_setup)) { 416 Flags |= MachineInstr::FrameSetup; 417 lex(); 418 } 419 if (Token.isNot(MIToken::Identifier)) 420 return error("expected a machine instruction"); 421 StringRef InstrName = Token.stringValue(); 422 if (parseInstrName(InstrName, OpCode)) 423 return error(Twine("unknown machine instruction name '") + InstrName + "'"); 424 lex(); 425 return false; 426 } 427 428 bool MIParser::parseRegister(unsigned &Reg) { 429 switch (Token.kind()) { 430 case MIToken::underscore: 431 Reg = 0; 432 break; 433 case MIToken::NamedRegister: { 434 StringRef Name = Token.stringValue(); 435 if (getRegisterByName(Name, Reg)) 436 return error(Twine("unknown register name '") + Name + "'"); 437 break; 438 } 439 case MIToken::VirtualRegister: { 440 unsigned ID; 441 if (getUnsigned(ID)) 442 return true; 443 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID); 444 if (RegInfo == PFS.VirtualRegisterSlots.end()) 445 return error(Twine("use of undefined virtual register '%") + Twine(ID) + 446 "'"); 447 Reg = RegInfo->second; 448 break; 449 } 450 // TODO: Parse other register kinds. 451 default: 452 llvm_unreachable("The current token should be a register"); 453 } 454 return false; 455 } 456 457 bool MIParser::parseRegisterFlag(unsigned &Flags) { 458 switch (Token.kind()) { 459 case MIToken::kw_implicit: 460 Flags |= RegState::Implicit; 461 break; 462 case MIToken::kw_implicit_define: 463 Flags |= RegState::ImplicitDefine; 464 break; 465 case MIToken::kw_dead: 466 Flags |= RegState::Dead; 467 break; 468 case MIToken::kw_killed: 469 Flags |= RegState::Kill; 470 break; 471 case MIToken::kw_undef: 472 Flags |= RegState::Undef; 473 break; 474 // TODO: report an error when we specify the same flag more than once. 475 // TODO: parse the other register flags. 476 default: 477 llvm_unreachable("The current token should be a register flag"); 478 } 479 lex(); 480 return false; 481 } 482 483 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) { 484 assert(Token.is(MIToken::colon)); 485 lex(); 486 if (Token.isNot(MIToken::Identifier)) 487 return error("expected a subregister index after ':'"); 488 auto Name = Token.stringValue(); 489 SubReg = getSubRegIndex(Name); 490 if (!SubReg) 491 return error(Twine("use of unknown subregister index '") + Name + "'"); 492 lex(); 493 return false; 494 } 495 496 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) { 497 unsigned Reg; 498 unsigned Flags = IsDef ? RegState::Define : 0; 499 while (Token.isRegisterFlag()) { 500 if (parseRegisterFlag(Flags)) 501 return true; 502 } 503 if (!Token.isRegister()) 504 return error("expected a register after register flags"); 505 if (parseRegister(Reg)) 506 return true; 507 lex(); 508 unsigned SubReg = 0; 509 if (Token.is(MIToken::colon)) { 510 if (parseSubRegisterIndex(SubReg)) 511 return true; 512 } 513 Dest = MachineOperand::CreateReg( 514 Reg, Flags & RegState::Define, Flags & RegState::Implicit, 515 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef, 516 /*isEarlyClobber=*/false, SubReg); 517 return false; 518 } 519 520 bool MIParser::parseImmediateOperand(MachineOperand &Dest) { 521 assert(Token.is(MIToken::IntegerLiteral)); 522 const APSInt &Int = Token.integerValue(); 523 if (Int.getMinSignedBits() > 64) 524 // TODO: Replace this with an error when we can parse CIMM Machine Operands. 525 llvm_unreachable("Can't parse large integer literals yet!"); 526 Dest = MachineOperand::CreateImm(Int.getExtValue()); 527 lex(); 528 return false; 529 } 530 531 bool MIParser::getUnsigned(unsigned &Result) { 532 assert(Token.hasIntegerValue() && "Expected a token with an integer value"); 533 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1; 534 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit); 535 if (Val64 == Limit) 536 return error("expected 32-bit integer (too large)"); 537 Result = Val64; 538 return false; 539 } 540 541 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) { 542 assert(Token.is(MIToken::MachineBasicBlock)); 543 unsigned Number; 544 if (getUnsigned(Number)) 545 return true; 546 auto MBBInfo = PFS.MBBSlots.find(Number); 547 if (MBBInfo == PFS.MBBSlots.end()) 548 return error(Twine("use of undefined machine basic block #") + 549 Twine(Number)); 550 MBB = MBBInfo->second; 551 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName()) 552 return error(Twine("the name of machine basic block #") + Twine(Number) + 553 " isn't '" + Token.stringValue() + "'"); 554 return false; 555 } 556 557 bool MIParser::parseMBBOperand(MachineOperand &Dest) { 558 MachineBasicBlock *MBB; 559 if (parseMBBReference(MBB)) 560 return true; 561 Dest = MachineOperand::CreateMBB(MBB); 562 lex(); 563 return false; 564 } 565 566 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) { 567 assert(Token.is(MIToken::StackObject)); 568 unsigned ID; 569 if (getUnsigned(ID)) 570 return true; 571 auto ObjectInfo = PFS.StackObjectSlots.find(ID); 572 if (ObjectInfo == PFS.StackObjectSlots.end()) 573 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) + 574 "'"); 575 StringRef Name; 576 if (const auto *Alloca = 577 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second)) 578 Name = Alloca->getName(); 579 if (!Token.stringValue().empty() && Token.stringValue() != Name) 580 return error(Twine("the name of the stack object '%stack.") + Twine(ID) + 581 "' isn't '" + Token.stringValue() + "'"); 582 lex(); 583 Dest = MachineOperand::CreateFI(ObjectInfo->second); 584 return false; 585 } 586 587 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) { 588 assert(Token.is(MIToken::FixedStackObject)); 589 unsigned ID; 590 if (getUnsigned(ID)) 591 return true; 592 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID); 593 if (ObjectInfo == PFS.FixedStackObjectSlots.end()) 594 return error(Twine("use of undefined fixed stack object '%fixed-stack.") + 595 Twine(ID) + "'"); 596 lex(); 597 Dest = MachineOperand::CreateFI(ObjectInfo->second); 598 return false; 599 } 600 601 bool MIParser::parseGlobalValue(GlobalValue *&GV) { 602 switch (Token.kind()) { 603 case MIToken::NamedGlobalValue: 604 case MIToken::QuotedNamedGlobalValue: { 605 StringValueUtility Name(Token); 606 const Module *M = MF.getFunction()->getParent(); 607 GV = M->getNamedValue(Name); 608 if (!GV) 609 return error(Twine("use of undefined global value '@") + 610 Token.rawStringValue() + "'"); 611 break; 612 } 613 case MIToken::GlobalValue: { 614 unsigned GVIdx; 615 if (getUnsigned(GVIdx)) 616 return true; 617 if (GVIdx >= IRSlots.GlobalValues.size()) 618 return error(Twine("use of undefined global value '@") + Twine(GVIdx) + 619 "'"); 620 GV = IRSlots.GlobalValues[GVIdx]; 621 break; 622 } 623 default: 624 llvm_unreachable("The current token should be a global value"); 625 } 626 return false; 627 } 628 629 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) { 630 GlobalValue *GV = nullptr; 631 if (parseGlobalValue(GV)) 632 return true; 633 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0); 634 // TODO: Parse offset and target flags. 635 lex(); 636 return false; 637 } 638 639 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) { 640 assert(Token.is(MIToken::ConstantPoolItem)); 641 unsigned ID; 642 if (getUnsigned(ID)) 643 return true; 644 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID); 645 if (ConstantInfo == PFS.ConstantPoolSlots.end()) 646 return error("use of undefined constant '%const." + Twine(ID) + "'"); 647 lex(); 648 // TODO: Parse offset and target flags. 649 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0); 650 return false; 651 } 652 653 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) { 654 assert(Token.is(MIToken::JumpTableIndex)); 655 unsigned ID; 656 if (getUnsigned(ID)) 657 return true; 658 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID); 659 if (JumpTableEntryInfo == PFS.JumpTableSlots.end()) 660 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'"); 661 lex(); 662 // TODO: Parse target flags. 663 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second); 664 return false; 665 } 666 667 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) { 668 assert(Token.is(MIToken::ExternalSymbol) || 669 Token.is(MIToken::QuotedExternalSymbol)); 670 StringValueUtility Name(Token); 671 const char *Symbol = MF.createExternalSymbolName(Name); 672 lex(); 673 // TODO: Parse the target flags. 674 Dest = MachineOperand::CreateES(Symbol); 675 return false; 676 } 677 678 bool MIParser::parseMDNode(MDNode *&Node) { 679 assert(Token.is(MIToken::exclaim)); 680 auto Loc = Token.location(); 681 lex(); 682 if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned()) 683 return error("expected metadata id after '!'"); 684 unsigned ID; 685 if (getUnsigned(ID)) 686 return true; 687 auto NodeInfo = IRSlots.MetadataNodes.find(ID); 688 if (NodeInfo == IRSlots.MetadataNodes.end()) 689 return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'"); 690 lex(); 691 Node = NodeInfo->second.get(); 692 return false; 693 } 694 695 bool MIParser::parseMetadataOperand(MachineOperand &Dest) { 696 MDNode *Node = nullptr; 697 if (parseMDNode(Node)) 698 return true; 699 Dest = MachineOperand::CreateMetadata(Node); 700 return false; 701 } 702 703 bool MIParser::parseCFIOffset(int &Offset) { 704 if (Token.isNot(MIToken::IntegerLiteral)) 705 return error("expected a cfi offset"); 706 if (Token.integerValue().getMinSignedBits() > 32) 707 return error("expected a 32 bit integer (the cfi offset is too large)"); 708 Offset = (int)Token.integerValue().getExtValue(); 709 lex(); 710 return false; 711 } 712 713 bool MIParser::parseCFIRegister(unsigned &Reg) { 714 if (Token.isNot(MIToken::NamedRegister)) 715 return error("expected a cfi register"); 716 unsigned LLVMReg; 717 if (parseRegister(LLVMReg)) 718 return true; 719 const auto *TRI = MF.getSubtarget().getRegisterInfo(); 720 assert(TRI && "Expected target register info"); 721 int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true); 722 if (DwarfReg < 0) 723 return error("invalid DWARF register"); 724 Reg = (unsigned)DwarfReg; 725 lex(); 726 return false; 727 } 728 729 bool MIParser::parseCFIOperand(MachineOperand &Dest) { 730 auto Kind = Token.kind(); 731 lex(); 732 auto &MMI = MF.getMMI(); 733 int Offset; 734 unsigned Reg; 735 unsigned CFIIndex; 736 switch (Kind) { 737 case MIToken::kw_cfi_offset: 738 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) || 739 parseCFIOffset(Offset)) 740 return true; 741 CFIIndex = 742 MMI.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset)); 743 break; 744 case MIToken::kw_cfi_def_cfa_register: 745 if (parseCFIRegister(Reg)) 746 return true; 747 CFIIndex = 748 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, Reg)); 749 break; 750 case MIToken::kw_cfi_def_cfa_offset: 751 if (parseCFIOffset(Offset)) 752 return true; 753 // NB: MCCFIInstruction::createDefCfaOffset negates the offset. 754 CFIIndex = MMI.addFrameInst( 755 MCCFIInstruction::createDefCfaOffset(nullptr, -Offset)); 756 break; 757 case MIToken::kw_cfi_def_cfa: 758 if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) || 759 parseCFIOffset(Offset)) 760 return true; 761 // NB: MCCFIInstruction::createDefCfa negates the offset. 762 CFIIndex = 763 MMI.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset)); 764 break; 765 default: 766 // TODO: Parse the other CFI operands. 767 llvm_unreachable("The current token should be a cfi operand"); 768 } 769 Dest = MachineOperand::CreateCFIIndex(CFIIndex); 770 return false; 771 } 772 773 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) { 774 switch (Token.kind()) { 775 case MIToken::NamedIRBlock: 776 case MIToken::QuotedNamedIRBlock: { 777 StringValueUtility Name(Token); 778 BB = dyn_cast_or_null<BasicBlock>(F.getValueSymbolTable().lookup(Name)); 779 if (!BB) 780 return error(Twine("use of undefined IR block '%ir-block.") + 781 Token.rawStringValue() + "'"); 782 break; 783 } 784 case MIToken::IRBlock: { 785 unsigned SlotNumber = 0; 786 if (getUnsigned(SlotNumber)) 787 return true; 788 BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber)); 789 if (!BB) 790 return error(Twine("use of undefined IR block '%ir-block.") + 791 Twine(SlotNumber) + "'"); 792 break; 793 } 794 default: 795 llvm_unreachable("The current token should be an IR block reference"); 796 } 797 return false; 798 } 799 800 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) { 801 assert(Token.is(MIToken::kw_blockaddress)); 802 lex(); 803 if (expectAndConsume(MIToken::lparen)) 804 return true; 805 if (Token.isNot(MIToken::GlobalValue) && 806 Token.isNot(MIToken::NamedGlobalValue) && 807 Token.isNot(MIToken::QuotedNamedGlobalValue)) 808 return error("expected a global value"); 809 GlobalValue *GV = nullptr; 810 if (parseGlobalValue(GV)) 811 return true; 812 auto *F = dyn_cast<Function>(GV); 813 if (!F) 814 return error("expected an IR function reference"); 815 lex(); 816 if (expectAndConsume(MIToken::comma)) 817 return true; 818 BasicBlock *BB = nullptr; 819 if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock) && 820 Token.isNot(MIToken::QuotedNamedIRBlock)) 821 return error("expected an IR block reference"); 822 if (parseIRBlock(BB, *F)) 823 return true; 824 lex(); 825 if (expectAndConsume(MIToken::rparen)) 826 return true; 827 // TODO: parse offset and target flags. 828 Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0); 829 return false; 830 } 831 832 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) { 833 assert(Token.is(MIToken::kw_target_index)); 834 lex(); 835 if (expectAndConsume(MIToken::lparen)) 836 return true; 837 if (Token.isNot(MIToken::Identifier)) 838 return error("expected the name of the target index"); 839 int Index = 0; 840 if (getTargetIndex(Token.stringValue(), Index)) 841 return error("use of undefined target index '" + Token.stringValue() + "'"); 842 lex(); 843 if (expectAndConsume(MIToken::rparen)) 844 return true; 845 // TODO: Parse the offset and target flags. 846 Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0); 847 return false; 848 } 849 850 bool MIParser::parseMachineOperand(MachineOperand &Dest) { 851 switch (Token.kind()) { 852 case MIToken::kw_implicit: 853 case MIToken::kw_implicit_define: 854 case MIToken::kw_dead: 855 case MIToken::kw_killed: 856 case MIToken::kw_undef: 857 case MIToken::underscore: 858 case MIToken::NamedRegister: 859 case MIToken::VirtualRegister: 860 return parseRegisterOperand(Dest); 861 case MIToken::IntegerLiteral: 862 return parseImmediateOperand(Dest); 863 case MIToken::MachineBasicBlock: 864 return parseMBBOperand(Dest); 865 case MIToken::StackObject: 866 return parseStackObjectOperand(Dest); 867 case MIToken::FixedStackObject: 868 return parseFixedStackObjectOperand(Dest); 869 case MIToken::GlobalValue: 870 case MIToken::NamedGlobalValue: 871 case MIToken::QuotedNamedGlobalValue: 872 return parseGlobalAddressOperand(Dest); 873 case MIToken::ConstantPoolItem: 874 return parseConstantPoolIndexOperand(Dest); 875 case MIToken::JumpTableIndex: 876 return parseJumpTableIndexOperand(Dest); 877 case MIToken::ExternalSymbol: 878 case MIToken::QuotedExternalSymbol: 879 return parseExternalSymbolOperand(Dest); 880 case MIToken::exclaim: 881 return parseMetadataOperand(Dest); 882 case MIToken::kw_cfi_offset: 883 case MIToken::kw_cfi_def_cfa_register: 884 case MIToken::kw_cfi_def_cfa_offset: 885 case MIToken::kw_cfi_def_cfa: 886 return parseCFIOperand(Dest); 887 case MIToken::kw_blockaddress: 888 return parseBlockAddressOperand(Dest); 889 case MIToken::kw_target_index: 890 return parseTargetIndexOperand(Dest); 891 case MIToken::Error: 892 return true; 893 case MIToken::Identifier: 894 if (const auto *RegMask = getRegMask(Token.stringValue())) { 895 Dest = MachineOperand::CreateRegMask(RegMask); 896 lex(); 897 break; 898 } 899 // fallthrough 900 default: 901 // TODO: parse the other machine operands. 902 return error("expected a machine operand"); 903 } 904 return false; 905 } 906 907 void MIParser::initNames2InstrOpCodes() { 908 if (!Names2InstrOpCodes.empty()) 909 return; 910 const auto *TII = MF.getSubtarget().getInstrInfo(); 911 assert(TII && "Expected target instruction info"); 912 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I) 913 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I)); 914 } 915 916 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) { 917 initNames2InstrOpCodes(); 918 auto InstrInfo = Names2InstrOpCodes.find(InstrName); 919 if (InstrInfo == Names2InstrOpCodes.end()) 920 return true; 921 OpCode = InstrInfo->getValue(); 922 return false; 923 } 924 925 void MIParser::initNames2Regs() { 926 if (!Names2Regs.empty()) 927 return; 928 // The '%noreg' register is the register 0. 929 Names2Regs.insert(std::make_pair("noreg", 0)); 930 const auto *TRI = MF.getSubtarget().getRegisterInfo(); 931 assert(TRI && "Expected target register info"); 932 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) { 933 bool WasInserted = 934 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I)) 935 .second; 936 (void)WasInserted; 937 assert(WasInserted && "Expected registers to be unique case-insensitively"); 938 } 939 } 940 941 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) { 942 initNames2Regs(); 943 auto RegInfo = Names2Regs.find(RegName); 944 if (RegInfo == Names2Regs.end()) 945 return true; 946 Reg = RegInfo->getValue(); 947 return false; 948 } 949 950 void MIParser::initNames2RegMasks() { 951 if (!Names2RegMasks.empty()) 952 return; 953 const auto *TRI = MF.getSubtarget().getRegisterInfo(); 954 assert(TRI && "Expected target register info"); 955 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks(); 956 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames(); 957 assert(RegMasks.size() == RegMaskNames.size()); 958 for (size_t I = 0, E = RegMasks.size(); I < E; ++I) 959 Names2RegMasks.insert( 960 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I])); 961 } 962 963 const uint32_t *MIParser::getRegMask(StringRef Identifier) { 964 initNames2RegMasks(); 965 auto RegMaskInfo = Names2RegMasks.find(Identifier); 966 if (RegMaskInfo == Names2RegMasks.end()) 967 return nullptr; 968 return RegMaskInfo->getValue(); 969 } 970 971 void MIParser::initNames2SubRegIndices() { 972 if (!Names2SubRegIndices.empty()) 973 return; 974 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); 975 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I) 976 Names2SubRegIndices.insert( 977 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I)); 978 } 979 980 unsigned MIParser::getSubRegIndex(StringRef Name) { 981 initNames2SubRegIndices(); 982 auto SubRegInfo = Names2SubRegIndices.find(Name); 983 if (SubRegInfo == Names2SubRegIndices.end()) 984 return 0; 985 return SubRegInfo->getValue(); 986 } 987 988 void MIParser::initSlots2BasicBlocks() { 989 if (!Slots2BasicBlocks.empty()) 990 return; 991 const auto &F = *MF.getFunction(); 992 ModuleSlotTracker MST(F.getParent()); 993 MST.incorporateFunction(F); 994 for (auto &BB : F) { 995 if (BB.hasName()) 996 continue; 997 int Slot = MST.getLocalSlot(&BB); 998 if (Slot == -1) 999 continue; 1000 Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB)); 1001 } 1002 } 1003 1004 const BasicBlock *MIParser::getIRBlock(unsigned Slot) { 1005 initSlots2BasicBlocks(); 1006 auto BlockInfo = Slots2BasicBlocks.find(Slot); 1007 if (BlockInfo == Slots2BasicBlocks.end()) 1008 return nullptr; 1009 return BlockInfo->second; 1010 } 1011 1012 void MIParser::initNames2TargetIndices() { 1013 if (!Names2TargetIndices.empty()) 1014 return; 1015 const auto *TII = MF.getSubtarget().getInstrInfo(); 1016 assert(TII && "Expected target instruction info"); 1017 auto Indices = TII->getSerializableTargetIndices(); 1018 for (const auto &I : Indices) 1019 Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first)); 1020 } 1021 1022 bool MIParser::getTargetIndex(StringRef Name, int &Index) { 1023 initNames2TargetIndices(); 1024 auto IndexInfo = Names2TargetIndices.find(Name); 1025 if (IndexInfo == Names2TargetIndices.end()) 1026 return true; 1027 Index = IndexInfo->second; 1028 return false; 1029 } 1030 1031 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM, 1032 MachineFunction &MF, StringRef Src, 1033 const PerFunctionMIParsingState &PFS, 1034 const SlotMapping &IRSlots, SMDiagnostic &Error) { 1035 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI); 1036 } 1037 1038 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM, 1039 MachineFunction &MF, StringRef Src, 1040 const PerFunctionMIParsingState &PFS, 1041 const SlotMapping &IRSlots, SMDiagnostic &Error) { 1042 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseStandaloneMBB(MBB); 1043 } 1044 1045 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM, 1046 MachineFunction &MF, StringRef Src, 1047 const PerFunctionMIParsingState &PFS, 1048 const SlotMapping &IRSlots, 1049 SMDiagnostic &Error) { 1050 return MIParser(SM, MF, Error, Src, PFS, IRSlots) 1051 .parseStandaloneNamedRegister(Reg); 1052 } 1053 1054 bool llvm::parseVirtualRegisterReference(unsigned &Reg, SourceMgr &SM, 1055 MachineFunction &MF, StringRef Src, 1056 const PerFunctionMIParsingState &PFS, 1057 const SlotMapping &IRSlots, 1058 SMDiagnostic &Error) { 1059 return MIParser(SM, MF, Error, Src, PFS, IRSlots) 1060 .parseStandaloneVirtualRegister(Reg); 1061 } 1062 1063 bool llvm::parseIRBlockReference(const BasicBlock *&BB, SourceMgr &SM, 1064 MachineFunction &MF, StringRef Src, 1065 const PerFunctionMIParsingState &PFS, 1066 const SlotMapping &IRSlots, 1067 SMDiagnostic &Error) { 1068 return MIParser(SM, MF, Error, Src, PFS, IRSlots) 1069 .parseStandaloneIRBlockReference(BB); 1070 } 1071