1 //===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the LivePhysRegs utility for tracking liveness of
11 // physical registers across machine instructions in forward or backward order.
12 // A more detailed description can be found in the corresponding header file.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "llvm/CodeGen/LivePhysRegs.h"
17 #include "llvm/CodeGen/MachineInstrBundle.h"
18 #include "llvm/Support/Debug.h"
19 #include "llvm/Support/raw_ostream.h"
20 using namespace llvm;
21 
22 
23 /// \brief Remove all registers from the set that get clobbered by the register
24 /// mask.
25 /// The clobbers set will be the list of live registers clobbered
26 /// by the regmask.
27 void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
28         SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
29   SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
30   while (LRI != LiveRegs.end()) {
31     if (MO.clobbersPhysReg(*LRI)) {
32       if (Clobbers)
33         Clobbers->push_back(std::make_pair(*LRI, &MO));
34       LRI = LiveRegs.erase(LRI);
35     } else
36       ++LRI;
37   }
38 }
39 
40 /// Simulates liveness when stepping backwards over an instruction(bundle):
41 /// Remove Defs, add uses. This is the recommended way of calculating liveness.
42 void LivePhysRegs::stepBackward(const MachineInstr &MI) {
43   // Remove defined registers and regmask kills from the set.
44   for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
45     if (O->isReg()) {
46       if (!O->isDef())
47         continue;
48       unsigned Reg = O->getReg();
49       if (Reg == 0)
50         continue;
51       removeReg(Reg);
52     } else if (O->isRegMask())
53       removeRegsInMask(*O, nullptr);
54   }
55 
56   // Add uses to the set.
57   for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
58     if (!O->isReg() || !O->readsReg() || O->isUndef())
59       continue;
60     unsigned Reg = O->getReg();
61     if (Reg == 0)
62       continue;
63     addReg(Reg);
64   }
65 }
66 
67 /// Simulates liveness when stepping forward over an instruction(bundle): Remove
68 /// killed-uses, add defs. This is the not recommended way, because it depends
69 /// on accurate kill flags. If possible use stepBackwards() instead of this
70 /// function.
71 void LivePhysRegs::stepForward(const MachineInstr &MI,
72         SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
73   // Remove killed registers from the set.
74   for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) {
75     if (O->isReg()) {
76       unsigned Reg = O->getReg();
77       if (Reg == 0)
78         continue;
79       if (O->isDef()) {
80         if (!O->isDead())
81           Clobbers.push_back(std::make_pair(Reg, &*O));
82       } else {
83         if (!O->isKill())
84           continue;
85         assert(O->isUse());
86         removeReg(Reg);
87       }
88     } else if (O->isRegMask())
89       removeRegsInMask(*O, &Clobbers);
90   }
91 
92   // Add defs to the set.
93   for (auto Reg : Clobbers)
94     addReg(Reg.first);
95 }
96 
97 /// Prin the currently live registers to OS.
98 void LivePhysRegs::print(raw_ostream &OS) const {
99   OS << "Live Registers:";
100   if (!TRI) {
101     OS << " (uninitialized)\n";
102     return;
103   }
104 
105   if (empty()) {
106     OS << " (empty)\n";
107     return;
108   }
109 
110   for (const_iterator I = begin(), E = end(); I != E; ++I)
111     OS << " " << PrintReg(*I, TRI);
112   OS << "\n";
113 }
114 
115 /// Dumps the currently live registers to the debug output.
116 void LivePhysRegs::dump() const {
117 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
118   dbgs() << "  " << *this;
119 #endif
120 }
121