1 //===-- LiveIntervals.cpp - Live Interval Analysis ------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file was developed by the LLVM research group and is distributed under 6 // the University of Illinois Open Source License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the LiveInterval analysis pass which is used 11 // by the Linear Scan Register allocator. This pass linearizes the 12 // basic blocks of the function in DFS order and uses the 13 // LiveVariables pass to conservatively compute live intervals for 14 // each virtual and physical register. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #define DEBUG_TYPE "liveintervals" 19 #include "LiveIntervals.h" 20 #include "llvm/Value.h" 21 #include "llvm/Analysis/LoopInfo.h" 22 #include "llvm/CodeGen/LiveVariables.h" 23 #include "llvm/CodeGen/MachineFrameInfo.h" 24 #include "llvm/CodeGen/MachineInstr.h" 25 #include "llvm/CodeGen/Passes.h" 26 #include "llvm/CodeGen/SSARegMap.h" 27 #include "llvm/Target/MRegisterInfo.h" 28 #include "llvm/Target/TargetInstrInfo.h" 29 #include "llvm/Target/TargetMachine.h" 30 #include "Support/CommandLine.h" 31 #include "Support/Debug.h" 32 #include "Support/Statistic.h" 33 #include "Support/STLExtras.h" 34 #include "VirtRegMap.h" 35 #include <cmath> 36 #include <iostream> 37 38 using namespace llvm; 39 40 namespace { 41 RegisterAnalysis<LiveIntervals> X("liveintervals", 42 "Live Interval Analysis"); 43 44 Statistic<> numIntervals 45 ("liveintervals", "Number of original intervals"); 46 47 Statistic<> numIntervalsAfter 48 ("liveintervals", "Number of intervals after coalescing"); 49 50 Statistic<> numJoins 51 ("liveintervals", "Number of interval joins performed"); 52 53 Statistic<> numPeep 54 ("liveintervals", "Number of identity moves eliminated after coalescing"); 55 56 Statistic<> numFolded 57 ("liveintervals", "Number of loads/stores folded into instructions"); 58 59 cl::opt<bool> 60 join("join-liveintervals", 61 cl::desc("Join compatible live intervals"), 62 cl::init(true)); 63 }; 64 65 void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const 66 { 67 AU.addPreserved<LiveVariables>(); 68 AU.addRequired<LiveVariables>(); 69 AU.addPreservedID(PHIEliminationID); 70 AU.addRequiredID(PHIEliminationID); 71 AU.addRequiredID(TwoAddressInstructionPassID); 72 AU.addRequired<LoopInfo>(); 73 MachineFunctionPass::getAnalysisUsage(AU); 74 } 75 76 void LiveIntervals::releaseMemory() 77 { 78 mbbi2mbbMap_.clear(); 79 mi2iMap_.clear(); 80 i2miMap_.clear(); 81 r2iMap_.clear(); 82 r2rMap_.clear(); 83 intervals_.clear(); 84 } 85 86 87 /// runOnMachineFunction - Register allocate the whole function 88 /// 89 bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) { 90 mf_ = &fn; 91 tm_ = &fn.getTarget(); 92 mri_ = tm_->getRegisterInfo(); 93 lv_ = &getAnalysis<LiveVariables>(); 94 95 // number MachineInstrs 96 unsigned miIndex = 0; 97 for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end(); 98 mbb != mbbEnd; ++mbb) { 99 unsigned mbbIdx = lv_->getMachineBasicBlockIndex(mbb); 100 bool inserted = mbbi2mbbMap_.insert(std::make_pair(mbbIdx, 101 mbb)).second; 102 assert(inserted && "multiple index -> MachineBasicBlock"); 103 104 for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end(); 105 mi != miEnd; ++mi) { 106 inserted = mi2iMap_.insert(std::make_pair(mi, miIndex)).second; 107 assert(inserted && "multiple MachineInstr -> index mappings"); 108 i2miMap_.push_back(mi); 109 miIndex += InstrSlots::NUM; 110 } 111 } 112 113 computeIntervals(); 114 115 numIntervals += intervals_.size(); 116 117 // join intervals if requested 118 if (join) joinIntervals(); 119 120 numIntervalsAfter += intervals_.size(); 121 122 // perform a final pass over the instructions and compute spill 123 // weights, coalesce virtual registers and remove identity moves 124 const LoopInfo& loopInfo = getAnalysis<LoopInfo>(); 125 const TargetInstrInfo& tii = tm_->getInstrInfo(); 126 127 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); 128 mbbi != mbbe; ++mbbi) { 129 MachineBasicBlock* mbb = mbbi; 130 unsigned loopDepth = loopInfo.getLoopDepth(mbb->getBasicBlock()); 131 132 for (MachineBasicBlock::iterator mii = mbb->begin(), mie = mbb->end(); 133 mii != mie; ) { 134 // if the move will be an identity move delete it 135 unsigned srcReg, dstReg; 136 if (tii.isMoveInstr(*mii, srcReg, dstReg) && 137 rep(srcReg) == rep(dstReg)) { 138 // remove from def list 139 Interval& interval = getOrCreateInterval(rep(dstReg)); 140 unsigned defIndex = getInstructionIndex(mii); 141 Interval::Defs::iterator d = std::lower_bound( 142 interval.defs.begin(), interval.defs.end(), defIndex); 143 assert(*d == defIndex && "Def index not found in def list!"); 144 interval.defs.erase(d); 145 // remove index -> MachineInstr and 146 // MachineInstr -> index mappings 147 Mi2IndexMap::iterator mi2i = mi2iMap_.find(mii); 148 if (mi2i != mi2iMap_.end()) { 149 i2miMap_[mi2i->second/InstrSlots::NUM] = 0; 150 mi2iMap_.erase(mi2i); 151 } 152 mii = mbbi->erase(mii); 153 ++numPeep; 154 } 155 else { 156 for (unsigned i = 0; i < mii->getNumOperands(); ++i) { 157 const MachineOperand& mop = mii->getOperand(i); 158 if (mop.isRegister() && mop.getReg() && 159 MRegisterInfo::isVirtualRegister(mop.getReg())) { 160 // replace register with representative register 161 unsigned reg = rep(mop.getReg()); 162 mii->SetMachineOperandReg(i, reg); 163 164 Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg); 165 assert(r2iit != r2iMap_.end()); 166 r2iit->second->weight += 167 (mop.isUse() + mop.isDef()) * pow(10.0F, loopDepth); 168 } 169 } 170 ++mii; 171 } 172 } 173 } 174 175 intervals_.sort(StartPointComp()); 176 DEBUG(std::cerr << "********** INTERVALS **********\n"); 177 DEBUG(std::copy(intervals_.begin(), intervals_.end(), 178 std::ostream_iterator<Interval>(std::cerr, "\n"))); 179 DEBUG(std::cerr << "********** MACHINEINSTRS **********\n"); 180 DEBUG( 181 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); 182 mbbi != mbbe; ++mbbi) { 183 std::cerr << ((Value*)mbbi->getBasicBlock())->getName() << ":\n"; 184 for (MachineBasicBlock::iterator mii = mbbi->begin(), 185 mie = mbbi->end(); mii != mie; ++mii) { 186 std::cerr << getInstructionIndex(mii) << '\t'; 187 mii->print(std::cerr, *tm_); 188 } 189 }); 190 191 return true; 192 } 193 194 void LiveIntervals::updateSpilledInterval(Interval& li, 195 VirtRegMap& vrm, 196 int slot) 197 { 198 assert(li.weight != HUGE_VAL && 199 "attempt to spill already spilled interval!"); 200 Interval::Ranges oldRanges; 201 swap(oldRanges, li.ranges); 202 203 DEBUG(std::cerr << "\t\t\t\tupdating interval: " << li); 204 205 for (Interval::Ranges::iterator i = oldRanges.begin(), e = oldRanges.end(); 206 i != e; ++i) { 207 unsigned index = getBaseIndex(i->first); 208 unsigned end = getBaseIndex(i->second-1) + InstrSlots::NUM; 209 for (; index < end; index += InstrSlots::NUM) { 210 // skip deleted instructions 211 while (!getInstructionFromIndex(index)) index += InstrSlots::NUM; 212 MachineBasicBlock::iterator mi = getInstructionFromIndex(index); 213 214 for_operand: 215 for (unsigned i = 0; i < mi->getNumOperands(); ++i) { 216 MachineOperand& mop = mi->getOperand(i); 217 if (mop.isRegister() && mop.getReg() == li.reg) { 218 if (MachineInstr* fmi = 219 mri_->foldMemoryOperand(mi, i, slot)) { 220 lv_->instructionChanged(mi, fmi); 221 vrm.virtFolded(li.reg, mi, fmi); 222 mi2iMap_.erase(mi); 223 i2miMap_[index/InstrSlots::NUM] = fmi; 224 mi2iMap_[fmi] = index; 225 MachineBasicBlock& mbb = *mi->getParent(); 226 mi = mbb.insert(mbb.erase(mi), fmi); 227 ++numFolded; 228 goto for_operand; 229 } 230 else { 231 // This is tricky. We need to add information in 232 // the interval about the spill code so we have to 233 // use our extra load/store slots. 234 // 235 // If we have a use we are going to have a load so 236 // we start the interval from the load slot 237 // onwards. Otherwise we start from the def slot. 238 unsigned start = (mop.isUse() ? 239 getLoadIndex(index) : 240 getDefIndex(index)); 241 // If we have a def we are going to have a store 242 // right after it so we end the interval after the 243 // use of the next instruction. Otherwise we end 244 // after the use of this instruction. 245 unsigned end = 1 + (mop.isDef() ? 246 getUseIndex(index+InstrSlots::NUM) : 247 getUseIndex(index)); 248 li.addRange(start, end); 249 } 250 } 251 } 252 } 253 } 254 // the new spill weight is now infinity as it cannot be spilled again 255 li.weight = HUGE_VAL; 256 DEBUG(std::cerr << '\n'); 257 DEBUG(std::cerr << "\t\t\t\tupdated interval: " << li << '\n'); 258 } 259 260 void LiveIntervals::printRegName(unsigned reg) const 261 { 262 if (MRegisterInfo::isPhysicalRegister(reg)) 263 std::cerr << mri_->getName(reg); 264 else 265 std::cerr << "%reg" << reg; 266 } 267 268 void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb, 269 MachineBasicBlock::iterator mi, 270 Interval& interval) 271 { 272 DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg)); 273 LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg); 274 275 // iterate over all of the blocks that the variable is completely 276 // live in, adding them to the live interval. obviously we only 277 // need to do this once. 278 if (interval.empty()) { 279 for (unsigned i = 0, e = vi.AliveBlocks.size(); i != e; ++i) { 280 if (vi.AliveBlocks[i]) { 281 MachineBasicBlock* mbb = lv_->getIndexMachineBasicBlock(i); 282 if (!mbb->empty()) { 283 interval.addRange( 284 getInstructionIndex(&mbb->front()), 285 getInstructionIndex(&mbb->back()) + InstrSlots::NUM); 286 } 287 } 288 } 289 } 290 291 unsigned baseIndex = getInstructionIndex(mi); 292 interval.defs.push_back(baseIndex); 293 294 bool killedInDefiningBasicBlock = false; 295 for (int i = 0, e = vi.Kills.size(); i != e; ++i) { 296 MachineBasicBlock* killerBlock = vi.Kills[i].first; 297 MachineInstr* killerInstr = vi.Kills[i].second; 298 unsigned start = (mbb == killerBlock ? 299 getDefIndex(baseIndex) : 300 getInstructionIndex(&killerBlock->front())); 301 unsigned end = (killerInstr == mi ? 302 // dead 303 start + 1 : 304 // killed 305 getUseIndex(getInstructionIndex(killerInstr))+1); 306 // we do not want to add invalid ranges. these can happen when 307 // a variable has its latest use and is redefined later on in 308 // the same basic block (common with variables introduced by 309 // PHI elimination) 310 if (start < end) { 311 killedInDefiningBasicBlock |= mbb == killerBlock; 312 interval.addRange(start, end); 313 } 314 } 315 316 if (!killedInDefiningBasicBlock) { 317 unsigned end = getInstructionIndex(&mbb->back()) + InstrSlots::NUM; 318 interval.addRange(getDefIndex(baseIndex), end); 319 } 320 DEBUG(std::cerr << '\n'); 321 } 322 323 void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb, 324 MachineBasicBlock::iterator mi, 325 Interval& interval) 326 { 327 DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg)); 328 typedef LiveVariables::killed_iterator KillIter; 329 330 MachineBasicBlock::iterator e = mbb->end(); 331 unsigned baseIndex = getInstructionIndex(mi); 332 interval.defs.push_back(baseIndex); 333 unsigned start = getDefIndex(baseIndex); 334 unsigned end = start; 335 336 // a variable can be dead by the instruction defining it 337 for (KillIter ki = lv_->dead_begin(mi), ke = lv_->dead_end(mi); 338 ki != ke; ++ki) { 339 if (interval.reg == ki->second) { 340 DEBUG(std::cerr << " dead"); 341 end = getDefIndex(start) + 1; 342 goto exit; 343 } 344 } 345 346 // a variable can only be killed by subsequent instructions 347 do { 348 ++mi; 349 baseIndex += InstrSlots::NUM; 350 for (KillIter ki = lv_->killed_begin(mi), ke = lv_->killed_end(mi); 351 ki != ke; ++ki) { 352 if (interval.reg == ki->second) { 353 DEBUG(std::cerr << " killed"); 354 end = getUseIndex(baseIndex) + 1; 355 goto exit; 356 } 357 } 358 } while (mi != e); 359 360 exit: 361 assert(start < end && "did not find end of interval?"); 362 interval.addRange(start, end); 363 DEBUG(std::cerr << '\n'); 364 } 365 366 void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb, 367 MachineBasicBlock::iterator mi, 368 unsigned reg) 369 { 370 if (MRegisterInfo::isPhysicalRegister(reg)) { 371 if (lv_->getAllocatablePhysicalRegisters()[reg]) { 372 handlePhysicalRegisterDef(mbb, mi, getOrCreateInterval(reg)); 373 for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as) 374 handlePhysicalRegisterDef(mbb, mi, getOrCreateInterval(*as)); 375 } 376 } 377 else 378 handleVirtualRegisterDef(mbb, mi, getOrCreateInterval(reg)); 379 } 380 381 unsigned LiveIntervals::getInstructionIndex(MachineInstr* instr) const 382 { 383 Mi2IndexMap::const_iterator it = mi2iMap_.find(instr); 384 return (it == mi2iMap_.end() ? 385 std::numeric_limits<unsigned>::max() : 386 it->second); 387 } 388 389 MachineInstr* LiveIntervals::getInstructionFromIndex(unsigned index) const 390 { 391 index /= InstrSlots::NUM; // convert index to vector index 392 assert(index < i2miMap_.size() && 393 "index does not correspond to an instruction"); 394 return i2miMap_[index]; 395 } 396 397 /// computeIntervals - computes the live intervals for virtual 398 /// registers. for some ordering of the machine instructions [1,N] a 399 /// live interval is an interval [i, j) where 1 <= i <= j < N for 400 /// which a variable is live 401 void LiveIntervals::computeIntervals() 402 { 403 DEBUG(std::cerr << "********** COMPUTING LIVE INTERVALS **********\n"); 404 DEBUG(std::cerr << "********** Function: " 405 << ((Value*)mf_->getFunction())->getName() << '\n'); 406 407 for (MbbIndex2MbbMap::iterator 408 it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end(); 409 it != itEnd; ++it) { 410 MachineBasicBlock* mbb = it->second; 411 DEBUG(std::cerr << ((Value*)mbb->getBasicBlock())->getName() << ":\n"); 412 413 for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end(); 414 mi != miEnd; ++mi) { 415 const TargetInstrDescriptor& tid = 416 tm_->getInstrInfo().get(mi->getOpcode()); 417 DEBUG(std::cerr << getInstructionIndex(mi) << "\t"; 418 mi->print(std::cerr, *tm_)); 419 420 // handle implicit defs 421 for (const unsigned* id = tid.ImplicitDefs; *id; ++id) 422 handleRegisterDef(mbb, mi, *id); 423 424 // handle explicit defs 425 for (int i = mi->getNumOperands() - 1; i >= 0; --i) { 426 MachineOperand& mop = mi->getOperand(i); 427 // handle register defs - build intervals 428 if (mop.isRegister() && mop.getReg() && mop.isDef()) 429 handleRegisterDef(mbb, mi, mop.getReg()); 430 } 431 } 432 } 433 } 434 435 unsigned LiveIntervals::rep(unsigned reg) 436 { 437 Reg2RegMap::iterator it = r2rMap_.find(reg); 438 if (it != r2rMap_.end()) 439 return it->second = rep(it->second); 440 return reg; 441 } 442 443 void LiveIntervals::joinIntervals() 444 { 445 DEBUG(std::cerr << "********** JOINING INTERVALS ***********\n"); 446 447 const TargetInstrInfo& tii = tm_->getInstrInfo(); 448 449 for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end(); 450 mbbi != mbbe; ++mbbi) { 451 MachineBasicBlock* mbb = mbbi; 452 DEBUG(std::cerr << ((Value*)mbb->getBasicBlock())->getName() << ":\n"); 453 454 for (MachineBasicBlock::iterator mi = mbb->begin(), mie = mbb->end(); 455 mi != mie; ++mi) { 456 const TargetInstrDescriptor& tid = 457 tm_->getInstrInfo().get(mi->getOpcode()); 458 DEBUG(std::cerr << getInstructionIndex(mi) << '\t'; 459 mi->print(std::cerr, *tm_);); 460 461 // we only join virtual registers with allocatable 462 // physical registers since we do not have liveness information 463 // on not allocatable physical registers 464 unsigned regA, regB; 465 if (tii.isMoveInstr(*mi, regA, regB) && 466 (MRegisterInfo::isVirtualRegister(regA) || 467 lv_->getAllocatablePhysicalRegisters()[regA]) && 468 (MRegisterInfo::isVirtualRegister(regB) || 469 lv_->getAllocatablePhysicalRegisters()[regB])) { 470 471 // get representative registers 472 regA = rep(regA); 473 regB = rep(regB); 474 475 // if they are already joined we continue 476 if (regA == regB) 477 continue; 478 479 Reg2IntervalMap::iterator r2iA = r2iMap_.find(regA); 480 assert(r2iA != r2iMap_.end()); 481 Reg2IntervalMap::iterator r2iB = r2iMap_.find(regB); 482 assert(r2iB != r2iMap_.end()); 483 484 Intervals::iterator intA = r2iA->second; 485 Intervals::iterator intB = r2iB->second; 486 487 // both A and B are virtual registers 488 if (MRegisterInfo::isVirtualRegister(intA->reg) && 489 MRegisterInfo::isVirtualRegister(intB->reg)) { 490 491 const TargetRegisterClass *rcA, *rcB; 492 rcA = mf_->getSSARegMap()->getRegClass(intA->reg); 493 rcB = mf_->getSSARegMap()->getRegClass(intB->reg); 494 assert(rcA == rcB && "registers must be of the same class"); 495 496 // if their intervals do not overlap we join them 497 if (!intB->overlaps(*intA)) { 498 intA->join(*intB); 499 r2iB->second = r2iA->second; 500 r2rMap_.insert(std::make_pair(intB->reg, intA->reg)); 501 intervals_.erase(intB); 502 } 503 } 504 else if (MRegisterInfo::isPhysicalRegister(intA->reg) ^ 505 MRegisterInfo::isPhysicalRegister(intB->reg)) { 506 if (MRegisterInfo::isPhysicalRegister(intB->reg)) { 507 std::swap(regA, regB); 508 std::swap(intA, intB); 509 std::swap(r2iA, r2iB); 510 } 511 512 assert(MRegisterInfo::isPhysicalRegister(intA->reg) && 513 MRegisterInfo::isVirtualRegister(intB->reg) && 514 "A must be physical and B must be virtual"); 515 516 if (!intA->overlaps(*intB) && 517 !overlapsAliases(*intA, *intB)) { 518 intA->join(*intB); 519 r2iB->second = r2iA->second; 520 r2rMap_.insert(std::make_pair(intB->reg, intA->reg)); 521 intervals_.erase(intB); 522 } 523 } 524 } 525 } 526 } 527 } 528 529 bool LiveIntervals::overlapsAliases(const Interval& lhs, 530 const Interval& rhs) const 531 { 532 assert(MRegisterInfo::isPhysicalRegister(lhs.reg) && 533 "first interval must describe a physical register"); 534 535 for (const unsigned* as = mri_->getAliasSet(lhs.reg); *as; ++as) { 536 Reg2IntervalMap::const_iterator r2i = r2iMap_.find(*as); 537 assert(r2i != r2iMap_.end() && "alias does not have interval?"); 538 if (rhs.overlaps(*r2i->second)) 539 return true; 540 } 541 542 return false; 543 } 544 545 LiveIntervals::Interval& LiveIntervals::getOrCreateInterval(unsigned reg) 546 { 547 Reg2IntervalMap::iterator r2iit = r2iMap_.lower_bound(reg); 548 if (r2iit == r2iMap_.end() || r2iit->first != reg) { 549 intervals_.push_back(Interval(reg)); 550 r2iit = r2iMap_.insert(r2iit, std::make_pair(reg, --intervals_.end())); 551 } 552 553 return *r2iit->second; 554 } 555 556 LiveIntervals::Interval::Interval(unsigned r) 557 : reg(r), 558 weight((MRegisterInfo::isPhysicalRegister(r) ? HUGE_VAL : 0.0F)) 559 { 560 } 561 562 bool LiveIntervals::Interval::spilled() const 563 { 564 return (weight == HUGE_VAL && 565 MRegisterInfo::isVirtualRegister(reg)); 566 } 567 568 // An example for liveAt(): 569 // 570 // this = [1,4), liveAt(0) will return false. The instruction defining 571 // this spans slots [0,3]. The interval belongs to an spilled 572 // definition of the variable it represents. This is because slot 1 is 573 // used (def slot) and spans up to slot 3 (store slot). 574 // 575 bool LiveIntervals::Interval::liveAt(unsigned index) const 576 { 577 Range dummy(index, index+1); 578 Ranges::const_iterator r = std::upper_bound(ranges.begin(), 579 ranges.end(), 580 dummy); 581 if (r == ranges.begin()) 582 return false; 583 584 --r; 585 return index >= r->first && index < r->second; 586 } 587 588 // An example for overlaps(): 589 // 590 // 0: A = ... 591 // 4: B = ... 592 // 8: C = A + B ;; last use of A 593 // 594 // The live intervals should look like: 595 // 596 // A = [3, 11) 597 // B = [7, x) 598 // C = [11, y) 599 // 600 // A->overlaps(C) should return false since we want to be able to join 601 // A and C. 602 bool LiveIntervals::Interval::overlaps(const Interval& other) const 603 { 604 Ranges::const_iterator i = ranges.begin(); 605 Ranges::const_iterator ie = ranges.end(); 606 Ranges::const_iterator j = other.ranges.begin(); 607 Ranges::const_iterator je = other.ranges.end(); 608 if (i->first < j->first) { 609 i = std::upper_bound(i, ie, *j); 610 if (i != ranges.begin()) --i; 611 } 612 else if (j->first < i->first) { 613 j = std::upper_bound(j, je, *i); 614 if (j != other.ranges.begin()) --j; 615 } 616 617 while (i != ie && j != je) { 618 if (i->first == j->first) { 619 return true; 620 } 621 else { 622 if (i->first > j->first) { 623 swap(i, j); 624 swap(ie, je); 625 } 626 assert(i->first < j->first); 627 628 if (i->second > j->first) { 629 return true; 630 } 631 else { 632 ++i; 633 } 634 } 635 } 636 637 return false; 638 } 639 640 void LiveIntervals::Interval::addRange(unsigned start, unsigned end) 641 { 642 assert(start < end && "Invalid range to add!"); 643 DEBUG(std::cerr << " +[" << start << ',' << end << ")"); 644 //assert(start < end && "invalid range?"); 645 Range range = std::make_pair(start, end); 646 Ranges::iterator it = 647 ranges.insert(std::upper_bound(ranges.begin(), ranges.end(), range), 648 range); 649 650 it = mergeRangesForward(it); 651 it = mergeRangesBackward(it); 652 } 653 654 void LiveIntervals::Interval::join(const LiveIntervals::Interval& other) 655 { 656 DEBUG(std::cerr << "\t\tjoining " << *this << " with " << other << '\n'); 657 Ranges::iterator cur = ranges.begin(); 658 659 for (Ranges::const_iterator i = other.ranges.begin(), 660 e = other.ranges.end(); i != e; ++i) { 661 cur = ranges.insert(std::upper_bound(cur, ranges.end(), *i), *i); 662 cur = mergeRangesForward(cur); 663 cur = mergeRangesBackward(cur); 664 } 665 weight += other.weight; 666 Defs u; 667 std::set_union(defs.begin(), defs.end(), 668 other.defs.begin(), other.defs.end(), 669 std::back_inserter(u)); 670 defs = u; 671 ++numJoins; 672 } 673 674 LiveIntervals::Interval::Ranges::iterator 675 LiveIntervals::Interval::mergeRangesForward(Ranges::iterator it) 676 { 677 Ranges::iterator n; 678 while ((n = next(it)) != ranges.end()) { 679 if (n->first > it->second) 680 break; 681 it->second = std::max(it->second, n->second); 682 n = ranges.erase(n); 683 } 684 return it; 685 } 686 687 LiveIntervals::Interval::Ranges::iterator 688 LiveIntervals::Interval::mergeRangesBackward(Ranges::iterator it) 689 { 690 while (it != ranges.begin()) { 691 Ranges::iterator p = prior(it); 692 if (it->first > p->second) 693 break; 694 695 it->first = std::min(it->first, p->first); 696 it->second = std::max(it->second, p->second); 697 it = ranges.erase(p); 698 } 699 700 return it; 701 } 702 703 std::ostream& llvm::operator<<(std::ostream& os, 704 const LiveIntervals::Interval& li) 705 { 706 os << "%reg" << li.reg << ',' << li.weight; 707 if (li.empty()) 708 return os << "EMPTY"; 709 710 os << " {" << li.defs.front(); 711 for (LiveIntervals::Interval::Defs::const_iterator 712 i = next(li.defs.begin()), e = li.defs.end(); i != e; ++i) 713 os << "," << *i; 714 os << "}"; 715 716 os << " = "; 717 for (LiveIntervals::Interval::Ranges::const_iterator 718 i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) { 719 os << "[" << i->first << "," << i->second << ")"; 720 } 721 return os; 722 } 723