1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the LLVMTargetMachine class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Target/TargetMachine.h" 15 #include "llvm/Analysis/Passes.h" 16 #include "llvm/CodeGen/AsmPrinter.h" 17 #include "llvm/CodeGen/BasicTTIImpl.h" 18 #include "llvm/CodeGen/MachineFunctionAnalysis.h" 19 #include "llvm/CodeGen/MachineModuleInfo.h" 20 #include "llvm/CodeGen/Passes.h" 21 #include "llvm/IR/IRPrintingPasses.h" 22 #include "llvm/IR/LegacyPassManager.h" 23 #include "llvm/IR/Verifier.h" 24 #include "llvm/MC/MCAsmInfo.h" 25 #include "llvm/MC/MCContext.h" 26 #include "llvm/MC/MCInstrInfo.h" 27 #include "llvm/MC/MCStreamer.h" 28 #include "llvm/MC/MCSubtargetInfo.h" 29 #include "llvm/Support/CommandLine.h" 30 #include "llvm/Support/ErrorHandling.h" 31 #include "llvm/Support/FormattedStream.h" 32 #include "llvm/Support/TargetRegistry.h" 33 #include "llvm/Target/TargetInstrInfo.h" 34 #include "llvm/Target/TargetLowering.h" 35 #include "llvm/Target/TargetLoweringObjectFile.h" 36 #include "llvm/Target/TargetOptions.h" 37 #include "llvm/Target/TargetRegisterInfo.h" 38 #include "llvm/Target/TargetSubtargetInfo.h" 39 #include "llvm/Transforms/Scalar.h" 40 using namespace llvm; 41 42 // Enable or disable FastISel. Both options are needed, because 43 // FastISel is enabled by default with -fast, and we wish to be 44 // able to enable or disable fast-isel independently from -O0. 45 static cl::opt<cl::boolOrDefault> 46 EnableFastISelOption("fast-isel", cl::Hidden, 47 cl::desc("Enable the \"fast\" instruction selector")); 48 49 void LLVMTargetMachine::initAsmInfo() { 50 MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo( 51 *getSubtargetImpl()->getRegisterInfo(), getTargetTriple()); 52 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, 53 // and if the old one gets included then MCAsmInfo will be NULL and 54 // we'll crash later. 55 // Provide the user with a useful error message about what's wrong. 56 assert(TmpAsmInfo && "MCAsmInfo not initialized. " 57 "Make sure you include the correct TargetSelect.h" 58 "and that InitializeAllTargetMCs() is being invoked!"); 59 60 if (Options.DisableIntegratedAS) 61 TmpAsmInfo->setUseIntegratedAssembler(false); 62 63 if (Options.CompressDebugSections) 64 TmpAsmInfo->setCompressDebugSections(true); 65 66 AsmInfo = TmpAsmInfo; 67 } 68 69 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple, 70 StringRef CPU, StringRef FS, 71 TargetOptions Options, 72 Reloc::Model RM, CodeModel::Model CM, 73 CodeGenOpt::Level OL) 74 : TargetMachine(T, Triple, CPU, FS, Options) { 75 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL); 76 } 77 78 TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() { 79 return TargetIRAnalysis([this](Function &F) { 80 return TargetTransformInfo(BasicTTIImpl(this, F)); 81 }); 82 } 83 84 /// addPassesToX helper drives creation and initialization of TargetPassConfig. 85 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM, 86 PassManagerBase &PM, 87 bool DisableVerify, 88 AnalysisID StartAfter, 89 AnalysisID StopAfter) { 90 91 // Add internal analysis passes from the target machine. 92 PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis())); 93 94 // Targets may override createPassConfig to provide a target-specific 95 // subclass. 96 TargetPassConfig *PassConfig = TM->createPassConfig(PM); 97 PassConfig->setStartStopPasses(StartAfter, StopAfter); 98 99 // Set PassConfig options provided by TargetMachine. 100 PassConfig->setDisableVerify(DisableVerify); 101 102 PM.add(PassConfig); 103 104 PassConfig->addIRPasses(); 105 106 PassConfig->addCodeGenPrepare(); 107 108 PassConfig->addPassesToHandleExceptions(); 109 110 PassConfig->addISelPrepare(); 111 112 // Install a MachineModuleInfo class, which is an immutable pass that holds 113 // all the per-module stuff we're generating, including MCContext. 114 MachineModuleInfo *MMI = new MachineModuleInfo( 115 *TM->getMCAsmInfo(), *TM->getSubtargetImpl()->getRegisterInfo(), 116 TM->getObjFileLowering()); 117 PM.add(MMI); 118 119 // Set up a MachineFunction for the rest of CodeGen to work on. 120 PM.add(new MachineFunctionAnalysis(*TM)); 121 122 // Enable FastISel with -fast, but allow that to be overridden. 123 if (EnableFastISelOption == cl::BOU_TRUE || 124 (TM->getOptLevel() == CodeGenOpt::None && 125 EnableFastISelOption != cl::BOU_FALSE)) 126 TM->setFastISel(true); 127 128 // Ask the target for an isel. 129 if (PassConfig->addInstSelector()) 130 return nullptr; 131 132 PassConfig->addMachinePasses(); 133 134 PassConfig->setInitialized(); 135 136 return &MMI->getContext(); 137 } 138 139 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, 140 formatted_raw_ostream &Out, 141 CodeGenFileType FileType, 142 bool DisableVerify, 143 AnalysisID StartAfter, 144 AnalysisID StopAfter) { 145 // Add common CodeGen passes. 146 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, 147 StartAfter, StopAfter); 148 if (!Context) 149 return true; 150 151 if (StopAfter) { 152 // FIXME: The intent is that this should eventually write out a YAML file, 153 // containing the LLVM IR, the machine-level IR (when stopping after a 154 // machine-level pass), and whatever other information is needed to 155 // deserialize the code and resume compilation. For now, just write the 156 // LLVM IR. 157 PM.add(createPrintModulePass(Out)); 158 return false; 159 } 160 161 if (Options.MCOptions.MCSaveTempLabels) 162 Context->setAllowTemporaryLabels(false); 163 164 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>(); 165 const MCAsmInfo &MAI = *getMCAsmInfo(); 166 const MCRegisterInfo &MRI = *getSubtargetImpl()->getRegisterInfo(); 167 const MCInstrInfo &MII = *getSubtargetImpl()->getInstrInfo(); 168 std::unique_ptr<MCStreamer> AsmStreamer; 169 170 switch (FileType) { 171 case CGFT_AssemblyFile: { 172 MCInstPrinter *InstPrinter = 173 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, 174 MII, MRI, STI); 175 176 // Create a code emitter if asked to show the encoding. 177 MCCodeEmitter *MCE = nullptr; 178 if (Options.MCOptions.ShowMCEncoding) 179 MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, *Context); 180 181 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(), 182 TargetCPU); 183 MCStreamer *S = getTarget().createAsmStreamer( 184 *Context, Out, Options.MCOptions.AsmVerbose, 185 Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB, 186 Options.MCOptions.ShowMCInst); 187 AsmStreamer.reset(S); 188 break; 189 } 190 case CGFT_ObjectFile: { 191 // Create the code emitter for the target if it exists. If not, .o file 192 // emission fails. 193 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, 194 *Context); 195 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(), 196 TargetCPU); 197 if (!MCE || !MAB) 198 return true; 199 200 AsmStreamer.reset( 201 getTarget() 202 .createMCObjectStreamer(getTargetTriple(), *Context, *MAB, Out, MCE, 203 STI, Options.MCOptions.MCRelaxAll)); 204 break; 205 } 206 case CGFT_Null: 207 // The Null output is intended for use for performance analysis and testing, 208 // not real users. 209 AsmStreamer.reset(getTarget().createNullStreamer(*Context)); 210 break; 211 } 212 213 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. 214 FunctionPass *Printer = 215 getTarget().createAsmPrinter(*this, std::move(AsmStreamer)); 216 if (!Printer) 217 return true; 218 219 PM.add(Printer); 220 221 return false; 222 } 223 224 /// addPassesToEmitMC - Add passes to the specified pass manager to get 225 /// machine code emitted with the MCJIT. This method returns true if machine 226 /// code is not supported. It fills the MCContext Ctx pointer which can be 227 /// used to build custom MCStreamer. 228 /// 229 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, 230 MCContext *&Ctx, 231 raw_ostream &Out, 232 bool DisableVerify) { 233 // Add common CodeGen passes. 234 Ctx = addPassesToGenerateCode(this, PM, DisableVerify, nullptr, nullptr); 235 if (!Ctx) 236 return true; 237 238 if (Options.MCOptions.MCSaveTempLabels) 239 Ctx->setAllowTemporaryLabels(false); 240 241 // Create the code emitter for the target if it exists. If not, .o file 242 // emission fails. 243 const MCRegisterInfo &MRI = *getSubtargetImpl()->getRegisterInfo(); 244 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>(); 245 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter( 246 *getSubtargetImpl()->getInstrInfo(), MRI, STI, *Ctx); 247 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(), 248 TargetCPU); 249 if (!MCE || !MAB) 250 return true; 251 252 std::unique_ptr<MCStreamer> AsmStreamer(getTarget().createMCObjectStreamer( 253 getTargetTriple(), *Ctx, *MAB, Out, MCE, STI, 254 Options.MCOptions.MCRelaxAll)); 255 256 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. 257 FunctionPass *Printer = 258 getTarget().createAsmPrinter(*this, std::move(AsmStreamer)); 259 if (!Printer) 260 return true; 261 262 PM.add(Printer); 263 264 return false; // success! 265 } 266