1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the LLVMTargetMachine class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "llvm/Target/TargetMachine.h" 15 #include "llvm/CodeGen/AsmPrinter.h" 16 #include "llvm/CodeGen/MachineFunctionAnalysis.h" 17 #include "llvm/CodeGen/MachineModuleInfo.h" 18 #include "llvm/CodeGen/Passes.h" 19 #include "llvm/IR/IRPrintingPasses.h" 20 #include "llvm/MC/MCAsmInfo.h" 21 #include "llvm/MC/MCContext.h" 22 #include "llvm/MC/MCInstrInfo.h" 23 #include "llvm/MC/MCStreamer.h" 24 #include "llvm/MC/MCSubtargetInfo.h" 25 #include "llvm/PassManager.h" 26 #include "llvm/Support/CommandLine.h" 27 #include "llvm/Support/ErrorHandling.h" 28 #include "llvm/Support/FormattedStream.h" 29 #include "llvm/Support/TargetRegistry.h" 30 #include "llvm/Target/TargetInstrInfo.h" 31 #include "llvm/Target/TargetLowering.h" 32 #include "llvm/Target/TargetLoweringObjectFile.h" 33 #include "llvm/Target/TargetOptions.h" 34 #include "llvm/Target/TargetRegisterInfo.h" 35 #include "llvm/Target/TargetSubtargetInfo.h" 36 #include "llvm/Transforms/Scalar.h" 37 using namespace llvm; 38 39 // Enable or disable FastISel. Both options are needed, because 40 // FastISel is enabled by default with -fast, and we wish to be 41 // able to enable or disable fast-isel independently from -O0. 42 static cl::opt<cl::boolOrDefault> 43 EnableFastISelOption("fast-isel", cl::Hidden, 44 cl::desc("Enable the \"fast\" instruction selector")); 45 46 void LLVMTargetMachine::initAsmInfo() { 47 MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), 48 TargetTriple); 49 // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, 50 // and if the old one gets included then MCAsmInfo will be NULL and 51 // we'll crash later. 52 // Provide the user with a useful error message about what's wrong. 53 assert(TmpAsmInfo && "MCAsmInfo not initialized. " 54 "Make sure you include the correct TargetSelect.h" 55 "and that InitializeAllTargetMCs() is being invoked!"); 56 57 if (Options.DisableIntegratedAS) 58 TmpAsmInfo->setUseIntegratedAssembler(false); 59 60 if (Options.CompressDebugSections) 61 TmpAsmInfo->setCompressDebugSections(true); 62 63 AsmInfo = TmpAsmInfo; 64 } 65 66 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple, 67 StringRef CPU, StringRef FS, 68 TargetOptions Options, 69 Reloc::Model RM, CodeModel::Model CM, 70 CodeGenOpt::Level OL) 71 : TargetMachine(T, Triple, CPU, FS, Options) { 72 CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL); 73 } 74 75 void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) { 76 PM.add(createBasicTargetTransformInfoPass(this)); 77 } 78 79 /// addPassesToX helper drives creation and initialization of TargetPassConfig. 80 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM, 81 PassManagerBase &PM, 82 bool DisableVerify, 83 AnalysisID StartAfter, 84 AnalysisID StopAfter) { 85 // Add internal analysis passes from the target machine. 86 TM->addAnalysisPasses(PM); 87 88 // Targets may override createPassConfig to provide a target-specific 89 // subclass. 90 TargetPassConfig *PassConfig = TM->createPassConfig(PM); 91 PassConfig->setStartStopPasses(StartAfter, StopAfter); 92 93 // Set PassConfig options provided by TargetMachine. 94 PassConfig->setDisableVerify(DisableVerify); 95 96 PM.add(PassConfig); 97 98 PassConfig->addIRPasses(); 99 100 PassConfig->addCodeGenPrepare(); 101 102 PassConfig->addPassesToHandleExceptions(); 103 104 PassConfig->addISelPrepare(); 105 106 // Install a MachineModuleInfo class, which is an immutable pass that holds 107 // all the per-module stuff we're generating, including MCContext. 108 MachineModuleInfo *MMI = 109 new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(), 110 &TM->getTargetLowering()->getObjFileLowering()); 111 PM.add(MMI); 112 113 // Set up a MachineFunction for the rest of CodeGen to work on. 114 PM.add(new MachineFunctionAnalysis(*TM)); 115 116 // Enable FastISel with -fast, but allow that to be overridden. 117 if (EnableFastISelOption == cl::BOU_TRUE || 118 (TM->getOptLevel() == CodeGenOpt::None && 119 EnableFastISelOption != cl::BOU_FALSE)) 120 TM->setFastISel(true); 121 122 // Ask the target for an isel. 123 if (PassConfig->addInstSelector()) 124 return nullptr; 125 126 PassConfig->addMachinePasses(); 127 128 PassConfig->setInitialized(); 129 130 return &MMI->getContext(); 131 } 132 133 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, 134 formatted_raw_ostream &Out, 135 CodeGenFileType FileType, 136 bool DisableVerify, 137 AnalysisID StartAfter, 138 AnalysisID StopAfter) { 139 // Add common CodeGen passes. 140 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, 141 StartAfter, StopAfter); 142 if (!Context) 143 return true; 144 145 if (StopAfter) { 146 // FIXME: The intent is that this should eventually write out a YAML file, 147 // containing the LLVM IR, the machine-level IR (when stopping after a 148 // machine-level pass), and whatever other information is needed to 149 // deserialize the code and resume compilation. For now, just write the 150 // LLVM IR. 151 PM.add(createPrintModulePass(Out)); 152 return false; 153 } 154 155 if (Options.MCOptions.MCSaveTempLabels) 156 Context->setAllowTemporaryLabels(false); 157 158 const MCAsmInfo &MAI = *getMCAsmInfo(); 159 const MCRegisterInfo &MRI = *getRegisterInfo(); 160 const MCInstrInfo &MII = *getInstrInfo(); 161 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>(); 162 std::unique_ptr<MCStreamer> AsmStreamer; 163 164 switch (FileType) { 165 case CGFT_AssemblyFile: { 166 MCInstPrinter *InstPrinter = 167 getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI, 168 MII, MRI, STI); 169 170 // Create a code emitter if asked to show the encoding. 171 MCCodeEmitter *MCE = nullptr; 172 if (Options.MCOptions.ShowMCEncoding) 173 MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, *Context); 174 175 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(), 176 TargetCPU); 177 MCStreamer *S = getTarget().createAsmStreamer( 178 *Context, Out, Options.MCOptions.AsmVerbose, 179 Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB, 180 Options.MCOptions.ShowMCInst); 181 AsmStreamer.reset(S); 182 break; 183 } 184 case CGFT_ObjectFile: { 185 // Create the code emitter for the target if it exists. If not, .o file 186 // emission fails. 187 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, 188 *Context); 189 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(), 190 TargetCPU); 191 if (!MCE || !MAB) 192 return true; 193 194 AsmStreamer.reset(getTarget().createMCObjectStreamer( 195 getTargetTriple(), *Context, *MAB, Out, MCE, STI, 196 Options.MCOptions.MCRelaxAll, Options.MCOptions.MCNoExecStack)); 197 break; 198 } 199 case CGFT_Null: 200 // The Null output is intended for use for performance analysis and testing, 201 // not real users. 202 AsmStreamer.reset(createNullStreamer(*Context)); 203 break; 204 } 205 206 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. 207 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer); 208 if (!Printer) 209 return true; 210 211 // If successful, createAsmPrinter took ownership of AsmStreamer. 212 AsmStreamer.release(); 213 214 PM.add(Printer); 215 216 return false; 217 } 218 219 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to 220 /// get machine code emitted. This uses a JITCodeEmitter object to handle 221 /// actually outputting the machine code and resolving things like the address 222 /// of functions. This method should return true if machine code emission is 223 /// not supported. 224 /// 225 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, 226 JITCodeEmitter &JCE, 227 bool DisableVerify) { 228 // Add common CodeGen passes. 229 MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, nullptr, 230 nullptr); 231 if (!Context) 232 return true; 233 234 addCodeEmitter(PM, JCE); 235 236 return false; // success! 237 } 238 239 /// addPassesToEmitMC - Add passes to the specified pass manager to get 240 /// machine code emitted with the MCJIT. This method returns true if machine 241 /// code is not supported. It fills the MCContext Ctx pointer which can be 242 /// used to build custom MCStreamer. 243 /// 244 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, 245 MCContext *&Ctx, 246 raw_ostream &Out, 247 bool DisableVerify) { 248 // Add common CodeGen passes. 249 Ctx = addPassesToGenerateCode(this, PM, DisableVerify, nullptr, nullptr); 250 if (!Ctx) 251 return true; 252 253 if (Options.MCOptions.MCSaveTempLabels) 254 Ctx->setAllowTemporaryLabels(false); 255 256 // Create the code emitter for the target if it exists. If not, .o file 257 // emission fails. 258 const MCRegisterInfo &MRI = *getRegisterInfo(); 259 const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>(); 260 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, 261 STI, *Ctx); 262 MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(), 263 TargetCPU); 264 if (!MCE || !MAB) 265 return true; 266 267 std::unique_ptr<MCStreamer> AsmStreamer; 268 AsmStreamer.reset(getTarget().createMCObjectStreamer( 269 getTargetTriple(), *Ctx, *MAB, Out, MCE, STI, 270 Options.MCOptions.MCRelaxAll, Options.MCOptions.MCNoExecStack)); 271 272 // Create the AsmPrinter, which takes ownership of AsmStreamer if successful. 273 FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer); 274 if (!Printer) 275 return true; 276 277 // If successful, createAsmPrinter took ownership of AsmStreamer. 278 AsmStreamer.release(); 279 280 PM.add(Printer); 281 282 return false; // success! 283 } 284