1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the LLVMTargetMachine class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/CodeGen/AsmPrinter.h"
16 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
17 #include "llvm/CodeGen/MachineModuleInfo.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/IR/IRPrintingPasses.h"
20 #include "llvm/MC/MCAsmInfo.h"
21 #include "llvm/MC/MCContext.h"
22 #include "llvm/MC/MCInstrInfo.h"
23 #include "llvm/MC/MCStreamer.h"
24 #include "llvm/MC/MCSubtargetInfo.h"
25 #include "llvm/PassManager.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/ErrorHandling.h"
28 #include "llvm/Support/FormattedStream.h"
29 #include "llvm/Support/TargetRegistry.h"
30 #include "llvm/Target/TargetInstrInfo.h"
31 #include "llvm/Target/TargetLowering.h"
32 #include "llvm/Target/TargetLoweringObjectFile.h"
33 #include "llvm/Target/TargetOptions.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
35 #include "llvm/Target/TargetSubtargetInfo.h"
36 #include "llvm/Transforms/Scalar.h"
37 using namespace llvm;
38 
39 // Enable or disable FastISel. Both options are needed, because
40 // FastISel is enabled by default with -fast, and we wish to be
41 // able to enable or disable fast-isel independently from -O0.
42 static cl::opt<cl::boolOrDefault>
43 EnableFastISelOption("fast-isel", cl::Hidden,
44   cl::desc("Enable the \"fast\" instruction selector"));
45 
46 static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
47     cl::desc("Show encoding in .s output"));
48 static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
49     cl::desc("Show instruction structure in .s output"));
50 
51 static cl::opt<cl::boolOrDefault>
52 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
53            cl::init(cl::BOU_UNSET));
54 
55 static bool getVerboseAsm() {
56   switch (AsmVerbose) {
57   case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
58   case cl::BOU_TRUE:  return true;
59   case cl::BOU_FALSE: return false;
60   }
61   llvm_unreachable("Invalid verbose asm state");
62 }
63 
64 void LLVMTargetMachine::initAsmInfo() {
65   MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(),
66                                                     TargetTriple);
67   // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
68   // and if the old one gets included then MCAsmInfo will be NULL and
69   // we'll crash later.
70   // Provide the user with a useful error message about what's wrong.
71   assert(TmpAsmInfo && "MCAsmInfo not initialized. "
72          "Make sure you include the correct TargetSelect.h"
73          "and that InitializeAllTargetMCs() is being invoked!");
74 
75   if (Options.DisableIntegratedAS)
76     TmpAsmInfo->setUseIntegratedAssembler(false);
77 
78   if (Options.CompressDebugSections)
79     TmpAsmInfo->setCompressDebugSections(true);
80 
81   AsmInfo = TmpAsmInfo;
82 }
83 
84 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
85                                      StringRef CPU, StringRef FS,
86                                      TargetOptions Options,
87                                      Reloc::Model RM, CodeModel::Model CM,
88                                      CodeGenOpt::Level OL)
89   : TargetMachine(T, Triple, CPU, FS, Options) {
90   CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
91 }
92 
93 void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
94   PM.add(createBasicTargetTransformInfoPass(this));
95 }
96 
97 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
98 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
99                                           PassManagerBase &PM,
100                                           bool DisableVerify,
101                                           AnalysisID StartAfter,
102                                           AnalysisID StopAfter) {
103   // Add internal analysis passes from the target machine.
104   TM->addAnalysisPasses(PM);
105 
106   // Targets may override createPassConfig to provide a target-specific sublass.
107   TargetPassConfig *PassConfig = TM->createPassConfig(PM);
108   PassConfig->setStartStopPasses(StartAfter, StopAfter);
109 
110   // Set PassConfig options provided by TargetMachine.
111   PassConfig->setDisableVerify(DisableVerify);
112 
113   PM.add(PassConfig);
114 
115   PassConfig->addIRPasses();
116 
117   PassConfig->addCodeGenPrepare();
118 
119   PassConfig->addPassesToHandleExceptions();
120 
121   PassConfig->addISelPrepare();
122 
123   // Install a MachineModuleInfo class, which is an immutable pass that holds
124   // all the per-module stuff we're generating, including MCContext.
125   MachineModuleInfo *MMI =
126     new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
127                           &TM->getTargetLowering()->getObjFileLowering());
128   PM.add(MMI);
129 
130   // Set up a MachineFunction for the rest of CodeGen to work on.
131   PM.add(new MachineFunctionAnalysis(*TM));
132 
133   // Enable FastISel with -fast, but allow that to be overridden.
134   if (EnableFastISelOption == cl::BOU_TRUE ||
135       (TM->getOptLevel() == CodeGenOpt::None &&
136        EnableFastISelOption != cl::BOU_FALSE))
137     TM->setFastISel(true);
138 
139   // Ask the target for an isel.
140   if (PassConfig->addInstSelector())
141     return nullptr;
142 
143   PassConfig->addMachinePasses();
144 
145   PassConfig->setInitialized();
146 
147   return &MMI->getContext();
148 }
149 
150 bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
151                                             formatted_raw_ostream &Out,
152                                             CodeGenFileType FileType,
153                                             bool DisableVerify,
154                                             AnalysisID StartAfter,
155                                             AnalysisID StopAfter) {
156   // Add common CodeGen passes.
157   MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify,
158                                                StartAfter, StopAfter);
159   if (!Context)
160     return true;
161 
162   if (StopAfter) {
163     // FIXME: The intent is that this should eventually write out a YAML file,
164     // containing the LLVM IR, the machine-level IR (when stopping after a
165     // machine-level pass), and whatever other information is needed to
166     // deserialize the code and resume compilation.  For now, just write the
167     // LLVM IR.
168     PM.add(createPrintModulePass(Out));
169     return false;
170   }
171 
172   if (hasMCSaveTempLabels())
173     Context->setAllowTemporaryLabels(false);
174 
175   const MCAsmInfo &MAI = *getMCAsmInfo();
176   const MCRegisterInfo &MRI = *getRegisterInfo();
177   const MCInstrInfo &MII = *getInstrInfo();
178   const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
179   std::unique_ptr<MCStreamer> AsmStreamer;
180 
181   switch (FileType) {
182   case CGFT_AssemblyFile: {
183     MCInstPrinter *InstPrinter =
184       getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI,
185                                       MII, MRI, STI);
186 
187     // Create a code emitter if asked to show the encoding.
188     MCCodeEmitter *MCE = nullptr;
189     if (ShowMCEncoding)
190       MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, *Context);
191 
192     MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
193                                                        TargetCPU);
194     MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
195                                                   getVerboseAsm(),
196                                                   hasMCUseCFI(),
197                                                   hasMCUseDwarfDirectory(),
198                                                   InstPrinter,
199                                                   MCE, MAB,
200                                                   ShowMCInst);
201     AsmStreamer.reset(S);
202     break;
203   }
204   case CGFT_ObjectFile: {
205     // Create the code emitter for the target if it exists.  If not, .o file
206     // emission fails.
207     MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, STI,
208                                                          *Context);
209     MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
210                                                        TargetCPU);
211     if (!MCE || !MAB)
212       return true;
213 
214     AsmStreamer.reset(getTarget().createMCObjectStreamer(
215         getTargetTriple(), *Context, *MAB, Out, MCE, STI, hasMCRelaxAll(),
216         hasMCNoExecStack()));
217     break;
218   }
219   case CGFT_Null:
220     // The Null output is intended for use for performance analysis and testing,
221     // not real users.
222     AsmStreamer.reset(createNullStreamer(*Context));
223     break;
224   }
225 
226   // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
227   FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
228   if (!Printer)
229     return true;
230 
231   // If successful, createAsmPrinter took ownership of AsmStreamer.
232   AsmStreamer.release();
233 
234   PM.add(Printer);
235 
236   return false;
237 }
238 
239 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
240 /// get machine code emitted.  This uses a JITCodeEmitter object to handle
241 /// actually outputting the machine code and resolving things like the address
242 /// of functions.  This method should return true if machine code emission is
243 /// not supported.
244 ///
245 bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
246                                                    JITCodeEmitter &JCE,
247                                                    bool DisableVerify) {
248   // Add common CodeGen passes.
249   MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, nullptr,
250                                                nullptr);
251   if (!Context)
252     return true;
253 
254   addCodeEmitter(PM, JCE);
255 
256   return false; // success!
257 }
258 
259 /// addPassesToEmitMC - Add passes to the specified pass manager to get
260 /// machine code emitted with the MCJIT. This method returns true if machine
261 /// code is not supported. It fills the MCContext Ctx pointer which can be
262 /// used to build custom MCStreamer.
263 ///
264 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
265                                           MCContext *&Ctx,
266                                           raw_ostream &Out,
267                                           bool DisableVerify) {
268   // Add common CodeGen passes.
269   Ctx = addPassesToGenerateCode(this, PM, DisableVerify, nullptr, nullptr);
270   if (!Ctx)
271     return true;
272 
273   if (hasMCSaveTempLabels())
274     Ctx->setAllowTemporaryLabels(false);
275 
276   // Create the code emitter for the target if it exists.  If not, .o file
277   // emission fails.
278   const MCRegisterInfo &MRI = *getRegisterInfo();
279   const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
280   MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
281                                                        STI, *Ctx);
282   MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
283                                                      TargetCPU);
284   if (!MCE || !MAB)
285     return true;
286 
287   std::unique_ptr<MCStreamer> AsmStreamer;
288   AsmStreamer.reset(getTarget().createMCObjectStreamer(
289       getTargetTriple(), *Ctx, *MAB, Out, MCE, STI, hasMCRelaxAll(),
290       hasMCNoExecStack()));
291 
292   // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
293   FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
294   if (!Printer)
295     return true;
296 
297   // If successful, createAsmPrinter took ownership of AsmStreamer.
298   AsmStreamer.release();
299 
300   PM.add(Printer);
301 
302   return false; // success!
303 }
304