1 //===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.cpp - MIBuilder--*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the MachineIRBuidler class. 11 //===----------------------------------------------------------------------===// 12 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" 13 14 #include "llvm/CodeGen/MachineFunction.h" 15 #include "llvm/CodeGen/MachineInstr.h" 16 #include "llvm/CodeGen/MachineInstrBuilder.h" 17 #include "llvm/CodeGen/MachineRegisterInfo.h" 18 #include "llvm/IR/DebugInfo.h" 19 #include "llvm/Target/TargetInstrInfo.h" 20 #include "llvm/Target/TargetOpcodes.h" 21 #include "llvm/Target/TargetSubtargetInfo.h" 22 23 using namespace llvm; 24 25 void MachineIRBuilder::setMF(MachineFunction &MF) { 26 this->MF = &MF; 27 this->MBB = nullptr; 28 this->MRI = &MF.getRegInfo(); 29 this->TII = MF.getSubtarget().getInstrInfo(); 30 this->DL = DebugLoc(); 31 this->II = MachineBasicBlock::iterator(); 32 this->InsertedInstr = nullptr; 33 } 34 35 void MachineIRBuilder::setMBB(MachineBasicBlock &MBB) { 36 this->MBB = &MBB; 37 this->II = MBB.end(); 38 assert(&getMF() == MBB.getParent() && 39 "Basic block is in a different function"); 40 } 41 42 void MachineIRBuilder::setInstr(MachineInstr &MI) { 43 assert(MI.getParent() && "Instruction is not part of a basic block"); 44 setMBB(*MI.getParent()); 45 this->II = MI.getIterator(); 46 } 47 48 void MachineIRBuilder::setInsertPt(MachineBasicBlock &MBB, 49 MachineBasicBlock::iterator II) { 50 assert(MBB.getParent() == &getMF() && 51 "Basic block is in a different function"); 52 this->MBB = &MBB; 53 this->II = II; 54 } 55 56 void MachineIRBuilder::recordInsertions( 57 std::function<void(MachineInstr *)> Inserted) { 58 InsertedInstr = std::move(Inserted); 59 } 60 61 void MachineIRBuilder::stopRecordingInsertions() { 62 InsertedInstr = nullptr; 63 } 64 65 //------------------------------------------------------------------------------ 66 // Build instruction variants. 67 //------------------------------------------------------------------------------ 68 69 MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opcode) { 70 return insertInstr(buildInstrNoInsert(Opcode)); 71 } 72 73 MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) { 74 MachineInstrBuilder MIB = BuildMI(getMF(), DL, getTII().get(Opcode)); 75 return MIB; 76 } 77 78 79 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { 80 getMBB().insert(getInsertPt(), MIB); 81 if (InsertedInstr) 82 InsertedInstr(MIB); 83 return MIB; 84 } 85 86 MachineInstrBuilder 87 MachineIRBuilder::buildDirectDbgValue(unsigned Reg, const MDNode *Variable, 88 const MDNode *Expr) { 89 assert(isa<DILocalVariable>(Variable) && "not a variable"); 90 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 91 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 92 "Expected inlined-at fields to agree"); 93 return insertInstr(BuildMI(getMF(), DL, getTII().get(TargetOpcode::DBG_VALUE), 94 /*IsIndirect*/ false, Reg, Variable, Expr)); 95 } 96 97 MachineInstrBuilder 98 MachineIRBuilder::buildIndirectDbgValue(unsigned Reg, const MDNode *Variable, 99 const MDNode *Expr) { 100 assert(isa<DILocalVariable>(Variable) && "not a variable"); 101 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 102 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 103 "Expected inlined-at fields to agree"); 104 return insertInstr(BuildMI(getMF(), DL, getTII().get(TargetOpcode::DBG_VALUE), 105 /*IsIndirect*/ true, Reg, Variable, Expr)); 106 } 107 108 MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI, 109 const MDNode *Variable, 110 const MDNode *Expr) { 111 assert(isa<DILocalVariable>(Variable) && "not a variable"); 112 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 113 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 114 "Expected inlined-at fields to agree"); 115 return buildInstr(TargetOpcode::DBG_VALUE) 116 .addFrameIndex(FI) 117 .addImm(0) 118 .addMetadata(Variable) 119 .addMetadata(Expr); 120 } 121 122 MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C, 123 const MDNode *Variable, 124 const MDNode *Expr) { 125 assert(isa<DILocalVariable>(Variable) && "not a variable"); 126 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 127 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 128 "Expected inlined-at fields to agree"); 129 auto MIB = buildInstr(TargetOpcode::DBG_VALUE); 130 if (auto *CI = dyn_cast<ConstantInt>(&C)) { 131 if (CI->getBitWidth() > 64) 132 MIB.addCImm(CI); 133 else 134 MIB.addImm(CI->getZExtValue()); 135 } else if (auto *CFP = dyn_cast<ConstantFP>(&C)) { 136 MIB.addFPImm(CFP); 137 } else { 138 // Insert %noreg if we didn't find a usable constant and had to drop it. 139 MIB.addReg(0U); 140 } 141 142 return MIB.addImm(0).addMetadata(Variable).addMetadata(Expr); 143 } 144 145 MachineInstrBuilder MachineIRBuilder::buildFrameIndex(unsigned Res, int Idx) { 146 assert(MRI->getType(Res).isPointer() && "invalid operand type"); 147 return buildInstr(TargetOpcode::G_FRAME_INDEX) 148 .addDef(Res) 149 .addFrameIndex(Idx); 150 } 151 152 MachineInstrBuilder MachineIRBuilder::buildGlobalValue(unsigned Res, 153 const GlobalValue *GV) { 154 assert(MRI->getType(Res).isPointer() && "invalid operand type"); 155 assert(MRI->getType(Res).getAddressSpace() == 156 GV->getType()->getAddressSpace() && 157 "address space mismatch"); 158 159 return buildInstr(TargetOpcode::G_GLOBAL_VALUE) 160 .addDef(Res) 161 .addGlobalAddress(GV); 162 } 163 164 MachineInstrBuilder MachineIRBuilder::buildBinaryOp(unsigned Opcode, unsigned Res, unsigned Op0, 165 unsigned Op1) { 166 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) && 167 "invalid operand type"); 168 assert(MRI->getType(Res) == MRI->getType(Op0) && 169 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 170 171 return buildInstr(Opcode) 172 .addDef(Res) 173 .addUse(Op0) 174 .addUse(Op1); 175 } 176 177 MachineInstrBuilder MachineIRBuilder::buildAdd(unsigned Res, unsigned Op0, 178 unsigned Op1) { 179 return buildBinaryOp(TargetOpcode::G_ADD, Res, Op0, Op1); 180 } 181 182 MachineInstrBuilder MachineIRBuilder::buildGEP(unsigned Res, unsigned Op0, 183 unsigned Op1) { 184 assert(MRI->getType(Res).isPointer() && 185 MRI->getType(Res) == MRI->getType(Op0) && "type mismatch"); 186 assert(MRI->getType(Op1).isScalar() && "invalid offset type"); 187 188 return buildInstr(TargetOpcode::G_GEP) 189 .addDef(Res) 190 .addUse(Op0) 191 .addUse(Op1); 192 } 193 194 Optional<MachineInstrBuilder> 195 MachineIRBuilder::materializeGEP(unsigned &Res, unsigned Op0, 196 const LLT &ValueTy, uint64_t Value) { 197 assert(Res == 0 && "Res is a result argument"); 198 assert(ValueTy.isScalar() && "invalid offset type"); 199 200 if (Value == 0) { 201 Res = Op0; 202 return None; 203 } 204 205 Res = MRI->createGenericVirtualRegister(MRI->getType(Op0)); 206 unsigned TmpReg = MRI->createGenericVirtualRegister(ValueTy); 207 208 buildConstant(TmpReg, Value); 209 return buildGEP(Res, Op0, TmpReg); 210 } 211 212 MachineInstrBuilder MachineIRBuilder::buildPtrMask(unsigned Res, unsigned Op0, 213 uint32_t NumBits) { 214 assert(MRI->getType(Res).isPointer() && 215 MRI->getType(Res) == MRI->getType(Op0) && "type mismatch"); 216 217 return buildInstr(TargetOpcode::G_PTR_MASK) 218 .addDef(Res) 219 .addUse(Op0) 220 .addImm(NumBits); 221 } 222 223 MachineInstrBuilder MachineIRBuilder::buildSub(unsigned Res, unsigned Op0, 224 unsigned Op1) { 225 return buildBinaryOp(TargetOpcode::G_SUB, Res, Op0, Op1); 226 } 227 228 MachineInstrBuilder MachineIRBuilder::buildMul(unsigned Res, unsigned Op0, 229 unsigned Op1) { 230 return buildBinaryOp(TargetOpcode::G_MUL, Res, Op0, Op1); 231 } 232 233 MachineInstrBuilder MachineIRBuilder::buildAnd(unsigned Res, unsigned Op0, 234 unsigned Op1) { 235 return buildBinaryOp(TargetOpcode::G_AND, Res, Op0, Op1); 236 } 237 238 MachineInstrBuilder MachineIRBuilder::buildOr(unsigned Res, unsigned Op0, 239 unsigned Op1) { 240 return buildBinaryOp(TargetOpcode::G_OR, Res, Op0, Op1); 241 } 242 243 MachineInstrBuilder MachineIRBuilder::buildBr(MachineBasicBlock &Dest) { 244 return buildInstr(TargetOpcode::G_BR).addMBB(&Dest); 245 } 246 247 MachineInstrBuilder MachineIRBuilder::buildBrIndirect(unsigned Tgt) { 248 assert(MRI->getType(Tgt).isPointer() && "invalid branch destination"); 249 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); 250 } 251 252 MachineInstrBuilder MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) { 253 assert(MRI->getType(Res) == LLT() || MRI->getType(Op) == LLT() || 254 MRI->getType(Res) == MRI->getType(Op)); 255 return buildInstr(TargetOpcode::COPY).addDef(Res).addUse(Op); 256 } 257 258 MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res, 259 const ConstantInt &Val) { 260 LLT Ty = MRI->getType(Res); 261 262 assert((Ty.isScalar() || Ty.isPointer()) && "invalid operand type"); 263 264 const ConstantInt *NewVal = &Val; 265 if (Ty.getSizeInBits() != Val.getBitWidth()) 266 NewVal = ConstantInt::get(MF->getFunction()->getContext(), 267 Val.getValue().sextOrTrunc(Ty.getSizeInBits())); 268 269 return buildInstr(TargetOpcode::G_CONSTANT).addDef(Res).addCImm(NewVal); 270 } 271 272 MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res, 273 int64_t Val) { 274 auto IntN = IntegerType::get(MF->getFunction()->getContext(), 275 MRI->getType(Res).getSizeInBits()); 276 ConstantInt *CI = ConstantInt::get(IntN, Val, true); 277 return buildConstant(Res, *CI); 278 } 279 280 MachineInstrBuilder MachineIRBuilder::buildFConstant(unsigned Res, 281 const ConstantFP &Val) { 282 assert(MRI->getType(Res).isScalar() && "invalid operand type"); 283 284 return buildInstr(TargetOpcode::G_FCONSTANT).addDef(Res).addFPImm(&Val); 285 } 286 287 MachineInstrBuilder MachineIRBuilder::buildBrCond(unsigned Tst, 288 MachineBasicBlock &Dest) { 289 assert(MRI->getType(Tst).isScalar() && "invalid operand type"); 290 291 return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest); 292 } 293 294 MachineInstrBuilder MachineIRBuilder::buildLoad(unsigned Res, unsigned Addr, 295 MachineMemOperand &MMO) { 296 assert(MRI->getType(Res).isValid() && "invalid operand type"); 297 assert(MRI->getType(Addr).isPointer() && "invalid operand type"); 298 299 return buildInstr(TargetOpcode::G_LOAD) 300 .addDef(Res) 301 .addUse(Addr) 302 .addMemOperand(&MMO); 303 } 304 305 MachineInstrBuilder MachineIRBuilder::buildStore(unsigned Val, unsigned Addr, 306 MachineMemOperand &MMO) { 307 assert(MRI->getType(Val).isValid() && "invalid operand type"); 308 assert(MRI->getType(Addr).isPointer() && "invalid operand type"); 309 310 return buildInstr(TargetOpcode::G_STORE) 311 .addUse(Val) 312 .addUse(Addr) 313 .addMemOperand(&MMO); 314 } 315 316 MachineInstrBuilder MachineIRBuilder::buildUAdde(unsigned Res, 317 unsigned CarryOut, 318 unsigned Op0, unsigned Op1, 319 unsigned CarryIn) { 320 assert(MRI->getType(Res).isScalar() && "invalid operand type"); 321 assert(MRI->getType(Res) == MRI->getType(Op0) && 322 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 323 assert(MRI->getType(CarryOut).isScalar() && "invalid operand type"); 324 assert(MRI->getType(CarryOut) == MRI->getType(CarryIn) && "type mismatch"); 325 326 return buildInstr(TargetOpcode::G_UADDE) 327 .addDef(Res) 328 .addDef(CarryOut) 329 .addUse(Op0) 330 .addUse(Op1) 331 .addUse(CarryIn); 332 } 333 334 MachineInstrBuilder MachineIRBuilder::buildAnyExt(unsigned Res, unsigned Op) { 335 validateTruncExt(Res, Op, true); 336 return buildInstr(TargetOpcode::G_ANYEXT).addDef(Res).addUse(Op); 337 } 338 339 MachineInstrBuilder MachineIRBuilder::buildSExt(unsigned Res, unsigned Op) { 340 validateTruncExt(Res, Op, true); 341 return buildInstr(TargetOpcode::G_SEXT).addDef(Res).addUse(Op); 342 } 343 344 MachineInstrBuilder MachineIRBuilder::buildZExt(unsigned Res, unsigned Op) { 345 validateTruncExt(Res, Op, true); 346 return buildInstr(TargetOpcode::G_ZEXT).addDef(Res).addUse(Op); 347 } 348 349 MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(unsigned Res, 350 unsigned Op) { 351 assert(MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()); 352 assert(MRI->getType(Res).isScalar() == MRI->getType(Op).isScalar()); 353 354 unsigned Opcode = TargetOpcode::COPY; 355 if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits()) 356 Opcode = TargetOpcode::G_SEXT; 357 else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits()) 358 Opcode = TargetOpcode::G_TRUNC; 359 else 360 assert(MRI->getType(Res) == MRI->getType(Op)); 361 362 return buildInstr(Opcode).addDef(Res).addUse(Op); 363 } 364 365 MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc(unsigned Res, 366 unsigned Op) { 367 assert(MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()); 368 assert(MRI->getType(Res).isScalar() == MRI->getType(Op).isScalar()); 369 370 unsigned Opcode = TargetOpcode::COPY; 371 if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits()) 372 Opcode = TargetOpcode::G_ZEXT; 373 else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits()) 374 Opcode = TargetOpcode::G_TRUNC; 375 else 376 assert(MRI->getType(Res) == MRI->getType(Op)); 377 378 return buildInstr(Opcode).addDef(Res).addUse(Op); 379 } 380 381 MachineInstrBuilder MachineIRBuilder::buildCast(unsigned Dst, unsigned Src) { 382 LLT SrcTy = MRI->getType(Src); 383 LLT DstTy = MRI->getType(Dst); 384 if (SrcTy == DstTy) 385 return buildCopy(Dst, Src); 386 387 unsigned Opcode; 388 if (SrcTy.isPointer() && DstTy.isScalar()) 389 Opcode = TargetOpcode::G_PTRTOINT; 390 else if (DstTy.isPointer() && SrcTy.isScalar()) 391 Opcode = TargetOpcode::G_INTTOPTR; 392 else { 393 assert(!SrcTy.isPointer() && !DstTy.isPointer() && "n G_ADDRCAST yet"); 394 Opcode = TargetOpcode::G_BITCAST; 395 } 396 397 return buildInstr(Opcode).addDef(Dst).addUse(Src); 398 } 399 400 MachineInstrBuilder MachineIRBuilder::buildExtract(unsigned Res, unsigned Src, 401 uint64_t Index) { 402 #ifndef NDEBUG 403 assert(MRI->getType(Src).isValid() && "invalid operand type"); 404 assert(MRI->getType(Res).isValid() && "invalid operand type"); 405 assert(Index + MRI->getType(Res).getSizeInBits() <= 406 MRI->getType(Src).getSizeInBits() && 407 "extracting off end of register"); 408 #endif 409 410 if (MRI->getType(Res).getSizeInBits() == MRI->getType(Src).getSizeInBits()) { 411 assert(Index == 0 && "insertion past the end of a register"); 412 return buildCast(Res, Src); 413 } 414 415 return buildInstr(TargetOpcode::G_EXTRACT) 416 .addDef(Res) 417 .addUse(Src) 418 .addImm(Index); 419 } 420 421 void MachineIRBuilder::buildSequence(unsigned Res, ArrayRef<unsigned> Ops, 422 ArrayRef<uint64_t> Indices) { 423 #ifndef NDEBUG 424 assert(Ops.size() == Indices.size() && "incompatible args"); 425 assert(!Ops.empty() && "invalid trivial sequence"); 426 assert(std::is_sorted(Indices.begin(), Indices.end()) && 427 "sequence offsets must be in ascending order"); 428 429 assert(MRI->getType(Res).isValid() && "invalid operand type"); 430 for (auto Op : Ops) 431 assert(MRI->getType(Op).isValid() && "invalid operand type"); 432 #endif 433 434 LLT ResTy = MRI->getType(Res); 435 LLT OpTy = MRI->getType(Ops[0]); 436 unsigned OpSize = OpTy.getSizeInBits(); 437 bool MaybeMerge = true; 438 for (unsigned i = 0; i < Ops.size(); ++i) { 439 if (MRI->getType(Ops[i]) != OpTy || Indices[i] != i * OpSize) { 440 MaybeMerge = false; 441 break; 442 } 443 } 444 445 if (MaybeMerge && Ops.size() * OpSize == ResTy.getSizeInBits()) { 446 buildMerge(Res, Ops); 447 return; 448 } 449 450 unsigned ResIn = MRI->createGenericVirtualRegister(ResTy); 451 buildUndef(ResIn); 452 453 for (unsigned i = 0; i < Ops.size(); ++i) { 454 unsigned ResOut = 455 i + 1 == Ops.size() ? Res : MRI->createGenericVirtualRegister(ResTy); 456 buildInsert(ResOut, ResIn, Ops[i], Indices[i]); 457 ResIn = ResOut; 458 } 459 } 460 461 MachineInstrBuilder MachineIRBuilder::buildUndef(unsigned Res) { 462 return buildInstr(TargetOpcode::G_IMPLICIT_DEF).addDef(Res); 463 } 464 465 MachineInstrBuilder MachineIRBuilder::buildMerge(unsigned Res, 466 ArrayRef<unsigned> Ops) { 467 468 #ifndef NDEBUG 469 assert(!Ops.empty() && "invalid trivial sequence"); 470 LLT Ty = MRI->getType(Ops[0]); 471 for (auto Reg : Ops) 472 assert(MRI->getType(Reg) == Ty && "type mismatch in input list"); 473 assert(Ops.size() * MRI->getType(Ops[0]).getSizeInBits() == 474 MRI->getType(Res).getSizeInBits() && 475 "input operands do not cover output register"); 476 #endif 477 478 if (Ops.size() == 1) 479 return buildCast(Res, Ops[0]); 480 481 MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_MERGE_VALUES); 482 MIB.addDef(Res); 483 for (unsigned i = 0; i < Ops.size(); ++i) 484 MIB.addUse(Ops[i]); 485 return MIB; 486 } 487 488 MachineInstrBuilder MachineIRBuilder::buildUnmerge(ArrayRef<unsigned> Res, 489 unsigned Op) { 490 491 #ifndef NDEBUG 492 assert(!Res.empty() && "invalid trivial sequence"); 493 LLT Ty = MRI->getType(Res[0]); 494 for (auto Reg : Res) 495 assert(MRI->getType(Reg) == Ty && "type mismatch in input list"); 496 assert(Res.size() * MRI->getType(Res[0]).getSizeInBits() == 497 MRI->getType(Op).getSizeInBits() && 498 "input operands do not cover output register"); 499 #endif 500 501 MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_UNMERGE_VALUES); 502 for (unsigned i = 0; i < Res.size(); ++i) 503 MIB.addDef(Res[i]); 504 MIB.addUse(Op); 505 return MIB; 506 } 507 508 MachineInstrBuilder MachineIRBuilder::buildInsert(unsigned Res, unsigned Src, 509 unsigned Op, unsigned Index) { 510 assert(Index + MRI->getType(Op).getSizeInBits() <= 511 MRI->getType(Res).getSizeInBits() && 512 "insertion past the end of a register"); 513 514 if (MRI->getType(Res).getSizeInBits() == MRI->getType(Op).getSizeInBits()) { 515 return buildCast(Res, Op); 516 } 517 518 return buildInstr(TargetOpcode::G_INSERT) 519 .addDef(Res) 520 .addUse(Src) 521 .addUse(Op) 522 .addImm(Index); 523 } 524 525 MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID, 526 unsigned Res, 527 bool HasSideEffects) { 528 auto MIB = 529 buildInstr(HasSideEffects ? TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS 530 : TargetOpcode::G_INTRINSIC); 531 if (Res) 532 MIB.addDef(Res); 533 MIB.addIntrinsicID(ID); 534 return MIB; 535 } 536 537 MachineInstrBuilder MachineIRBuilder::buildTrunc(unsigned Res, unsigned Op) { 538 validateTruncExt(Res, Op, false); 539 return buildInstr(TargetOpcode::G_TRUNC).addDef(Res).addUse(Op); 540 } 541 542 MachineInstrBuilder MachineIRBuilder::buildFPTrunc(unsigned Res, unsigned Op) { 543 validateTruncExt(Res, Op, false); 544 return buildInstr(TargetOpcode::G_FPTRUNC).addDef(Res).addUse(Op); 545 } 546 547 MachineInstrBuilder MachineIRBuilder::buildICmp(CmpInst::Predicate Pred, 548 unsigned Res, unsigned Op0, 549 unsigned Op1) { 550 #ifndef NDEBUG 551 assert(MRI->getType(Op0) == MRI->getType(Op0) && "type mismatch"); 552 assert(CmpInst::isIntPredicate(Pred) && "invalid predicate"); 553 if (MRI->getType(Op0).isScalar() || MRI->getType(Op0).isPointer()) 554 assert(MRI->getType(Res).isScalar() && "type mismatch"); 555 else 556 assert(MRI->getType(Res).isVector() && 557 MRI->getType(Res).getNumElements() == 558 MRI->getType(Op0).getNumElements() && 559 "type mismatch"); 560 #endif 561 562 return buildInstr(TargetOpcode::G_ICMP) 563 .addDef(Res) 564 .addPredicate(Pred) 565 .addUse(Op0) 566 .addUse(Op1); 567 } 568 569 MachineInstrBuilder MachineIRBuilder::buildFCmp(CmpInst::Predicate Pred, 570 unsigned Res, unsigned Op0, 571 unsigned Op1) { 572 #ifndef NDEBUG 573 assert((MRI->getType(Op0).isScalar() || MRI->getType(Op0).isVector()) && 574 "invalid operand type"); 575 assert(MRI->getType(Op0) == MRI->getType(Op1) && "type mismatch"); 576 assert(CmpInst::isFPPredicate(Pred) && "invalid predicate"); 577 if (MRI->getType(Op0).isScalar()) 578 assert(MRI->getType(Res).isScalar() && "type mismatch"); 579 else 580 assert(MRI->getType(Res).isVector() && 581 MRI->getType(Res).getNumElements() == 582 MRI->getType(Op0).getNumElements() && 583 "type mismatch"); 584 #endif 585 586 return buildInstr(TargetOpcode::G_FCMP) 587 .addDef(Res) 588 .addPredicate(Pred) 589 .addUse(Op0) 590 .addUse(Op1); 591 } 592 593 MachineInstrBuilder MachineIRBuilder::buildSelect(unsigned Res, unsigned Tst, 594 unsigned Op0, unsigned Op1) { 595 #ifndef NDEBUG 596 LLT ResTy = MRI->getType(Res); 597 assert((ResTy.isScalar() || ResTy.isVector() || ResTy.isPointer()) && 598 "invalid operand type"); 599 assert(ResTy == MRI->getType(Op0) && ResTy == MRI->getType(Op1) && 600 "type mismatch"); 601 if (ResTy.isScalar() || ResTy.isPointer()) 602 assert(MRI->getType(Tst).isScalar() && "type mismatch"); 603 else 604 assert((MRI->getType(Tst).isScalar() || 605 (MRI->getType(Tst).isVector() && 606 MRI->getType(Tst).getNumElements() == 607 MRI->getType(Op0).getNumElements())) && 608 "type mismatch"); 609 #endif 610 611 return buildInstr(TargetOpcode::G_SELECT) 612 .addDef(Res) 613 .addUse(Tst) 614 .addUse(Op0) 615 .addUse(Op1); 616 } 617 618 MachineInstrBuilder MachineIRBuilder::buildInsertVectorElement(unsigned Res, 619 unsigned Val, 620 unsigned Elt, 621 unsigned Idx) { 622 #ifndef NDEBUG 623 LLT ResTy = MRI->getType(Res); 624 LLT ValTy = MRI->getType(Val); 625 LLT EltTy = MRI->getType(Elt); 626 LLT IdxTy = MRI->getType(Idx); 627 assert(ResTy.isVector() && ValTy.isVector() && "invalid operand type"); 628 assert(IdxTy.isScalar() && "invalid operand type"); 629 assert(ResTy.getNumElements() == ValTy.getNumElements() && "type mismatch"); 630 assert(ResTy.getElementType() == EltTy && "type mismatch"); 631 #endif 632 633 return buildInstr(TargetOpcode::G_INSERT_VECTOR_ELT) 634 .addDef(Res) 635 .addUse(Val) 636 .addUse(Elt) 637 .addUse(Idx); 638 } 639 640 MachineInstrBuilder MachineIRBuilder::buildExtractVectorElement(unsigned Res, 641 unsigned Val, 642 unsigned Idx) { 643 #ifndef NDEBUG 644 LLT ResTy = MRI->getType(Res); 645 LLT ValTy = MRI->getType(Val); 646 LLT IdxTy = MRI->getType(Idx); 647 assert(ValTy.isVector() && "invalid operand type"); 648 assert((ResTy.isScalar() || ResTy.isPointer()) && "invalid operand type"); 649 assert(IdxTy.isScalar() && "invalid operand type"); 650 assert(ValTy.getElementType() == ResTy && "type mismatch"); 651 #endif 652 653 return buildInstr(TargetOpcode::G_EXTRACT_VECTOR_ELT) 654 .addDef(Res) 655 .addUse(Val) 656 .addUse(Idx); 657 } 658 659 void MachineIRBuilder::validateTruncExt(unsigned Dst, unsigned Src, 660 bool IsExtend) { 661 #ifndef NDEBUG 662 LLT SrcTy = MRI->getType(Src); 663 LLT DstTy = MRI->getType(Dst); 664 665 if (DstTy.isVector()) { 666 assert(SrcTy.isVector() && "mismatched cast between vecot and non-vector"); 667 assert(SrcTy.getNumElements() == DstTy.getNumElements() && 668 "different number of elements in a trunc/ext"); 669 } else 670 assert(DstTy.isScalar() && SrcTy.isScalar() && "invalid extend/trunc"); 671 672 if (IsExtend) 673 assert(DstTy.getSizeInBits() > SrcTy.getSizeInBits() && 674 "invalid narrowing extend"); 675 else 676 assert(DstTy.getSizeInBits() < SrcTy.getSizeInBits() && 677 "invalid widening trunc"); 678 #endif 679 } 680