1 //===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.cpp - MIBuilder--*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the MachineIRBuidler class. 11 //===----------------------------------------------------------------------===// 12 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" 13 14 #include "llvm/CodeGen/MachineFunction.h" 15 #include "llvm/CodeGen/MachineInstr.h" 16 #include "llvm/CodeGen/MachineInstrBuilder.h" 17 #include "llvm/CodeGen/MachineRegisterInfo.h" 18 #include "llvm/IR/DebugInfo.h" 19 #include "llvm/Target/TargetInstrInfo.h" 20 #include "llvm/Target/TargetOpcodes.h" 21 #include "llvm/Target/TargetSubtargetInfo.h" 22 23 using namespace llvm; 24 25 void MachineIRBuilder::setMF(MachineFunction &MF) { 26 this->MF = &MF; 27 this->MBB = nullptr; 28 this->MRI = &MF.getRegInfo(); 29 this->TII = MF.getSubtarget().getInstrInfo(); 30 this->DL = DebugLoc(); 31 this->II = MachineBasicBlock::iterator(); 32 this->InsertedInstr = nullptr; 33 } 34 35 void MachineIRBuilder::setMBB(MachineBasicBlock &MBB) { 36 this->MBB = &MBB; 37 this->II = MBB.end(); 38 assert(&getMF() == MBB.getParent() && 39 "Basic block is in a different function"); 40 } 41 42 void MachineIRBuilder::setInstr(MachineInstr &MI) { 43 assert(MI.getParent() && "Instruction is not part of a basic block"); 44 setMBB(*MI.getParent()); 45 this->II = MI.getIterator(); 46 } 47 48 void MachineIRBuilder::setInsertPt(MachineBasicBlock &MBB, 49 MachineBasicBlock::iterator II) { 50 assert(MBB.getParent() == &getMF() && 51 "Basic block is in a different function"); 52 this->MBB = &MBB; 53 this->II = II; 54 } 55 56 void MachineIRBuilder::recordInsertions( 57 std::function<void(MachineInstr *)> Inserted) { 58 InsertedInstr = std::move(Inserted); 59 } 60 61 void MachineIRBuilder::stopRecordingInsertions() { 62 InsertedInstr = nullptr; 63 } 64 65 //------------------------------------------------------------------------------ 66 // Build instruction variants. 67 //------------------------------------------------------------------------------ 68 69 MachineInstrBuilder MachineIRBuilder::buildInstr(unsigned Opcode) { 70 return insertInstr(buildInstrNoInsert(Opcode)); 71 } 72 73 MachineInstrBuilder MachineIRBuilder::buildInstrNoInsert(unsigned Opcode) { 74 MachineInstrBuilder MIB = BuildMI(getMF(), DL, getTII().get(Opcode)); 75 return MIB; 76 } 77 78 79 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { 80 getMBB().insert(getInsertPt(), MIB); 81 if (InsertedInstr) 82 InsertedInstr(MIB); 83 return MIB; 84 } 85 86 MachineInstrBuilder MachineIRBuilder::buildDirectDbgValue( 87 unsigned Reg, const MDNode *Variable, const MDNode *Expr) { 88 assert(isa<DILocalVariable>(Variable) && "not a variable"); 89 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 90 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 91 "Expected inlined-at fields to agree"); 92 return buildInstr(TargetOpcode::DBG_VALUE) 93 .addReg(Reg, RegState::Debug) 94 .addReg(0, RegState::Debug) 95 .addMetadata(Variable) 96 .addMetadata(Expr); 97 } 98 99 MachineInstrBuilder MachineIRBuilder::buildIndirectDbgValue( 100 unsigned Reg, unsigned Offset, const MDNode *Variable, const MDNode *Expr) { 101 assert(isa<DILocalVariable>(Variable) && "not a variable"); 102 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 103 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 104 "Expected inlined-at fields to agree"); 105 return buildInstr(TargetOpcode::DBG_VALUE) 106 .addReg(Reg, RegState::Debug) 107 .addImm(Offset) 108 .addMetadata(Variable) 109 .addMetadata(Expr); 110 } 111 112 MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI, 113 const MDNode *Variable, 114 const MDNode *Expr) { 115 assert(isa<DILocalVariable>(Variable) && "not a variable"); 116 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 117 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 118 "Expected inlined-at fields to agree"); 119 return buildInstr(TargetOpcode::DBG_VALUE) 120 .addFrameIndex(FI) 121 .addImm(0) 122 .addMetadata(Variable) 123 .addMetadata(Expr); 124 } 125 126 MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C, 127 unsigned Offset, 128 const MDNode *Variable, 129 const MDNode *Expr) { 130 assert(isa<DILocalVariable>(Variable) && "not a variable"); 131 assert(cast<DIExpression>(Expr)->isValid() && "not an expression"); 132 assert(cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(DL) && 133 "Expected inlined-at fields to agree"); 134 auto MIB = buildInstr(TargetOpcode::DBG_VALUE); 135 if (auto *CI = dyn_cast<ConstantInt>(&C)) { 136 if (CI->getBitWidth() > 64) 137 MIB.addCImm(CI); 138 else 139 MIB.addImm(CI->getZExtValue()); 140 } else 141 MIB.addFPImm(&cast<ConstantFP>(C)); 142 143 return MIB.addImm(Offset).addMetadata(Variable).addMetadata(Expr); 144 } 145 146 MachineInstrBuilder MachineIRBuilder::buildFrameIndex(unsigned Res, int Idx) { 147 assert(MRI->getType(Res).isPointer() && "invalid operand type"); 148 return buildInstr(TargetOpcode::G_FRAME_INDEX) 149 .addDef(Res) 150 .addFrameIndex(Idx); 151 } 152 153 MachineInstrBuilder MachineIRBuilder::buildGlobalValue(unsigned Res, 154 const GlobalValue *GV) { 155 assert(MRI->getType(Res).isPointer() && "invalid operand type"); 156 assert(MRI->getType(Res).getAddressSpace() == 157 GV->getType()->getAddressSpace() && 158 "address space mismatch"); 159 160 return buildInstr(TargetOpcode::G_GLOBAL_VALUE) 161 .addDef(Res) 162 .addGlobalAddress(GV); 163 } 164 165 MachineInstrBuilder MachineIRBuilder::buildAdd(unsigned Res, unsigned Op0, 166 unsigned Op1) { 167 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) && 168 "invalid operand type"); 169 assert(MRI->getType(Res) == MRI->getType(Op0) && 170 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 171 172 return buildInstr(TargetOpcode::G_ADD) 173 .addDef(Res) 174 .addUse(Op0) 175 .addUse(Op1); 176 } 177 178 MachineInstrBuilder MachineIRBuilder::buildGEP(unsigned Res, unsigned Op0, 179 unsigned Op1) { 180 assert(MRI->getType(Res).isPointer() && 181 MRI->getType(Res) == MRI->getType(Op0) && "type mismatch"); 182 assert(MRI->getType(Op1).isScalar() && "invalid offset type"); 183 184 return buildInstr(TargetOpcode::G_GEP) 185 .addDef(Res) 186 .addUse(Op0) 187 .addUse(Op1); 188 } 189 190 MachineInstrBuilder MachineIRBuilder::buildPtrMask(unsigned Res, unsigned Op0, 191 uint32_t NumBits) { 192 assert(MRI->getType(Res).isPointer() && 193 MRI->getType(Res) == MRI->getType(Op0) && "type mismatch"); 194 195 return buildInstr(TargetOpcode::G_PTR_MASK) 196 .addDef(Res) 197 .addUse(Op0) 198 .addImm(NumBits); 199 } 200 201 MachineInstrBuilder MachineIRBuilder::buildSub(unsigned Res, unsigned Op0, 202 unsigned Op1) { 203 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) && 204 "invalid operand type"); 205 assert(MRI->getType(Res) == MRI->getType(Op0) && 206 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 207 208 return buildInstr(TargetOpcode::G_SUB) 209 .addDef(Res) 210 .addUse(Op0) 211 .addUse(Op1); 212 } 213 214 MachineInstrBuilder MachineIRBuilder::buildMul(unsigned Res, unsigned Op0, 215 unsigned Op1) { 216 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) && 217 "invalid operand type"); 218 assert(MRI->getType(Res) == MRI->getType(Op0) && 219 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 220 221 return buildInstr(TargetOpcode::G_MUL) 222 .addDef(Res) 223 .addUse(Op0) 224 .addUse(Op1); 225 } 226 227 MachineInstrBuilder MachineIRBuilder::buildAnd(unsigned Res, unsigned Op0, 228 unsigned Op1) { 229 assert((MRI->getType(Res).isScalar() || MRI->getType(Res).isVector()) && 230 "invalid operand type"); 231 assert(MRI->getType(Res) == MRI->getType(Op0) && 232 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 233 234 return buildInstr(TargetOpcode::G_AND) 235 .addDef(Res) 236 .addUse(Op0) 237 .addUse(Op1); 238 } 239 240 MachineInstrBuilder MachineIRBuilder::buildBr(MachineBasicBlock &Dest) { 241 return buildInstr(TargetOpcode::G_BR).addMBB(&Dest); 242 } 243 244 MachineInstrBuilder MachineIRBuilder::buildBrIndirect(unsigned Tgt) { 245 return buildInstr(TargetOpcode::G_BRINDIRECT).addUse(Tgt); 246 } 247 248 MachineInstrBuilder MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) { 249 return buildInstr(TargetOpcode::COPY).addDef(Res).addUse(Op); 250 } 251 252 MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res, 253 const ConstantInt &Val) { 254 LLT Ty = MRI->getType(Res); 255 256 assert((Ty.isScalar() || Ty.isPointer()) && "invalid operand type"); 257 258 const ConstantInt *NewVal = &Val; 259 if (Ty.getSizeInBits() != Val.getBitWidth()) 260 NewVal = ConstantInt::get(MF->getFunction()->getContext(), 261 Val.getValue().sextOrTrunc(Ty.getSizeInBits())); 262 263 return buildInstr(TargetOpcode::G_CONSTANT).addDef(Res).addCImm(NewVal); 264 } 265 266 MachineInstrBuilder MachineIRBuilder::buildConstant(unsigned Res, 267 int64_t Val) { 268 auto IntN = IntegerType::get(MF->getFunction()->getContext(), 269 MRI->getType(Res).getSizeInBits()); 270 ConstantInt *CI = ConstantInt::get(IntN, Val, true); 271 return buildConstant(Res, *CI); 272 } 273 274 MachineInstrBuilder MachineIRBuilder::buildFConstant(unsigned Res, 275 const ConstantFP &Val) { 276 assert(MRI->getType(Res).isScalar() && "invalid operand type"); 277 278 return buildInstr(TargetOpcode::G_FCONSTANT).addDef(Res).addFPImm(&Val); 279 } 280 281 MachineInstrBuilder MachineIRBuilder::buildBrCond(unsigned Tst, 282 MachineBasicBlock &Dest) { 283 assert(MRI->getType(Tst).isScalar() && "invalid operand type"); 284 285 return buildInstr(TargetOpcode::G_BRCOND).addUse(Tst).addMBB(&Dest); 286 } 287 288 MachineInstrBuilder MachineIRBuilder::buildLoad(unsigned Res, unsigned Addr, 289 MachineMemOperand &MMO) { 290 assert(MRI->getType(Res).isValid() && "invalid operand type"); 291 assert(MRI->getType(Addr).isPointer() && "invalid operand type"); 292 293 return buildInstr(TargetOpcode::G_LOAD) 294 .addDef(Res) 295 .addUse(Addr) 296 .addMemOperand(&MMO); 297 } 298 299 MachineInstrBuilder MachineIRBuilder::buildStore(unsigned Val, unsigned Addr, 300 MachineMemOperand &MMO) { 301 assert(MRI->getType(Val).isValid() && "invalid operand type"); 302 assert(MRI->getType(Addr).isPointer() && "invalid operand type"); 303 304 return buildInstr(TargetOpcode::G_STORE) 305 .addUse(Val) 306 .addUse(Addr) 307 .addMemOperand(&MMO); 308 } 309 310 MachineInstrBuilder MachineIRBuilder::buildUAdde(unsigned Res, 311 unsigned CarryOut, 312 unsigned Op0, unsigned Op1, 313 unsigned CarryIn) { 314 assert(MRI->getType(Res).isScalar() && "invalid operand type"); 315 assert(MRI->getType(Res) == MRI->getType(Op0) && 316 MRI->getType(Res) == MRI->getType(Op1) && "type mismatch"); 317 assert(MRI->getType(CarryOut).isScalar() && "invalid operand type"); 318 assert(MRI->getType(CarryOut) == MRI->getType(CarryIn) && "type mismatch"); 319 320 return buildInstr(TargetOpcode::G_UADDE) 321 .addDef(Res) 322 .addDef(CarryOut) 323 .addUse(Op0) 324 .addUse(Op1) 325 .addUse(CarryIn); 326 } 327 328 MachineInstrBuilder MachineIRBuilder::buildAnyExt(unsigned Res, unsigned Op) { 329 validateTruncExt(Res, Op, true); 330 return buildInstr(TargetOpcode::G_ANYEXT).addDef(Res).addUse(Op); 331 } 332 333 MachineInstrBuilder MachineIRBuilder::buildSExt(unsigned Res, unsigned Op) { 334 validateTruncExt(Res, Op, true); 335 return buildInstr(TargetOpcode::G_SEXT).addDef(Res).addUse(Op); 336 } 337 338 MachineInstrBuilder MachineIRBuilder::buildZExt(unsigned Res, unsigned Op) { 339 validateTruncExt(Res, Op, true); 340 return buildInstr(TargetOpcode::G_ZEXT).addDef(Res).addUse(Op); 341 } 342 343 MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(unsigned Res, 344 unsigned Op) { 345 unsigned Opcode = TargetOpcode::COPY; 346 if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits()) 347 Opcode = TargetOpcode::G_SEXT; 348 else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits()) 349 Opcode = TargetOpcode::G_TRUNC; 350 351 return buildInstr(Opcode).addDef(Res).addUse(Op); 352 } 353 354 MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc(unsigned Res, 355 unsigned Op) { 356 unsigned Opcode = TargetOpcode::COPY; 357 if (MRI->getType(Res).getSizeInBits() > MRI->getType(Op).getSizeInBits()) 358 Opcode = TargetOpcode::G_ZEXT; 359 else if (MRI->getType(Res).getSizeInBits() < MRI->getType(Op).getSizeInBits()) 360 Opcode = TargetOpcode::G_TRUNC; 361 362 return buildInstr(Opcode).addDef(Res).addUse(Op); 363 } 364 365 MachineInstrBuilder MachineIRBuilder::buildExtract(ArrayRef<unsigned> Results, 366 ArrayRef<uint64_t> Indices, 367 unsigned Src) { 368 #ifndef NDEBUG 369 assert(Results.size() == Indices.size() && "inconsistent number of regs"); 370 assert(!Results.empty() && "invalid trivial extract"); 371 assert(std::is_sorted(Indices.begin(), Indices.end()) && 372 "extract offsets must be in ascending order"); 373 374 assert(MRI->getType(Src).isValid() && "invalid operand type"); 375 for (auto Res : Results) 376 assert(MRI->getType(Res).isValid() && "invalid operand type"); 377 #endif 378 379 auto MIB = BuildMI(getMF(), DL, getTII().get(TargetOpcode::G_EXTRACT)); 380 for (auto Res : Results) 381 MIB.addDef(Res); 382 383 MIB.addUse(Src); 384 385 for (auto Idx : Indices) 386 MIB.addImm(Idx); 387 388 getMBB().insert(getInsertPt(), MIB); 389 if (InsertedInstr) 390 InsertedInstr(MIB); 391 392 return MIB; 393 } 394 395 MachineInstrBuilder 396 MachineIRBuilder::buildSequence(unsigned Res, 397 ArrayRef<unsigned> Ops, 398 ArrayRef<uint64_t> Indices) { 399 #ifndef NDEBUG 400 assert(Ops.size() == Indices.size() && "incompatible args"); 401 assert(!Ops.empty() && "invalid trivial sequence"); 402 assert(std::is_sorted(Indices.begin(), Indices.end()) && 403 "sequence offsets must be in ascending order"); 404 405 assert(MRI->getType(Res).isValid() && "invalid operand type"); 406 for (auto Op : Ops) 407 assert(MRI->getType(Op).isValid() && "invalid operand type"); 408 #endif 409 410 MachineInstrBuilder MIB = buildInstr(TargetOpcode::G_SEQUENCE); 411 MIB.addDef(Res); 412 for (unsigned i = 0; i < Ops.size(); ++i) { 413 MIB.addUse(Ops[i]); 414 MIB.addImm(Indices[i]); 415 } 416 return MIB; 417 } 418 419 MachineInstrBuilder MachineIRBuilder::buildIntrinsic(Intrinsic::ID ID, 420 unsigned Res, 421 bool HasSideEffects) { 422 auto MIB = 423 buildInstr(HasSideEffects ? TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS 424 : TargetOpcode::G_INTRINSIC); 425 if (Res) 426 MIB.addDef(Res); 427 MIB.addIntrinsicID(ID); 428 return MIB; 429 } 430 431 MachineInstrBuilder MachineIRBuilder::buildTrunc(unsigned Res, unsigned Op) { 432 validateTruncExt(Res, Op, false); 433 return buildInstr(TargetOpcode::G_TRUNC).addDef(Res).addUse(Op); 434 } 435 436 MachineInstrBuilder MachineIRBuilder::buildFPTrunc(unsigned Res, unsigned Op) { 437 validateTruncExt(Res, Op, false); 438 return buildInstr(TargetOpcode::G_FPTRUNC).addDef(Res).addUse(Op); 439 } 440 441 MachineInstrBuilder MachineIRBuilder::buildICmp(CmpInst::Predicate Pred, 442 unsigned Res, unsigned Op0, 443 unsigned Op1) { 444 #ifndef NDEBUG 445 assert(MRI->getType(Op0) == MRI->getType(Op0) && "type mismatch"); 446 assert(CmpInst::isIntPredicate(Pred) && "invalid predicate"); 447 if (MRI->getType(Op0).isScalar() || MRI->getType(Op0).isPointer()) 448 assert(MRI->getType(Res).isScalar() && "type mismatch"); 449 else 450 assert(MRI->getType(Res).isVector() && 451 MRI->getType(Res).getNumElements() == 452 MRI->getType(Op0).getNumElements() && 453 "type mismatch"); 454 #endif 455 456 return buildInstr(TargetOpcode::G_ICMP) 457 .addDef(Res) 458 .addPredicate(Pred) 459 .addUse(Op0) 460 .addUse(Op1); 461 } 462 463 MachineInstrBuilder MachineIRBuilder::buildFCmp(CmpInst::Predicate Pred, 464 unsigned Res, unsigned Op0, 465 unsigned Op1) { 466 #ifndef NDEBUG 467 assert((MRI->getType(Op0).isScalar() || MRI->getType(Op0).isVector()) && 468 "invalid operand type"); 469 assert(MRI->getType(Op0) == MRI->getType(Op1) && "type mismatch"); 470 assert(CmpInst::isFPPredicate(Pred) && "invalid predicate"); 471 if (MRI->getType(Op0).isScalar()) 472 assert(MRI->getType(Res).isScalar() && "type mismatch"); 473 else 474 assert(MRI->getType(Res).isVector() && 475 MRI->getType(Res).getNumElements() == 476 MRI->getType(Op0).getNumElements() && 477 "type mismatch"); 478 #endif 479 480 return buildInstr(TargetOpcode::G_FCMP) 481 .addDef(Res) 482 .addPredicate(Pred) 483 .addUse(Op0) 484 .addUse(Op1); 485 } 486 487 MachineInstrBuilder MachineIRBuilder::buildSelect(unsigned Res, unsigned Tst, 488 unsigned Op0, unsigned Op1) { 489 #ifndef NDEBUG 490 LLT ResTy = MRI->getType(Res); 491 assert((ResTy.isScalar() || ResTy.isVector() || ResTy.isPointer()) && 492 "invalid operand type"); 493 assert(ResTy == MRI->getType(Op0) && ResTy == MRI->getType(Op1) && 494 "type mismatch"); 495 if (ResTy.isScalar() || ResTy.isPointer()) 496 assert(MRI->getType(Tst).isScalar() && "type mismatch"); 497 else 498 assert(MRI->getType(Tst).isVector() && 499 MRI->getType(Tst).getNumElements() == 500 MRI->getType(Op0).getNumElements() && 501 "type mismatch"); 502 #endif 503 504 return buildInstr(TargetOpcode::G_SELECT) 505 .addDef(Res) 506 .addUse(Tst) 507 .addUse(Op0) 508 .addUse(Op1); 509 } 510 511 void MachineIRBuilder::validateTruncExt(unsigned Dst, unsigned Src, 512 bool IsExtend) { 513 #ifndef NDEBUG 514 LLT SrcTy = MRI->getType(Src); 515 LLT DstTy = MRI->getType(Dst); 516 517 if (DstTy.isVector()) { 518 assert(SrcTy.isVector() && "mismatched cast between vecot and non-vector"); 519 assert(SrcTy.getNumElements() == DstTy.getNumElements() && 520 "different number of elements in a trunc/ext"); 521 } else 522 assert(DstTy.isScalar() && SrcTy.isScalar() && "invalid extend/trunc"); 523 524 if (IsExtend) 525 assert(DstTy.getSizeInBits() > SrcTy.getSizeInBits() && 526 "invalid narrowing extend"); 527 else 528 assert(DstTy.getSizeInBits() < SrcTy.getSizeInBits() && 529 "invalid widening trunc"); 530 #endif 531 } 532