1 //===- llvm/CodeGen/GlobalISel/InstructionSelect.cpp - InstructionSelect ---==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the InstructionSelect class.
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
14 #include "llvm/ADT/PostOrderIterator.h"
15 #include "llvm/ADT/ScopeExit.h"
16 #include "llvm/ADT/Twine.h"
17 #include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
18 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
19 #include "llvm/CodeGen/GlobalISel/Utils.h"
20 #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/IR/Constants.h"
24 #include "llvm/IR/Function.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Target/TargetLowering.h"
28 #include "llvm/Target/TargetSubtargetInfo.h"
29 
30 #define DEBUG_TYPE "instruction-select"
31 
32 using namespace llvm;
33 
34 char InstructionSelect::ID = 0;
35 INITIALIZE_PASS_BEGIN(InstructionSelect, DEBUG_TYPE,
36                       "Select target instructions out of generic instructions",
37                       false, false)
38 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
39 INITIALIZE_PASS_END(InstructionSelect, DEBUG_TYPE,
40                     "Select target instructions out of generic instructions",
41                     false, false)
42 
43 InstructionSelect::InstructionSelect() : MachineFunctionPass(ID) {
44   initializeInstructionSelectPass(*PassRegistry::getPassRegistry());
45 }
46 
47 void InstructionSelect::getAnalysisUsage(AnalysisUsage &AU) const {
48   AU.addRequired<TargetPassConfig>();
49   MachineFunctionPass::getAnalysisUsage(AU);
50 }
51 
52 bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
53   const MachineRegisterInfo &MRI = MF.getRegInfo();
54 
55   // No matter what happens, whether we successfully select the function or not,
56   // nothing is going to use the vreg types after us.  Make sure they disappear.
57   auto ClearVRegTypesOnReturn =
58       make_scope_exit([&]() { MRI.getVRegToType().clear(); });
59 
60   // If the ISel pipeline failed, do not bother running that pass.
61   if (MF.getProperties().hasProperty(
62           MachineFunctionProperties::Property::FailedISel))
63     return false;
64 
65   DEBUG(dbgs() << "Selecting function: " << MF.getName() << '\n');
66 
67   const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
68   const InstructionSelector *ISel = MF.getSubtarget().getInstructionSelector();
69   assert(ISel && "Cannot work without InstructionSelector");
70 
71   // An optimization remark emitter. Used to report failures.
72   MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
73 
74   // FIXME: There are many other MF/MFI fields we need to initialize.
75 
76 #ifndef NDEBUG
77   // Check that our input is fully legal: we require the function to have the
78   // Legalized property, so it should be.
79   // FIXME: This should be in the MachineVerifier, but it can't use the
80   // LegalizerInfo as it's currently in the separate GlobalISel library.
81   // The RegBankSelected property is already checked in the verifier. Note
82   // that it has the same layering problem, but we only use inline methods so
83   // end up not needing to link against the GlobalISel library.
84   if (const LegalizerInfo *MLI = MF.getSubtarget().getLegalizerInfo())
85     for (MachineBasicBlock &MBB : MF)
86       for (MachineInstr &MI : MBB)
87         if (isPreISelGenericOpcode(MI.getOpcode()) && !MLI->isLegal(MI, MRI)) {
88           reportGISelFailure(MF, TPC, MORE, "gisel-select",
89                              "instruction is not legal", MI);
90           return false;
91         }
92 
93 #endif
94   // FIXME: We could introduce new blocks and will need to fix the outer loop.
95   // Until then, keep track of the number of blocks to assert that we don't.
96   const size_t NumBlocks = MF.size();
97 
98   for (MachineBasicBlock *MBB : post_order(&MF)) {
99     if (MBB->empty())
100       continue;
101 
102     // Select instructions in reverse block order. We permit erasing so have
103     // to resort to manually iterating and recognizing the begin (rend) case.
104     bool ReachedBegin = false;
105     for (auto MII = std::prev(MBB->end()), Begin = MBB->begin();
106          !ReachedBegin;) {
107 #ifndef NDEBUG
108       // Keep track of the insertion range for debug printing.
109       const auto AfterIt = std::next(MII);
110 #endif
111       // Select this instruction.
112       MachineInstr &MI = *MII;
113 
114       // And have our iterator point to the next instruction, if there is one.
115       if (MII == Begin)
116         ReachedBegin = true;
117       else
118         --MII;
119 
120       DEBUG(dbgs() << "Selecting: \n  " << MI);
121 
122       // We could have folded this instruction away already, making it dead.
123       // If so, erase it.
124       if (isTriviallyDead(MI, MRI)) {
125         DEBUG(dbgs() << "Is dead; erasing.\n");
126         MI.eraseFromParentAndMarkDBGValuesForRemoval();
127         continue;
128       }
129 
130       if (!ISel->select(MI)) {
131         // FIXME: It would be nice to dump all inserted instructions.  It's
132         // not obvious how, esp. considering select() can insert after MI.
133         reportGISelFailure(MF, TPC, MORE, "gisel-select", "cannot select", MI);
134         return false;
135       }
136 
137       // Dump the range of instructions that MI expanded into.
138       DEBUG({
139         auto InsertedBegin = ReachedBegin ? MBB->begin() : std::next(MII);
140         dbgs() << "Into:\n";
141         for (auto &InsertedMI : make_range(InsertedBegin, AfterIt))
142           dbgs() << "  " << InsertedMI;
143         dbgs() << '\n';
144       });
145     }
146   }
147 
148   const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
149 
150   // Now that selection is complete, there are no more generic vregs.  Verify
151   // that the size of the now-constrained vreg is unchanged and that it has a
152   // register class.
153   for (auto &VRegToType : MRI.getVRegToType()) {
154     unsigned VReg = VRegToType.first;
155     auto *RC = MRI.getRegClassOrNull(VReg);
156     MachineInstr *MI = nullptr;
157     if (!MRI.def_empty(VReg))
158       MI = &*MRI.def_instr_begin(VReg);
159     else if (!MRI.use_empty(VReg))
160       MI = &*MRI.use_instr_begin(VReg);
161 
162     if (MI && !RC) {
163       reportGISelFailure(MF, TPC, MORE, "gisel-select",
164                          "VReg has no regclass after selection", *MI);
165       return false;
166     } else if (!RC)
167       continue;
168 
169     if (VRegToType.second.isValid() &&
170         VRegToType.second.getSizeInBits() > TRI.getRegSizeInBits(*RC)) {
171       reportGISelFailure(MF, TPC, MORE, "gisel-select",
172                          "VReg has explicit size different from class size",
173                          *MI);
174       return false;
175     }
176   }
177 
178   if (MF.size() != NumBlocks) {
179     MachineOptimizationRemarkMissed R("gisel-select", "GISelFailure",
180                                       MF.getFunction()->getSubprogram(),
181                                       /*MBB=*/nullptr);
182     R << "inserting blocks is not supported yet";
183     reportGISelFailure(MF, TPC, MORE, R);
184     return false;
185   }
186 
187   auto &TLI = *MF.getSubtarget().getTargetLowering();
188   TLI.finalizeLowering(MF);
189 
190   // FIXME: Should we accurately track changes?
191   return true;
192 }
193