1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #define DEBUG_TYPE "codegen-dce"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/Pass.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
24 using namespace llvm;
25 
26 STATISTIC(NumDeletes,          "Number of dead instructions deleted");
27 
28 namespace {
29   class DeadMachineInstructionElim : public MachineFunctionPass {
30     bool runOnMachineFunction(MachineFunction &MF) override;
31 
32     const TargetRegisterInfo *TRI;
33     const MachineRegisterInfo *MRI;
34     const TargetInstrInfo *TII;
35     BitVector LivePhysRegs;
36 
37   public:
38     static char ID; // Pass identification, replacement for typeid
39     DeadMachineInstructionElim() : MachineFunctionPass(ID) {
40      initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
41     }
42 
43   private:
44     bool isDead(const MachineInstr *MI) const;
45   };
46 }
47 char DeadMachineInstructionElim::ID = 0;
48 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
49 
50 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
51                 "Remove dead machine instructions", false, false)
52 
53 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
54   // Technically speaking inline asm without side effects and no defs can still
55   // be deleted. But there is so much bad inline asm code out there, we should
56   // let them be.
57   if (MI->isInlineAsm())
58     return false;
59 
60   // Don't delete instructions with side effects.
61   bool SawStore = false;
62   if (!MI->isSafeToMove(TII, nullptr, SawStore) && !MI->isPHI())
63     return false;
64 
65   // Examine each operand.
66   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
67     const MachineOperand &MO = MI->getOperand(i);
68     if (MO.isReg() && MO.isDef()) {
69       unsigned Reg = MO.getReg();
70       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
71         // Don't delete live physreg defs, or any reserved register defs.
72         if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
73           return false;
74       } else {
75         if (!MRI->use_nodbg_empty(Reg))
76           // This def has a non-debug use. Don't delete the instruction!
77           return false;
78       }
79     }
80   }
81 
82   // If there are no defs with uses, the instruction is dead.
83   return true;
84 }
85 
86 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
87   if (skipOptnoneFunction(*MF.getFunction()))
88     return false;
89 
90   bool AnyChanges = false;
91   MRI = &MF.getRegInfo();
92   TRI = MF.getTarget().getRegisterInfo();
93   TII = MF.getTarget().getInstrInfo();
94 
95   // Loop over all instructions in all blocks, from bottom to top, so that it's
96   // more likely that chains of dependent but ultimately dead instructions will
97   // be cleaned up.
98   for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
99        I != E; ++I) {
100     MachineBasicBlock *MBB = &*I;
101 
102     // Start out assuming that reserved registers are live out of this block.
103     LivePhysRegs = MRI->getReservedRegs();
104 
105     // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
106     // live across blocks, but some targets (x86) can have flags live out of a
107     // block.
108     for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
109            E = MBB->succ_end(); S != E; S++)
110       for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
111            LI != (*S)->livein_end(); LI++)
112         LivePhysRegs.set(*LI);
113 
114     // Now scan the instructions and delete dead ones, tracking physreg
115     // liveness as we go.
116     for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
117          MIE = MBB->rend(); MII != MIE; ) {
118       MachineInstr *MI = &*MII;
119 
120       // If the instruction is dead, delete it!
121       if (isDead(MI)) {
122         DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
123         // It is possible that some DBG_VALUE instructions refer to this
124         // instruction.  Examine each def operand for such references;
125         // if found, mark the DBG_VALUE as undef (but don't delete it).
126         for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
127           const MachineOperand &MO = MI->getOperand(i);
128           if (!MO.isReg() || !MO.isDef())
129             continue;
130           unsigned Reg = MO.getReg();
131           if (!TargetRegisterInfo::isVirtualRegister(Reg))
132             continue;
133           MRI->markUsesInDebugValueAsUndef(Reg);
134         }
135         AnyChanges = true;
136         MI->eraseFromParent();
137         ++NumDeletes;
138         MIE = MBB->rend();
139         // MII is now pointing to the next instruction to process,
140         // so don't increment it.
141         continue;
142       }
143 
144       // Record the physreg defs.
145       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
146         const MachineOperand &MO = MI->getOperand(i);
147         if (MO.isReg() && MO.isDef()) {
148           unsigned Reg = MO.getReg();
149           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
150             // Check the subreg set, not the alias set, because a def
151             // of a super-register may still be partially live after
152             // this def.
153             for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
154                  SR.isValid(); ++SR)
155               LivePhysRegs.reset(*SR);
156           }
157         } else if (MO.isRegMask()) {
158           // Register mask of preserved registers. All clobbers are dead.
159           LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
160         }
161       }
162       // Record the physreg uses, after the defs, in case a physreg is
163       // both defined and used in the same instruction.
164       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
165         const MachineOperand &MO = MI->getOperand(i);
166         if (MO.isReg() && MO.isUse()) {
167           unsigned Reg = MO.getReg();
168           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
169             for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
170               LivePhysRegs.set(*AI);
171           }
172         }
173       }
174 
175       // We didn't delete the current instruction, so increment MII to
176       // the next one.
177       ++MII;
178     }
179   }
180 
181   LivePhysRegs.clear();
182   return AnyChanges;
183 }
184