1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #define DEBUG_TYPE "codegen-dce"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/Pass.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetMachine.h"
24 using namespace llvm;
25 
26 STATISTIC(NumDeletes,          "Number of dead instructions deleted");
27 
28 namespace {
29   class DeadMachineInstructionElim : public MachineFunctionPass {
30     bool runOnMachineFunction(MachineFunction &MF) override;
31 
32     const TargetRegisterInfo *TRI;
33     const MachineRegisterInfo *MRI;
34     const TargetInstrInfo *TII;
35     BitVector LivePhysRegs;
36 
37   public:
38     static char ID; // Pass identification, replacement for typeid
39     DeadMachineInstructionElim() : MachineFunctionPass(ID) {
40      initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
41     }
42 
43   private:
44     bool isDead(const MachineInstr *MI) const;
45   };
46 }
47 char DeadMachineInstructionElim::ID = 0;
48 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
49 
50 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
51                 "Remove dead machine instructions", false, false)
52 
53 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
54   // Technically speaking inline asm without side effects and no defs can still
55   // be deleted. But there is so much bad inline asm code out there, we should
56   // let them be.
57   if (MI->isInlineAsm())
58     return false;
59 
60   // Don't delete instructions with side effects.
61   bool SawStore = false;
62   if (!MI->isSafeToMove(TII, 0, SawStore) && !MI->isPHI())
63     return false;
64 
65   // Examine each operand.
66   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
67     const MachineOperand &MO = MI->getOperand(i);
68     if (MO.isReg() && MO.isDef()) {
69       unsigned Reg = MO.getReg();
70       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
71         // Don't delete live physreg defs, or any reserved register defs.
72         if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
73           return false;
74       } else {
75         if (!MRI->use_nodbg_empty(Reg))
76           // This def has a non-debug use. Don't delete the instruction!
77           return false;
78       }
79     }
80   }
81 
82   // If there are no defs with uses, the instruction is dead.
83   return true;
84 }
85 
86 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
87   bool AnyChanges = false;
88   MRI = &MF.getRegInfo();
89   TRI = MF.getTarget().getRegisterInfo();
90   TII = MF.getTarget().getInstrInfo();
91 
92   // Loop over all instructions in all blocks, from bottom to top, so that it's
93   // more likely that chains of dependent but ultimately dead instructions will
94   // be cleaned up.
95   for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
96        I != E; ++I) {
97     MachineBasicBlock *MBB = &*I;
98 
99     // Start out assuming that reserved registers are live out of this block.
100     LivePhysRegs = MRI->getReservedRegs();
101 
102     // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
103     // live across blocks, but some targets (x86) can have flags live out of a
104     // block.
105     for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
106            E = MBB->succ_end(); S != E; S++)
107       for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
108            LI != (*S)->livein_end(); LI++)
109         LivePhysRegs.set(*LI);
110 
111     // Now scan the instructions and delete dead ones, tracking physreg
112     // liveness as we go.
113     for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
114          MIE = MBB->rend(); MII != MIE; ) {
115       MachineInstr *MI = &*MII;
116 
117       // If the instruction is dead, delete it!
118       if (isDead(MI)) {
119         DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
120         // It is possible that some DBG_VALUE instructions refer to this
121         // instruction.  Examine each def operand for such references;
122         // if found, mark the DBG_VALUE as undef (but don't delete it).
123         for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
124           const MachineOperand &MO = MI->getOperand(i);
125           if (!MO.isReg() || !MO.isDef())
126             continue;
127           unsigned Reg = MO.getReg();
128           if (!TargetRegisterInfo::isVirtualRegister(Reg))
129             continue;
130           MRI->markUsesInDebugValueAsUndef(Reg);
131         }
132         AnyChanges = true;
133         MI->eraseFromParent();
134         ++NumDeletes;
135         MIE = MBB->rend();
136         // MII is now pointing to the next instruction to process,
137         // so don't increment it.
138         continue;
139       }
140 
141       // Record the physreg defs.
142       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
143         const MachineOperand &MO = MI->getOperand(i);
144         if (MO.isReg() && MO.isDef()) {
145           unsigned Reg = MO.getReg();
146           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
147             // Check the subreg set, not the alias set, because a def
148             // of a super-register may still be partially live after
149             // this def.
150             for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
151                  SR.isValid(); ++SR)
152               LivePhysRegs.reset(*SR);
153           }
154         } else if (MO.isRegMask()) {
155           // Register mask of preserved registers. All clobbers are dead.
156           LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
157         }
158       }
159       // Record the physreg uses, after the defs, in case a physreg is
160       // both defined and used in the same instruction.
161       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
162         const MachineOperand &MO = MI->getOperand(i);
163         if (MO.isReg() && MO.isUse()) {
164           unsigned Reg = MO.getReg();
165           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
166             for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
167               LivePhysRegs.set(*AI);
168           }
169         }
170       }
171 
172       // We didn't delete the current instruction, so increment MII to
173       // the next one.
174       ++MII;
175     }
176   }
177 
178   LivePhysRegs.clear();
179   return AnyChanges;
180 }
181