1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/CodeGen/Passes.h"
15 #include "llvm/ADT/Statistic.h"
16 #include "llvm/CodeGen/MachineFunctionPass.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/Debug.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/Target/TargetSubtargetInfo.h"
23 
24 using namespace llvm;
25 
26 #define DEBUG_TYPE "codegen-dce"
27 
28 STATISTIC(NumDeletes,          "Number of dead instructions deleted");
29 
30 namespace {
31   class DeadMachineInstructionElim : public MachineFunctionPass {
32     bool runOnMachineFunction(MachineFunction &MF) override;
33 
34     const TargetRegisterInfo *TRI;
35     const MachineRegisterInfo *MRI;
36     const TargetInstrInfo *TII;
37     BitVector LivePhysRegs;
38 
39   public:
40     static char ID; // Pass identification, replacement for typeid
41     DeadMachineInstructionElim() : MachineFunctionPass(ID) {
42      initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
43     }
44 
45   private:
46     bool isDead(const MachineInstr *MI) const;
47   };
48 }
49 char DeadMachineInstructionElim::ID = 0;
50 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
51 
52 INITIALIZE_PASS(DeadMachineInstructionElim, "dead-mi-elimination",
53                 "Remove dead machine instructions", false, false)
54 
55 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
56   // Technically speaking inline asm without side effects and no defs can still
57   // be deleted. But there is so much bad inline asm code out there, we should
58   // let them be.
59   if (MI->isInlineAsm())
60     return false;
61 
62   // Don't delete frame allocation labels.
63   if (MI->getOpcode() == TargetOpcode::LOCAL_ESCAPE)
64     return false;
65 
66   // Don't delete instructions with side effects.
67   bool SawStore = false;
68   if (!MI->isSafeToMove(nullptr, SawStore) && !MI->isPHI())
69     return false;
70 
71   // Examine each operand.
72   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
73     const MachineOperand &MO = MI->getOperand(i);
74     if (MO.isReg() && MO.isDef()) {
75       unsigned Reg = MO.getReg();
76       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
77         // Don't delete live physreg defs, or any reserved register defs.
78         if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
79           return false;
80       } else {
81         if (!MRI->use_nodbg_empty(Reg))
82           // This def has a non-debug use. Don't delete the instruction!
83           return false;
84       }
85     }
86   }
87 
88   // If there are no defs with uses, the instruction is dead.
89   return true;
90 }
91 
92 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
93   if (skipOptnoneFunction(*MF.getFunction()))
94     return false;
95 
96   bool AnyChanges = false;
97   MRI = &MF.getRegInfo();
98   TRI = MF.getSubtarget().getRegisterInfo();
99   TII = MF.getSubtarget().getInstrInfo();
100 
101   // Loop over all instructions in all blocks, from bottom to top, so that it's
102   // more likely that chains of dependent but ultimately dead instructions will
103   // be cleaned up.
104   for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
105        I != E; ++I) {
106     MachineBasicBlock *MBB = &*I;
107 
108     // Start out assuming that reserved registers are live out of this block.
109     LivePhysRegs = MRI->getReservedRegs();
110 
111     // Add live-ins from sucessors to LivePhysRegs. Normally, physregs are not
112     // live across blocks, but some targets (x86) can have flags live out of a
113     // block.
114     for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(),
115            E = MBB->succ_end(); S != E; S++)
116       for (MachineBasicBlock::livein_iterator LI = (*S)->livein_begin();
117            LI != (*S)->livein_end(); LI++)
118         LivePhysRegs.set(*LI);
119 
120     // Now scan the instructions and delete dead ones, tracking physreg
121     // liveness as we go.
122     for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(),
123          MIE = MBB->rend(); MII != MIE; ) {
124       MachineInstr *MI = &*MII;
125 
126       // If the instruction is dead, delete it!
127       if (isDead(MI)) {
128         DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
129         // It is possible that some DBG_VALUE instructions refer to this
130         // instruction.  They get marked as undef and will be deleted
131         // in the live debug variable analysis.
132         MI->eraseFromParentAndMarkDBGValuesForRemoval();
133         AnyChanges = true;
134         ++NumDeletes;
135         MIE = MBB->rend();
136         // MII is now pointing to the next instruction to process,
137         // so don't increment it.
138         continue;
139       }
140 
141       // Record the physreg defs.
142       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
143         const MachineOperand &MO = MI->getOperand(i);
144         if (MO.isReg() && MO.isDef()) {
145           unsigned Reg = MO.getReg();
146           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
147             // Check the subreg set, not the alias set, because a def
148             // of a super-register may still be partially live after
149             // this def.
150             for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
151                  SR.isValid(); ++SR)
152               LivePhysRegs.reset(*SR);
153           }
154         } else if (MO.isRegMask()) {
155           // Register mask of preserved registers. All clobbers are dead.
156           LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
157         }
158       }
159       // Record the physreg uses, after the defs, in case a physreg is
160       // both defined and used in the same instruction.
161       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
162         const MachineOperand &MO = MI->getOperand(i);
163         if (MO.isReg() && MO.isUse()) {
164           unsigned Reg = MO.getReg();
165           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
166             for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
167               LivePhysRegs.set(*AI);
168           }
169         }
170       }
171 
172       // We didn't delete the current instruction, so increment MII to
173       // the next one.
174       ++MII;
175     }
176   }
177 
178   LivePhysRegs.clear();
179   return AnyChanges;
180 }
181