1 //===-- BranchRelaxation.cpp ----------------------------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "llvm/CodeGen/Passes.h" 11 #include "llvm/ADT/SmallVector.h" 12 #include "llvm/ADT/Statistic.h" 13 #include "llvm/CodeGen/MachineFunctionPass.h" 14 #include "llvm/CodeGen/RegisterScavenging.h" 15 #include "llvm/Target/TargetInstrInfo.h" 16 #include "llvm/Target/TargetSubtargetInfo.h" 17 #include "llvm/Support/Debug.h" 18 #include "llvm/Support/Format.h" 19 #include "llvm/Support/raw_ostream.h" 20 21 using namespace llvm; 22 23 #define DEBUG_TYPE "branch-relaxation" 24 25 STATISTIC(NumSplit, "Number of basic blocks split"); 26 STATISTIC(NumConditionalRelaxed, "Number of conditional branches relaxed"); 27 STATISTIC(NumUnconditionalRelaxed, "Number of unconditional branches relaxed"); 28 29 #define BRANCH_RELAX_NAME "Branch relaxation pass" 30 31 namespace { 32 class BranchRelaxation : public MachineFunctionPass { 33 /// BasicBlockInfo - Information about the offset and size of a single 34 /// basic block. 35 struct BasicBlockInfo { 36 /// Offset - Distance from the beginning of the function to the beginning 37 /// of this basic block. 38 /// 39 /// The offset is always aligned as required by the basic block. 40 unsigned Offset; 41 42 /// Size - Size of the basic block in bytes. If the block contains 43 /// inline assembly, this is a worst case estimate. 44 /// 45 /// The size does not include any alignment padding whether from the 46 /// beginning of the block, or from an aligned jump table at the end. 47 unsigned Size; 48 49 BasicBlockInfo() : Offset(0), Size(0) {} 50 51 /// Compute the offset immediately following this block. \p MBB is the next 52 /// block. 53 unsigned postOffset(const MachineBasicBlock &MBB) const { 54 unsigned PO = Offset + Size; 55 unsigned Align = MBB.getAlignment(); 56 if (Align == 0) 57 return PO; 58 59 unsigned AlignAmt = 1 << Align; 60 unsigned ParentAlign = MBB.getParent()->getAlignment(); 61 if (Align <= ParentAlign) 62 return PO + OffsetToAlignment(PO, AlignAmt); 63 64 // The alignment of this MBB is larger than the function's alignment, so we 65 // can't tell whether or not it will insert nops. Assume that it will. 66 return PO + AlignAmt + OffsetToAlignment(PO, AlignAmt); 67 } 68 }; 69 70 SmallVector<BasicBlockInfo, 16> BlockInfo; 71 std::unique_ptr<RegScavenger> RS; 72 73 MachineFunction *MF; 74 const TargetInstrInfo *TII; 75 76 bool relaxBranchInstructions(); 77 void scanFunction(); 78 79 MachineBasicBlock *createNewBlockAfter(MachineBasicBlock &BB); 80 81 MachineBasicBlock *splitBlockBeforeInstr(MachineInstr &MI, 82 MachineBasicBlock *DestBB); 83 void adjustBlockOffsets(MachineBasicBlock &MBB); 84 bool isBlockInRange(const MachineInstr &MI, const MachineBasicBlock &BB) const; 85 86 bool fixupConditionalBranch(MachineInstr &MI); 87 bool fixupUnconditionalBranch(MachineInstr &MI); 88 uint64_t computeBlockSize(const MachineBasicBlock &MBB) const; 89 unsigned getInstrOffset(const MachineInstr &MI) const; 90 void dumpBBs(); 91 void verify(); 92 93 public: 94 static char ID; 95 BranchRelaxation() : MachineFunctionPass(ID) { } 96 97 bool runOnMachineFunction(MachineFunction &MF) override; 98 99 StringRef getPassName() const override { 100 return BRANCH_RELAX_NAME; 101 } 102 }; 103 104 } 105 106 char BranchRelaxation::ID = 0; 107 char &llvm::BranchRelaxationPassID = BranchRelaxation::ID; 108 109 INITIALIZE_PASS(BranchRelaxation, DEBUG_TYPE, BRANCH_RELAX_NAME, false, false) 110 111 /// verify - check BBOffsets, BBSizes, alignment of islands 112 void BranchRelaxation::verify() { 113 #ifndef NDEBUG 114 unsigned PrevNum = MF->begin()->getNumber(); 115 for (MachineBasicBlock &MBB : *MF) { 116 unsigned Align = MBB.getAlignment(); 117 unsigned Num = MBB.getNumber(); 118 assert(BlockInfo[Num].Offset % (1u << Align) == 0); 119 assert(!Num || BlockInfo[PrevNum].postOffset(MBB) <= BlockInfo[Num].Offset); 120 assert(BlockInfo[Num].Size == computeBlockSize(MBB)); 121 PrevNum = Num; 122 } 123 #endif 124 } 125 126 /// print block size and offset information - debugging 127 void BranchRelaxation::dumpBBs() { 128 for (auto &MBB : *MF) { 129 const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()]; 130 dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset) 131 << format("size=%#x\n", BBI.Size); 132 } 133 } 134 135 /// scanFunction - Do the initial scan of the function, building up 136 /// information about each block. 137 void BranchRelaxation::scanFunction() { 138 BlockInfo.clear(); 139 BlockInfo.resize(MF->getNumBlockIDs()); 140 141 // First thing, compute the size of all basic blocks, and see if the function 142 // has any inline assembly in it. If so, we have to be conservative about 143 // alignment assumptions, as we don't know for sure the size of any 144 // instructions in the inline assembly. 145 for (MachineBasicBlock &MBB : *MF) 146 BlockInfo[MBB.getNumber()].Size = computeBlockSize(MBB); 147 148 // Compute block offsets and known bits. 149 adjustBlockOffsets(*MF->begin()); 150 } 151 152 /// computeBlockSize - Compute the size for MBB. 153 uint64_t BranchRelaxation::computeBlockSize(const MachineBasicBlock &MBB) const { 154 uint64_t Size = 0; 155 for (const MachineInstr &MI : MBB) 156 Size += TII->getInstSizeInBytes(MI); 157 return Size; 158 } 159 160 /// getInstrOffset - Return the current offset of the specified machine 161 /// instruction from the start of the function. This offset changes as stuff is 162 /// moved around inside the function. 163 unsigned BranchRelaxation::getInstrOffset(const MachineInstr &MI) const { 164 const MachineBasicBlock *MBB = MI.getParent(); 165 166 // The offset is composed of two things: the sum of the sizes of all MBB's 167 // before this instruction's block, and the offset from the start of the block 168 // it is in. 169 unsigned Offset = BlockInfo[MBB->getNumber()].Offset; 170 171 // Sum instructions before MI in MBB. 172 for (MachineBasicBlock::const_iterator I = MBB->begin(); &*I != &MI; ++I) { 173 assert(I != MBB->end() && "Didn't find MI in its own basic block?"); 174 Offset += TII->getInstSizeInBytes(*I); 175 } 176 177 return Offset; 178 } 179 180 void BranchRelaxation::adjustBlockOffsets(MachineBasicBlock &Start) { 181 unsigned PrevNum = Start.getNumber(); 182 for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) { 183 unsigned Num = MBB.getNumber(); 184 if (!Num) // block zero is never changed from offset zero. 185 continue; 186 // Get the offset and known bits at the end of the layout predecessor. 187 // Include the alignment of the current block. 188 BlockInfo[Num].Offset = BlockInfo[PrevNum].postOffset(MBB); 189 190 PrevNum = Num; 191 } 192 } 193 194 /// Insert a new empty basic block and insert it after \BB 195 MachineBasicBlock *BranchRelaxation::createNewBlockAfter(MachineBasicBlock &BB) { 196 // Create a new MBB for the code after the OrigBB. 197 MachineBasicBlock *NewBB = 198 MF->CreateMachineBasicBlock(BB.getBasicBlock()); 199 MF->insert(++BB.getIterator(), NewBB); 200 201 // Insert an entry into BlockInfo to align it properly with the block numbers. 202 BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo()); 203 204 return NewBB; 205 } 206 207 /// Split the basic block containing MI into two blocks, which are joined by 208 /// an unconditional branch. Update data structures and renumber blocks to 209 /// account for this change and returns the newly created block. 210 MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI, 211 MachineBasicBlock *DestBB) { 212 MachineBasicBlock *OrigBB = MI.getParent(); 213 214 // Create a new MBB for the code after the OrigBB. 215 MachineBasicBlock *NewBB = 216 MF->CreateMachineBasicBlock(OrigBB->getBasicBlock()); 217 MF->insert(++OrigBB->getIterator(), NewBB); 218 219 // Splice the instructions starting with MI over to NewBB. 220 NewBB->splice(NewBB->end(), OrigBB, MI.getIterator(), OrigBB->end()); 221 222 // Add an unconditional branch from OrigBB to NewBB. 223 // Note the new unconditional branch is not being recorded. 224 // There doesn't seem to be meaningful DebugInfo available; this doesn't 225 // correspond to anything in the source. 226 TII->insertUnconditionalBranch(*OrigBB, NewBB, DebugLoc()); 227 228 // Insert an entry into BlockInfo to align it properly with the block numbers. 229 BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo()); 230 231 232 NewBB->transferSuccessors(OrigBB); 233 OrigBB->addSuccessor(NewBB); 234 OrigBB->addSuccessor(DestBB); 235 236 // Cleanup potential unconditional branch to successor block. 237 // Note that updateTerminator may change the size of the blocks. 238 NewBB->updateTerminator(); 239 OrigBB->updateTerminator(); 240 241 // Figure out how large the OrigBB is. As the first half of the original 242 // block, it cannot contain a tablejump. The size includes 243 // the new jump we added. (It should be possible to do this without 244 // recounting everything, but it's very confusing, and this is rarely 245 // executed.) 246 BlockInfo[OrigBB->getNumber()].Size = computeBlockSize(*OrigBB); 247 248 // Figure out how large the NewMBB is. As the second half of the original 249 // block, it may contain a tablejump. 250 BlockInfo[NewBB->getNumber()].Size = computeBlockSize(*NewBB); 251 252 // All BBOffsets following these blocks must be modified. 253 adjustBlockOffsets(*OrigBB); 254 255 ++NumSplit; 256 257 return NewBB; 258 } 259 260 /// isBlockInRange - Returns true if the distance between specific MI and 261 /// specific BB can fit in MI's displacement field. 262 bool BranchRelaxation::isBlockInRange( 263 const MachineInstr &MI, const MachineBasicBlock &DestBB) const { 264 int64_t BrOffset = getInstrOffset(MI); 265 int64_t DestOffset = BlockInfo[DestBB.getNumber()].Offset; 266 267 if (TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - BrOffset)) 268 return true; 269 270 DEBUG( 271 dbgs() << "Out of range branch to destination BB#" << DestBB.getNumber() 272 << " from BB#" << MI.getParent()->getNumber() 273 << " to " << DestOffset 274 << " offset " << DestOffset - BrOffset 275 << '\t' << MI 276 ); 277 278 return false; 279 } 280 281 /// fixupConditionalBranch - Fix up a conditional branch whose destination is 282 /// too far away to fit in its displacement field. It is converted to an inverse 283 /// conditional branch + an unconditional branch to the destination. 284 bool BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) { 285 DebugLoc DL = MI.getDebugLoc(); 286 MachineBasicBlock *MBB = MI.getParent(); 287 MachineBasicBlock *TBB = nullptr, *FBB = nullptr; 288 SmallVector<MachineOperand, 4> Cond; 289 290 bool Fail = TII->analyzeBranch(*MBB, TBB, FBB, Cond); 291 assert(!Fail && "branches to be relaxed must be analyzable"); 292 (void)Fail; 293 294 // Add an unconditional branch to the destination and invert the branch 295 // condition to jump over it: 296 // tbz L1 297 // => 298 // tbnz L2 299 // b L1 300 // L2: 301 302 if (FBB && isBlockInRange(MI, *FBB)) { 303 // Last MI in the BB is an unconditional branch. We can simply invert the 304 // condition and swap destinations: 305 // beq L1 306 // b L2 307 // => 308 // bne L2 309 // b L1 310 DEBUG(dbgs() << " Invert condition and swap " 311 "its destination with " << MBB->back()); 312 313 TII->reverseBranchCondition(Cond); 314 int OldSize = 0, NewSize = 0; 315 TII->removeBranch(*MBB, &OldSize); 316 TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize); 317 318 BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize); 319 return true; 320 } else if (FBB) { 321 // We need to split the basic block here to obtain two long-range 322 // unconditional branches. 323 auto &NewBB = *MF->CreateMachineBasicBlock(MBB->getBasicBlock()); 324 MF->insert(++MBB->getIterator(), &NewBB); 325 326 // Insert an entry into BlockInfo to align it properly with the block 327 // numbers. 328 BlockInfo.insert(BlockInfo.begin() + NewBB.getNumber(), BasicBlockInfo()); 329 330 unsigned &NewBBSize = BlockInfo[NewBB.getNumber()].Size; 331 int NewBrSize; 332 TII->insertUnconditionalBranch(NewBB, FBB, DL, &NewBrSize); 333 NewBBSize += NewBrSize; 334 335 // Update the successor lists according to the transformation to follow. 336 // Do it here since if there's no split, no update is needed. 337 MBB->replaceSuccessor(FBB, &NewBB); 338 NewBB.addSuccessor(FBB); 339 } 340 341 // We now have an appropriate fall-through block in place (either naturally or 342 // just created), so we can invert the condition. 343 MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB)); 344 345 DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber() 346 << ", invert condition and change dest. to BB#" 347 << NextBB.getNumber() << '\n'); 348 349 unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size; 350 351 // Insert a new conditional branch and a new unconditional branch. 352 int RemovedSize = 0; 353 TII->reverseBranchCondition(Cond); 354 TII->removeBranch(*MBB, &RemovedSize); 355 MBBSize -= RemovedSize; 356 357 int AddedSize = 0; 358 TII->insertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize); 359 MBBSize += AddedSize; 360 361 // Finally, keep the block offsets up to date. 362 adjustBlockOffsets(*MBB); 363 return true; 364 } 365 366 bool BranchRelaxation::fixupUnconditionalBranch(MachineInstr &MI) { 367 MachineBasicBlock *MBB = MI.getParent(); 368 369 unsigned OldBrSize = TII->getInstSizeInBytes(MI); 370 MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI); 371 372 int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset; 373 int64_t SrcOffset = getInstrOffset(MI); 374 375 assert(!TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - SrcOffset)); 376 377 BlockInfo[MBB->getNumber()].Size -= OldBrSize; 378 379 MachineBasicBlock *BranchBB = MBB; 380 381 // If this was an expanded conditional branch, there is already a single 382 // unconditional branch in a block. 383 if (!MBB->empty()) { 384 BranchBB = createNewBlockAfter(*MBB); 385 386 // Add live outs. 387 for (const MachineBasicBlock *Succ : MBB->successors()) { 388 for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins()) 389 BranchBB->addLiveIn(LiveIn); 390 } 391 392 BranchBB->sortUniqueLiveIns(); 393 BranchBB->addSuccessor(DestBB); 394 MBB->replaceSuccessor(DestBB, BranchBB); 395 } 396 397 DebugLoc DL = MI.getDebugLoc(); 398 MI.eraseFromParent(); 399 BlockInfo[BranchBB->getNumber()].Size += TII->insertIndirectBranch( 400 *BranchBB, *DestBB, DL, DestOffset - SrcOffset, RS.get()); 401 402 adjustBlockOffsets(*MBB); 403 return true; 404 } 405 406 bool BranchRelaxation::relaxBranchInstructions() { 407 bool Changed = false; 408 409 // Relaxing branches involves creating new basic blocks, so re-eval 410 // end() for termination. 411 for (MachineFunction::iterator I = MF->begin(); I != MF->end(); ++I) { 412 MachineBasicBlock &MBB = *I; 413 414 auto Last = MBB.rbegin(); 415 if (Last == MBB.rend()) // Empty block. 416 continue; 417 418 // Expand the unconditional branch first if necessary. If there is a 419 // conditional branch, this will end up changing the branch destination of 420 // it to be over the newly inserted indirect branch block, which may avoid 421 // the need to try expanding the conditional branch first, saving an extra 422 // jump. 423 if (Last->isUnconditionalBranch()) { 424 // Unconditional branch destination might be unanalyzable, assume these 425 // are OK. 426 if (MachineBasicBlock *DestBB = TII->getBranchDestBlock(*Last)) { 427 if (!isBlockInRange(*Last, *DestBB)) { 428 fixupUnconditionalBranch(*Last); 429 ++NumUnconditionalRelaxed; 430 Changed = true; 431 } 432 } 433 } 434 435 // Loop over the conditional branches. 436 MachineBasicBlock::iterator Next; 437 for (MachineBasicBlock::iterator J = MBB.getFirstTerminator(); 438 J != MBB.end(); J = Next) { 439 Next = std::next(J); 440 MachineInstr &MI = *J; 441 442 if (MI.isConditionalBranch()) { 443 MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI); 444 if (!isBlockInRange(MI, *DestBB)) { 445 if (Next != MBB.end() && Next->isConditionalBranch()) { 446 // If there are multiple conditional branches, this isn't an 447 // analyzable block. Split later terminators into a new block so 448 // each one will be analyzable. 449 450 splitBlockBeforeInstr(*Next, DestBB); 451 } else { 452 fixupConditionalBranch(MI); 453 ++NumConditionalRelaxed; 454 } 455 456 Changed = true; 457 458 // This may have modified all of the terminators, so start over. 459 Next = MBB.getFirstTerminator(); 460 } 461 } 462 } 463 } 464 465 return Changed; 466 } 467 468 bool BranchRelaxation::runOnMachineFunction(MachineFunction &mf) { 469 MF = &mf; 470 471 DEBUG(dbgs() << "***** BranchRelaxation *****\n"); 472 473 const TargetSubtargetInfo &ST = MF->getSubtarget(); 474 TII = ST.getInstrInfo(); 475 476 const TargetRegisterInfo *TRI = ST.getRegisterInfo(); 477 if (TRI->trackLivenessAfterRegAlloc(*MF)) 478 RS.reset(new RegScavenger()); 479 480 // Renumber all of the machine basic blocks in the function, guaranteeing that 481 // the numbers agree with the position of the block in the function. 482 MF->RenumberBlocks(); 483 484 // Do the initial scan of the function, building up information about the 485 // sizes of each block. 486 scanFunction(); 487 488 DEBUG(dbgs() << " Basic blocks before relaxation\n"; dumpBBs();); 489 490 bool MadeChange = false; 491 while (relaxBranchInstructions()) 492 MadeChange = true; 493 494 // After a while, this might be made debug-only, but it is not expensive. 495 verify(); 496 497 DEBUG(dbgs() << " Basic blocks after relaxation\n\n"; dumpBBs()); 498 499 BlockInfo.clear(); 500 501 return MadeChange; 502 } 503