1 //===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains support for writing dwarf compile unit. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 14 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 15 16 #include "llvm/ADT/ArrayRef.h" 17 #include "llvm/ADT/None.h" 18 #include "llvm/ADT/Optional.h" 19 #include "llvm/ADT/SmallVector.h" 20 #include "llvm/IR/DebugInfoMetadata.h" 21 #include <cassert> 22 #include <cstdint> 23 #include <iterator> 24 25 namespace llvm { 26 27 class AsmPrinter; 28 class APInt; 29 class ByteStreamer; 30 class DwarfCompileUnit; 31 class DIELoc; 32 class TargetRegisterInfo; 33 34 /// Holds a DIExpression and keeps track of how many operands have been consumed 35 /// so far. 36 class DIExpressionCursor { 37 DIExpression::expr_op_iterator Start, End; 38 39 public: 40 DIExpressionCursor(const DIExpression *Expr) { 41 if (!Expr) { 42 assert(Start == End); 43 return; 44 } 45 Start = Expr->expr_op_begin(); 46 End = Expr->expr_op_end(); 47 } 48 49 DIExpressionCursor(ArrayRef<uint64_t> Expr) 50 : Start(Expr.begin()), End(Expr.end()) {} 51 52 DIExpressionCursor(const DIExpressionCursor &) = default; 53 54 /// Consume one operation. 55 Optional<DIExpression::ExprOperand> take() { 56 if (Start == End) 57 return None; 58 return *(Start++); 59 } 60 61 /// Consume N operations. 62 void consume(unsigned N) { std::advance(Start, N); } 63 64 /// Return the current operation. 65 Optional<DIExpression::ExprOperand> peek() const { 66 if (Start == End) 67 return None; 68 return *(Start); 69 } 70 71 /// Return the next operation. 72 Optional<DIExpression::ExprOperand> peekNext() const { 73 if (Start == End) 74 return None; 75 76 auto Next = Start.getNext(); 77 if (Next == End) 78 return None; 79 80 return *Next; 81 } 82 83 /// Determine whether there are any operations left in this expression. 84 operator bool() const { return Start != End; } 85 86 DIExpression::expr_op_iterator begin() const { return Start; } 87 DIExpression::expr_op_iterator end() const { return End; } 88 89 /// Retrieve the fragment information, if any. 90 Optional<DIExpression::FragmentInfo> getFragmentInfo() const { 91 return DIExpression::getFragmentInfo(Start, End); 92 } 93 }; 94 95 /// Base class containing the logic for constructing DWARF expressions 96 /// independently of whether they are emitted into a DIE or into a .debug_loc 97 /// entry. 98 class DwarfExpression { 99 protected: 100 /// Holds information about all subregisters comprising a register location. 101 struct Register { 102 int DwarfRegNo; 103 unsigned Size; 104 const char *Comment; 105 }; 106 107 DwarfCompileUnit &CU; 108 109 /// The register location, if any. 110 SmallVector<Register, 2> DwarfRegs; 111 112 /// Current Fragment Offset in Bits. 113 uint64_t OffsetInBits = 0; 114 unsigned DwarfVersion; 115 116 /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister. 117 unsigned SubRegisterSizeInBits = 0; 118 unsigned SubRegisterOffsetInBits = 0; 119 120 /// The kind of location description being produced. 121 enum { Unknown = 0, Register, Memory, Implicit } LocationKind = Unknown; 122 123 /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed 124 /// to represent a subregister. 125 void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) { 126 SubRegisterSizeInBits = SizeInBits; 127 SubRegisterOffsetInBits = OffsetInBits; 128 } 129 130 /// Add masking operations to stencil out a subregister. 131 void maskSubRegister(); 132 133 /// Output a dwarf operand and an optional assembler comment. 134 virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0; 135 136 /// Emit a raw signed value. 137 virtual void emitSigned(int64_t Value) = 0; 138 139 /// Emit a raw unsigned value. 140 virtual void emitUnsigned(uint64_t Value) = 0; 141 142 virtual void emitData1(uint8_t Value) = 0; 143 144 virtual void emitBaseTypeRef(uint64_t Idx) = 0; 145 146 /// Emit a normalized unsigned constant. 147 void emitConstu(uint64_t Value); 148 149 /// Return whether the given machine register is the frame register in the 150 /// current function. 151 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0; 152 153 /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF 154 /// register location description. 155 void addReg(int DwarfReg, const char *Comment = nullptr); 156 157 /// Emit a DW_OP_breg operation. 158 void addBReg(int DwarfReg, int Offset); 159 160 /// Emit DW_OP_fbreg <Offset>. 161 void addFBReg(int Offset); 162 163 /// Emit a partial DWARF register operation. 164 /// 165 /// \param MachineReg The register number. 166 /// \param MaxSize If the register must be composed from 167 /// sub-registers this is an upper bound 168 /// for how many bits the emitted DW_OP_piece 169 /// may cover. 170 /// 171 /// If size and offset is zero an operation for the entire register is 172 /// emitted: Some targets do not provide a DWARF register number for every 173 /// register. If this is the case, this function will attempt to emit a DWARF 174 /// register by emitting a fragment of a super-register or by piecing together 175 /// multiple subregisters that alias the register. 176 /// 177 /// \return false if no DWARF register exists for MachineReg. 178 bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg, 179 unsigned MaxSize = ~1U); 180 181 /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment. 182 /// \param OffsetInBits This is an optional offset into the location that 183 /// is at the top of the DWARF stack. 184 void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0); 185 186 /// Emit a shift-right dwarf operation. 187 void addShr(unsigned ShiftBy); 188 189 /// Emit a bitwise and dwarf operation. 190 void addAnd(unsigned Mask); 191 192 /// Emit a DW_OP_stack_value, if supported. 193 /// 194 /// The proper way to describe a constant value is DW_OP_constu <const>, 195 /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available 196 /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for 197 /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const 198 /// <const> actually describes a value at a constant address, not a constant 199 /// value. However, in the past there was no better way to describe a 200 /// constant value, so the producers and consumers started to rely on 201 /// heuristics to disambiguate the value vs. location status of the 202 /// expression. See PR21176 for more details. 203 void addStackValue(); 204 205 ~DwarfExpression() = default; 206 207 public: 208 DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU) 209 : CU(CU), DwarfVersion(DwarfVersion) {} 210 211 /// This needs to be called last to commit any pending changes. 212 void finalize(); 213 214 /// Emit a signed constant. 215 void addSignedConstant(int64_t Value); 216 217 /// Emit an unsigned constant. 218 void addUnsignedConstant(uint64_t Value); 219 220 /// Emit an unsigned constant. 221 void addUnsignedConstant(const APInt &Value); 222 223 bool isMemoryLocation() const { return LocationKind == Memory; } 224 bool isUnknownLocation() const { return LocationKind == Unknown; } 225 226 /// Lock this down to become a memory location description. 227 void setMemoryLocationKind() { 228 assert(LocationKind == Unknown); 229 LocationKind = Memory; 230 } 231 232 /// Emit a machine register location. As an optimization this may also consume 233 /// the prefix of a DwarfExpression if a more efficient representation for 234 /// combining the register location and the first operation exists. 235 /// 236 /// \param FragmentOffsetInBits If this is one fragment out of a 237 /// fragmented 238 /// location, this is the offset of the 239 /// fragment inside the entire variable. 240 /// \return false if no DWARF register exists 241 /// for MachineReg. 242 bool addMachineRegExpression(const TargetRegisterInfo &TRI, 243 DIExpressionCursor &Expr, unsigned MachineReg, 244 unsigned FragmentOffsetInBits = 0); 245 246 /// Emit all remaining operations in the DIExpressionCursor. 247 /// 248 /// \param FragmentOffsetInBits If this is one fragment out of multiple 249 /// locations, this is the offset of the 250 /// fragment inside the entire variable. 251 void addExpression(DIExpressionCursor &&Expr, 252 unsigned FragmentOffsetInBits = 0); 253 254 /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to 255 /// the fragment described by \c Expr. 256 void addFragmentOffset(const DIExpression *Expr); 257 258 void emitLegacySExt(unsigned FromBits); 259 void emitLegacyZExt(unsigned FromBits); 260 }; 261 262 /// DwarfExpression implementation for .debug_loc entries. 263 class DebugLocDwarfExpression final : public DwarfExpression { 264 ByteStreamer &BS; 265 266 void emitOp(uint8_t Op, const char *Comment = nullptr) override; 267 void emitSigned(int64_t Value) override; 268 void emitUnsigned(uint64_t Value) override; 269 void emitData1(uint8_t Value) override; 270 void emitBaseTypeRef(uint64_t Idx) override; 271 bool isFrameRegister(const TargetRegisterInfo &TRI, 272 unsigned MachineReg) override; 273 274 public: 275 DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS, DwarfCompileUnit &CU) 276 : DwarfExpression(DwarfVersion, CU), BS(BS) {} 277 }; 278 279 /// DwarfExpression implementation for singular DW_AT_location. 280 class DIEDwarfExpression final : public DwarfExpression { 281 const AsmPrinter &AP; 282 DIELoc &DIE; 283 284 void emitOp(uint8_t Op, const char *Comment = nullptr) override; 285 void emitSigned(int64_t Value) override; 286 void emitUnsigned(uint64_t Value) override; 287 void emitData1(uint8_t Value) override; 288 void emitBaseTypeRef(uint64_t Idx) override; 289 bool isFrameRegister(const TargetRegisterInfo &TRI, 290 unsigned MachineReg) override; 291 public: 292 DIEDwarfExpression(const AsmPrinter &AP, DwarfCompileUnit &CU, DIELoc &DIE); 293 294 DIELoc *finalize() { 295 DwarfExpression::finalize(); 296 return &DIE; 297 } 298 }; 299 300 } // end namespace llvm 301 302 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 303