1 //===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains support for writing dwarf compile unit.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16 
17 #include "llvm/IR/DebugInfo.h"
18 #include "llvm/Support/DataTypes.h"
19 
20 namespace llvm {
21 
22 class AsmPrinter;
23 class ByteStreamer;
24 class TargetRegisterInfo;
25 class DwarfUnit;
26 class DIELoc;
27 
28 /// Base class containing the logic for constructing DWARF expressions
29 /// independently of whether they are emitted into a DIE or into a .debug_loc
30 /// entry.
31 class DwarfExpression {
32 protected:
33   // Various convenience accessors that extract things out of AsmPrinter.
34   const TargetRegisterInfo &TRI;
35   unsigned DwarfVersion;
36 
37 public:
38   DwarfExpression(const TargetRegisterInfo &TRI,
39                   unsigned DwarfVersion)
40     : TRI(TRI), DwarfVersion(DwarfVersion) {}
41   virtual ~DwarfExpression() {}
42 
43   /// Output a dwarf operand and an optional assembler comment.
44   virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0;
45   /// Emit a raw signed value.
46   virtual void EmitSigned(int64_t Value) = 0;
47   /// Emit a raw unsigned value.
48   virtual void EmitUnsigned(uint64_t Value) = 0;
49   /// Return whether the given machine register is the frame register in the
50   /// current function.
51   virtual bool isFrameRegister(unsigned MachineReg) = 0;
52 
53   /// Emit a dwarf register operation.
54   void AddReg(int DwarfReg, const char *Comment = nullptr);
55   /// Emit an (double-)indirect dwarf register operation.
56   void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false);
57 
58   /// Emit a dwarf register operation for describing
59   /// - a small value occupying only part of a register or
60   /// - a register representing only part of a value.
61   void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
62   /// Emit a shift-right dwarf expression.
63   void AddShr(unsigned ShiftBy);
64   /// Emit a DW_OP_stack_value, if supported.
65   ///
66   /// The proper way to describe a constant value is
67   /// DW_OP_constu <const>, DW_OP_stack_value.
68   /// Unfortunately, DW_OP_stack_value was not available until DWARF-4,
69   /// so we will continue to generate DW_OP_constu <const> for DWARF-2
70   /// and DWARF-3. Technically, this is incorrect since DW_OP_const <const>
71   /// actually describes a value at a constant addess, not a constant value.
72   /// However, in the past there was no better way  to describe a constant
73   /// value, so the producers and consumers started to rely on heuristics
74   /// to disambiguate the value vs. location status of the expression.
75   /// See PR21176 for more details.
76   void AddStackValue();
77 
78   /// Emit an indirect dwarf register operation for the given machine register.
79   /// \return false if no DWARF register exists for MachineReg.
80   bool AddMachineRegIndirect(unsigned MachineReg, int Offset = 0);
81 
82   /// \brief Emit a partial DWARF register operation.
83   /// \param MachineReg        the register
84   /// \param PieceSizeInBits   size and
85   /// \param PieceOffsetInBits offset of the piece in bits, if this is one
86   ///                          piece of an aggregate value.
87   ///
88   /// If size and offset is zero an operation for the entire
89   /// register is emitted: Some targets do not provide a DWARF
90   /// register number for every register.  If this is the case, this
91   /// function will attempt to emit a DWARF register by emitting a
92   /// piece of a super-register or by piecing together multiple
93   /// subregisters that alias the register.
94   ///
95   /// \return false if no DWARF register exists for MachineReg.
96   bool AddMachineRegPiece(unsigned MachineReg, unsigned PieceSizeInBits = 0,
97                           unsigned PieceOffsetInBits = 0);
98 
99   /// Emit a signed constant.
100   void AddSignedConstant(int Value);
101   /// Emit an unsigned constant.
102   void AddUnsignedConstant(unsigned Value);
103   /// Emit an unsigned constant.
104   void AddUnsignedConstant(APInt Value);
105 
106   /// \brief Emit an entire expression on top of a machine register location.
107   ///
108   /// \param PieceOffsetInBits If this is one piece out of a fragmented
109   /// location, this is the offset of the piece inside the entire variable.
110   /// \return false if no DWARF register exists for MachineReg.
111   bool AddMachineRegExpression(const DIExpression *Expr, unsigned MachineReg,
112                                unsigned PieceOffsetInBits = 0);
113   /// Emit a the operations remaining the DIExpressionIterator I.
114   /// \param PieceOffsetInBits If this is one piece out of a fragmented
115   /// location, this is the offset of the piece inside the entire variable.
116   void AddExpression(DIExpression::expr_op_iterator I,
117                      DIExpression::expr_op_iterator E,
118                      unsigned PieceOffsetInBits = 0);
119 };
120 
121 /// DwarfExpression implementation for .debug_loc entries.
122 class DebugLocDwarfExpression : public DwarfExpression {
123   ByteStreamer &BS;
124 
125 public:
126   DebugLocDwarfExpression(const TargetRegisterInfo &TRI,
127                           unsigned DwarfVersion, ByteStreamer &BS)
128     : DwarfExpression(TRI, DwarfVersion), BS(BS) {}
129 
130   void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
131   void EmitSigned(int64_t Value) override;
132   void EmitUnsigned(uint64_t Value) override;
133   bool isFrameRegister(unsigned MachineReg) override;
134 };
135 
136 /// DwarfExpression implementation for singular DW_AT_location.
137 class DIEDwarfExpression : public DwarfExpression {
138 const AsmPrinter &AP;
139   DwarfUnit &DU;
140   DIELoc &DIE;
141 
142 public:
143   DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
144   void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
145   void EmitSigned(int64_t Value) override;
146   void EmitUnsigned(uint64_t Value) override;
147   bool isFrameRegister(unsigned MachineReg) override;
148 };
149 }
150 
151 #endif
152