1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements an allocation order for virtual registers.
11 //
12 // The preferred allocation order for a virtual register depends on allocation
13 // hints and target hooks. The AllocationOrder class encapsulates all of that.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #include "AllocationOrder.h"
18 #include "RegisterClassInfo.h"
19 #include "VirtRegMap.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 
22 using namespace llvm;
23 
24 // Compare VirtRegMap::getRegAllocPref().
25 AllocationOrder::AllocationOrder(unsigned VirtReg,
26                                  const VirtRegMap &VRM,
27                                  const RegisterClassInfo &RegClassInfo)
28   : Pos(0), RCI(RegClassInfo) {
29   const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
30   std::pair<unsigned, unsigned> HintPair =
31     VRM.getRegInfo().getRegAllocationHint(VirtReg);
32 
33   // HintPair.second is a register, phys or virt.
34   Hint = HintPair.second;
35 
36   // Translate to physreg, or 0 if not assigned yet.
37   if (TargetRegisterInfo::isVirtualRegister(Hint))
38     Hint = VRM.getPhys(Hint);
39 
40   // The remaining allocation order may depend on the hint.
41   tie(Begin, End) = VRM.getTargetRegInfo()
42         .getAllocationOrder(RC, HintPair.first, Hint, VRM.getMachineFunction());
43 
44   // Target-dependent hints require resolution.
45   if (HintPair.first)
46     Hint = VRM.getTargetRegInfo().ResolveRegAllocHint(HintPair.first, Hint,
47                                                       VRM.getMachineFunction());
48 
49   // The hint must be a valid physreg for allocation.
50   if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
51                !RC->contains(Hint) || RCI.isReserved(Hint)))
52     Hint = 0;
53 }
54 
55 unsigned AllocationOrder::next() {
56   // First take the hint.
57   if (!Pos) {
58     Pos = Begin;
59     if (Hint)
60       return Hint;
61   }
62   // Then look at the order from TRI.
63   while(Pos != End) {
64     unsigned Reg = *Pos++;
65     if (Reg != Hint && !RCI.isReserved(Reg))
66       return Reg;
67   }
68   return 0;
69 }
70