1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements an allocation order for virtual registers. 11 // 12 // The preferred allocation order for a virtual register depends on allocation 13 // hints and target hooks. The AllocationOrder class encapsulates all of that. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "AllocationOrder.h" 18 #include "VirtRegMap.h" 19 #include "llvm/CodeGen/MachineRegisterInfo.h" 20 21 using namespace llvm; 22 23 // Compare VirtRegMap::getRegAllocPref(). 24 AllocationOrder::AllocationOrder(unsigned VirtReg, 25 const VirtRegMap &VRM, 26 const BitVector &ReservedRegs) 27 : Pos(0), Reserved(ReservedRegs) { 28 const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg); 29 std::pair<unsigned, unsigned> HintPair = 30 VRM.getRegInfo().getRegAllocationHint(VirtReg); 31 32 // HintPair.second is a register, phys or virt. 33 Hint = HintPair.second; 34 35 // Translate to physreg, or 0 if not assigned yet. 36 if (TargetRegisterInfo::isVirtualRegister(Hint)) 37 Hint = VRM.getPhys(Hint); 38 39 // The remaining allocation order may depend on the hint. 40 tie(Begin, End) = VRM.getTargetRegInfo() 41 .getAllocationOrder(RC, HintPair.first, Hint, VRM.getMachineFunction()); 42 43 // Target-dependent hints require resolution. 44 if (HintPair.first) 45 Hint = VRM.getTargetRegInfo().ResolveRegAllocHint(HintPair.first, Hint, 46 VRM.getMachineFunction()); 47 48 // The hint must be a valid physreg for allocation. 49 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) || 50 !RC->contains(Hint) || ReservedRegs.test(Hint))) 51 Hint = 0; 52 } 53 54 unsigned AllocationOrder::next() { 55 // First take the hint. 56 if (!Pos) { 57 Pos = Begin; 58 if (Hint) 59 return Hint; 60 } 61 // Then look at the order from TRI. 62 while(Pos != End) { 63 unsigned Reg = *Pos++; 64 if (Reg != Hint && !Reserved.test(Reg)) 65 return Reg; 66 } 67 return 0; 68 } 69