10c67e01eSJakob Stoklund Olesen //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
20c67e01eSJakob Stoklund Olesen //
30c67e01eSJakob Stoklund Olesen //                     The LLVM Compiler Infrastructure
40c67e01eSJakob Stoklund Olesen //
50c67e01eSJakob Stoklund Olesen // This file is distributed under the University of Illinois Open Source
60c67e01eSJakob Stoklund Olesen // License. See LICENSE.TXT for details.
70c67e01eSJakob Stoklund Olesen //
80c67e01eSJakob Stoklund Olesen //===----------------------------------------------------------------------===//
90c67e01eSJakob Stoklund Olesen //
100c67e01eSJakob Stoklund Olesen // This file implements an allocation order for virtual registers.
110c67e01eSJakob Stoklund Olesen //
120c67e01eSJakob Stoklund Olesen // The preferred allocation order for a virtual register depends on allocation
130c67e01eSJakob Stoklund Olesen // hints and target hooks. The AllocationOrder class encapsulates all of that.
140c67e01eSJakob Stoklund Olesen //
150c67e01eSJakob Stoklund Olesen //===----------------------------------------------------------------------===//
160c67e01eSJakob Stoklund Olesen 
170c67e01eSJakob Stoklund Olesen #include "AllocationOrder.h"
18c784a1f9SJakob Stoklund Olesen #include "llvm/CodeGen/MachineFunction.h"
190c67e01eSJakob Stoklund Olesen #include "llvm/CodeGen/MachineRegisterInfo.h"
2005ff4667SAndrew Trick #include "llvm/CodeGen/RegisterClassInfo.h"
2126c9d70dSJakob Stoklund Olesen #include "llvm/CodeGen/VirtRegMap.h"
22c784a1f9SJakob Stoklund Olesen #include "llvm/Support/Debug.h"
23c784a1f9SJakob Stoklund Olesen #include "llvm/Support/raw_ostream.h"
240c67e01eSJakob Stoklund Olesen 
250c67e01eSJakob Stoklund Olesen using namespace llvm;
260c67e01eSJakob Stoklund Olesen 
271b9dde08SChandler Carruth #define DEBUG_TYPE "regalloc"
281b9dde08SChandler Carruth 
290c67e01eSJakob Stoklund Olesen // Compare VirtRegMap::getRegAllocPref().
300c67e01eSJakob Stoklund Olesen AllocationOrder::AllocationOrder(unsigned VirtReg,
310c67e01eSJakob Stoklund Olesen                                  const VirtRegMap &VRM,
325d1f12d1SMatthias Braun                                  const RegisterClassInfo &RegClassInfo,
335d1f12d1SMatthias Braun                                  const LiveRegMatrix *Matrix)
344b017e68SJonas Paulsson   : Pos(0), HardHints(false) {
35c784a1f9SJakob Stoklund Olesen   const MachineFunction &MF = VRM.getMachineFunction();
36c784a1f9SJakob Stoklund Olesen   const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
37c784a1f9SJakob Stoklund Olesen   Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
384b017e68SJonas Paulsson   if (TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix))
394b017e68SJonas Paulsson     HardHints = true;
403cb2cb80SJakob Stoklund Olesen   rewind();
410c67e01eSJakob Stoklund Olesen 
42*d34e60caSNicola Zaghen   LLVM_DEBUG({
43c784a1f9SJakob Stoklund Olesen     if (!Hints.empty()) {
44c784a1f9SJakob Stoklund Olesen       dbgs() << "hints:";
45c784a1f9SJakob Stoklund Olesen       for (unsigned I = 0, E = Hints.size(); I != E; ++I)
469d419d3bSFrancis Visoiu Mistrih         dbgs() << ' ' << printReg(Hints[I], TRI);
47c784a1f9SJakob Stoklund Olesen       dbgs() << '\n';
48c784a1f9SJakob Stoklund Olesen     }
49c784a1f9SJakob Stoklund Olesen   });
507e28db01SJakob Stoklund Olesen #ifndef NDEBUG
517e28db01SJakob Stoklund Olesen   for (unsigned I = 0, E = Hints.size(); I != E; ++I)
520d955d0bSDavid Majnemer     assert(is_contained(Order, Hints[I]) &&
537e28db01SJakob Stoklund Olesen            "Target hint is outside allocation order.");
547e28db01SJakob Stoklund Olesen #endif
550cde8eb9SJakob Stoklund Olesen }
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