10c67e01eSJakob Stoklund Olesen //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===// 20c67e01eSJakob Stoklund Olesen // 30c67e01eSJakob Stoklund Olesen // The LLVM Compiler Infrastructure 40c67e01eSJakob Stoklund Olesen // 50c67e01eSJakob Stoklund Olesen // This file is distributed under the University of Illinois Open Source 60c67e01eSJakob Stoklund Olesen // License. See LICENSE.TXT for details. 70c67e01eSJakob Stoklund Olesen // 80c67e01eSJakob Stoklund Olesen //===----------------------------------------------------------------------===// 90c67e01eSJakob Stoklund Olesen // 100c67e01eSJakob Stoklund Olesen // This file implements an allocation order for virtual registers. 110c67e01eSJakob Stoklund Olesen // 120c67e01eSJakob Stoklund Olesen // The preferred allocation order for a virtual register depends on allocation 130c67e01eSJakob Stoklund Olesen // hints and target hooks. The AllocationOrder class encapsulates all of that. 140c67e01eSJakob Stoklund Olesen // 150c67e01eSJakob Stoklund Olesen //===----------------------------------------------------------------------===// 160c67e01eSJakob Stoklund Olesen 17c784a1f9SJakob Stoklund Olesen #define DEBUG_TYPE "regalloc" 180c67e01eSJakob Stoklund Olesen #include "AllocationOrder.h" 19c784a1f9SJakob Stoklund Olesen #include "llvm/CodeGen/MachineFunction.h" 200c67e01eSJakob Stoklund Olesen #include "llvm/CodeGen/MachineRegisterInfo.h" 2105ff4667SAndrew Trick #include "llvm/CodeGen/RegisterClassInfo.h" 2226c9d70dSJakob Stoklund Olesen #include "llvm/CodeGen/VirtRegMap.h" 23c784a1f9SJakob Stoklund Olesen #include "llvm/Support/Debug.h" 24c784a1f9SJakob Stoklund Olesen #include "llvm/Support/raw_ostream.h" 25*802d7555SChandler Carruth #include "llvm/Target/TargetMachine.h" 260c67e01eSJakob Stoklund Olesen 270c67e01eSJakob Stoklund Olesen using namespace llvm; 280c67e01eSJakob Stoklund Olesen 290c67e01eSJakob Stoklund Olesen // Compare VirtRegMap::getRegAllocPref(). 300c67e01eSJakob Stoklund Olesen AllocationOrder::AllocationOrder(unsigned VirtReg, 310c67e01eSJakob Stoklund Olesen const VirtRegMap &VRM, 32b8bf3c0fSJakob Stoklund Olesen const RegisterClassInfo &RegClassInfo) 33c784a1f9SJakob Stoklund Olesen : Pos(0) { 34c784a1f9SJakob Stoklund Olesen const MachineFunction &MF = VRM.getMachineFunction(); 35c784a1f9SJakob Stoklund Olesen const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo(); 36c784a1f9SJakob Stoklund Olesen Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); 37c784a1f9SJakob Stoklund Olesen TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM); 380c67e01eSJakob Stoklund Olesen 39c784a1f9SJakob Stoklund Olesen DEBUG({ 40c784a1f9SJakob Stoklund Olesen if (!Hints.empty()) { 41c784a1f9SJakob Stoklund Olesen dbgs() << "hints:"; 42c784a1f9SJakob Stoklund Olesen for (unsigned I = 0, E = Hints.size(); I != E; ++I) 43c784a1f9SJakob Stoklund Olesen dbgs() << ' ' << PrintReg(Hints[I], TRI); 44c784a1f9SJakob Stoklund Olesen dbgs() << '\n'; 45c784a1f9SJakob Stoklund Olesen } 46c784a1f9SJakob Stoklund Olesen }); 470cde8eb9SJakob Stoklund Olesen } 480c67e01eSJakob Stoklund Olesen 49c784a1f9SJakob Stoklund Olesen bool AllocationOrder::isHint(unsigned PhysReg) const { 50c784a1f9SJakob Stoklund Olesen return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end(); 510c67e01eSJakob Stoklund Olesen } 520c67e01eSJakob Stoklund Olesen 53c784a1f9SJakob Stoklund Olesen unsigned AllocationOrder::next() { 54c784a1f9SJakob Stoklund Olesen if (Pos < Hints.size()) 55c784a1f9SJakob Stoklund Olesen return Hints[Pos++]; 56c784a1f9SJakob Stoklund Olesen ArrayRef<MCPhysReg>::iterator I = Order.begin() + (Pos - Hints.size()); 57c784a1f9SJakob Stoklund Olesen ArrayRef<MCPhysReg>::iterator E = Order.end(); 58c784a1f9SJakob Stoklund Olesen while (I != E) { 59c784a1f9SJakob Stoklund Olesen unsigned Reg = *I++; 60c784a1f9SJakob Stoklund Olesen ++Pos; 61c784a1f9SJakob Stoklund Olesen if (!isHint(Reg)) 62c784a1f9SJakob Stoklund Olesen return Reg; 63c784a1f9SJakob Stoklund Olesen } 64c784a1f9SJakob Stoklund Olesen return 0; 650c67e01eSJakob Stoklund Olesen } 66