1 //===----------- VectorUtils.cpp - Vectorizer utility functions -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines vectorizer utilities.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/Analysis/VectorUtils.h"
14 #include "llvm/ADT/EquivalenceClasses.h"
15 #include "llvm/Analysis/DemandedBits.h"
16 #include "llvm/Analysis/LoopInfo.h"
17 #include "llvm/Analysis/LoopIterator.h"
18 #include "llvm/Analysis/ScalarEvolution.h"
19 #include "llvm/Analysis/ScalarEvolutionExpressions.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/Analysis/ValueTracking.h"
22 #include "llvm/IR/Constants.h"
23 #include "llvm/IR/GetElementPtrTypeIterator.h"
24 #include "llvm/IR/IRBuilder.h"
25 #include "llvm/IR/PatternMatch.h"
26 #include "llvm/IR/Value.h"
27 
28 #define DEBUG_TYPE "vectorutils"
29 
30 using namespace llvm;
31 using namespace llvm::PatternMatch;
32 
33 /// Maximum factor for an interleaved memory access.
34 static cl::opt<unsigned> MaxInterleaveGroupFactor(
35     "max-interleave-group-factor", cl::Hidden,
36     cl::desc("Maximum factor for an interleaved access group (default = 8)"),
37     cl::init(8));
38 
39 /// Return true if all of the intrinsic's arguments and return type are scalars
40 /// for the scalar form of the intrinsic and vectors for the vector form of the
41 /// intrinsic.
42 bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {
43   switch (ID) {
44   case Intrinsic::bswap: // Begin integer bit-manipulation.
45   case Intrinsic::bitreverse:
46   case Intrinsic::ctpop:
47   case Intrinsic::ctlz:
48   case Intrinsic::cttz:
49   case Intrinsic::fshl:
50   case Intrinsic::fshr:
51   case Intrinsic::sadd_sat:
52   case Intrinsic::ssub_sat:
53   case Intrinsic::uadd_sat:
54   case Intrinsic::usub_sat:
55   case Intrinsic::smul_fix:
56   case Intrinsic::umul_fix:
57   case Intrinsic::sqrt: // Begin floating-point.
58   case Intrinsic::sin:
59   case Intrinsic::cos:
60   case Intrinsic::exp:
61   case Intrinsic::exp2:
62   case Intrinsic::log:
63   case Intrinsic::log10:
64   case Intrinsic::log2:
65   case Intrinsic::fabs:
66   case Intrinsic::minnum:
67   case Intrinsic::maxnum:
68   case Intrinsic::minimum:
69   case Intrinsic::maximum:
70   case Intrinsic::copysign:
71   case Intrinsic::floor:
72   case Intrinsic::ceil:
73   case Intrinsic::trunc:
74   case Intrinsic::rint:
75   case Intrinsic::nearbyint:
76   case Intrinsic::round:
77   case Intrinsic::pow:
78   case Intrinsic::fma:
79   case Intrinsic::fmuladd:
80   case Intrinsic::powi:
81   case Intrinsic::canonicalize:
82     return true;
83   default:
84     return false;
85   }
86 }
87 
88 /// Identifies if the intrinsic has a scalar operand. It check for
89 /// ctlz,cttz and powi special intrinsics whose argument is scalar.
90 bool llvm::hasVectorInstrinsicScalarOpd(Intrinsic::ID ID,
91                                         unsigned ScalarOpdIdx) {
92   switch (ID) {
93   case Intrinsic::ctlz:
94   case Intrinsic::cttz:
95   case Intrinsic::powi:
96     return (ScalarOpdIdx == 1);
97   case Intrinsic::smul_fix:
98   case Intrinsic::umul_fix:
99     return (ScalarOpdIdx == 2);
100   default:
101     return false;
102   }
103 }
104 
105 /// Returns intrinsic ID for call.
106 /// For the input call instruction it finds mapping intrinsic and returns
107 /// its ID, in case it does not found it return not_intrinsic.
108 Intrinsic::ID llvm::getVectorIntrinsicIDForCall(const CallInst *CI,
109                                                 const TargetLibraryInfo *TLI) {
110   Intrinsic::ID ID = getIntrinsicForCallSite(CI, TLI);
111   if (ID == Intrinsic::not_intrinsic)
112     return Intrinsic::not_intrinsic;
113 
114   if (isTriviallyVectorizable(ID) || ID == Intrinsic::lifetime_start ||
115       ID == Intrinsic::lifetime_end || ID == Intrinsic::assume ||
116       ID == Intrinsic::sideeffect)
117     return ID;
118   return Intrinsic::not_intrinsic;
119 }
120 
121 /// Find the operand of the GEP that should be checked for consecutive
122 /// stores. This ignores trailing indices that have no effect on the final
123 /// pointer.
124 unsigned llvm::getGEPInductionOperand(const GetElementPtrInst *Gep) {
125   const DataLayout &DL = Gep->getModule()->getDataLayout();
126   unsigned LastOperand = Gep->getNumOperands() - 1;
127   unsigned GEPAllocSize = DL.getTypeAllocSize(Gep->getResultElementType());
128 
129   // Walk backwards and try to peel off zeros.
130   while (LastOperand > 1 && match(Gep->getOperand(LastOperand), m_Zero())) {
131     // Find the type we're currently indexing into.
132     gep_type_iterator GEPTI = gep_type_begin(Gep);
133     std::advance(GEPTI, LastOperand - 2);
134 
135     // If it's a type with the same allocation size as the result of the GEP we
136     // can peel off the zero index.
137     if (DL.getTypeAllocSize(GEPTI.getIndexedType()) != GEPAllocSize)
138       break;
139     --LastOperand;
140   }
141 
142   return LastOperand;
143 }
144 
145 /// If the argument is a GEP, then returns the operand identified by
146 /// getGEPInductionOperand. However, if there is some other non-loop-invariant
147 /// operand, it returns that instead.
148 Value *llvm::stripGetElementPtr(Value *Ptr, ScalarEvolution *SE, Loop *Lp) {
149   GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Ptr);
150   if (!GEP)
151     return Ptr;
152 
153   unsigned InductionOperand = getGEPInductionOperand(GEP);
154 
155   // Check that all of the gep indices are uniform except for our induction
156   // operand.
157   for (unsigned i = 0, e = GEP->getNumOperands(); i != e; ++i)
158     if (i != InductionOperand &&
159         !SE->isLoopInvariant(SE->getSCEV(GEP->getOperand(i)), Lp))
160       return Ptr;
161   return GEP->getOperand(InductionOperand);
162 }
163 
164 /// If a value has only one user that is a CastInst, return it.
165 Value *llvm::getUniqueCastUse(Value *Ptr, Loop *Lp, Type *Ty) {
166   Value *UniqueCast = nullptr;
167   for (User *U : Ptr->users()) {
168     CastInst *CI = dyn_cast<CastInst>(U);
169     if (CI && CI->getType() == Ty) {
170       if (!UniqueCast)
171         UniqueCast = CI;
172       else
173         return nullptr;
174     }
175   }
176   return UniqueCast;
177 }
178 
179 /// Get the stride of a pointer access in a loop. Looks for symbolic
180 /// strides "a[i*stride]". Returns the symbolic stride, or null otherwise.
181 Value *llvm::getStrideFromPointer(Value *Ptr, ScalarEvolution *SE, Loop *Lp) {
182   auto *PtrTy = dyn_cast<PointerType>(Ptr->getType());
183   if (!PtrTy || PtrTy->isAggregateType())
184     return nullptr;
185 
186   // Try to remove a gep instruction to make the pointer (actually index at this
187   // point) easier analyzable. If OrigPtr is equal to Ptr we are analyzing the
188   // pointer, otherwise, we are analyzing the index.
189   Value *OrigPtr = Ptr;
190 
191   // The size of the pointer access.
192   int64_t PtrAccessSize = 1;
193 
194   Ptr = stripGetElementPtr(Ptr, SE, Lp);
195   const SCEV *V = SE->getSCEV(Ptr);
196 
197   if (Ptr != OrigPtr)
198     // Strip off casts.
199     while (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(V))
200       V = C->getOperand();
201 
202   const SCEVAddRecExpr *S = dyn_cast<SCEVAddRecExpr>(V);
203   if (!S)
204     return nullptr;
205 
206   V = S->getStepRecurrence(*SE);
207   if (!V)
208     return nullptr;
209 
210   // Strip off the size of access multiplication if we are still analyzing the
211   // pointer.
212   if (OrigPtr == Ptr) {
213     if (const SCEVMulExpr *M = dyn_cast<SCEVMulExpr>(V)) {
214       if (M->getOperand(0)->getSCEVType() != scConstant)
215         return nullptr;
216 
217       const APInt &APStepVal = cast<SCEVConstant>(M->getOperand(0))->getAPInt();
218 
219       // Huge step value - give up.
220       if (APStepVal.getBitWidth() > 64)
221         return nullptr;
222 
223       int64_t StepVal = APStepVal.getSExtValue();
224       if (PtrAccessSize != StepVal)
225         return nullptr;
226       V = M->getOperand(1);
227     }
228   }
229 
230   // Strip off casts.
231   Type *StripedOffRecurrenceCast = nullptr;
232   if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(V)) {
233     StripedOffRecurrenceCast = C->getType();
234     V = C->getOperand();
235   }
236 
237   // Look for the loop invariant symbolic value.
238   const SCEVUnknown *U = dyn_cast<SCEVUnknown>(V);
239   if (!U)
240     return nullptr;
241 
242   Value *Stride = U->getValue();
243   if (!Lp->isLoopInvariant(Stride))
244     return nullptr;
245 
246   // If we have stripped off the recurrence cast we have to make sure that we
247   // return the value that is used in this loop so that we can replace it later.
248   if (StripedOffRecurrenceCast)
249     Stride = getUniqueCastUse(Stride, Lp, StripedOffRecurrenceCast);
250 
251   return Stride;
252 }
253 
254 /// Given a vector and an element number, see if the scalar value is
255 /// already around as a register, for example if it were inserted then extracted
256 /// from the vector.
257 Value *llvm::findScalarElement(Value *V, unsigned EltNo) {
258   assert(V->getType()->isVectorTy() && "Not looking at a vector?");
259   VectorType *VTy = cast<VectorType>(V->getType());
260   unsigned Width = VTy->getNumElements();
261   if (EltNo >= Width)  // Out of range access.
262     return UndefValue::get(VTy->getElementType());
263 
264   if (Constant *C = dyn_cast<Constant>(V))
265     return C->getAggregateElement(EltNo);
266 
267   if (InsertElementInst *III = dyn_cast<InsertElementInst>(V)) {
268     // If this is an insert to a variable element, we don't know what it is.
269     if (!isa<ConstantInt>(III->getOperand(2)))
270       return nullptr;
271     unsigned IIElt = cast<ConstantInt>(III->getOperand(2))->getZExtValue();
272 
273     // If this is an insert to the element we are looking for, return the
274     // inserted value.
275     if (EltNo == IIElt)
276       return III->getOperand(1);
277 
278     // Otherwise, the insertelement doesn't modify the value, recurse on its
279     // vector input.
280     return findScalarElement(III->getOperand(0), EltNo);
281   }
282 
283   if (ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(V)) {
284     unsigned LHSWidth = SVI->getOperand(0)->getType()->getVectorNumElements();
285     int InEl = SVI->getMaskValue(EltNo);
286     if (InEl < 0)
287       return UndefValue::get(VTy->getElementType());
288     if (InEl < (int)LHSWidth)
289       return findScalarElement(SVI->getOperand(0), InEl);
290     return findScalarElement(SVI->getOperand(1), InEl - LHSWidth);
291   }
292 
293   // Extract a value from a vector add operation with a constant zero.
294   // TODO: Use getBinOpIdentity() to generalize this.
295   Value *Val; Constant *C;
296   if (match(V, m_Add(m_Value(Val), m_Constant(C))))
297     if (Constant *Elt = C->getAggregateElement(EltNo))
298       if (Elt->isNullValue())
299         return findScalarElement(Val, EltNo);
300 
301   // Otherwise, we don't know.
302   return nullptr;
303 }
304 
305 /// Get splat value if the input is a splat vector or return nullptr.
306 /// This function is not fully general. It checks only 2 cases:
307 /// the input value is (1) a splat constant vector or (2) a sequence
308 /// of instructions that broadcasts a scalar at element 0.
309 const llvm::Value *llvm::getSplatValue(const Value *V) {
310   if (isa<VectorType>(V->getType()))
311     if (auto *C = dyn_cast<Constant>(V))
312       return C->getSplatValue();
313 
314   // shuf (inselt ?, Splat, 0), ?, <0, undef, 0, ...>
315   Value *Splat;
316   if (match(V, m_ShuffleVector(m_InsertElement(m_Value(), m_Value(Splat),
317                                                m_ZeroInt()),
318                                m_Value(), m_ZeroInt())))
319     return Splat;
320 
321   return nullptr;
322 }
323 
324 // This setting is based on its counterpart in value tracking, but it could be
325 // adjusted if needed.
326 const unsigned MaxDepth = 6;
327 
328 bool llvm::isSplatValue(const Value *V, unsigned Depth) {
329   assert(Depth <= MaxDepth && "Limit Search Depth");
330 
331   if (isa<VectorType>(V->getType())) {
332     if (isa<UndefValue>(V))
333       return true;
334     // FIXME: Constant splat analysis does not allow undef elements.
335     if (auto *C = dyn_cast<Constant>(V))
336       return C->getSplatValue() != nullptr;
337   }
338 
339   // FIXME: Constant splat analysis does not allow undef elements.
340   Constant *Mask;
341   if (match(V, m_ShuffleVector(m_Value(), m_Value(), m_Constant(Mask))))
342     return Mask->getSplatValue() != nullptr;
343 
344   // The remaining tests are all recursive, so bail out if we hit the limit.
345   if (Depth++ == MaxDepth)
346     return false;
347 
348   // If both operands of a binop are splats, the result is a splat.
349   Value *X, *Y, *Z;
350   if (match(V, m_BinOp(m_Value(X), m_Value(Y))))
351     return isSplatValue(X, Depth) && isSplatValue(Y, Depth);
352 
353   // If all operands of a select are splats, the result is a splat.
354   if (match(V, m_Select(m_Value(X), m_Value(Y), m_Value(Z))))
355     return isSplatValue(X, Depth) && isSplatValue(Y, Depth) &&
356            isSplatValue(Z, Depth);
357 
358   // TODO: Add support for unary ops (fneg), casts, intrinsics (overflow ops).
359 
360   return false;
361 }
362 
363 MapVector<Instruction *, uint64_t>
364 llvm::computeMinimumValueSizes(ArrayRef<BasicBlock *> Blocks, DemandedBits &DB,
365                                const TargetTransformInfo *TTI) {
366 
367   // DemandedBits will give us every value's live-out bits. But we want
368   // to ensure no extra casts would need to be inserted, so every DAG
369   // of connected values must have the same minimum bitwidth.
370   EquivalenceClasses<Value *> ECs;
371   SmallVector<Value *, 16> Worklist;
372   SmallPtrSet<Value *, 4> Roots;
373   SmallPtrSet<Value *, 16> Visited;
374   DenseMap<Value *, uint64_t> DBits;
375   SmallPtrSet<Instruction *, 4> InstructionSet;
376   MapVector<Instruction *, uint64_t> MinBWs;
377 
378   // Determine the roots. We work bottom-up, from truncs or icmps.
379   bool SeenExtFromIllegalType = false;
380   for (auto *BB : Blocks)
381     for (auto &I : *BB) {
382       InstructionSet.insert(&I);
383 
384       if (TTI && (isa<ZExtInst>(&I) || isa<SExtInst>(&I)) &&
385           !TTI->isTypeLegal(I.getOperand(0)->getType()))
386         SeenExtFromIllegalType = true;
387 
388       // Only deal with non-vector integers up to 64-bits wide.
389       if ((isa<TruncInst>(&I) || isa<ICmpInst>(&I)) &&
390           !I.getType()->isVectorTy() &&
391           I.getOperand(0)->getType()->getScalarSizeInBits() <= 64) {
392         // Don't make work for ourselves. If we know the loaded type is legal,
393         // don't add it to the worklist.
394         if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType()))
395           continue;
396 
397         Worklist.push_back(&I);
398         Roots.insert(&I);
399       }
400     }
401   // Early exit.
402   if (Worklist.empty() || (TTI && !SeenExtFromIllegalType))
403     return MinBWs;
404 
405   // Now proceed breadth-first, unioning values together.
406   while (!Worklist.empty()) {
407     Value *Val = Worklist.pop_back_val();
408     Value *Leader = ECs.getOrInsertLeaderValue(Val);
409 
410     if (Visited.count(Val))
411       continue;
412     Visited.insert(Val);
413 
414     // Non-instructions terminate a chain successfully.
415     if (!isa<Instruction>(Val))
416       continue;
417     Instruction *I = cast<Instruction>(Val);
418 
419     // If we encounter a type that is larger than 64 bits, we can't represent
420     // it so bail out.
421     if (DB.getDemandedBits(I).getBitWidth() > 64)
422       return MapVector<Instruction *, uint64_t>();
423 
424     uint64_t V = DB.getDemandedBits(I).getZExtValue();
425     DBits[Leader] |= V;
426     DBits[I] = V;
427 
428     // Casts, loads and instructions outside of our range terminate a chain
429     // successfully.
430     if (isa<SExtInst>(I) || isa<ZExtInst>(I) || isa<LoadInst>(I) ||
431         !InstructionSet.count(I))
432       continue;
433 
434     // Unsafe casts terminate a chain unsuccessfully. We can't do anything
435     // useful with bitcasts, ptrtoints or inttoptrs and it'd be unsafe to
436     // transform anything that relies on them.
437     if (isa<BitCastInst>(I) || isa<PtrToIntInst>(I) || isa<IntToPtrInst>(I) ||
438         !I->getType()->isIntegerTy()) {
439       DBits[Leader] |= ~0ULL;
440       continue;
441     }
442 
443     // We don't modify the types of PHIs. Reductions will already have been
444     // truncated if possible, and inductions' sizes will have been chosen by
445     // indvars.
446     if (isa<PHINode>(I))
447       continue;
448 
449     if (DBits[Leader] == ~0ULL)
450       // All bits demanded, no point continuing.
451       continue;
452 
453     for (Value *O : cast<User>(I)->operands()) {
454       ECs.unionSets(Leader, O);
455       Worklist.push_back(O);
456     }
457   }
458 
459   // Now we've discovered all values, walk them to see if there are
460   // any users we didn't see. If there are, we can't optimize that
461   // chain.
462   for (auto &I : DBits)
463     for (auto *U : I.first->users())
464       if (U->getType()->isIntegerTy() && DBits.count(U) == 0)
465         DBits[ECs.getOrInsertLeaderValue(I.first)] |= ~0ULL;
466 
467   for (auto I = ECs.begin(), E = ECs.end(); I != E; ++I) {
468     uint64_t LeaderDemandedBits = 0;
469     for (auto MI = ECs.member_begin(I), ME = ECs.member_end(); MI != ME; ++MI)
470       LeaderDemandedBits |= DBits[*MI];
471 
472     uint64_t MinBW = (sizeof(LeaderDemandedBits) * 8) -
473                      llvm::countLeadingZeros(LeaderDemandedBits);
474     // Round up to a power of 2
475     if (!isPowerOf2_64((uint64_t)MinBW))
476       MinBW = NextPowerOf2(MinBW);
477 
478     // We don't modify the types of PHIs. Reductions will already have been
479     // truncated if possible, and inductions' sizes will have been chosen by
480     // indvars.
481     // If we are required to shrink a PHI, abandon this entire equivalence class.
482     bool Abort = false;
483     for (auto MI = ECs.member_begin(I), ME = ECs.member_end(); MI != ME; ++MI)
484       if (isa<PHINode>(*MI) && MinBW < (*MI)->getType()->getScalarSizeInBits()) {
485         Abort = true;
486         break;
487       }
488     if (Abort)
489       continue;
490 
491     for (auto MI = ECs.member_begin(I), ME = ECs.member_end(); MI != ME; ++MI) {
492       if (!isa<Instruction>(*MI))
493         continue;
494       Type *Ty = (*MI)->getType();
495       if (Roots.count(*MI))
496         Ty = cast<Instruction>(*MI)->getOperand(0)->getType();
497       if (MinBW < Ty->getScalarSizeInBits())
498         MinBWs[cast<Instruction>(*MI)] = MinBW;
499     }
500   }
501 
502   return MinBWs;
503 }
504 
505 /// Add all access groups in @p AccGroups to @p List.
506 template <typename ListT>
507 static void addToAccessGroupList(ListT &List, MDNode *AccGroups) {
508   // Interpret an access group as a list containing itself.
509   if (AccGroups->getNumOperands() == 0) {
510     assert(isValidAsAccessGroup(AccGroups) && "Node must be an access group");
511     List.insert(AccGroups);
512     return;
513   }
514 
515   for (auto &AccGroupListOp : AccGroups->operands()) {
516     auto *Item = cast<MDNode>(AccGroupListOp.get());
517     assert(isValidAsAccessGroup(Item) && "List item must be an access group");
518     List.insert(Item);
519   }
520 }
521 
522 MDNode *llvm::uniteAccessGroups(MDNode *AccGroups1, MDNode *AccGroups2) {
523   if (!AccGroups1)
524     return AccGroups2;
525   if (!AccGroups2)
526     return AccGroups1;
527   if (AccGroups1 == AccGroups2)
528     return AccGroups1;
529 
530   SmallSetVector<Metadata *, 4> Union;
531   addToAccessGroupList(Union, AccGroups1);
532   addToAccessGroupList(Union, AccGroups2);
533 
534   if (Union.size() == 0)
535     return nullptr;
536   if (Union.size() == 1)
537     return cast<MDNode>(Union.front());
538 
539   LLVMContext &Ctx = AccGroups1->getContext();
540   return MDNode::get(Ctx, Union.getArrayRef());
541 }
542 
543 MDNode *llvm::intersectAccessGroups(const Instruction *Inst1,
544                                     const Instruction *Inst2) {
545   bool MayAccessMem1 = Inst1->mayReadOrWriteMemory();
546   bool MayAccessMem2 = Inst2->mayReadOrWriteMemory();
547 
548   if (!MayAccessMem1 && !MayAccessMem2)
549     return nullptr;
550   if (!MayAccessMem1)
551     return Inst2->getMetadata(LLVMContext::MD_access_group);
552   if (!MayAccessMem2)
553     return Inst1->getMetadata(LLVMContext::MD_access_group);
554 
555   MDNode *MD1 = Inst1->getMetadata(LLVMContext::MD_access_group);
556   MDNode *MD2 = Inst2->getMetadata(LLVMContext::MD_access_group);
557   if (!MD1 || !MD2)
558     return nullptr;
559   if (MD1 == MD2)
560     return MD1;
561 
562   // Use set for scalable 'contains' check.
563   SmallPtrSet<Metadata *, 4> AccGroupSet2;
564   addToAccessGroupList(AccGroupSet2, MD2);
565 
566   SmallVector<Metadata *, 4> Intersection;
567   if (MD1->getNumOperands() == 0) {
568     assert(isValidAsAccessGroup(MD1) && "Node must be an access group");
569     if (AccGroupSet2.count(MD1))
570       Intersection.push_back(MD1);
571   } else {
572     for (const MDOperand &Node : MD1->operands()) {
573       auto *Item = cast<MDNode>(Node.get());
574       assert(isValidAsAccessGroup(Item) && "List item must be an access group");
575       if (AccGroupSet2.count(Item))
576         Intersection.push_back(Item);
577     }
578   }
579 
580   if (Intersection.size() == 0)
581     return nullptr;
582   if (Intersection.size() == 1)
583     return cast<MDNode>(Intersection.front());
584 
585   LLVMContext &Ctx = Inst1->getContext();
586   return MDNode::get(Ctx, Intersection);
587 }
588 
589 /// \returns \p I after propagating metadata from \p VL.
590 Instruction *llvm::propagateMetadata(Instruction *Inst, ArrayRef<Value *> VL) {
591   Instruction *I0 = cast<Instruction>(VL[0]);
592   SmallVector<std::pair<unsigned, MDNode *>, 4> Metadata;
593   I0->getAllMetadataOtherThanDebugLoc(Metadata);
594 
595   for (auto Kind : {LLVMContext::MD_tbaa, LLVMContext::MD_alias_scope,
596                     LLVMContext::MD_noalias, LLVMContext::MD_fpmath,
597                     LLVMContext::MD_nontemporal, LLVMContext::MD_invariant_load,
598                     LLVMContext::MD_access_group}) {
599     MDNode *MD = I0->getMetadata(Kind);
600 
601     for (int J = 1, E = VL.size(); MD && J != E; ++J) {
602       const Instruction *IJ = cast<Instruction>(VL[J]);
603       MDNode *IMD = IJ->getMetadata(Kind);
604       switch (Kind) {
605       case LLVMContext::MD_tbaa:
606         MD = MDNode::getMostGenericTBAA(MD, IMD);
607         break;
608       case LLVMContext::MD_alias_scope:
609         MD = MDNode::getMostGenericAliasScope(MD, IMD);
610         break;
611       case LLVMContext::MD_fpmath:
612         MD = MDNode::getMostGenericFPMath(MD, IMD);
613         break;
614       case LLVMContext::MD_noalias:
615       case LLVMContext::MD_nontemporal:
616       case LLVMContext::MD_invariant_load:
617         MD = MDNode::intersect(MD, IMD);
618         break;
619       case LLVMContext::MD_access_group:
620         MD = intersectAccessGroups(Inst, IJ);
621         break;
622       default:
623         llvm_unreachable("unhandled metadata");
624       }
625     }
626 
627     Inst->setMetadata(Kind, MD);
628   }
629 
630   return Inst;
631 }
632 
633 Constant *
634 llvm::createBitMaskForGaps(IRBuilder<> &Builder, unsigned VF,
635                            const InterleaveGroup<Instruction> &Group) {
636   // All 1's means mask is not needed.
637   if (Group.getNumMembers() == Group.getFactor())
638     return nullptr;
639 
640   // TODO: support reversed access.
641   assert(!Group.isReverse() && "Reversed group not supported.");
642 
643   SmallVector<Constant *, 16> Mask;
644   for (unsigned i = 0; i < VF; i++)
645     for (unsigned j = 0; j < Group.getFactor(); ++j) {
646       unsigned HasMember = Group.getMember(j) ? 1 : 0;
647       Mask.push_back(Builder.getInt1(HasMember));
648     }
649 
650   return ConstantVector::get(Mask);
651 }
652 
653 Constant *llvm::createReplicatedMask(IRBuilder<> &Builder,
654                                      unsigned ReplicationFactor, unsigned VF) {
655   SmallVector<Constant *, 16> MaskVec;
656   for (unsigned i = 0; i < VF; i++)
657     for (unsigned j = 0; j < ReplicationFactor; j++)
658       MaskVec.push_back(Builder.getInt32(i));
659 
660   return ConstantVector::get(MaskVec);
661 }
662 
663 Constant *llvm::createInterleaveMask(IRBuilder<> &Builder, unsigned VF,
664                                      unsigned NumVecs) {
665   SmallVector<Constant *, 16> Mask;
666   for (unsigned i = 0; i < VF; i++)
667     for (unsigned j = 0; j < NumVecs; j++)
668       Mask.push_back(Builder.getInt32(j * VF + i));
669 
670   return ConstantVector::get(Mask);
671 }
672 
673 Constant *llvm::createStrideMask(IRBuilder<> &Builder, unsigned Start,
674                                  unsigned Stride, unsigned VF) {
675   SmallVector<Constant *, 16> Mask;
676   for (unsigned i = 0; i < VF; i++)
677     Mask.push_back(Builder.getInt32(Start + i * Stride));
678 
679   return ConstantVector::get(Mask);
680 }
681 
682 Constant *llvm::createSequentialMask(IRBuilder<> &Builder, unsigned Start,
683                                      unsigned NumInts, unsigned NumUndefs) {
684   SmallVector<Constant *, 16> Mask;
685   for (unsigned i = 0; i < NumInts; i++)
686     Mask.push_back(Builder.getInt32(Start + i));
687 
688   Constant *Undef = UndefValue::get(Builder.getInt32Ty());
689   for (unsigned i = 0; i < NumUndefs; i++)
690     Mask.push_back(Undef);
691 
692   return ConstantVector::get(Mask);
693 }
694 
695 /// A helper function for concatenating vectors. This function concatenates two
696 /// vectors having the same element type. If the second vector has fewer
697 /// elements than the first, it is padded with undefs.
698 static Value *concatenateTwoVectors(IRBuilder<> &Builder, Value *V1,
699                                     Value *V2) {
700   VectorType *VecTy1 = dyn_cast<VectorType>(V1->getType());
701   VectorType *VecTy2 = dyn_cast<VectorType>(V2->getType());
702   assert(VecTy1 && VecTy2 &&
703          VecTy1->getScalarType() == VecTy2->getScalarType() &&
704          "Expect two vectors with the same element type");
705 
706   unsigned NumElts1 = VecTy1->getNumElements();
707   unsigned NumElts2 = VecTy2->getNumElements();
708   assert(NumElts1 >= NumElts2 && "Unexpect the first vector has less elements");
709 
710   if (NumElts1 > NumElts2) {
711     // Extend with UNDEFs.
712     Constant *ExtMask =
713         createSequentialMask(Builder, 0, NumElts2, NumElts1 - NumElts2);
714     V2 = Builder.CreateShuffleVector(V2, UndefValue::get(VecTy2), ExtMask);
715   }
716 
717   Constant *Mask = createSequentialMask(Builder, 0, NumElts1 + NumElts2, 0);
718   return Builder.CreateShuffleVector(V1, V2, Mask);
719 }
720 
721 Value *llvm::concatenateVectors(IRBuilder<> &Builder, ArrayRef<Value *> Vecs) {
722   unsigned NumVecs = Vecs.size();
723   assert(NumVecs > 1 && "Should be at least two vectors");
724 
725   SmallVector<Value *, 8> ResList;
726   ResList.append(Vecs.begin(), Vecs.end());
727   do {
728     SmallVector<Value *, 8> TmpList;
729     for (unsigned i = 0; i < NumVecs - 1; i += 2) {
730       Value *V0 = ResList[i], *V1 = ResList[i + 1];
731       assert((V0->getType() == V1->getType() || i == NumVecs - 2) &&
732              "Only the last vector may have a different type");
733 
734       TmpList.push_back(concatenateTwoVectors(Builder, V0, V1));
735     }
736 
737     // Push the last vector if the total number of vectors is odd.
738     if (NumVecs % 2 != 0)
739       TmpList.push_back(ResList[NumVecs - 1]);
740 
741     ResList = TmpList;
742     NumVecs = ResList.size();
743   } while (NumVecs > 1);
744 
745   return ResList[0];
746 }
747 
748 bool llvm::maskIsAllZeroOrUndef(Value *Mask) {
749   auto *ConstMask = dyn_cast<Constant>(Mask);
750   if (!ConstMask)
751     return false;
752   if (ConstMask->isNullValue() || isa<UndefValue>(ConstMask))
753     return true;
754   for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
755        ++I) {
756     if (auto *MaskElt = ConstMask->getAggregateElement(I))
757       if (MaskElt->isNullValue() || isa<UndefValue>(MaskElt))
758         continue;
759     return false;
760   }
761   return true;
762 }
763 
764 
765 bool llvm::maskIsAllOneOrUndef(Value *Mask) {
766   auto *ConstMask = dyn_cast<Constant>(Mask);
767   if (!ConstMask)
768     return false;
769   if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))
770     return true;
771   for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
772        ++I) {
773     if (auto *MaskElt = ConstMask->getAggregateElement(I))
774       if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))
775         continue;
776     return false;
777   }
778   return true;
779 }
780 
781 /// TODO: This is a lot like known bits, but for
782 /// vectors.  Is there something we can common this with?
783 APInt llvm::possiblyDemandedEltsInMask(Value *Mask) {
784 
785   const unsigned VWidth = cast<VectorType>(Mask->getType())->getNumElements();
786   APInt DemandedElts = APInt::getAllOnesValue(VWidth);
787   if (auto *CV = dyn_cast<ConstantVector>(Mask))
788     for (unsigned i = 0; i < VWidth; i++)
789       if (CV->getAggregateElement(i)->isNullValue())
790         DemandedElts.clearBit(i);
791   return DemandedElts;
792 }
793 
794 bool InterleavedAccessInfo::isStrided(int Stride) {
795   unsigned Factor = std::abs(Stride);
796   return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
797 }
798 
799 void InterleavedAccessInfo::collectConstStrideAccesses(
800     MapVector<Instruction *, StrideDescriptor> &AccessStrideInfo,
801     const ValueToValueMap &Strides) {
802   auto &DL = TheLoop->getHeader()->getModule()->getDataLayout();
803 
804   // Since it's desired that the load/store instructions be maintained in
805   // "program order" for the interleaved access analysis, we have to visit the
806   // blocks in the loop in reverse postorder (i.e., in a topological order).
807   // Such an ordering will ensure that any load/store that may be executed
808   // before a second load/store will precede the second load/store in
809   // AccessStrideInfo.
810   LoopBlocksDFS DFS(TheLoop);
811   DFS.perform(LI);
812   for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO()))
813     for (auto &I : *BB) {
814       auto *LI = dyn_cast<LoadInst>(&I);
815       auto *SI = dyn_cast<StoreInst>(&I);
816       if (!LI && !SI)
817         continue;
818 
819       Value *Ptr = getLoadStorePointerOperand(&I);
820       // We don't check wrapping here because we don't know yet if Ptr will be
821       // part of a full group or a group with gaps. Checking wrapping for all
822       // pointers (even those that end up in groups with no gaps) will be overly
823       // conservative. For full groups, wrapping should be ok since if we would
824       // wrap around the address space we would do a memory access at nullptr
825       // even without the transformation. The wrapping checks are therefore
826       // deferred until after we've formed the interleaved groups.
827       int64_t Stride = getPtrStride(PSE, Ptr, TheLoop, Strides,
828                                     /*Assume=*/true, /*ShouldCheckWrap=*/false);
829 
830       const SCEV *Scev = replaceSymbolicStrideSCEV(PSE, Strides, Ptr);
831       PointerType *PtrTy = dyn_cast<PointerType>(Ptr->getType());
832       uint64_t Size = DL.getTypeAllocSize(PtrTy->getElementType());
833 
834       // An alignment of 0 means target ABI alignment.
835       unsigned Align = getLoadStoreAlignment(&I);
836       if (!Align)
837         Align = DL.getABITypeAlignment(PtrTy->getElementType());
838 
839       AccessStrideInfo[&I] = StrideDescriptor(Stride, Scev, Size, Align);
840     }
841 }
842 
843 // Analyze interleaved accesses and collect them into interleaved load and
844 // store groups.
845 //
846 // When generating code for an interleaved load group, we effectively hoist all
847 // loads in the group to the location of the first load in program order. When
848 // generating code for an interleaved store group, we sink all stores to the
849 // location of the last store. This code motion can change the order of load
850 // and store instructions and may break dependences.
851 //
852 // The code generation strategy mentioned above ensures that we won't violate
853 // any write-after-read (WAR) dependences.
854 //
855 // E.g., for the WAR dependence:  a = A[i];      // (1)
856 //                                A[i] = b;      // (2)
857 //
858 // The store group of (2) is always inserted at or below (2), and the load
859 // group of (1) is always inserted at or above (1). Thus, the instructions will
860 // never be reordered. All other dependences are checked to ensure the
861 // correctness of the instruction reordering.
862 //
863 // The algorithm visits all memory accesses in the loop in bottom-up program
864 // order. Program order is established by traversing the blocks in the loop in
865 // reverse postorder when collecting the accesses.
866 //
867 // We visit the memory accesses in bottom-up order because it can simplify the
868 // construction of store groups in the presence of write-after-write (WAW)
869 // dependences.
870 //
871 // E.g., for the WAW dependence:  A[i] = a;      // (1)
872 //                                A[i] = b;      // (2)
873 //                                A[i + 1] = c;  // (3)
874 //
875 // We will first create a store group with (3) and (2). (1) can't be added to
876 // this group because it and (2) are dependent. However, (1) can be grouped
877 // with other accesses that may precede it in program order. Note that a
878 // bottom-up order does not imply that WAW dependences should not be checked.
879 void InterleavedAccessInfo::analyzeInterleaving(
880                                  bool EnablePredicatedInterleavedMemAccesses) {
881   LLVM_DEBUG(dbgs() << "LV: Analyzing interleaved accesses...\n");
882   const ValueToValueMap &Strides = LAI->getSymbolicStrides();
883 
884   // Holds all accesses with a constant stride.
885   MapVector<Instruction *, StrideDescriptor> AccessStrideInfo;
886   collectConstStrideAccesses(AccessStrideInfo, Strides);
887 
888   if (AccessStrideInfo.empty())
889     return;
890 
891   // Collect the dependences in the loop.
892   collectDependences();
893 
894   // Holds all interleaved store groups temporarily.
895   SmallSetVector<InterleaveGroup<Instruction> *, 4> StoreGroups;
896   // Holds all interleaved load groups temporarily.
897   SmallSetVector<InterleaveGroup<Instruction> *, 4> LoadGroups;
898 
899   // Search in bottom-up program order for pairs of accesses (A and B) that can
900   // form interleaved load or store groups. In the algorithm below, access A
901   // precedes access B in program order. We initialize a group for B in the
902   // outer loop of the algorithm, and then in the inner loop, we attempt to
903   // insert each A into B's group if:
904   //
905   //  1. A and B have the same stride,
906   //  2. A and B have the same memory object size, and
907   //  3. A belongs in B's group according to its distance from B.
908   //
909   // Special care is taken to ensure group formation will not break any
910   // dependences.
911   for (auto BI = AccessStrideInfo.rbegin(), E = AccessStrideInfo.rend();
912        BI != E; ++BI) {
913     Instruction *B = BI->first;
914     StrideDescriptor DesB = BI->second;
915 
916     // Initialize a group for B if it has an allowable stride. Even if we don't
917     // create a group for B, we continue with the bottom-up algorithm to ensure
918     // we don't break any of B's dependences.
919     InterleaveGroup<Instruction> *Group = nullptr;
920     if (isStrided(DesB.Stride) &&
921         (!isPredicated(B->getParent()) || EnablePredicatedInterleavedMemAccesses)) {
922       Group = getInterleaveGroup(B);
923       if (!Group) {
924         LLVM_DEBUG(dbgs() << "LV: Creating an interleave group with:" << *B
925                           << '\n');
926         Group = createInterleaveGroup(B, DesB.Stride, DesB.Align);
927       }
928       if (B->mayWriteToMemory())
929         StoreGroups.insert(Group);
930       else
931         LoadGroups.insert(Group);
932     }
933 
934     for (auto AI = std::next(BI); AI != E; ++AI) {
935       Instruction *A = AI->first;
936       StrideDescriptor DesA = AI->second;
937 
938       // Our code motion strategy implies that we can't have dependences
939       // between accesses in an interleaved group and other accesses located
940       // between the first and last member of the group. Note that this also
941       // means that a group can't have more than one member at a given offset.
942       // The accesses in a group can have dependences with other accesses, but
943       // we must ensure we don't extend the boundaries of the group such that
944       // we encompass those dependent accesses.
945       //
946       // For example, assume we have the sequence of accesses shown below in a
947       // stride-2 loop:
948       //
949       //  (1, 2) is a group | A[i]   = a;  // (1)
950       //                    | A[i-1] = b;  // (2) |
951       //                      A[i-3] = c;  // (3)
952       //                      A[i]   = d;  // (4) | (2, 4) is not a group
953       //
954       // Because accesses (2) and (3) are dependent, we can group (2) with (1)
955       // but not with (4). If we did, the dependent access (3) would be within
956       // the boundaries of the (2, 4) group.
957       if (!canReorderMemAccessesForInterleavedGroups(&*AI, &*BI)) {
958         // If a dependence exists and A is already in a group, we know that A
959         // must be a store since A precedes B and WAR dependences are allowed.
960         // Thus, A would be sunk below B. We release A's group to prevent this
961         // illegal code motion. A will then be free to form another group with
962         // instructions that precede it.
963         if (isInterleaved(A)) {
964           InterleaveGroup<Instruction> *StoreGroup = getInterleaveGroup(A);
965           StoreGroups.remove(StoreGroup);
966           releaseGroup(StoreGroup);
967         }
968 
969         // If a dependence exists and A is not already in a group (or it was
970         // and we just released it), B might be hoisted above A (if B is a
971         // load) or another store might be sunk below A (if B is a store). In
972         // either case, we can't add additional instructions to B's group. B
973         // will only form a group with instructions that it precedes.
974         break;
975       }
976 
977       // At this point, we've checked for illegal code motion. If either A or B
978       // isn't strided, there's nothing left to do.
979       if (!isStrided(DesA.Stride) || !isStrided(DesB.Stride))
980         continue;
981 
982       // Ignore A if it's already in a group or isn't the same kind of memory
983       // operation as B.
984       // Note that mayReadFromMemory() isn't mutually exclusive to
985       // mayWriteToMemory in the case of atomic loads. We shouldn't see those
986       // here, canVectorizeMemory() should have returned false - except for the
987       // case we asked for optimization remarks.
988       if (isInterleaved(A) ||
989           (A->mayReadFromMemory() != B->mayReadFromMemory()) ||
990           (A->mayWriteToMemory() != B->mayWriteToMemory()))
991         continue;
992 
993       // Check rules 1 and 2. Ignore A if its stride or size is different from
994       // that of B.
995       if (DesA.Stride != DesB.Stride || DesA.Size != DesB.Size)
996         continue;
997 
998       // Ignore A if the memory object of A and B don't belong to the same
999       // address space
1000       if (getLoadStoreAddressSpace(A) != getLoadStoreAddressSpace(B))
1001         continue;
1002 
1003       // Calculate the distance from A to B.
1004       const SCEVConstant *DistToB = dyn_cast<SCEVConstant>(
1005           PSE.getSE()->getMinusSCEV(DesA.Scev, DesB.Scev));
1006       if (!DistToB)
1007         continue;
1008       int64_t DistanceToB = DistToB->getAPInt().getSExtValue();
1009 
1010       // Check rule 3. Ignore A if its distance to B is not a multiple of the
1011       // size.
1012       if (DistanceToB % static_cast<int64_t>(DesB.Size))
1013         continue;
1014 
1015       // All members of a predicated interleave-group must have the same predicate,
1016       // and currently must reside in the same BB.
1017       BasicBlock *BlockA = A->getParent();
1018       BasicBlock *BlockB = B->getParent();
1019       if ((isPredicated(BlockA) || isPredicated(BlockB)) &&
1020           (!EnablePredicatedInterleavedMemAccesses || BlockA != BlockB))
1021         continue;
1022 
1023       // The index of A is the index of B plus A's distance to B in multiples
1024       // of the size.
1025       int IndexA =
1026           Group->getIndex(B) + DistanceToB / static_cast<int64_t>(DesB.Size);
1027 
1028       // Try to insert A into B's group.
1029       if (Group->insertMember(A, IndexA, DesA.Align)) {
1030         LLVM_DEBUG(dbgs() << "LV: Inserted:" << *A << '\n'
1031                           << "    into the interleave group with" << *B
1032                           << '\n');
1033         InterleaveGroupMap[A] = Group;
1034 
1035         // Set the first load in program order as the insert position.
1036         if (A->mayReadFromMemory())
1037           Group->setInsertPos(A);
1038       }
1039     } // Iteration over A accesses.
1040   }   // Iteration over B accesses.
1041 
1042   // Remove interleaved store groups with gaps.
1043   for (auto *Group : StoreGroups)
1044     if (Group->getNumMembers() != Group->getFactor()) {
1045       LLVM_DEBUG(
1046           dbgs() << "LV: Invalidate candidate interleaved store group due "
1047                     "to gaps.\n");
1048       releaseGroup(Group);
1049     }
1050   // Remove interleaved groups with gaps (currently only loads) whose memory
1051   // accesses may wrap around. We have to revisit the getPtrStride analysis,
1052   // this time with ShouldCheckWrap=true, since collectConstStrideAccesses does
1053   // not check wrapping (see documentation there).
1054   // FORNOW we use Assume=false;
1055   // TODO: Change to Assume=true but making sure we don't exceed the threshold
1056   // of runtime SCEV assumptions checks (thereby potentially failing to
1057   // vectorize altogether).
1058   // Additional optional optimizations:
1059   // TODO: If we are peeling the loop and we know that the first pointer doesn't
1060   // wrap then we can deduce that all pointers in the group don't wrap.
1061   // This means that we can forcefully peel the loop in order to only have to
1062   // check the first pointer for no-wrap. When we'll change to use Assume=true
1063   // we'll only need at most one runtime check per interleaved group.
1064   for (auto *Group : LoadGroups) {
1065     // Case 1: A full group. Can Skip the checks; For full groups, if the wide
1066     // load would wrap around the address space we would do a memory access at
1067     // nullptr even without the transformation.
1068     if (Group->getNumMembers() == Group->getFactor())
1069       continue;
1070 
1071     // Case 2: If first and last members of the group don't wrap this implies
1072     // that all the pointers in the group don't wrap.
1073     // So we check only group member 0 (which is always guaranteed to exist),
1074     // and group member Factor - 1; If the latter doesn't exist we rely on
1075     // peeling (if it is a non-reversed accsess -- see Case 3).
1076     Value *FirstMemberPtr = getLoadStorePointerOperand(Group->getMember(0));
1077     if (!getPtrStride(PSE, FirstMemberPtr, TheLoop, Strides, /*Assume=*/false,
1078                       /*ShouldCheckWrap=*/true)) {
1079       LLVM_DEBUG(
1080           dbgs() << "LV: Invalidate candidate interleaved group due to "
1081                     "first group member potentially pointer-wrapping.\n");
1082       releaseGroup(Group);
1083       continue;
1084     }
1085     Instruction *LastMember = Group->getMember(Group->getFactor() - 1);
1086     if (LastMember) {
1087       Value *LastMemberPtr = getLoadStorePointerOperand(LastMember);
1088       if (!getPtrStride(PSE, LastMemberPtr, TheLoop, Strides, /*Assume=*/false,
1089                         /*ShouldCheckWrap=*/true)) {
1090         LLVM_DEBUG(
1091             dbgs() << "LV: Invalidate candidate interleaved group due to "
1092                       "last group member potentially pointer-wrapping.\n");
1093         releaseGroup(Group);
1094       }
1095     } else {
1096       // Case 3: A non-reversed interleaved load group with gaps: We need
1097       // to execute at least one scalar epilogue iteration. This will ensure
1098       // we don't speculatively access memory out-of-bounds. We only need
1099       // to look for a member at index factor - 1, since every group must have
1100       // a member at index zero.
1101       if (Group->isReverse()) {
1102         LLVM_DEBUG(
1103             dbgs() << "LV: Invalidate candidate interleaved group due to "
1104                       "a reverse access with gaps.\n");
1105         releaseGroup(Group);
1106         continue;
1107       }
1108       LLVM_DEBUG(
1109           dbgs() << "LV: Interleaved group requires epilogue iteration.\n");
1110       RequiresScalarEpilogue = true;
1111     }
1112   }
1113 }
1114 
1115 void InterleavedAccessInfo::invalidateGroupsRequiringScalarEpilogue() {
1116   // If no group had triggered the requirement to create an epilogue loop,
1117   // there is nothing to do.
1118   if (!requiresScalarEpilogue())
1119     return;
1120 
1121   // Avoid releasing a Group twice.
1122   SmallPtrSet<InterleaveGroup<Instruction> *, 4> DelSet;
1123   for (auto &I : InterleaveGroupMap) {
1124     InterleaveGroup<Instruction> *Group = I.second;
1125     if (Group->requiresScalarEpilogue())
1126       DelSet.insert(Group);
1127   }
1128   for (auto *Ptr : DelSet) {
1129     LLVM_DEBUG(
1130         dbgs()
1131         << "LV: Invalidate candidate interleaved group due to gaps that "
1132            "require a scalar epilogue (not allowed under optsize) and cannot "
1133            "be masked (not enabled). \n");
1134     releaseGroup(Ptr);
1135   }
1136 
1137   RequiresScalarEpilogue = false;
1138 }
1139 
1140 template <typename InstT>
1141 void InterleaveGroup<InstT>::addMetadata(InstT *NewInst) const {
1142   llvm_unreachable("addMetadata can only be used for Instruction");
1143 }
1144 
1145 namespace llvm {
1146 template <>
1147 void InterleaveGroup<Instruction>::addMetadata(Instruction *NewInst) const {
1148   SmallVector<Value *, 4> VL;
1149   std::transform(Members.begin(), Members.end(), std::back_inserter(VL),
1150                  [](std::pair<int, Instruction *> p) { return p.second; });
1151   propagateMetadata(NewInst, VL);
1152 }
1153 }
1154