1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/Dominators.h" 15 #include "llvm/IR/Instruction.h" 16 #include "llvm/IR/Instructions.h" 17 #include "llvm/IR/IntrinsicInst.h" 18 #include "llvm/IR/Module.h" 19 #include "llvm/IR/Operator.h" 20 #include "llvm/IR/PatternMatch.h" 21 #include "llvm/InitializePasses.h" 22 #include "llvm/Support/CommandLine.h" 23 #include <utility> 24 25 using namespace llvm; 26 using namespace PatternMatch; 27 28 #define DEBUG_TYPE "tti" 29 30 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 31 cl::Hidden, 32 cl::desc("Recognize reduction patterns.")); 33 34 namespace { 35 /// No-op implementation of the TTI interface using the utility base 36 /// classes. 37 /// 38 /// This is used when no target specific information is available. 39 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 40 explicit NoTTIImpl(const DataLayout &DL) 41 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 42 }; 43 } // namespace 44 45 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 46 // If the loop has irreducible control flow, it can not be converted to 47 // Hardware loop. 48 LoopBlocksRPO RPOT(L); 49 RPOT.perform(&LI); 50 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 51 return false; 52 return true; 53 } 54 55 IntrinsicCostAttributes::IntrinsicCostAttributes( 56 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 57 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 58 ScalarizationCost(ScalarizationCost) { 59 60 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 61 FMF = FPMO->getFastMathFlags(); 62 63 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 64 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 65 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 66 } 67 68 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 69 ArrayRef<Type *> Tys, 70 FastMathFlags Flags, 71 const IntrinsicInst *I, 72 InstructionCost ScalarCost) 73 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 74 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 75 } 76 77 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 78 ArrayRef<const Value *> Args) 79 : RetTy(Ty), IID(Id) { 80 81 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 82 ParamTys.reserve(Arguments.size()); 83 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 84 ParamTys.push_back(Arguments[Idx]->getType()); 85 } 86 87 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 88 ArrayRef<const Value *> Args, 89 ArrayRef<Type *> Tys, 90 FastMathFlags Flags, 91 const IntrinsicInst *I, 92 InstructionCost ScalarCost) 93 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 94 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 95 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 96 } 97 98 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 99 LoopInfo &LI, DominatorTree &DT, 100 bool ForceNestedLoop, 101 bool ForceHardwareLoopPHI) { 102 SmallVector<BasicBlock *, 4> ExitingBlocks; 103 L->getExitingBlocks(ExitingBlocks); 104 105 for (BasicBlock *BB : ExitingBlocks) { 106 // If we pass the updated counter back through a phi, we need to know 107 // which latch the updated value will be coming from. 108 if (!L->isLoopLatch(BB)) { 109 if (ForceHardwareLoopPHI || CounterInReg) 110 continue; 111 } 112 113 const SCEV *EC = SE.getExitCount(L, BB); 114 if (isa<SCEVCouldNotCompute>(EC)) 115 continue; 116 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 117 if (ConstEC->getValue()->isZero()) 118 continue; 119 } else if (!SE.isLoopInvariant(EC, L)) 120 continue; 121 122 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 123 continue; 124 125 // If this exiting block is contained in a nested loop, it is not eligible 126 // for insertion of the branch-and-decrement since the inner loop would 127 // end up messing up the value in the CTR. 128 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 129 continue; 130 131 // We now have a loop-invariant count of loop iterations (which is not the 132 // constant zero) for which we know that this loop will not exit via this 133 // existing block. 134 135 // We need to make sure that this block will run on every loop iteration. 136 // For this to be true, we must dominate all blocks with backedges. Such 137 // blocks are in-loop predecessors to the header block. 138 bool NotAlways = false; 139 for (BasicBlock *Pred : predecessors(L->getHeader())) { 140 if (!L->contains(Pred)) 141 continue; 142 143 if (!DT.dominates(BB, Pred)) { 144 NotAlways = true; 145 break; 146 } 147 } 148 149 if (NotAlways) 150 continue; 151 152 // Make sure this blocks ends with a conditional branch. 153 Instruction *TI = BB->getTerminator(); 154 if (!TI) 155 continue; 156 157 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 158 if (!BI->isConditional()) 159 continue; 160 161 ExitBranch = BI; 162 } else 163 continue; 164 165 // Note that this block may not be the loop latch block, even if the loop 166 // has a latch block. 167 ExitBlock = BB; 168 ExitCount = EC; 169 break; 170 } 171 172 if (!ExitBlock) 173 return false; 174 return true; 175 } 176 177 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 178 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 179 180 TargetTransformInfo::~TargetTransformInfo() = default; 181 182 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 183 : TTIImpl(std::move(Arg.TTIImpl)) {} 184 185 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 186 TTIImpl = std::move(RHS.TTIImpl); 187 return *this; 188 } 189 190 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 191 return TTIImpl->getInliningThresholdMultiplier(); 192 } 193 194 unsigned 195 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 196 return TTIImpl->adjustInliningThreshold(CB); 197 } 198 199 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 200 return TTIImpl->getInlinerVectorBonusPercent(); 201 } 202 203 InstructionCost 204 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 205 ArrayRef<const Value *> Operands, 206 TTI::TargetCostKind CostKind) const { 207 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 208 } 209 210 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 211 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 212 BlockFrequencyInfo *BFI) const { 213 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 214 } 215 216 InstructionCost 217 TargetTransformInfo::getUserCost(const User *U, 218 ArrayRef<const Value *> Operands, 219 enum TargetCostKind CostKind) const { 220 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 221 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 222 "TTI should not produce negative costs!"); 223 return Cost; 224 } 225 226 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 227 return TTIImpl->getPredictableBranchThreshold(); 228 } 229 230 bool TargetTransformInfo::hasBranchDivergence() const { 231 return TTIImpl->hasBranchDivergence(); 232 } 233 234 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 235 return TTIImpl->useGPUDivergenceAnalysis(); 236 } 237 238 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 239 return TTIImpl->isSourceOfDivergence(V); 240 } 241 242 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 243 return TTIImpl->isAlwaysUniform(V); 244 } 245 246 unsigned TargetTransformInfo::getFlatAddressSpace() const { 247 return TTIImpl->getFlatAddressSpace(); 248 } 249 250 bool TargetTransformInfo::collectFlatAddressOperands( 251 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 252 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 253 } 254 255 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 256 unsigned ToAS) const { 257 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 258 } 259 260 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 261 unsigned AS) const { 262 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 263 } 264 265 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 266 return TTIImpl->getAssumedAddrSpace(V); 267 } 268 269 std::pair<const Value *, unsigned> 270 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 271 return TTIImpl->getPredicatedAddrSpace(V); 272 } 273 274 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 275 IntrinsicInst *II, Value *OldV, Value *NewV) const { 276 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 277 } 278 279 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 280 return TTIImpl->isLoweredToCall(F); 281 } 282 283 bool TargetTransformInfo::isHardwareLoopProfitable( 284 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 285 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 286 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 287 } 288 289 bool TargetTransformInfo::preferPredicateOverEpilogue( 290 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 291 TargetLibraryInfo *TLI, DominatorTree *DT, 292 const LoopAccessInfo *LAI) const { 293 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 294 } 295 296 bool TargetTransformInfo::emitGetActiveLaneMask() const { 297 return TTIImpl->emitGetActiveLaneMask(); 298 } 299 300 Optional<Instruction *> 301 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 302 IntrinsicInst &II) const { 303 return TTIImpl->instCombineIntrinsic(IC, II); 304 } 305 306 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 307 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 308 bool &KnownBitsComputed) const { 309 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 310 KnownBitsComputed); 311 } 312 313 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 314 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 315 APInt &UndefElts2, APInt &UndefElts3, 316 std::function<void(Instruction *, unsigned, APInt, APInt &)> 317 SimplifyAndSetOp) const { 318 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 319 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 320 SimplifyAndSetOp); 321 } 322 323 void TargetTransformInfo::getUnrollingPreferences( 324 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 325 OptimizationRemarkEmitter *ORE) const { 326 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 327 } 328 329 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 330 PeelingPreferences &PP) const { 331 return TTIImpl->getPeelingPreferences(L, SE, PP); 332 } 333 334 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 335 return TTIImpl->isLegalAddImmediate(Imm); 336 } 337 338 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 339 return TTIImpl->isLegalICmpImmediate(Imm); 340 } 341 342 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 343 int64_t BaseOffset, 344 bool HasBaseReg, int64_t Scale, 345 unsigned AddrSpace, 346 Instruction *I) const { 347 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 348 Scale, AddrSpace, I); 349 } 350 351 bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1, 352 const LSRCost &C2) const { 353 return TTIImpl->isLSRCostLess(C1, C2); 354 } 355 356 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 357 return TTIImpl->isNumRegsMajorCostOfLSR(); 358 } 359 360 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 361 return TTIImpl->isProfitableLSRChainElement(I); 362 } 363 364 bool TargetTransformInfo::canMacroFuseCmp() const { 365 return TTIImpl->canMacroFuseCmp(); 366 } 367 368 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 369 ScalarEvolution *SE, LoopInfo *LI, 370 DominatorTree *DT, AssumptionCache *AC, 371 TargetLibraryInfo *LibInfo) const { 372 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 373 } 374 375 TTI::AddressingModeKind 376 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 377 ScalarEvolution *SE) const { 378 return TTIImpl->getPreferredAddressingMode(L, SE); 379 } 380 381 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 382 Align Alignment) const { 383 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 384 } 385 386 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 387 Align Alignment) const { 388 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 389 } 390 391 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 392 Align Alignment) const { 393 return TTIImpl->isLegalNTStore(DataType, Alignment); 394 } 395 396 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 397 return TTIImpl->isLegalNTLoad(DataType, Alignment); 398 } 399 400 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy, 401 ElementCount NumElements) const { 402 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements); 403 } 404 405 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 406 Align Alignment) const { 407 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 408 } 409 410 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 411 Align Alignment) const { 412 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 413 } 414 415 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType, 416 Align Alignment) const { 417 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment); 418 } 419 420 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType, 421 Align Alignment) const { 422 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment); 423 } 424 425 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 426 return TTIImpl->isLegalMaskedCompressStore(DataType); 427 } 428 429 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 430 return TTIImpl->isLegalMaskedExpandLoad(DataType); 431 } 432 433 bool TargetTransformInfo::enableOrderedReductions() const { 434 return TTIImpl->enableOrderedReductions(); 435 } 436 437 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 438 return TTIImpl->hasDivRemOp(DataType, IsSigned); 439 } 440 441 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 442 unsigned AddrSpace) const { 443 return TTIImpl->hasVolatileVariant(I, AddrSpace); 444 } 445 446 bool TargetTransformInfo::prefersVectorizedAddressing() const { 447 return TTIImpl->prefersVectorizedAddressing(); 448 } 449 450 InstructionCost TargetTransformInfo::getScalingFactorCost( 451 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 452 int64_t Scale, unsigned AddrSpace) const { 453 InstructionCost Cost = TTIImpl->getScalingFactorCost( 454 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 455 assert(Cost >= 0 && "TTI should not produce negative costs!"); 456 return Cost; 457 } 458 459 bool TargetTransformInfo::LSRWithInstrQueries() const { 460 return TTIImpl->LSRWithInstrQueries(); 461 } 462 463 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 464 return TTIImpl->isTruncateFree(Ty1, Ty2); 465 } 466 467 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 468 return TTIImpl->isProfitableToHoist(I); 469 } 470 471 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 472 473 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 474 return TTIImpl->isTypeLegal(Ty); 475 } 476 477 unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const { 478 return TTIImpl->getRegUsageForType(Ty); 479 } 480 481 bool TargetTransformInfo::shouldBuildLookupTables() const { 482 return TTIImpl->shouldBuildLookupTables(); 483 } 484 485 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 486 Constant *C) const { 487 return TTIImpl->shouldBuildLookupTablesForConstant(C); 488 } 489 490 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 491 return TTIImpl->shouldBuildRelLookupTables(); 492 } 493 494 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 495 return TTIImpl->useColdCCForColdCall(F); 496 } 497 498 InstructionCost 499 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 500 const APInt &DemandedElts, 501 bool Insert, bool Extract) const { 502 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 503 } 504 505 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 506 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 507 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 508 } 509 510 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 511 return TTIImpl->supportsEfficientVectorElementLoadStore(); 512 } 513 514 bool TargetTransformInfo::enableAggressiveInterleaving( 515 bool LoopHasReductions) const { 516 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 517 } 518 519 TargetTransformInfo::MemCmpExpansionOptions 520 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 521 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 522 } 523 524 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 525 return TTIImpl->enableInterleavedAccessVectorization(); 526 } 527 528 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 529 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 530 } 531 532 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 533 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 534 } 535 536 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 537 unsigned BitWidth, 538 unsigned AddressSpace, 539 Align Alignment, 540 bool *Fast) const { 541 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 542 AddressSpace, Alignment, Fast); 543 } 544 545 TargetTransformInfo::PopcntSupportKind 546 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 547 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 548 } 549 550 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 551 return TTIImpl->haveFastSqrt(Ty); 552 } 553 554 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 555 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 556 } 557 558 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 559 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 560 assert(Cost >= 0 && "TTI should not produce negative costs!"); 561 return Cost; 562 } 563 564 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 565 unsigned Idx, 566 const APInt &Imm, 567 Type *Ty) const { 568 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 569 assert(Cost >= 0 && "TTI should not produce negative costs!"); 570 return Cost; 571 } 572 573 InstructionCost 574 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 575 TTI::TargetCostKind CostKind) const { 576 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 577 assert(Cost >= 0 && "TTI should not produce negative costs!"); 578 return Cost; 579 } 580 581 InstructionCost TargetTransformInfo::getIntImmCostInst( 582 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 583 TTI::TargetCostKind CostKind, Instruction *Inst) const { 584 InstructionCost Cost = 585 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 586 assert(Cost >= 0 && "TTI should not produce negative costs!"); 587 return Cost; 588 } 589 590 InstructionCost 591 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 592 const APInt &Imm, Type *Ty, 593 TTI::TargetCostKind CostKind) const { 594 InstructionCost Cost = 595 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 596 assert(Cost >= 0 && "TTI should not produce negative costs!"); 597 return Cost; 598 } 599 600 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 601 return TTIImpl->getNumberOfRegisters(ClassID); 602 } 603 604 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 605 Type *Ty) const { 606 return TTIImpl->getRegisterClassForType(Vector, Ty); 607 } 608 609 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 610 return TTIImpl->getRegisterClassName(ClassID); 611 } 612 613 TypeSize TargetTransformInfo::getRegisterBitWidth( 614 TargetTransformInfo::RegisterKind K) const { 615 return TTIImpl->getRegisterBitWidth(K); 616 } 617 618 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 619 return TTIImpl->getMinVectorRegisterBitWidth(); 620 } 621 622 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 623 return TTIImpl->getMaxVScale(); 624 } 625 626 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 627 return TTIImpl->getVScaleForTuning(); 628 } 629 630 bool TargetTransformInfo::shouldMaximizeVectorBandwidth( 631 TargetTransformInfo::RegisterKind K) const { 632 return TTIImpl->shouldMaximizeVectorBandwidth(K); 633 } 634 635 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 636 bool IsScalable) const { 637 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 638 } 639 640 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 641 unsigned Opcode) const { 642 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 643 } 644 645 unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, 646 Type *ScalarValTy) const { 647 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy); 648 } 649 650 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 651 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 652 return TTIImpl->shouldConsiderAddressTypePromotion( 653 I, AllowPromotionWithoutCommonHeader); 654 } 655 656 unsigned TargetTransformInfo::getCacheLineSize() const { 657 return TTIImpl->getCacheLineSize(); 658 } 659 660 llvm::Optional<unsigned> 661 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 662 return TTIImpl->getCacheSize(Level); 663 } 664 665 llvm::Optional<unsigned> 666 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 667 return TTIImpl->getCacheAssociativity(Level); 668 } 669 670 unsigned TargetTransformInfo::getPrefetchDistance() const { 671 return TTIImpl->getPrefetchDistance(); 672 } 673 674 unsigned TargetTransformInfo::getMinPrefetchStride( 675 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 676 unsigned NumPrefetches, bool HasCall) const { 677 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 678 NumPrefetches, HasCall); 679 } 680 681 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 682 return TTIImpl->getMaxPrefetchIterationsAhead(); 683 } 684 685 bool TargetTransformInfo::enableWritePrefetching() const { 686 return TTIImpl->enableWritePrefetching(); 687 } 688 689 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 690 return TTIImpl->getMaxInterleaveFactor(VF); 691 } 692 693 TargetTransformInfo::OperandValueKind 694 TargetTransformInfo::getOperandInfo(const Value *V, 695 OperandValueProperties &OpProps) { 696 OperandValueKind OpInfo = OK_AnyValue; 697 OpProps = OP_None; 698 699 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 700 if (CI->getValue().isPowerOf2()) 701 OpProps = OP_PowerOf2; 702 return OK_UniformConstantValue; 703 } 704 705 // A broadcast shuffle creates a uniform value. 706 // TODO: Add support for non-zero index broadcasts. 707 // TODO: Add support for different source vector width. 708 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 709 if (ShuffleInst->isZeroEltSplat()) 710 OpInfo = OK_UniformValue; 711 712 const Value *Splat = getSplatValue(V); 713 714 // Check for a splat of a constant or for a non uniform vector of constants 715 // and check if the constant(s) are all powers of two. 716 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 717 OpInfo = OK_NonUniformConstantValue; 718 if (Splat) { 719 OpInfo = OK_UniformConstantValue; 720 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 721 if (CI->getValue().isPowerOf2()) 722 OpProps = OP_PowerOf2; 723 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 724 OpProps = OP_PowerOf2; 725 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 726 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 727 if (CI->getValue().isPowerOf2()) 728 continue; 729 OpProps = OP_None; 730 break; 731 } 732 } 733 } 734 735 // Check for a splat of a uniform value. This is not loop aware, so return 736 // true only for the obviously uniform cases (argument, globalvalue) 737 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 738 OpInfo = OK_UniformValue; 739 740 return OpInfo; 741 } 742 743 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 744 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 745 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 746 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 747 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 748 InstructionCost Cost = 749 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 750 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 751 assert(Cost >= 0 && "TTI should not produce negative costs!"); 752 return Cost; 753 } 754 755 InstructionCost TargetTransformInfo::getShuffleCost( 756 ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask, int Index, 757 VectorType *SubTp, ArrayRef<const Value *> Args) const { 758 InstructionCost Cost = 759 TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp, Args); 760 assert(Cost >= 0 && "TTI should not produce negative costs!"); 761 return Cost; 762 } 763 764 TTI::CastContextHint 765 TargetTransformInfo::getCastContextHint(const Instruction *I) { 766 if (!I) 767 return CastContextHint::None; 768 769 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 770 unsigned GatScatOp) { 771 const Instruction *I = dyn_cast<Instruction>(V); 772 if (!I) 773 return CastContextHint::None; 774 775 if (I->getOpcode() == LdStOp) 776 return CastContextHint::Normal; 777 778 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 779 if (II->getIntrinsicID() == MaskedOp) 780 return TTI::CastContextHint::Masked; 781 if (II->getIntrinsicID() == GatScatOp) 782 return TTI::CastContextHint::GatherScatter; 783 } 784 785 return TTI::CastContextHint::None; 786 }; 787 788 switch (I->getOpcode()) { 789 case Instruction::ZExt: 790 case Instruction::SExt: 791 case Instruction::FPExt: 792 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 793 Intrinsic::masked_load, Intrinsic::masked_gather); 794 case Instruction::Trunc: 795 case Instruction::FPTrunc: 796 if (I->hasOneUse()) 797 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 798 Intrinsic::masked_store, 799 Intrinsic::masked_scatter); 800 break; 801 default: 802 return CastContextHint::None; 803 } 804 805 return TTI::CastContextHint::None; 806 } 807 808 InstructionCost TargetTransformInfo::getCastInstrCost( 809 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 810 TTI::TargetCostKind CostKind, const Instruction *I) const { 811 assert((I == nullptr || I->getOpcode() == Opcode) && 812 "Opcode should reflect passed instruction."); 813 InstructionCost Cost = 814 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 815 assert(Cost >= 0 && "TTI should not produce negative costs!"); 816 return Cost; 817 } 818 819 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 820 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 821 InstructionCost Cost = 822 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 823 assert(Cost >= 0 && "TTI should not produce negative costs!"); 824 return Cost; 825 } 826 827 InstructionCost TargetTransformInfo::getCFInstrCost( 828 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 829 assert((I == nullptr || I->getOpcode() == Opcode) && 830 "Opcode should reflect passed instruction."); 831 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 832 assert(Cost >= 0 && "TTI should not produce negative costs!"); 833 return Cost; 834 } 835 836 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 837 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 838 TTI::TargetCostKind CostKind, const Instruction *I) const { 839 assert((I == nullptr || I->getOpcode() == Opcode) && 840 "Opcode should reflect passed instruction."); 841 InstructionCost Cost = 842 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 843 assert(Cost >= 0 && "TTI should not produce negative costs!"); 844 return Cost; 845 } 846 847 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 848 Type *Val, 849 unsigned Index) const { 850 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 851 assert(Cost >= 0 && "TTI should not produce negative costs!"); 852 return Cost; 853 } 854 855 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 856 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 857 TTI::TargetCostKind CostKind) { 858 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 859 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 860 assert(Cost >= 0 && "TTI should not produce negative costs!"); 861 return Cost; 862 } 863 864 InstructionCost TargetTransformInfo::getMemoryOpCost( 865 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 866 TTI::TargetCostKind CostKind, const Instruction *I) const { 867 assert((I == nullptr || I->getOpcode() == Opcode) && 868 "Opcode should reflect passed instruction."); 869 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 870 AddressSpace, CostKind, I); 871 assert(Cost >= 0 && "TTI should not produce negative costs!"); 872 return Cost; 873 } 874 875 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 876 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 877 TTI::TargetCostKind CostKind) const { 878 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 879 AddressSpace, CostKind); 880 assert(Cost >= 0 && "TTI should not produce negative costs!"); 881 return Cost; 882 } 883 884 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 885 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 886 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 887 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 888 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 889 assert(Cost >= 0 && "TTI should not produce negative costs!"); 890 return Cost; 891 } 892 893 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 894 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 895 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 896 bool UseMaskForCond, bool UseMaskForGaps) const { 897 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 898 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 899 UseMaskForCond, UseMaskForGaps); 900 assert(Cost >= 0 && "TTI should not produce negative costs!"); 901 return Cost; 902 } 903 904 InstructionCost 905 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 906 TTI::TargetCostKind CostKind) const { 907 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 908 assert(Cost >= 0 && "TTI should not produce negative costs!"); 909 return Cost; 910 } 911 912 InstructionCost 913 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 914 ArrayRef<Type *> Tys, 915 TTI::TargetCostKind CostKind) const { 916 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 917 assert(Cost >= 0 && "TTI should not produce negative costs!"); 918 return Cost; 919 } 920 921 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 922 return TTIImpl->getNumberOfParts(Tp); 923 } 924 925 InstructionCost 926 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 927 const SCEV *Ptr) const { 928 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 929 assert(Cost >= 0 && "TTI should not produce negative costs!"); 930 return Cost; 931 } 932 933 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 934 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 935 assert(Cost >= 0 && "TTI should not produce negative costs!"); 936 return Cost; 937 } 938 939 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 940 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 941 TTI::TargetCostKind CostKind) const { 942 InstructionCost Cost = 943 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 944 assert(Cost >= 0 && "TTI should not produce negative costs!"); 945 return Cost; 946 } 947 948 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 949 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 950 TTI::TargetCostKind CostKind) const { 951 InstructionCost Cost = 952 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 953 assert(Cost >= 0 && "TTI should not produce negative costs!"); 954 return Cost; 955 } 956 957 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 958 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 959 TTI::TargetCostKind CostKind) const { 960 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 961 CostKind); 962 } 963 964 InstructionCost 965 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 966 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 967 } 968 969 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 970 MemIntrinsicInfo &Info) const { 971 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 972 } 973 974 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 975 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 976 } 977 978 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 979 IntrinsicInst *Inst, Type *ExpectedType) const { 980 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 981 } 982 983 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 984 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 985 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, 986 Optional<uint32_t> AtomicElementSize) const { 987 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 988 DestAddrSpace, SrcAlign, DestAlign, 989 AtomicElementSize); 990 } 991 992 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 993 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 994 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 995 unsigned SrcAlign, unsigned DestAlign, 996 Optional<uint32_t> AtomicCpySize) const { 997 TTIImpl->getMemcpyLoopResidualLoweringType( 998 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign, 999 DestAlign, AtomicCpySize); 1000 } 1001 1002 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 1003 const Function *Callee) const { 1004 return TTIImpl->areInlineCompatible(Caller, Callee); 1005 } 1006 1007 bool TargetTransformInfo::areTypesABICompatible( 1008 const Function *Caller, const Function *Callee, 1009 const ArrayRef<Type *> &Types) const { 1010 return TTIImpl->areTypesABICompatible(Caller, Callee, Types); 1011 } 1012 1013 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 1014 Type *Ty) const { 1015 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 1016 } 1017 1018 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 1019 Type *Ty) const { 1020 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 1021 } 1022 1023 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1024 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1025 } 1026 1027 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1028 return TTIImpl->isLegalToVectorizeLoad(LI); 1029 } 1030 1031 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1032 return TTIImpl->isLegalToVectorizeStore(SI); 1033 } 1034 1035 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1036 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1037 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1038 AddrSpace); 1039 } 1040 1041 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1042 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1043 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1044 AddrSpace); 1045 } 1046 1047 bool TargetTransformInfo::isLegalToVectorizeReduction( 1048 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1049 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1050 } 1051 1052 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1053 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1054 } 1055 1056 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1057 unsigned LoadSize, 1058 unsigned ChainSizeInBytes, 1059 VectorType *VecTy) const { 1060 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1061 } 1062 1063 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1064 unsigned StoreSize, 1065 unsigned ChainSizeInBytes, 1066 VectorType *VecTy) const { 1067 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1068 } 1069 1070 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1071 ReductionFlags Flags) const { 1072 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1073 } 1074 1075 bool TargetTransformInfo::preferPredicatedReductionSelect( 1076 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1077 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1078 } 1079 1080 TargetTransformInfo::VPLegalization 1081 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1082 return TTIImpl->getVPLegalizationStrategy(VPI); 1083 } 1084 1085 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1086 return TTIImpl->shouldExpandReduction(II); 1087 } 1088 1089 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1090 return TTIImpl->getGISelRematGlobalCost(); 1091 } 1092 1093 bool TargetTransformInfo::supportsScalableVectors() const { 1094 return TTIImpl->supportsScalableVectors(); 1095 } 1096 1097 bool TargetTransformInfo::enableScalableVectorization() const { 1098 return TTIImpl->enableScalableVectorization(); 1099 } 1100 1101 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType, 1102 Align Alignment) const { 1103 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment); 1104 } 1105 1106 InstructionCost 1107 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1108 return TTIImpl->getInstructionLatency(I); 1109 } 1110 1111 InstructionCost 1112 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1113 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1114 1115 switch (I->getOpcode()) { 1116 case Instruction::GetElementPtr: 1117 case Instruction::Ret: 1118 case Instruction::PHI: 1119 case Instruction::Br: 1120 case Instruction::Add: 1121 case Instruction::FAdd: 1122 case Instruction::Sub: 1123 case Instruction::FSub: 1124 case Instruction::Mul: 1125 case Instruction::FMul: 1126 case Instruction::UDiv: 1127 case Instruction::SDiv: 1128 case Instruction::FDiv: 1129 case Instruction::URem: 1130 case Instruction::SRem: 1131 case Instruction::FRem: 1132 case Instruction::Shl: 1133 case Instruction::LShr: 1134 case Instruction::AShr: 1135 case Instruction::And: 1136 case Instruction::Or: 1137 case Instruction::Xor: 1138 case Instruction::FNeg: 1139 case Instruction::Select: 1140 case Instruction::ICmp: 1141 case Instruction::FCmp: 1142 case Instruction::Store: 1143 case Instruction::Load: 1144 case Instruction::ZExt: 1145 case Instruction::SExt: 1146 case Instruction::FPToUI: 1147 case Instruction::FPToSI: 1148 case Instruction::FPExt: 1149 case Instruction::PtrToInt: 1150 case Instruction::IntToPtr: 1151 case Instruction::SIToFP: 1152 case Instruction::UIToFP: 1153 case Instruction::Trunc: 1154 case Instruction::FPTrunc: 1155 case Instruction::BitCast: 1156 case Instruction::AddrSpaceCast: 1157 case Instruction::ExtractElement: 1158 case Instruction::InsertElement: 1159 case Instruction::ExtractValue: 1160 case Instruction::ShuffleVector: 1161 case Instruction::Call: 1162 case Instruction::Switch: 1163 return getUserCost(I, CostKind); 1164 default: 1165 // We don't have any information on this instruction. 1166 return -1; 1167 } 1168 } 1169 1170 TargetTransformInfo::Concept::~Concept() = default; 1171 1172 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1173 1174 TargetIRAnalysis::TargetIRAnalysis( 1175 std::function<Result(const Function &)> TTICallback) 1176 : TTICallback(std::move(TTICallback)) {} 1177 1178 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1179 FunctionAnalysisManager &) { 1180 return TTICallback(F); 1181 } 1182 1183 AnalysisKey TargetIRAnalysis::Key; 1184 1185 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1186 return Result(F.getParent()->getDataLayout()); 1187 } 1188 1189 // Register the basic pass. 1190 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1191 "Target Transform Information", false, true) 1192 char TargetTransformInfoWrapperPass::ID = 0; 1193 1194 void TargetTransformInfoWrapperPass::anchor() {} 1195 1196 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1197 : ImmutablePass(ID) { 1198 initializeTargetTransformInfoWrapperPassPass( 1199 *PassRegistry::getPassRegistry()); 1200 } 1201 1202 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1203 TargetIRAnalysis TIRA) 1204 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1205 initializeTargetTransformInfoWrapperPassPass( 1206 *PassRegistry::getPassRegistry()); 1207 } 1208 1209 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1210 FunctionAnalysisManager DummyFAM; 1211 TTI = TIRA.run(F, DummyFAM); 1212 return *TTI; 1213 } 1214 1215 ImmutablePass * 1216 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1217 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1218 } 1219