1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/DataLayout.h" 15 #include "llvm/IR/Dominators.h" 16 #include "llvm/IR/Instruction.h" 17 #include "llvm/IR/Instructions.h" 18 #include "llvm/IR/IntrinsicInst.h" 19 #include "llvm/IR/Module.h" 20 #include "llvm/IR/Operator.h" 21 #include "llvm/IR/PatternMatch.h" 22 #include "llvm/InitializePasses.h" 23 #include "llvm/Support/CommandLine.h" 24 #include "llvm/Support/ErrorHandling.h" 25 #include <utility> 26 27 using namespace llvm; 28 using namespace PatternMatch; 29 30 #define DEBUG_TYPE "tti" 31 32 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 33 cl::Hidden, 34 cl::desc("Recognize reduction patterns.")); 35 36 namespace { 37 /// No-op implementation of the TTI interface using the utility base 38 /// classes. 39 /// 40 /// This is used when no target specific information is available. 41 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 42 explicit NoTTIImpl(const DataLayout &DL) 43 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 44 }; 45 } // namespace 46 47 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 48 // If the loop has irreducible control flow, it can not be converted to 49 // Hardware loop. 50 LoopBlocksRPO RPOT(L); 51 RPOT.perform(&LI); 52 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 53 return false; 54 return true; 55 } 56 57 IntrinsicCostAttributes::IntrinsicCostAttributes( 58 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 59 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 60 ScalarizationCost(ScalarizationCost) { 61 62 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 63 FMF = FPMO->getFastMathFlags(); 64 65 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 66 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 67 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 68 } 69 70 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 71 ArrayRef<Type *> Tys, 72 FastMathFlags Flags, 73 const IntrinsicInst *I, 74 InstructionCost ScalarCost) 75 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 76 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 77 } 78 79 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 80 ArrayRef<const Value *> Args) 81 : RetTy(Ty), IID(Id) { 82 83 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 84 ParamTys.reserve(Arguments.size()); 85 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 86 ParamTys.push_back(Arguments[Idx]->getType()); 87 } 88 89 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 90 ArrayRef<const Value *> Args, 91 ArrayRef<Type *> Tys, 92 FastMathFlags Flags, 93 const IntrinsicInst *I, 94 InstructionCost ScalarCost) 95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 96 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 97 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 98 } 99 100 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 101 LoopInfo &LI, DominatorTree &DT, 102 bool ForceNestedLoop, 103 bool ForceHardwareLoopPHI) { 104 SmallVector<BasicBlock *, 4> ExitingBlocks; 105 L->getExitingBlocks(ExitingBlocks); 106 107 for (BasicBlock *BB : ExitingBlocks) { 108 // If we pass the updated counter back through a phi, we need to know 109 // which latch the updated value will be coming from. 110 if (!L->isLoopLatch(BB)) { 111 if (ForceHardwareLoopPHI || CounterInReg) 112 continue; 113 } 114 115 const SCEV *EC = SE.getExitCount(L, BB); 116 if (isa<SCEVCouldNotCompute>(EC)) 117 continue; 118 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 119 if (ConstEC->getValue()->isZero()) 120 continue; 121 } else if (!SE.isLoopInvariant(EC, L)) 122 continue; 123 124 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 125 continue; 126 127 // If this exiting block is contained in a nested loop, it is not eligible 128 // for insertion of the branch-and-decrement since the inner loop would 129 // end up messing up the value in the CTR. 130 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 131 continue; 132 133 // We now have a loop-invariant count of loop iterations (which is not the 134 // constant zero) for which we know that this loop will not exit via this 135 // existing block. 136 137 // We need to make sure that this block will run on every loop iteration. 138 // For this to be true, we must dominate all blocks with backedges. Such 139 // blocks are in-loop predecessors to the header block. 140 bool NotAlways = false; 141 for (BasicBlock *Pred : predecessors(L->getHeader())) { 142 if (!L->contains(Pred)) 143 continue; 144 145 if (!DT.dominates(BB, Pred)) { 146 NotAlways = true; 147 break; 148 } 149 } 150 151 if (NotAlways) 152 continue; 153 154 // Make sure this blocks ends with a conditional branch. 155 Instruction *TI = BB->getTerminator(); 156 if (!TI) 157 continue; 158 159 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 160 if (!BI->isConditional()) 161 continue; 162 163 ExitBranch = BI; 164 } else 165 continue; 166 167 // Note that this block may not be the loop latch block, even if the loop 168 // has a latch block. 169 ExitBlock = BB; 170 ExitCount = EC; 171 break; 172 } 173 174 if (!ExitBlock) 175 return false; 176 return true; 177 } 178 179 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 180 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 181 182 TargetTransformInfo::~TargetTransformInfo() {} 183 184 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 185 : TTIImpl(std::move(Arg.TTIImpl)) {} 186 187 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 188 TTIImpl = std::move(RHS.TTIImpl); 189 return *this; 190 } 191 192 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 193 return TTIImpl->getInliningThresholdMultiplier(); 194 } 195 196 unsigned 197 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 198 return TTIImpl->adjustInliningThreshold(CB); 199 } 200 201 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 202 return TTIImpl->getInlinerVectorBonusPercent(); 203 } 204 205 InstructionCost 206 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 207 ArrayRef<const Value *> Operands, 208 TTI::TargetCostKind CostKind) const { 209 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 210 } 211 212 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 213 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 214 BlockFrequencyInfo *BFI) const { 215 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 216 } 217 218 InstructionCost 219 TargetTransformInfo::getUserCost(const User *U, 220 ArrayRef<const Value *> Operands, 221 enum TargetCostKind CostKind) const { 222 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 223 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 224 "TTI should not produce negative costs!"); 225 return Cost; 226 } 227 228 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 229 return TTIImpl->getPredictableBranchThreshold(); 230 } 231 232 bool TargetTransformInfo::hasBranchDivergence() const { 233 return TTIImpl->hasBranchDivergence(); 234 } 235 236 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 237 return TTIImpl->useGPUDivergenceAnalysis(); 238 } 239 240 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 241 return TTIImpl->isSourceOfDivergence(V); 242 } 243 244 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 245 return TTIImpl->isAlwaysUniform(V); 246 } 247 248 unsigned TargetTransformInfo::getFlatAddressSpace() const { 249 return TTIImpl->getFlatAddressSpace(); 250 } 251 252 bool TargetTransformInfo::collectFlatAddressOperands( 253 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 254 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 255 } 256 257 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 258 unsigned ToAS) const { 259 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 260 } 261 262 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 263 return TTIImpl->getAssumedAddrSpace(V); 264 } 265 266 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 267 IntrinsicInst *II, Value *OldV, Value *NewV) const { 268 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 269 } 270 271 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 272 return TTIImpl->isLoweredToCall(F); 273 } 274 275 bool TargetTransformInfo::isHardwareLoopProfitable( 276 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 277 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 278 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 279 } 280 281 bool TargetTransformInfo::preferPredicateOverEpilogue( 282 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 283 TargetLibraryInfo *TLI, DominatorTree *DT, 284 const LoopAccessInfo *LAI) const { 285 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 286 } 287 288 bool TargetTransformInfo::emitGetActiveLaneMask() const { 289 return TTIImpl->emitGetActiveLaneMask(); 290 } 291 292 Optional<Instruction *> 293 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 294 IntrinsicInst &II) const { 295 return TTIImpl->instCombineIntrinsic(IC, II); 296 } 297 298 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 299 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 300 bool &KnownBitsComputed) const { 301 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 302 KnownBitsComputed); 303 } 304 305 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 306 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 307 APInt &UndefElts2, APInt &UndefElts3, 308 std::function<void(Instruction *, unsigned, APInt, APInt &)> 309 SimplifyAndSetOp) const { 310 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 311 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 312 SimplifyAndSetOp); 313 } 314 315 void TargetTransformInfo::getUnrollingPreferences( 316 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 317 OptimizationRemarkEmitter *ORE) const { 318 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 319 } 320 321 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 322 PeelingPreferences &PP) const { 323 return TTIImpl->getPeelingPreferences(L, SE, PP); 324 } 325 326 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 327 return TTIImpl->isLegalAddImmediate(Imm); 328 } 329 330 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 331 return TTIImpl->isLegalICmpImmediate(Imm); 332 } 333 334 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 335 int64_t BaseOffset, 336 bool HasBaseReg, int64_t Scale, 337 unsigned AddrSpace, 338 Instruction *I) const { 339 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 340 Scale, AddrSpace, I); 341 } 342 343 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const { 344 return TTIImpl->isLSRCostLess(C1, C2); 345 } 346 347 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 348 return TTIImpl->isNumRegsMajorCostOfLSR(); 349 } 350 351 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 352 return TTIImpl->isProfitableLSRChainElement(I); 353 } 354 355 bool TargetTransformInfo::canMacroFuseCmp() const { 356 return TTIImpl->canMacroFuseCmp(); 357 } 358 359 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 360 ScalarEvolution *SE, LoopInfo *LI, 361 DominatorTree *DT, AssumptionCache *AC, 362 TargetLibraryInfo *LibInfo) const { 363 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 364 } 365 366 TTI::AddressingModeKind 367 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 368 ScalarEvolution *SE) const { 369 return TTIImpl->getPreferredAddressingMode(L, SE); 370 } 371 372 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 373 Align Alignment) const { 374 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 375 } 376 377 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 378 Align Alignment) const { 379 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 380 } 381 382 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 383 Align Alignment) const { 384 return TTIImpl->isLegalNTStore(DataType, Alignment); 385 } 386 387 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 388 return TTIImpl->isLegalNTLoad(DataType, Alignment); 389 } 390 391 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 392 Align Alignment) const { 393 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 394 } 395 396 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 397 Align Alignment) const { 398 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 399 } 400 401 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 402 return TTIImpl->isLegalMaskedCompressStore(DataType); 403 } 404 405 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 406 return TTIImpl->isLegalMaskedExpandLoad(DataType); 407 } 408 409 bool TargetTransformInfo::enableOrderedReductions() const { 410 return TTIImpl->enableOrderedReductions(); 411 } 412 413 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 414 return TTIImpl->hasDivRemOp(DataType, IsSigned); 415 } 416 417 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 418 unsigned AddrSpace) const { 419 return TTIImpl->hasVolatileVariant(I, AddrSpace); 420 } 421 422 bool TargetTransformInfo::prefersVectorizedAddressing() const { 423 return TTIImpl->prefersVectorizedAddressing(); 424 } 425 426 InstructionCost TargetTransformInfo::getScalingFactorCost( 427 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 428 int64_t Scale, unsigned AddrSpace) const { 429 InstructionCost Cost = TTIImpl->getScalingFactorCost( 430 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 431 assert(Cost >= 0 && "TTI should not produce negative costs!"); 432 return Cost; 433 } 434 435 bool TargetTransformInfo::LSRWithInstrQueries() const { 436 return TTIImpl->LSRWithInstrQueries(); 437 } 438 439 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 440 return TTIImpl->isTruncateFree(Ty1, Ty2); 441 } 442 443 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 444 return TTIImpl->isProfitableToHoist(I); 445 } 446 447 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 448 449 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 450 return TTIImpl->isTypeLegal(Ty); 451 } 452 453 InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const { 454 return TTIImpl->getRegUsageForType(Ty); 455 } 456 457 bool TargetTransformInfo::shouldBuildLookupTables() const { 458 return TTIImpl->shouldBuildLookupTables(); 459 } 460 461 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 462 Constant *C) const { 463 return TTIImpl->shouldBuildLookupTablesForConstant(C); 464 } 465 466 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 467 return TTIImpl->shouldBuildRelLookupTables(); 468 } 469 470 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 471 return TTIImpl->useColdCCForColdCall(F); 472 } 473 474 InstructionCost 475 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 476 const APInt &DemandedElts, 477 bool Insert, bool Extract) const { 478 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 479 } 480 481 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 482 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 483 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 484 } 485 486 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 487 return TTIImpl->supportsEfficientVectorElementLoadStore(); 488 } 489 490 bool TargetTransformInfo::enableAggressiveInterleaving( 491 bool LoopHasReductions) const { 492 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 493 } 494 495 TargetTransformInfo::MemCmpExpansionOptions 496 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 497 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 498 } 499 500 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 501 return TTIImpl->enableInterleavedAccessVectorization(); 502 } 503 504 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 505 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 506 } 507 508 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 509 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 510 } 511 512 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 513 unsigned BitWidth, 514 unsigned AddressSpace, 515 Align Alignment, 516 bool *Fast) const { 517 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 518 AddressSpace, Alignment, Fast); 519 } 520 521 TargetTransformInfo::PopcntSupportKind 522 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 523 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 524 } 525 526 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 527 return TTIImpl->haveFastSqrt(Ty); 528 } 529 530 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 531 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 532 } 533 534 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 535 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 536 assert(Cost >= 0 && "TTI should not produce negative costs!"); 537 return Cost; 538 } 539 540 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 541 unsigned Idx, 542 const APInt &Imm, 543 Type *Ty) const { 544 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 545 assert(Cost >= 0 && "TTI should not produce negative costs!"); 546 return Cost; 547 } 548 549 InstructionCost 550 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 551 TTI::TargetCostKind CostKind) const { 552 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 553 assert(Cost >= 0 && "TTI should not produce negative costs!"); 554 return Cost; 555 } 556 557 InstructionCost TargetTransformInfo::getIntImmCostInst( 558 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 559 TTI::TargetCostKind CostKind, Instruction *Inst) const { 560 InstructionCost Cost = 561 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 562 assert(Cost >= 0 && "TTI should not produce negative costs!"); 563 return Cost; 564 } 565 566 InstructionCost 567 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 568 const APInt &Imm, Type *Ty, 569 TTI::TargetCostKind CostKind) const { 570 InstructionCost Cost = 571 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 572 assert(Cost >= 0 && "TTI should not produce negative costs!"); 573 return Cost; 574 } 575 576 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 577 return TTIImpl->getNumberOfRegisters(ClassID); 578 } 579 580 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 581 Type *Ty) const { 582 return TTIImpl->getRegisterClassForType(Vector, Ty); 583 } 584 585 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 586 return TTIImpl->getRegisterClassName(ClassID); 587 } 588 589 TypeSize TargetTransformInfo::getRegisterBitWidth( 590 TargetTransformInfo::RegisterKind K) const { 591 return TTIImpl->getRegisterBitWidth(K); 592 } 593 594 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 595 return TTIImpl->getMinVectorRegisterBitWidth(); 596 } 597 598 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 599 return TTIImpl->getMaxVScale(); 600 } 601 602 bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const { 603 return TTIImpl->shouldMaximizeVectorBandwidth(); 604 } 605 606 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 607 bool IsScalable) const { 608 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 609 } 610 611 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 612 unsigned Opcode) const { 613 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 614 } 615 616 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 617 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 618 return TTIImpl->shouldConsiderAddressTypePromotion( 619 I, AllowPromotionWithoutCommonHeader); 620 } 621 622 unsigned TargetTransformInfo::getCacheLineSize() const { 623 return TTIImpl->getCacheLineSize(); 624 } 625 626 llvm::Optional<unsigned> 627 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 628 return TTIImpl->getCacheSize(Level); 629 } 630 631 llvm::Optional<unsigned> 632 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 633 return TTIImpl->getCacheAssociativity(Level); 634 } 635 636 unsigned TargetTransformInfo::getPrefetchDistance() const { 637 return TTIImpl->getPrefetchDistance(); 638 } 639 640 unsigned TargetTransformInfo::getMinPrefetchStride( 641 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 642 unsigned NumPrefetches, bool HasCall) const { 643 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 644 NumPrefetches, HasCall); 645 } 646 647 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 648 return TTIImpl->getMaxPrefetchIterationsAhead(); 649 } 650 651 bool TargetTransformInfo::enableWritePrefetching() const { 652 return TTIImpl->enableWritePrefetching(); 653 } 654 655 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 656 return TTIImpl->getMaxInterleaveFactor(VF); 657 } 658 659 TargetTransformInfo::OperandValueKind 660 TargetTransformInfo::getOperandInfo(const Value *V, 661 OperandValueProperties &OpProps) { 662 OperandValueKind OpInfo = OK_AnyValue; 663 OpProps = OP_None; 664 665 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 666 if (CI->getValue().isPowerOf2()) 667 OpProps = OP_PowerOf2; 668 return OK_UniformConstantValue; 669 } 670 671 // A broadcast shuffle creates a uniform value. 672 // TODO: Add support for non-zero index broadcasts. 673 // TODO: Add support for different source vector width. 674 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 675 if (ShuffleInst->isZeroEltSplat()) 676 OpInfo = OK_UniformValue; 677 678 const Value *Splat = getSplatValue(V); 679 680 // Check for a splat of a constant or for a non uniform vector of constants 681 // and check if the constant(s) are all powers of two. 682 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 683 OpInfo = OK_NonUniformConstantValue; 684 if (Splat) { 685 OpInfo = OK_UniformConstantValue; 686 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 687 if (CI->getValue().isPowerOf2()) 688 OpProps = OP_PowerOf2; 689 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 690 OpProps = OP_PowerOf2; 691 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 692 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 693 if (CI->getValue().isPowerOf2()) 694 continue; 695 OpProps = OP_None; 696 break; 697 } 698 } 699 } 700 701 // Check for a splat of a uniform value. This is not loop aware, so return 702 // true only for the obviously uniform cases (argument, globalvalue) 703 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 704 OpInfo = OK_UniformValue; 705 706 return OpInfo; 707 } 708 709 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 710 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 711 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 712 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 713 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 714 InstructionCost Cost = 715 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 716 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 717 assert(Cost >= 0 && "TTI should not produce negative costs!"); 718 return Cost; 719 } 720 721 InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind, 722 VectorType *Ty, 723 ArrayRef<int> Mask, 724 int Index, 725 VectorType *SubTp) const { 726 InstructionCost Cost = TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp); 727 assert(Cost >= 0 && "TTI should not produce negative costs!"); 728 return Cost; 729 } 730 731 TTI::CastContextHint 732 TargetTransformInfo::getCastContextHint(const Instruction *I) { 733 if (!I) 734 return CastContextHint::None; 735 736 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 737 unsigned GatScatOp) { 738 const Instruction *I = dyn_cast<Instruction>(V); 739 if (!I) 740 return CastContextHint::None; 741 742 if (I->getOpcode() == LdStOp) 743 return CastContextHint::Normal; 744 745 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 746 if (II->getIntrinsicID() == MaskedOp) 747 return TTI::CastContextHint::Masked; 748 if (II->getIntrinsicID() == GatScatOp) 749 return TTI::CastContextHint::GatherScatter; 750 } 751 752 return TTI::CastContextHint::None; 753 }; 754 755 switch (I->getOpcode()) { 756 case Instruction::ZExt: 757 case Instruction::SExt: 758 case Instruction::FPExt: 759 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 760 Intrinsic::masked_load, Intrinsic::masked_gather); 761 case Instruction::Trunc: 762 case Instruction::FPTrunc: 763 if (I->hasOneUse()) 764 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 765 Intrinsic::masked_store, 766 Intrinsic::masked_scatter); 767 break; 768 default: 769 return CastContextHint::None; 770 } 771 772 return TTI::CastContextHint::None; 773 } 774 775 InstructionCost TargetTransformInfo::getCastInstrCost( 776 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 777 TTI::TargetCostKind CostKind, const Instruction *I) const { 778 assert((I == nullptr || I->getOpcode() == Opcode) && 779 "Opcode should reflect passed instruction."); 780 InstructionCost Cost = 781 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 782 assert(Cost >= 0 && "TTI should not produce negative costs!"); 783 return Cost; 784 } 785 786 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 787 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 788 InstructionCost Cost = 789 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 790 assert(Cost >= 0 && "TTI should not produce negative costs!"); 791 return Cost; 792 } 793 794 InstructionCost TargetTransformInfo::getCFInstrCost( 795 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 796 assert((I == nullptr || I->getOpcode() == Opcode) && 797 "Opcode should reflect passed instruction."); 798 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 799 assert(Cost >= 0 && "TTI should not produce negative costs!"); 800 return Cost; 801 } 802 803 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 804 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 805 TTI::TargetCostKind CostKind, const Instruction *I) const { 806 assert((I == nullptr || I->getOpcode() == Opcode) && 807 "Opcode should reflect passed instruction."); 808 InstructionCost Cost = 809 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 810 assert(Cost >= 0 && "TTI should not produce negative costs!"); 811 return Cost; 812 } 813 814 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 815 Type *Val, 816 unsigned Index) const { 817 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 818 assert(Cost >= 0 && "TTI should not produce negative costs!"); 819 return Cost; 820 } 821 822 InstructionCost TargetTransformInfo::getMemoryOpCost( 823 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 824 TTI::TargetCostKind CostKind, const Instruction *I) const { 825 assert((I == nullptr || I->getOpcode() == Opcode) && 826 "Opcode should reflect passed instruction."); 827 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 828 AddressSpace, CostKind, I); 829 assert(Cost >= 0 && "TTI should not produce negative costs!"); 830 return Cost; 831 } 832 833 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 834 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 835 TTI::TargetCostKind CostKind) const { 836 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 837 AddressSpace, CostKind); 838 assert(Cost >= 0 && "TTI should not produce negative costs!"); 839 return Cost; 840 } 841 842 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 843 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 844 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 845 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 846 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 847 assert(Cost >= 0 && "TTI should not produce negative costs!"); 848 return Cost; 849 } 850 851 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 852 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 853 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 854 bool UseMaskForCond, bool UseMaskForGaps) const { 855 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 856 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 857 UseMaskForCond, UseMaskForGaps); 858 assert(Cost >= 0 && "TTI should not produce negative costs!"); 859 return Cost; 860 } 861 862 InstructionCost 863 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 864 TTI::TargetCostKind CostKind) const { 865 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 866 assert(Cost >= 0 && "TTI should not produce negative costs!"); 867 return Cost; 868 } 869 870 InstructionCost 871 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 872 ArrayRef<Type *> Tys, 873 TTI::TargetCostKind CostKind) const { 874 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 875 assert(Cost >= 0 && "TTI should not produce negative costs!"); 876 return Cost; 877 } 878 879 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 880 return TTIImpl->getNumberOfParts(Tp); 881 } 882 883 InstructionCost 884 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 885 const SCEV *Ptr) const { 886 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 887 assert(Cost >= 0 && "TTI should not produce negative costs!"); 888 return Cost; 889 } 890 891 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 892 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 893 assert(Cost >= 0 && "TTI should not produce negative costs!"); 894 return Cost; 895 } 896 897 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 898 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 899 TTI::TargetCostKind CostKind) const { 900 InstructionCost Cost = 901 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 902 assert(Cost >= 0 && "TTI should not produce negative costs!"); 903 return Cost; 904 } 905 906 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 907 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 908 TTI::TargetCostKind CostKind) const { 909 InstructionCost Cost = 910 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 911 assert(Cost >= 0 && "TTI should not produce negative costs!"); 912 return Cost; 913 } 914 915 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 916 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 917 TTI::TargetCostKind CostKind) const { 918 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 919 CostKind); 920 } 921 922 InstructionCost 923 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 924 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 925 } 926 927 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 928 MemIntrinsicInfo &Info) const { 929 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 930 } 931 932 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 933 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 934 } 935 936 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 937 IntrinsicInst *Inst, Type *ExpectedType) const { 938 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 939 } 940 941 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 942 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 943 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const { 944 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 945 DestAddrSpace, SrcAlign, DestAlign); 946 } 947 948 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 949 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 950 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 951 unsigned SrcAlign, unsigned DestAlign) const { 952 TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes, 953 SrcAddrSpace, DestAddrSpace, 954 SrcAlign, DestAlign); 955 } 956 957 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 958 const Function *Callee) const { 959 return TTIImpl->areInlineCompatible(Caller, Callee); 960 } 961 962 bool TargetTransformInfo::areFunctionArgsABICompatible( 963 const Function *Caller, const Function *Callee, 964 SmallPtrSetImpl<Argument *> &Args) const { 965 return TTIImpl->areFunctionArgsABICompatible(Caller, Callee, Args); 966 } 967 968 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 969 Type *Ty) const { 970 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 971 } 972 973 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 974 Type *Ty) const { 975 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 976 } 977 978 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 979 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 980 } 981 982 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 983 return TTIImpl->isLegalToVectorizeLoad(LI); 984 } 985 986 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 987 return TTIImpl->isLegalToVectorizeStore(SI); 988 } 989 990 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 991 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 992 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 993 AddrSpace); 994 } 995 996 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 997 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 998 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 999 AddrSpace); 1000 } 1001 1002 bool TargetTransformInfo::isLegalToVectorizeReduction( 1003 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1004 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1005 } 1006 1007 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1008 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1009 } 1010 1011 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1012 unsigned LoadSize, 1013 unsigned ChainSizeInBytes, 1014 VectorType *VecTy) const { 1015 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1016 } 1017 1018 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1019 unsigned StoreSize, 1020 unsigned ChainSizeInBytes, 1021 VectorType *VecTy) const { 1022 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1023 } 1024 1025 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1026 ReductionFlags Flags) const { 1027 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1028 } 1029 1030 bool TargetTransformInfo::preferPredicatedReductionSelect( 1031 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1032 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1033 } 1034 1035 TargetTransformInfo::VPLegalization 1036 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1037 return TTIImpl->getVPLegalizationStrategy(VPI); 1038 } 1039 1040 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1041 return TTIImpl->shouldExpandReduction(II); 1042 } 1043 1044 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1045 return TTIImpl->getGISelRematGlobalCost(); 1046 } 1047 1048 bool TargetTransformInfo::supportsScalableVectors() const { 1049 return TTIImpl->supportsScalableVectors(); 1050 } 1051 1052 bool TargetTransformInfo::hasActiveVectorLength() const { 1053 return TTIImpl->hasActiveVectorLength(); 1054 } 1055 1056 InstructionCost 1057 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1058 return TTIImpl->getInstructionLatency(I); 1059 } 1060 1061 InstructionCost 1062 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1063 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1064 1065 switch (I->getOpcode()) { 1066 case Instruction::GetElementPtr: 1067 case Instruction::Ret: 1068 case Instruction::PHI: 1069 case Instruction::Br: 1070 case Instruction::Add: 1071 case Instruction::FAdd: 1072 case Instruction::Sub: 1073 case Instruction::FSub: 1074 case Instruction::Mul: 1075 case Instruction::FMul: 1076 case Instruction::UDiv: 1077 case Instruction::SDiv: 1078 case Instruction::FDiv: 1079 case Instruction::URem: 1080 case Instruction::SRem: 1081 case Instruction::FRem: 1082 case Instruction::Shl: 1083 case Instruction::LShr: 1084 case Instruction::AShr: 1085 case Instruction::And: 1086 case Instruction::Or: 1087 case Instruction::Xor: 1088 case Instruction::FNeg: 1089 case Instruction::Select: 1090 case Instruction::ICmp: 1091 case Instruction::FCmp: 1092 case Instruction::Store: 1093 case Instruction::Load: 1094 case Instruction::ZExt: 1095 case Instruction::SExt: 1096 case Instruction::FPToUI: 1097 case Instruction::FPToSI: 1098 case Instruction::FPExt: 1099 case Instruction::PtrToInt: 1100 case Instruction::IntToPtr: 1101 case Instruction::SIToFP: 1102 case Instruction::UIToFP: 1103 case Instruction::Trunc: 1104 case Instruction::FPTrunc: 1105 case Instruction::BitCast: 1106 case Instruction::AddrSpaceCast: 1107 case Instruction::ExtractElement: 1108 case Instruction::InsertElement: 1109 case Instruction::ExtractValue: 1110 case Instruction::ShuffleVector: 1111 case Instruction::Call: 1112 case Instruction::Switch: 1113 return getUserCost(I, CostKind); 1114 default: 1115 // We don't have any information on this instruction. 1116 return -1; 1117 } 1118 } 1119 1120 TargetTransformInfo::Concept::~Concept() {} 1121 1122 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1123 1124 TargetIRAnalysis::TargetIRAnalysis( 1125 std::function<Result(const Function &)> TTICallback) 1126 : TTICallback(std::move(TTICallback)) {} 1127 1128 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1129 FunctionAnalysisManager &) { 1130 return TTICallback(F); 1131 } 1132 1133 AnalysisKey TargetIRAnalysis::Key; 1134 1135 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1136 return Result(F.getParent()->getDataLayout()); 1137 } 1138 1139 // Register the basic pass. 1140 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1141 "Target Transform Information", false, true) 1142 char TargetTransformInfoWrapperPass::ID = 0; 1143 1144 void TargetTransformInfoWrapperPass::anchor() {} 1145 1146 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1147 : ImmutablePass(ID) { 1148 initializeTargetTransformInfoWrapperPassPass( 1149 *PassRegistry::getPassRegistry()); 1150 } 1151 1152 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1153 TargetIRAnalysis TIRA) 1154 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1155 initializeTargetTransformInfoWrapperPassPass( 1156 *PassRegistry::getPassRegistry()); 1157 } 1158 1159 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1160 FunctionAnalysisManager DummyFAM; 1161 TTI = TIRA.run(F, DummyFAM); 1162 return *TTI; 1163 } 1164 1165 ImmutablePass * 1166 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1167 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1168 } 1169