1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/Analysis/TargetTransformInfo.h"
10 #include "llvm/Analysis/TargetTransformInfoImpl.h"
11 #include "llvm/IR/CallSite.h"
12 #include "llvm/IR/DataLayout.h"
13 #include "llvm/IR/Instruction.h"
14 #include "llvm/IR/Instructions.h"
15 #include "llvm/IR/IntrinsicInst.h"
16 #include "llvm/IR/Module.h"
17 #include "llvm/IR/Operator.h"
18 #include "llvm/IR/PatternMatch.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include <utility>
22 
23 using namespace llvm;
24 using namespace PatternMatch;
25 
26 #define DEBUG_TYPE "tti"
27 
28 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
29                                      cl::Hidden,
30                                      cl::desc("Recognize reduction patterns."));
31 
32 namespace {
33 /// No-op implementation of the TTI interface using the utility base
34 /// classes.
35 ///
36 /// This is used when no target specific information is available.
37 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
38   explicit NoTTIImpl(const DataLayout &DL)
39       : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
40 };
41 }
42 
43 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
44     : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
45 
46 TargetTransformInfo::~TargetTransformInfo() {}
47 
48 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
49     : TTIImpl(std::move(Arg.TTIImpl)) {}
50 
51 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
52   TTIImpl = std::move(RHS.TTIImpl);
53   return *this;
54 }
55 
56 int TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty,
57                                           Type *OpTy) const {
58   int Cost = TTIImpl->getOperationCost(Opcode, Ty, OpTy);
59   assert(Cost >= 0 && "TTI should not produce negative costs!");
60   return Cost;
61 }
62 
63 int TargetTransformInfo::getCallCost(FunctionType *FTy, int NumArgs,
64                                      const User *U) const {
65   int Cost = TTIImpl->getCallCost(FTy, NumArgs, U);
66   assert(Cost >= 0 && "TTI should not produce negative costs!");
67   return Cost;
68 }
69 
70 int TargetTransformInfo::getCallCost(const Function *F,
71                                      ArrayRef<const Value *> Arguments,
72                                      const User *U) const {
73   int Cost = TTIImpl->getCallCost(F, Arguments, U);
74   assert(Cost >= 0 && "TTI should not produce negative costs!");
75   return Cost;
76 }
77 
78 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
79   return TTIImpl->getInliningThresholdMultiplier();
80 }
81 
82 int TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr,
83                                     ArrayRef<const Value *> Operands) const {
84   return TTIImpl->getGEPCost(PointeeType, Ptr, Operands);
85 }
86 
87 int TargetTransformInfo::getExtCost(const Instruction *I,
88                                     const Value *Src) const {
89   return TTIImpl->getExtCost(I, Src);
90 }
91 
92 int TargetTransformInfo::getIntrinsicCost(
93     Intrinsic::ID IID, Type *RetTy, ArrayRef<const Value *> Arguments,
94     const User *U) const {
95   int Cost = TTIImpl->getIntrinsicCost(IID, RetTy, Arguments, U);
96   assert(Cost >= 0 && "TTI should not produce negative costs!");
97   return Cost;
98 }
99 
100 unsigned
101 TargetTransformInfo::getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
102                                                       unsigned &JTSize) const {
103   return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize);
104 }
105 
106 int TargetTransformInfo::getUserCost(const User *U,
107     ArrayRef<const Value *> Operands) const {
108   int Cost = TTIImpl->getUserCost(U, Operands);
109   assert(Cost >= 0 && "TTI should not produce negative costs!");
110   return Cost;
111 }
112 
113 bool TargetTransformInfo::hasBranchDivergence() const {
114   return TTIImpl->hasBranchDivergence();
115 }
116 
117 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
118   return TTIImpl->isSourceOfDivergence(V);
119 }
120 
121 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
122   return TTIImpl->isAlwaysUniform(V);
123 }
124 
125 unsigned TargetTransformInfo::getFlatAddressSpace() const {
126   return TTIImpl->getFlatAddressSpace();
127 }
128 
129 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
130   return TTIImpl->isLoweredToCall(F);
131 }
132 
133 void TargetTransformInfo::getUnrollingPreferences(
134     Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP) const {
135   return TTIImpl->getUnrollingPreferences(L, SE, UP);
136 }
137 
138 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
139   return TTIImpl->isLegalAddImmediate(Imm);
140 }
141 
142 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
143   return TTIImpl->isLegalICmpImmediate(Imm);
144 }
145 
146 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
147                                                 int64_t BaseOffset,
148                                                 bool HasBaseReg,
149                                                 int64_t Scale,
150                                                 unsigned AddrSpace,
151                                                 Instruction *I) const {
152   return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
153                                         Scale, AddrSpace, I);
154 }
155 
156 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const {
157   return TTIImpl->isLSRCostLess(C1, C2);
158 }
159 
160 bool TargetTransformInfo::canMacroFuseCmp() const {
161   return TTIImpl->canMacroFuseCmp();
162 }
163 
164 bool TargetTransformInfo::shouldFavorPostInc() const {
165   return TTIImpl->shouldFavorPostInc();
166 }
167 
168 bool TargetTransformInfo::shouldFavorBackedgeIndex(const Loop *L) const {
169   return TTIImpl->shouldFavorBackedgeIndex(L);
170 }
171 
172 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType) const {
173   return TTIImpl->isLegalMaskedStore(DataType);
174 }
175 
176 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType) const {
177   return TTIImpl->isLegalMaskedLoad(DataType);
178 }
179 
180 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType) const {
181   return TTIImpl->isLegalMaskedGather(DataType);
182 }
183 
184 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType) const {
185   return TTIImpl->isLegalMaskedScatter(DataType);
186 }
187 
188 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const {
189   return TTIImpl->isLegalMaskedCompressStore(DataType);
190 }
191 
192 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const {
193   return TTIImpl->isLegalMaskedExpandLoad(DataType);
194 }
195 
196 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
197   return TTIImpl->hasDivRemOp(DataType, IsSigned);
198 }
199 
200 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
201                                              unsigned AddrSpace) const {
202   return TTIImpl->hasVolatileVariant(I, AddrSpace);
203 }
204 
205 bool TargetTransformInfo::prefersVectorizedAddressing() const {
206   return TTIImpl->prefersVectorizedAddressing();
207 }
208 
209 int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
210                                               int64_t BaseOffset,
211                                               bool HasBaseReg,
212                                               int64_t Scale,
213                                               unsigned AddrSpace) const {
214   int Cost = TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
215                                            Scale, AddrSpace);
216   assert(Cost >= 0 && "TTI should not produce negative costs!");
217   return Cost;
218 }
219 
220 bool TargetTransformInfo::LSRWithInstrQueries() const {
221   return TTIImpl->LSRWithInstrQueries();
222 }
223 
224 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
225   return TTIImpl->isTruncateFree(Ty1, Ty2);
226 }
227 
228 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
229   return TTIImpl->isProfitableToHoist(I);
230 }
231 
232 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
233 
234 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
235   return TTIImpl->isTypeLegal(Ty);
236 }
237 
238 unsigned TargetTransformInfo::getJumpBufAlignment() const {
239   return TTIImpl->getJumpBufAlignment();
240 }
241 
242 unsigned TargetTransformInfo::getJumpBufSize() const {
243   return TTIImpl->getJumpBufSize();
244 }
245 
246 bool TargetTransformInfo::shouldBuildLookupTables() const {
247   return TTIImpl->shouldBuildLookupTables();
248 }
249 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(Constant *C) const {
250   return TTIImpl->shouldBuildLookupTablesForConstant(C);
251 }
252 
253 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
254   return TTIImpl->useColdCCForColdCall(F);
255 }
256 
257 unsigned TargetTransformInfo::
258 getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const {
259   return TTIImpl->getScalarizationOverhead(Ty, Insert, Extract);
260 }
261 
262 unsigned TargetTransformInfo::
263 getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
264                                  unsigned VF) const {
265   return TTIImpl->getOperandsScalarizationOverhead(Args, VF);
266 }
267 
268 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
269   return TTIImpl->supportsEfficientVectorElementLoadStore();
270 }
271 
272 bool TargetTransformInfo::enableAggressiveInterleaving(bool LoopHasReductions) const {
273   return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
274 }
275 
276 const TargetTransformInfo::MemCmpExpansionOptions *
277 TargetTransformInfo::enableMemCmpExpansion(bool IsZeroCmp) const {
278   return TTIImpl->enableMemCmpExpansion(IsZeroCmp);
279 }
280 
281 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
282   return TTIImpl->enableInterleavedAccessVectorization();
283 }
284 
285 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
286   return TTIImpl->enableMaskedInterleavedAccessVectorization();
287 }
288 
289 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
290   return TTIImpl->isFPVectorizationPotentiallyUnsafe();
291 }
292 
293 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
294                                                          unsigned BitWidth,
295                                                          unsigned AddressSpace,
296                                                          unsigned Alignment,
297                                                          bool *Fast) const {
298   return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
299                                                  Alignment, Fast);
300 }
301 
302 TargetTransformInfo::PopcntSupportKind
303 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
304   return TTIImpl->getPopcntSupport(IntTyWidthInBit);
305 }
306 
307 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
308   return TTIImpl->haveFastSqrt(Ty);
309 }
310 
311 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
312   return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
313 }
314 
315 int TargetTransformInfo::getFPOpCost(Type *Ty) const {
316   int Cost = TTIImpl->getFPOpCost(Ty);
317   assert(Cost >= 0 && "TTI should not produce negative costs!");
318   return Cost;
319 }
320 
321 int TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx,
322                                                const APInt &Imm,
323                                                Type *Ty) const {
324   int Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
325   assert(Cost >= 0 && "TTI should not produce negative costs!");
326   return Cost;
327 }
328 
329 int TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty) const {
330   int Cost = TTIImpl->getIntImmCost(Imm, Ty);
331   assert(Cost >= 0 && "TTI should not produce negative costs!");
332   return Cost;
333 }
334 
335 int TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx,
336                                        const APInt &Imm, Type *Ty) const {
337   int Cost = TTIImpl->getIntImmCost(Opcode, Idx, Imm, Ty);
338   assert(Cost >= 0 && "TTI should not produce negative costs!");
339   return Cost;
340 }
341 
342 int TargetTransformInfo::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
343                                        const APInt &Imm, Type *Ty) const {
344   int Cost = TTIImpl->getIntImmCost(IID, Idx, Imm, Ty);
345   assert(Cost >= 0 && "TTI should not produce negative costs!");
346   return Cost;
347 }
348 
349 unsigned TargetTransformInfo::getNumberOfRegisters(bool Vector) const {
350   return TTIImpl->getNumberOfRegisters(Vector);
351 }
352 
353 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const {
354   return TTIImpl->getRegisterBitWidth(Vector);
355 }
356 
357 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
358   return TTIImpl->getMinVectorRegisterBitWidth();
359 }
360 
361 bool TargetTransformInfo::shouldMaximizeVectorBandwidth(bool OptSize) const {
362   return TTIImpl->shouldMaximizeVectorBandwidth(OptSize);
363 }
364 
365 unsigned TargetTransformInfo::getMinimumVF(unsigned ElemWidth) const {
366   return TTIImpl->getMinimumVF(ElemWidth);
367 }
368 
369 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
370     const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
371   return TTIImpl->shouldConsiderAddressTypePromotion(
372       I, AllowPromotionWithoutCommonHeader);
373 }
374 
375 unsigned TargetTransformInfo::getCacheLineSize() const {
376   return TTIImpl->getCacheLineSize();
377 }
378 
379 llvm::Optional<unsigned> TargetTransformInfo::getCacheSize(CacheLevel Level)
380   const {
381   return TTIImpl->getCacheSize(Level);
382 }
383 
384 llvm::Optional<unsigned> TargetTransformInfo::getCacheAssociativity(
385   CacheLevel Level) const {
386   return TTIImpl->getCacheAssociativity(Level);
387 }
388 
389 unsigned TargetTransformInfo::getPrefetchDistance() const {
390   return TTIImpl->getPrefetchDistance();
391 }
392 
393 unsigned TargetTransformInfo::getMinPrefetchStride() const {
394   return TTIImpl->getMinPrefetchStride();
395 }
396 
397 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
398   return TTIImpl->getMaxPrefetchIterationsAhead();
399 }
400 
401 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const {
402   return TTIImpl->getMaxInterleaveFactor(VF);
403 }
404 
405 TargetTransformInfo::OperandValueKind
406 TargetTransformInfo::getOperandInfo(Value *V, OperandValueProperties &OpProps) {
407   OperandValueKind OpInfo = OK_AnyValue;
408   OpProps = OP_None;
409 
410   if (auto *CI = dyn_cast<ConstantInt>(V)) {
411     if (CI->getValue().isPowerOf2())
412       OpProps = OP_PowerOf2;
413     return OK_UniformConstantValue;
414   }
415 
416   // A broadcast shuffle creates a uniform value.
417   // TODO: Add support for non-zero index broadcasts.
418   // TODO: Add support for different source vector width.
419   if (auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
420     if (ShuffleInst->isZeroEltSplat())
421       OpInfo = OK_UniformValue;
422 
423   const Value *Splat = getSplatValue(V);
424 
425   // Check for a splat of a constant or for a non uniform vector of constants
426   // and check if the constant(s) are all powers of two.
427   if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
428     OpInfo = OK_NonUniformConstantValue;
429     if (Splat) {
430       OpInfo = OK_UniformConstantValue;
431       if (auto *CI = dyn_cast<ConstantInt>(Splat))
432         if (CI->getValue().isPowerOf2())
433           OpProps = OP_PowerOf2;
434     } else if (auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
435       OpProps = OP_PowerOf2;
436       for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {
437         if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I)))
438           if (CI->getValue().isPowerOf2())
439             continue;
440         OpProps = OP_None;
441         break;
442       }
443     }
444   }
445 
446   // Check for a splat of a uniform value. This is not loop aware, so return
447   // true only for the obviously uniform cases (argument, globalvalue)
448   if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
449     OpInfo = OK_UniformValue;
450 
451   return OpInfo;
452 }
453 
454 int TargetTransformInfo::getArithmeticInstrCost(
455     unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
456     OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo,
457     OperandValueProperties Opd2PropInfo,
458     ArrayRef<const Value *> Args) const {
459   int Cost = TTIImpl->getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
460                                              Opd1PropInfo, Opd2PropInfo, Args);
461   assert(Cost >= 0 && "TTI should not produce negative costs!");
462   return Cost;
463 }
464 
465 int TargetTransformInfo::getShuffleCost(ShuffleKind Kind, Type *Ty, int Index,
466                                         Type *SubTp) const {
467   int Cost = TTIImpl->getShuffleCost(Kind, Ty, Index, SubTp);
468   assert(Cost >= 0 && "TTI should not produce negative costs!");
469   return Cost;
470 }
471 
472 int TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst,
473                                  Type *Src, const Instruction *I) const {
474   assert ((I == nullptr || I->getOpcode() == Opcode) &&
475           "Opcode should reflect passed instruction.");
476   int Cost = TTIImpl->getCastInstrCost(Opcode, Dst, Src, I);
477   assert(Cost >= 0 && "TTI should not produce negative costs!");
478   return Cost;
479 }
480 
481 int TargetTransformInfo::getExtractWithExtendCost(unsigned Opcode, Type *Dst,
482                                                   VectorType *VecTy,
483                                                   unsigned Index) const {
484   int Cost = TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
485   assert(Cost >= 0 && "TTI should not produce negative costs!");
486   return Cost;
487 }
488 
489 int TargetTransformInfo::getCFInstrCost(unsigned Opcode) const {
490   int Cost = TTIImpl->getCFInstrCost(Opcode);
491   assert(Cost >= 0 && "TTI should not produce negative costs!");
492   return Cost;
493 }
494 
495 int TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
496                                  Type *CondTy, const Instruction *I) const {
497   assert ((I == nullptr || I->getOpcode() == Opcode) &&
498           "Opcode should reflect passed instruction.");
499   int Cost = TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
500   assert(Cost >= 0 && "TTI should not produce negative costs!");
501   return Cost;
502 }
503 
504 int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val,
505                                             unsigned Index) const {
506   int Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index);
507   assert(Cost >= 0 && "TTI should not produce negative costs!");
508   return Cost;
509 }
510 
511 int TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src,
512                                          unsigned Alignment,
513                                          unsigned AddressSpace,
514                                          const Instruction *I) const {
515   assert ((I == nullptr || I->getOpcode() == Opcode) &&
516           "Opcode should reflect passed instruction.");
517   int Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
518   assert(Cost >= 0 && "TTI should not produce negative costs!");
519   return Cost;
520 }
521 
522 int TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
523                                                unsigned Alignment,
524                                                unsigned AddressSpace) const {
525   int Cost =
526       TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
527   assert(Cost >= 0 && "TTI should not produce negative costs!");
528   return Cost;
529 }
530 
531 int TargetTransformInfo::getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
532                                                 Value *Ptr, bool VariableMask,
533                                                 unsigned Alignment) const {
534   int Cost = TTIImpl->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
535                                              Alignment);
536   assert(Cost >= 0 && "TTI should not produce negative costs!");
537   return Cost;
538 }
539 
540 int TargetTransformInfo::getInterleavedMemoryOpCost(
541     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
542     unsigned Alignment, unsigned AddressSpace, bool UseMaskForCond,
543     bool UseMaskForGaps) const {
544   int Cost = TTIImpl->getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
545                                                  Alignment, AddressSpace,
546                                                  UseMaskForCond,
547                                                  UseMaskForGaps);
548   assert(Cost >= 0 && "TTI should not produce negative costs!");
549   return Cost;
550 }
551 
552 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
553                                     ArrayRef<Type *> Tys, FastMathFlags FMF,
554                                     unsigned ScalarizationCostPassed) const {
555   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
556                                             ScalarizationCostPassed);
557   assert(Cost >= 0 && "TTI should not produce negative costs!");
558   return Cost;
559 }
560 
561 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
562            ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) const {
563   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
564   assert(Cost >= 0 && "TTI should not produce negative costs!");
565   return Cost;
566 }
567 
568 int TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
569                                           ArrayRef<Type *> Tys) const {
570   int Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys);
571   assert(Cost >= 0 && "TTI should not produce negative costs!");
572   return Cost;
573 }
574 
575 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
576   return TTIImpl->getNumberOfParts(Tp);
577 }
578 
579 int TargetTransformInfo::getAddressComputationCost(Type *Tp,
580                                                    ScalarEvolution *SE,
581                                                    const SCEV *Ptr) const {
582   int Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
583   assert(Cost >= 0 && "TTI should not produce negative costs!");
584   return Cost;
585 }
586 
587 int TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
588   int Cost = TTIImpl->getMemcpyCost(I);
589   assert(Cost >= 0 && "TTI should not produce negative costs!");
590   return Cost;
591 }
592 
593 int TargetTransformInfo::getArithmeticReductionCost(unsigned Opcode, Type *Ty,
594                                                     bool IsPairwiseForm) const {
595   int Cost = TTIImpl->getArithmeticReductionCost(Opcode, Ty, IsPairwiseForm);
596   assert(Cost >= 0 && "TTI should not produce negative costs!");
597   return Cost;
598 }
599 
600 int TargetTransformInfo::getMinMaxReductionCost(Type *Ty, Type *CondTy,
601                                                 bool IsPairwiseForm,
602                                                 bool IsUnsigned) const {
603   int Cost =
604       TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsPairwiseForm, IsUnsigned);
605   assert(Cost >= 0 && "TTI should not produce negative costs!");
606   return Cost;
607 }
608 
609 unsigned
610 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
611   return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
612 }
613 
614 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
615                                              MemIntrinsicInfo &Info) const {
616   return TTIImpl->getTgtMemIntrinsic(Inst, Info);
617 }
618 
619 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
620   return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
621 }
622 
623 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
624     IntrinsicInst *Inst, Type *ExpectedType) const {
625   return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
626 }
627 
628 Type *TargetTransformInfo::getMemcpyLoopLoweringType(LLVMContext &Context,
629                                                      Value *Length,
630                                                      unsigned SrcAlign,
631                                                      unsigned DestAlign) const {
632   return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAlign,
633                                             DestAlign);
634 }
635 
636 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
637     SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
638     unsigned RemainingBytes, unsigned SrcAlign, unsigned DestAlign) const {
639   TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
640                                              SrcAlign, DestAlign);
641 }
642 
643 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
644                                               const Function *Callee) const {
645   return TTIImpl->areInlineCompatible(Caller, Callee);
646 }
647 
648 bool TargetTransformInfo::areFunctionArgsABICompatible(
649     const Function *Caller, const Function *Callee,
650     SmallPtrSetImpl<Argument *> &Args) const {
651   return TTIImpl->areFunctionArgsABICompatible(Caller, Callee, Args);
652 }
653 
654 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
655                                              Type *Ty) const {
656   return TTIImpl->isIndexedLoadLegal(Mode, Ty);
657 }
658 
659 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
660                                               Type *Ty) const {
661   return TTIImpl->isIndexedStoreLegal(Mode, Ty);
662 }
663 
664 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
665   return TTIImpl->getLoadStoreVecRegBitWidth(AS);
666 }
667 
668 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
669   return TTIImpl->isLegalToVectorizeLoad(LI);
670 }
671 
672 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
673   return TTIImpl->isLegalToVectorizeStore(SI);
674 }
675 
676 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
677     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
678   return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
679                                               AddrSpace);
680 }
681 
682 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
683     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
684   return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
685                                                AddrSpace);
686 }
687 
688 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
689                                                   unsigned LoadSize,
690                                                   unsigned ChainSizeInBytes,
691                                                   VectorType *VecTy) const {
692   return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
693 }
694 
695 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
696                                                    unsigned StoreSize,
697                                                    unsigned ChainSizeInBytes,
698                                                    VectorType *VecTy) const {
699   return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
700 }
701 
702 bool TargetTransformInfo::useReductionIntrinsic(unsigned Opcode,
703                                                 Type *Ty, ReductionFlags Flags) const {
704   return TTIImpl->useReductionIntrinsic(Opcode, Ty, Flags);
705 }
706 
707 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
708   return TTIImpl->shouldExpandReduction(II);
709 }
710 
711 int TargetTransformInfo::getInstructionLatency(const Instruction *I) const {
712   return TTIImpl->getInstructionLatency(I);
713 }
714 
715 static bool matchPairwiseShuffleMask(ShuffleVectorInst *SI, bool IsLeft,
716                                      unsigned Level) {
717   // We don't need a shuffle if we just want to have element 0 in position 0 of
718   // the vector.
719   if (!SI && Level == 0 && IsLeft)
720     return true;
721   else if (!SI)
722     return false;
723 
724   SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1);
725 
726   // Build a mask of 0, 2, ... (left) or 1, 3, ... (right) depending on whether
727   // we look at the left or right side.
728   for (unsigned i = 0, e = (1 << Level), val = !IsLeft; i != e; ++i, val += 2)
729     Mask[i] = val;
730 
731   SmallVector<int, 16> ActualMask = SI->getShuffleMask();
732   return Mask == ActualMask;
733 }
734 
735 namespace {
736 /// Kind of the reduction data.
737 enum ReductionKind {
738   RK_None,           /// Not a reduction.
739   RK_Arithmetic,     /// Binary reduction data.
740   RK_MinMax,         /// Min/max reduction data.
741   RK_UnsignedMinMax, /// Unsigned min/max reduction data.
742 };
743 /// Contains opcode + LHS/RHS parts of the reduction operations.
744 struct ReductionData {
745   ReductionData() = delete;
746   ReductionData(ReductionKind Kind, unsigned Opcode, Value *LHS, Value *RHS)
747       : Opcode(Opcode), LHS(LHS), RHS(RHS), Kind(Kind) {
748     assert(Kind != RK_None && "expected binary or min/max reduction only.");
749   }
750   unsigned Opcode = 0;
751   Value *LHS = nullptr;
752   Value *RHS = nullptr;
753   ReductionKind Kind = RK_None;
754   bool hasSameData(ReductionData &RD) const {
755     return Kind == RD.Kind && Opcode == RD.Opcode;
756   }
757 };
758 } // namespace
759 
760 static Optional<ReductionData> getReductionData(Instruction *I) {
761   Value *L, *R;
762   if (m_BinOp(m_Value(L), m_Value(R)).match(I))
763     return ReductionData(RK_Arithmetic, I->getOpcode(), L, R);
764   if (auto *SI = dyn_cast<SelectInst>(I)) {
765     if (m_SMin(m_Value(L), m_Value(R)).match(SI) ||
766         m_SMax(m_Value(L), m_Value(R)).match(SI) ||
767         m_OrdFMin(m_Value(L), m_Value(R)).match(SI) ||
768         m_OrdFMax(m_Value(L), m_Value(R)).match(SI) ||
769         m_UnordFMin(m_Value(L), m_Value(R)).match(SI) ||
770         m_UnordFMax(m_Value(L), m_Value(R)).match(SI)) {
771       auto *CI = cast<CmpInst>(SI->getCondition());
772       return ReductionData(RK_MinMax, CI->getOpcode(), L, R);
773     }
774     if (m_UMin(m_Value(L), m_Value(R)).match(SI) ||
775         m_UMax(m_Value(L), m_Value(R)).match(SI)) {
776       auto *CI = cast<CmpInst>(SI->getCondition());
777       return ReductionData(RK_UnsignedMinMax, CI->getOpcode(), L, R);
778     }
779   }
780   return llvm::None;
781 }
782 
783 static ReductionKind matchPairwiseReductionAtLevel(Instruction *I,
784                                                    unsigned Level,
785                                                    unsigned NumLevels) {
786   // Match one level of pairwise operations.
787   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
788   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
789   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
790   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
791   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
792   if (!I)
793     return RK_None;
794 
795   assert(I->getType()->isVectorTy() && "Expecting a vector type");
796 
797   Optional<ReductionData> RD = getReductionData(I);
798   if (!RD)
799     return RK_None;
800 
801   ShuffleVectorInst *LS = dyn_cast<ShuffleVectorInst>(RD->LHS);
802   if (!LS && Level)
803     return RK_None;
804   ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(RD->RHS);
805   if (!RS && Level)
806     return RK_None;
807 
808   // On level 0 we can omit one shufflevector instruction.
809   if (!Level && !RS && !LS)
810     return RK_None;
811 
812   // Shuffle inputs must match.
813   Value *NextLevelOpL = LS ? LS->getOperand(0) : nullptr;
814   Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
815   Value *NextLevelOp = nullptr;
816   if (NextLevelOpR && NextLevelOpL) {
817     // If we have two shuffles their operands must match.
818     if (NextLevelOpL != NextLevelOpR)
819       return RK_None;
820 
821     NextLevelOp = NextLevelOpL;
822   } else if (Level == 0 && (NextLevelOpR || NextLevelOpL)) {
823     // On the first level we can omit the shufflevector <0, undef,...>. So the
824     // input to the other shufflevector <1, undef> must match with one of the
825     // inputs to the current binary operation.
826     // Example:
827     //  %NextLevelOpL = shufflevector %R, <1, undef ...>
828     //  %BinOp        = fadd          %NextLevelOpL, %R
829     if (NextLevelOpL && NextLevelOpL != RD->RHS)
830       return RK_None;
831     else if (NextLevelOpR && NextLevelOpR != RD->LHS)
832       return RK_None;
833 
834     NextLevelOp = NextLevelOpL ? RD->RHS : RD->LHS;
835   } else
836     return RK_None;
837 
838   // Check that the next levels binary operation exists and matches with the
839   // current one.
840   if (Level + 1 != NumLevels) {
841     Optional<ReductionData> NextLevelRD =
842         getReductionData(cast<Instruction>(NextLevelOp));
843     if (!NextLevelRD || !RD->hasSameData(*NextLevelRD))
844       return RK_None;
845   }
846 
847   // Shuffle mask for pairwise operation must match.
848   if (matchPairwiseShuffleMask(LS, /*IsLeft=*/true, Level)) {
849     if (!matchPairwiseShuffleMask(RS, /*IsLeft=*/false, Level))
850       return RK_None;
851   } else if (matchPairwiseShuffleMask(RS, /*IsLeft=*/true, Level)) {
852     if (!matchPairwiseShuffleMask(LS, /*IsLeft=*/false, Level))
853       return RK_None;
854   } else {
855     return RK_None;
856   }
857 
858   if (++Level == NumLevels)
859     return RD->Kind;
860 
861   // Match next level.
862   return matchPairwiseReductionAtLevel(cast<Instruction>(NextLevelOp), Level,
863                                        NumLevels);
864 }
865 
866 static ReductionKind matchPairwiseReduction(const ExtractElementInst *ReduxRoot,
867                                             unsigned &Opcode, Type *&Ty) {
868   if (!EnableReduxCost)
869     return RK_None;
870 
871   // Need to extract the first element.
872   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
873   unsigned Idx = ~0u;
874   if (CI)
875     Idx = CI->getZExtValue();
876   if (Idx != 0)
877     return RK_None;
878 
879   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
880   if (!RdxStart)
881     return RK_None;
882   Optional<ReductionData> RD = getReductionData(RdxStart);
883   if (!RD)
884     return RK_None;
885 
886   Type *VecTy = RdxStart->getType();
887   unsigned NumVecElems = VecTy->getVectorNumElements();
888   if (!isPowerOf2_32(NumVecElems))
889     return RK_None;
890 
891   // We look for a sequence of shuffle,shuffle,add triples like the following
892   // that builds a pairwise reduction tree.
893   //
894   //  (X0, X1, X2, X3)
895   //   (X0 + X1, X2 + X3, undef, undef)
896   //    ((X0 + X1) + (X2 + X3), undef, undef, undef)
897   //
898   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
899   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
900   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
901   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
902   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
903   // %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
904   //       <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
905   // %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
906   //       <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
907   // %bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
908   // %r = extractelement <4 x float> %bin.rdx8, i32 0
909   if (matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)) ==
910       RK_None)
911     return RK_None;
912 
913   Opcode = RD->Opcode;
914   Ty = VecTy;
915 
916   return RD->Kind;
917 }
918 
919 static std::pair<Value *, ShuffleVectorInst *>
920 getShuffleAndOtherOprd(Value *L, Value *R) {
921   ShuffleVectorInst *S = nullptr;
922 
923   if ((S = dyn_cast<ShuffleVectorInst>(L)))
924     return std::make_pair(R, S);
925 
926   S = dyn_cast<ShuffleVectorInst>(R);
927   return std::make_pair(L, S);
928 }
929 
930 static ReductionKind
931 matchVectorSplittingReduction(const ExtractElementInst *ReduxRoot,
932                               unsigned &Opcode, Type *&Ty) {
933   if (!EnableReduxCost)
934     return RK_None;
935 
936   // Need to extract the first element.
937   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
938   unsigned Idx = ~0u;
939   if (CI)
940     Idx = CI->getZExtValue();
941   if (Idx != 0)
942     return RK_None;
943 
944   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
945   if (!RdxStart)
946     return RK_None;
947   Optional<ReductionData> RD = getReductionData(RdxStart);
948   if (!RD)
949     return RK_None;
950 
951   Type *VecTy = ReduxRoot->getOperand(0)->getType();
952   unsigned NumVecElems = VecTy->getVectorNumElements();
953   if (!isPowerOf2_32(NumVecElems))
954     return RK_None;
955 
956   // We look for a sequence of shuffles and adds like the following matching one
957   // fadd, shuffle vector pair at a time.
958   //
959   // %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
960   //                           <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
961   // %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
962   // %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
963   //                          <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
964   // %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
965   // %r = extractelement <4 x float> %bin.rdx8, i32 0
966 
967   unsigned MaskStart = 1;
968   Instruction *RdxOp = RdxStart;
969   SmallVector<int, 32> ShuffleMask(NumVecElems, 0);
970   unsigned NumVecElemsRemain = NumVecElems;
971   while (NumVecElemsRemain - 1) {
972     // Check for the right reduction operation.
973     if (!RdxOp)
974       return RK_None;
975     Optional<ReductionData> RDLevel = getReductionData(RdxOp);
976     if (!RDLevel || !RDLevel->hasSameData(*RD))
977       return RK_None;
978 
979     Value *NextRdxOp;
980     ShuffleVectorInst *Shuffle;
981     std::tie(NextRdxOp, Shuffle) =
982         getShuffleAndOtherOprd(RDLevel->LHS, RDLevel->RHS);
983 
984     // Check the current reduction operation and the shuffle use the same value.
985     if (Shuffle == nullptr)
986       return RK_None;
987     if (Shuffle->getOperand(0) != NextRdxOp)
988       return RK_None;
989 
990     // Check that shuffle masks matches.
991     for (unsigned j = 0; j != MaskStart; ++j)
992       ShuffleMask[j] = MaskStart + j;
993     // Fill the rest of the mask with -1 for undef.
994     std::fill(&ShuffleMask[MaskStart], ShuffleMask.end(), -1);
995 
996     SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
997     if (ShuffleMask != Mask)
998       return RK_None;
999 
1000     RdxOp = dyn_cast<Instruction>(NextRdxOp);
1001     NumVecElemsRemain /= 2;
1002     MaskStart *= 2;
1003   }
1004 
1005   Opcode = RD->Opcode;
1006   Ty = VecTy;
1007   return RD->Kind;
1008 }
1009 
1010 int TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
1011   switch (I->getOpcode()) {
1012   case Instruction::GetElementPtr:
1013     return getUserCost(I);
1014 
1015   case Instruction::Ret:
1016   case Instruction::PHI:
1017   case Instruction::Br: {
1018     return getCFInstrCost(I->getOpcode());
1019   }
1020   case Instruction::Add:
1021   case Instruction::FAdd:
1022   case Instruction::Sub:
1023   case Instruction::FSub:
1024   case Instruction::Mul:
1025   case Instruction::FMul:
1026   case Instruction::UDiv:
1027   case Instruction::SDiv:
1028   case Instruction::FDiv:
1029   case Instruction::URem:
1030   case Instruction::SRem:
1031   case Instruction::FRem:
1032   case Instruction::Shl:
1033   case Instruction::LShr:
1034   case Instruction::AShr:
1035   case Instruction::And:
1036   case Instruction::Or:
1037   case Instruction::Xor: {
1038     TargetTransformInfo::OperandValueKind Op1VK, Op2VK;
1039     TargetTransformInfo::OperandValueProperties Op1VP, Op2VP;
1040     Op1VK = getOperandInfo(I->getOperand(0), Op1VP);
1041     Op2VK = getOperandInfo(I->getOperand(1), Op2VP);
1042     SmallVector<const Value *, 2> Operands(I->operand_values());
1043     return getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK, Op2VK,
1044                                   Op1VP, Op2VP, Operands);
1045   }
1046   case Instruction::Select: {
1047     const SelectInst *SI = cast<SelectInst>(I);
1048     Type *CondTy = SI->getCondition()->getType();
1049     return getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy, I);
1050   }
1051   case Instruction::ICmp:
1052   case Instruction::FCmp: {
1053     Type *ValTy = I->getOperand(0)->getType();
1054     return getCmpSelInstrCost(I->getOpcode(), ValTy, I->getType(), I);
1055   }
1056   case Instruction::Store: {
1057     const StoreInst *SI = cast<StoreInst>(I);
1058     Type *ValTy = SI->getValueOperand()->getType();
1059     return getMemoryOpCost(I->getOpcode(), ValTy,
1060                                 SI->getAlignment(),
1061                                 SI->getPointerAddressSpace(), I);
1062   }
1063   case Instruction::Load: {
1064     const LoadInst *LI = cast<LoadInst>(I);
1065     return getMemoryOpCost(I->getOpcode(), I->getType(),
1066                                 LI->getAlignment(),
1067                                 LI->getPointerAddressSpace(), I);
1068   }
1069   case Instruction::ZExt:
1070   case Instruction::SExt:
1071   case Instruction::FPToUI:
1072   case Instruction::FPToSI:
1073   case Instruction::FPExt:
1074   case Instruction::PtrToInt:
1075   case Instruction::IntToPtr:
1076   case Instruction::SIToFP:
1077   case Instruction::UIToFP:
1078   case Instruction::Trunc:
1079   case Instruction::FPTrunc:
1080   case Instruction::BitCast:
1081   case Instruction::AddrSpaceCast: {
1082     Type *SrcTy = I->getOperand(0)->getType();
1083     return getCastInstrCost(I->getOpcode(), I->getType(), SrcTy, I);
1084   }
1085   case Instruction::ExtractElement: {
1086     const ExtractElementInst * EEI = cast<ExtractElementInst>(I);
1087     ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
1088     unsigned Idx = -1;
1089     if (CI)
1090       Idx = CI->getZExtValue();
1091 
1092     // Try to match a reduction sequence (series of shufflevector and vector
1093     // adds followed by a extractelement).
1094     unsigned ReduxOpCode;
1095     Type *ReduxType;
1096 
1097     switch (matchVectorSplittingReduction(EEI, ReduxOpCode, ReduxType)) {
1098     case RK_Arithmetic:
1099       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1100                                              /*IsPairwiseForm=*/false);
1101     case RK_MinMax:
1102       return getMinMaxReductionCost(
1103           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1104           /*IsPairwiseForm=*/false, /*IsUnsigned=*/false);
1105     case RK_UnsignedMinMax:
1106       return getMinMaxReductionCost(
1107           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1108           /*IsPairwiseForm=*/false, /*IsUnsigned=*/true);
1109     case RK_None:
1110       break;
1111     }
1112 
1113     switch (matchPairwiseReduction(EEI, ReduxOpCode, ReduxType)) {
1114     case RK_Arithmetic:
1115       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1116                                              /*IsPairwiseForm=*/true);
1117     case RK_MinMax:
1118       return getMinMaxReductionCost(
1119           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1120           /*IsPairwiseForm=*/true, /*IsUnsigned=*/false);
1121     case RK_UnsignedMinMax:
1122       return getMinMaxReductionCost(
1123           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1124           /*IsPairwiseForm=*/true, /*IsUnsigned=*/true);
1125     case RK_None:
1126       break;
1127     }
1128 
1129     return getVectorInstrCost(I->getOpcode(),
1130                                    EEI->getOperand(0)->getType(), Idx);
1131   }
1132   case Instruction::InsertElement: {
1133     const InsertElementInst * IE = cast<InsertElementInst>(I);
1134     ConstantInt *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
1135     unsigned Idx = -1;
1136     if (CI)
1137       Idx = CI->getZExtValue();
1138     return getVectorInstrCost(I->getOpcode(),
1139                                    IE->getType(), Idx);
1140   }
1141   case Instruction::ShuffleVector: {
1142     const ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
1143     Type *Ty = Shuffle->getType();
1144     Type *SrcTy = Shuffle->getOperand(0)->getType();
1145 
1146     // TODO: Identify and add costs for insert subvector, etc.
1147     int SubIndex;
1148     if (Shuffle->isExtractSubvectorMask(SubIndex))
1149       return TTIImpl->getShuffleCost(SK_ExtractSubvector, SrcTy, SubIndex, Ty);
1150 
1151     if (Shuffle->changesLength())
1152       return -1;
1153 
1154     if (Shuffle->isIdentity())
1155       return 0;
1156 
1157     if (Shuffle->isReverse())
1158       return TTIImpl->getShuffleCost(SK_Reverse, Ty, 0, nullptr);
1159 
1160     if (Shuffle->isSelect())
1161       return TTIImpl->getShuffleCost(SK_Select, Ty, 0, nullptr);
1162 
1163     if (Shuffle->isTranspose())
1164       return TTIImpl->getShuffleCost(SK_Transpose, Ty, 0, nullptr);
1165 
1166     if (Shuffle->isZeroEltSplat())
1167       return TTIImpl->getShuffleCost(SK_Broadcast, Ty, 0, nullptr);
1168 
1169     if (Shuffle->isSingleSource())
1170       return TTIImpl->getShuffleCost(SK_PermuteSingleSrc, Ty, 0, nullptr);
1171 
1172     return TTIImpl->getShuffleCost(SK_PermuteTwoSrc, Ty, 0, nullptr);
1173   }
1174   case Instruction::Call:
1175     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
1176       SmallVector<Value *, 4> Args(II->arg_operands());
1177 
1178       FastMathFlags FMF;
1179       if (auto *FPMO = dyn_cast<FPMathOperator>(II))
1180         FMF = FPMO->getFastMathFlags();
1181 
1182       return getIntrinsicInstrCost(II->getIntrinsicID(), II->getType(),
1183                                         Args, FMF);
1184     }
1185     return -1;
1186   default:
1187     // We don't have any information on this instruction.
1188     return -1;
1189   }
1190 }
1191 
1192 TargetTransformInfo::Concept::~Concept() {}
1193 
1194 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1195 
1196 TargetIRAnalysis::TargetIRAnalysis(
1197     std::function<Result(const Function &)> TTICallback)
1198     : TTICallback(std::move(TTICallback)) {}
1199 
1200 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1201                                                FunctionAnalysisManager &) {
1202   return TTICallback(F);
1203 }
1204 
1205 AnalysisKey TargetIRAnalysis::Key;
1206 
1207 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1208   return Result(F.getParent()->getDataLayout());
1209 }
1210 
1211 // Register the basic pass.
1212 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1213                 "Target Transform Information", false, true)
1214 char TargetTransformInfoWrapperPass::ID = 0;
1215 
1216 void TargetTransformInfoWrapperPass::anchor() {}
1217 
1218 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1219     : ImmutablePass(ID) {
1220   initializeTargetTransformInfoWrapperPassPass(
1221       *PassRegistry::getPassRegistry());
1222 }
1223 
1224 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1225     TargetIRAnalysis TIRA)
1226     : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1227   initializeTargetTransformInfoWrapperPassPass(
1228       *PassRegistry::getPassRegistry());
1229 }
1230 
1231 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1232   FunctionAnalysisManager DummyFAM;
1233   TTI = TIRA.run(F, DummyFAM);
1234   return *TTI;
1235 }
1236 
1237 ImmutablePass *
1238 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1239   return new TargetTransformInfoWrapperPass(std::move(TIRA));
1240 }
1241