1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/Dominators.h" 15 #include "llvm/IR/Instruction.h" 16 #include "llvm/IR/Instructions.h" 17 #include "llvm/IR/IntrinsicInst.h" 18 #include "llvm/IR/Module.h" 19 #include "llvm/IR/Operator.h" 20 #include "llvm/IR/PatternMatch.h" 21 #include "llvm/InitializePasses.h" 22 #include "llvm/Support/CommandLine.h" 23 #include <utility> 24 25 using namespace llvm; 26 using namespace PatternMatch; 27 28 #define DEBUG_TYPE "tti" 29 30 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 31 cl::Hidden, 32 cl::desc("Recognize reduction patterns.")); 33 34 namespace { 35 /// No-op implementation of the TTI interface using the utility base 36 /// classes. 37 /// 38 /// This is used when no target specific information is available. 39 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 40 explicit NoTTIImpl(const DataLayout &DL) 41 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 42 }; 43 } // namespace 44 45 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 46 // If the loop has irreducible control flow, it can not be converted to 47 // Hardware loop. 48 LoopBlocksRPO RPOT(L); 49 RPOT.perform(&LI); 50 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 51 return false; 52 return true; 53 } 54 55 IntrinsicCostAttributes::IntrinsicCostAttributes( 56 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 57 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 58 ScalarizationCost(ScalarizationCost) { 59 60 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 61 FMF = FPMO->getFastMathFlags(); 62 63 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 64 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 65 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 66 } 67 68 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 69 ArrayRef<Type *> Tys, 70 FastMathFlags Flags, 71 const IntrinsicInst *I, 72 InstructionCost ScalarCost) 73 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 74 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 75 } 76 77 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 78 ArrayRef<const Value *> Args) 79 : RetTy(Ty), IID(Id) { 80 81 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 82 ParamTys.reserve(Arguments.size()); 83 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 84 ParamTys.push_back(Arguments[Idx]->getType()); 85 } 86 87 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 88 ArrayRef<const Value *> Args, 89 ArrayRef<Type *> Tys, 90 FastMathFlags Flags, 91 const IntrinsicInst *I, 92 InstructionCost ScalarCost) 93 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 94 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 95 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 96 } 97 98 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 99 LoopInfo &LI, DominatorTree &DT, 100 bool ForceNestedLoop, 101 bool ForceHardwareLoopPHI) { 102 SmallVector<BasicBlock *, 4> ExitingBlocks; 103 L->getExitingBlocks(ExitingBlocks); 104 105 for (BasicBlock *BB : ExitingBlocks) { 106 // If we pass the updated counter back through a phi, we need to know 107 // which latch the updated value will be coming from. 108 if (!L->isLoopLatch(BB)) { 109 if (ForceHardwareLoopPHI || CounterInReg) 110 continue; 111 } 112 113 const SCEV *EC = SE.getExitCount(L, BB); 114 if (isa<SCEVCouldNotCompute>(EC)) 115 continue; 116 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 117 if (ConstEC->getValue()->isZero()) 118 continue; 119 } else if (!SE.isLoopInvariant(EC, L)) 120 continue; 121 122 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 123 continue; 124 125 // If this exiting block is contained in a nested loop, it is not eligible 126 // for insertion of the branch-and-decrement since the inner loop would 127 // end up messing up the value in the CTR. 128 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 129 continue; 130 131 // We now have a loop-invariant count of loop iterations (which is not the 132 // constant zero) for which we know that this loop will not exit via this 133 // existing block. 134 135 // We need to make sure that this block will run on every loop iteration. 136 // For this to be true, we must dominate all blocks with backedges. Such 137 // blocks are in-loop predecessors to the header block. 138 bool NotAlways = false; 139 for (BasicBlock *Pred : predecessors(L->getHeader())) { 140 if (!L->contains(Pred)) 141 continue; 142 143 if (!DT.dominates(BB, Pred)) { 144 NotAlways = true; 145 break; 146 } 147 } 148 149 if (NotAlways) 150 continue; 151 152 // Make sure this blocks ends with a conditional branch. 153 Instruction *TI = BB->getTerminator(); 154 if (!TI) 155 continue; 156 157 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 158 if (!BI->isConditional()) 159 continue; 160 161 ExitBranch = BI; 162 } else 163 continue; 164 165 // Note that this block may not be the loop latch block, even if the loop 166 // has a latch block. 167 ExitBlock = BB; 168 ExitCount = EC; 169 break; 170 } 171 172 if (!ExitBlock) 173 return false; 174 return true; 175 } 176 177 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 178 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 179 180 TargetTransformInfo::~TargetTransformInfo() = default; 181 182 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 183 : TTIImpl(std::move(Arg.TTIImpl)) {} 184 185 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 186 TTIImpl = std::move(RHS.TTIImpl); 187 return *this; 188 } 189 190 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 191 return TTIImpl->getInliningThresholdMultiplier(); 192 } 193 194 unsigned 195 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 196 return TTIImpl->adjustInliningThreshold(CB); 197 } 198 199 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 200 return TTIImpl->getInlinerVectorBonusPercent(); 201 } 202 203 InstructionCost 204 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 205 ArrayRef<const Value *> Operands, 206 TTI::TargetCostKind CostKind) const { 207 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 208 } 209 210 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 211 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 212 BlockFrequencyInfo *BFI) const { 213 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 214 } 215 216 InstructionCost 217 TargetTransformInfo::getUserCost(const User *U, 218 ArrayRef<const Value *> Operands, 219 enum TargetCostKind CostKind) const { 220 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 221 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 222 "TTI should not produce negative costs!"); 223 return Cost; 224 } 225 226 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 227 return TTIImpl->getPredictableBranchThreshold(); 228 } 229 230 bool TargetTransformInfo::hasBranchDivergence() const { 231 return TTIImpl->hasBranchDivergence(); 232 } 233 234 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 235 return TTIImpl->useGPUDivergenceAnalysis(); 236 } 237 238 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 239 return TTIImpl->isSourceOfDivergence(V); 240 } 241 242 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 243 return TTIImpl->isAlwaysUniform(V); 244 } 245 246 unsigned TargetTransformInfo::getFlatAddressSpace() const { 247 return TTIImpl->getFlatAddressSpace(); 248 } 249 250 bool TargetTransformInfo::collectFlatAddressOperands( 251 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 252 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 253 } 254 255 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 256 unsigned ToAS) const { 257 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 258 } 259 260 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 261 unsigned AS) const { 262 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 263 } 264 265 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 266 return TTIImpl->getAssumedAddrSpace(V); 267 } 268 269 std::pair<const Value *, unsigned> 270 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 271 return TTIImpl->getPredicatedAddrSpace(V); 272 } 273 274 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 275 IntrinsicInst *II, Value *OldV, Value *NewV) const { 276 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 277 } 278 279 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 280 return TTIImpl->isLoweredToCall(F); 281 } 282 283 bool TargetTransformInfo::isHardwareLoopProfitable( 284 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 285 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 286 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 287 } 288 289 bool TargetTransformInfo::preferPredicateOverEpilogue( 290 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 291 TargetLibraryInfo *TLI, DominatorTree *DT, 292 const LoopAccessInfo *LAI) const { 293 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 294 } 295 296 bool TargetTransformInfo::emitGetActiveLaneMask() const { 297 return TTIImpl->emitGetActiveLaneMask(); 298 } 299 300 Optional<Instruction *> 301 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 302 IntrinsicInst &II) const { 303 return TTIImpl->instCombineIntrinsic(IC, II); 304 } 305 306 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 307 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 308 bool &KnownBitsComputed) const { 309 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 310 KnownBitsComputed); 311 } 312 313 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 314 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 315 APInt &UndefElts2, APInt &UndefElts3, 316 std::function<void(Instruction *, unsigned, APInt, APInt &)> 317 SimplifyAndSetOp) const { 318 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 319 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 320 SimplifyAndSetOp); 321 } 322 323 void TargetTransformInfo::getUnrollingPreferences( 324 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 325 OptimizationRemarkEmitter *ORE) const { 326 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 327 } 328 329 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 330 PeelingPreferences &PP) const { 331 return TTIImpl->getPeelingPreferences(L, SE, PP); 332 } 333 334 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 335 return TTIImpl->isLegalAddImmediate(Imm); 336 } 337 338 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 339 return TTIImpl->isLegalICmpImmediate(Imm); 340 } 341 342 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 343 int64_t BaseOffset, 344 bool HasBaseReg, int64_t Scale, 345 unsigned AddrSpace, 346 Instruction *I) const { 347 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 348 Scale, AddrSpace, I); 349 } 350 351 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const { 352 return TTIImpl->isLSRCostLess(C1, C2); 353 } 354 355 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 356 return TTIImpl->isNumRegsMajorCostOfLSR(); 357 } 358 359 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 360 return TTIImpl->isProfitableLSRChainElement(I); 361 } 362 363 bool TargetTransformInfo::canMacroFuseCmp() const { 364 return TTIImpl->canMacroFuseCmp(); 365 } 366 367 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 368 ScalarEvolution *SE, LoopInfo *LI, 369 DominatorTree *DT, AssumptionCache *AC, 370 TargetLibraryInfo *LibInfo) const { 371 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 372 } 373 374 TTI::AddressingModeKind 375 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 376 ScalarEvolution *SE) const { 377 return TTIImpl->getPreferredAddressingMode(L, SE); 378 } 379 380 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 381 Align Alignment) const { 382 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 383 } 384 385 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 386 Align Alignment) const { 387 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 388 } 389 390 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 391 Align Alignment) const { 392 return TTIImpl->isLegalNTStore(DataType, Alignment); 393 } 394 395 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 396 return TTIImpl->isLegalNTLoad(DataType, Alignment); 397 } 398 399 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy, 400 unsigned NumElements) const { 401 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements); 402 } 403 404 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 405 Align Alignment) const { 406 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 407 } 408 409 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 410 Align Alignment) const { 411 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 412 } 413 414 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType, 415 Align Alignment) const { 416 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment); 417 } 418 419 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType, 420 Align Alignment) const { 421 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment); 422 } 423 424 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 425 return TTIImpl->isLegalMaskedCompressStore(DataType); 426 } 427 428 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 429 return TTIImpl->isLegalMaskedExpandLoad(DataType); 430 } 431 432 bool TargetTransformInfo::enableOrderedReductions() const { 433 return TTIImpl->enableOrderedReductions(); 434 } 435 436 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 437 return TTIImpl->hasDivRemOp(DataType, IsSigned); 438 } 439 440 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 441 unsigned AddrSpace) const { 442 return TTIImpl->hasVolatileVariant(I, AddrSpace); 443 } 444 445 bool TargetTransformInfo::prefersVectorizedAddressing() const { 446 return TTIImpl->prefersVectorizedAddressing(); 447 } 448 449 InstructionCost TargetTransformInfo::getScalingFactorCost( 450 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 451 int64_t Scale, unsigned AddrSpace) const { 452 InstructionCost Cost = TTIImpl->getScalingFactorCost( 453 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 454 assert(Cost >= 0 && "TTI should not produce negative costs!"); 455 return Cost; 456 } 457 458 bool TargetTransformInfo::LSRWithInstrQueries() const { 459 return TTIImpl->LSRWithInstrQueries(); 460 } 461 462 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 463 return TTIImpl->isTruncateFree(Ty1, Ty2); 464 } 465 466 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 467 return TTIImpl->isProfitableToHoist(I); 468 } 469 470 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 471 472 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 473 return TTIImpl->isTypeLegal(Ty); 474 } 475 476 InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const { 477 return TTIImpl->getRegUsageForType(Ty); 478 } 479 480 bool TargetTransformInfo::shouldBuildLookupTables() const { 481 return TTIImpl->shouldBuildLookupTables(); 482 } 483 484 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 485 Constant *C) const { 486 return TTIImpl->shouldBuildLookupTablesForConstant(C); 487 } 488 489 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 490 return TTIImpl->shouldBuildRelLookupTables(); 491 } 492 493 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 494 return TTIImpl->useColdCCForColdCall(F); 495 } 496 497 InstructionCost 498 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 499 const APInt &DemandedElts, 500 bool Insert, bool Extract) const { 501 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 502 } 503 504 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 505 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 506 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 507 } 508 509 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 510 return TTIImpl->supportsEfficientVectorElementLoadStore(); 511 } 512 513 bool TargetTransformInfo::enableAggressiveInterleaving( 514 bool LoopHasReductions) const { 515 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 516 } 517 518 TargetTransformInfo::MemCmpExpansionOptions 519 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 520 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 521 } 522 523 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 524 return TTIImpl->enableInterleavedAccessVectorization(); 525 } 526 527 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 528 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 529 } 530 531 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 532 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 533 } 534 535 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 536 unsigned BitWidth, 537 unsigned AddressSpace, 538 Align Alignment, 539 bool *Fast) const { 540 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 541 AddressSpace, Alignment, Fast); 542 } 543 544 TargetTransformInfo::PopcntSupportKind 545 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 546 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 547 } 548 549 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 550 return TTIImpl->haveFastSqrt(Ty); 551 } 552 553 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 554 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 555 } 556 557 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 558 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 559 assert(Cost >= 0 && "TTI should not produce negative costs!"); 560 return Cost; 561 } 562 563 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 564 unsigned Idx, 565 const APInt &Imm, 566 Type *Ty) const { 567 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 568 assert(Cost >= 0 && "TTI should not produce negative costs!"); 569 return Cost; 570 } 571 572 InstructionCost 573 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 574 TTI::TargetCostKind CostKind) const { 575 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 576 assert(Cost >= 0 && "TTI should not produce negative costs!"); 577 return Cost; 578 } 579 580 InstructionCost TargetTransformInfo::getIntImmCostInst( 581 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 582 TTI::TargetCostKind CostKind, Instruction *Inst) const { 583 InstructionCost Cost = 584 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 585 assert(Cost >= 0 && "TTI should not produce negative costs!"); 586 return Cost; 587 } 588 589 InstructionCost 590 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 591 const APInt &Imm, Type *Ty, 592 TTI::TargetCostKind CostKind) const { 593 InstructionCost Cost = 594 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 595 assert(Cost >= 0 && "TTI should not produce negative costs!"); 596 return Cost; 597 } 598 599 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 600 return TTIImpl->getNumberOfRegisters(ClassID); 601 } 602 603 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 604 Type *Ty) const { 605 return TTIImpl->getRegisterClassForType(Vector, Ty); 606 } 607 608 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 609 return TTIImpl->getRegisterClassName(ClassID); 610 } 611 612 TypeSize TargetTransformInfo::getRegisterBitWidth( 613 TargetTransformInfo::RegisterKind K) const { 614 return TTIImpl->getRegisterBitWidth(K); 615 } 616 617 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 618 return TTIImpl->getMinVectorRegisterBitWidth(); 619 } 620 621 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 622 return TTIImpl->getMaxVScale(); 623 } 624 625 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 626 return TTIImpl->getVScaleForTuning(); 627 } 628 629 bool TargetTransformInfo::shouldMaximizeVectorBandwidth( 630 TargetTransformInfo::RegisterKind K) const { 631 return TTIImpl->shouldMaximizeVectorBandwidth(K); 632 } 633 634 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 635 bool IsScalable) const { 636 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 637 } 638 639 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 640 unsigned Opcode) const { 641 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 642 } 643 644 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 645 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 646 return TTIImpl->shouldConsiderAddressTypePromotion( 647 I, AllowPromotionWithoutCommonHeader); 648 } 649 650 unsigned TargetTransformInfo::getCacheLineSize() const { 651 return TTIImpl->getCacheLineSize(); 652 } 653 654 llvm::Optional<unsigned> 655 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 656 return TTIImpl->getCacheSize(Level); 657 } 658 659 llvm::Optional<unsigned> 660 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 661 return TTIImpl->getCacheAssociativity(Level); 662 } 663 664 unsigned TargetTransformInfo::getPrefetchDistance() const { 665 return TTIImpl->getPrefetchDistance(); 666 } 667 668 unsigned TargetTransformInfo::getMinPrefetchStride( 669 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 670 unsigned NumPrefetches, bool HasCall) const { 671 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 672 NumPrefetches, HasCall); 673 } 674 675 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 676 return TTIImpl->getMaxPrefetchIterationsAhead(); 677 } 678 679 bool TargetTransformInfo::enableWritePrefetching() const { 680 return TTIImpl->enableWritePrefetching(); 681 } 682 683 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 684 return TTIImpl->getMaxInterleaveFactor(VF); 685 } 686 687 TargetTransformInfo::OperandValueKind 688 TargetTransformInfo::getOperandInfo(const Value *V, 689 OperandValueProperties &OpProps) { 690 OperandValueKind OpInfo = OK_AnyValue; 691 OpProps = OP_None; 692 693 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 694 if (CI->getValue().isPowerOf2()) 695 OpProps = OP_PowerOf2; 696 return OK_UniformConstantValue; 697 } 698 699 // A broadcast shuffle creates a uniform value. 700 // TODO: Add support for non-zero index broadcasts. 701 // TODO: Add support for different source vector width. 702 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 703 if (ShuffleInst->isZeroEltSplat()) 704 OpInfo = OK_UniformValue; 705 706 const Value *Splat = getSplatValue(V); 707 708 // Check for a splat of a constant or for a non uniform vector of constants 709 // and check if the constant(s) are all powers of two. 710 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 711 OpInfo = OK_NonUniformConstantValue; 712 if (Splat) { 713 OpInfo = OK_UniformConstantValue; 714 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 715 if (CI->getValue().isPowerOf2()) 716 OpProps = OP_PowerOf2; 717 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 718 OpProps = OP_PowerOf2; 719 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 720 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 721 if (CI->getValue().isPowerOf2()) 722 continue; 723 OpProps = OP_None; 724 break; 725 } 726 } 727 } 728 729 // Check for a splat of a uniform value. This is not loop aware, so return 730 // true only for the obviously uniform cases (argument, globalvalue) 731 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 732 OpInfo = OK_UniformValue; 733 734 return OpInfo; 735 } 736 737 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 738 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 739 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 740 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 741 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 742 InstructionCost Cost = 743 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 744 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 745 assert(Cost >= 0 && "TTI should not produce negative costs!"); 746 return Cost; 747 } 748 749 InstructionCost TargetTransformInfo::getShuffleCost( 750 ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask, int Index, 751 VectorType *SubTp, ArrayRef<Value *> Args) const { 752 InstructionCost Cost = 753 TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp, Args); 754 assert(Cost >= 0 && "TTI should not produce negative costs!"); 755 return Cost; 756 } 757 758 TTI::CastContextHint 759 TargetTransformInfo::getCastContextHint(const Instruction *I) { 760 if (!I) 761 return CastContextHint::None; 762 763 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 764 unsigned GatScatOp) { 765 const Instruction *I = dyn_cast<Instruction>(V); 766 if (!I) 767 return CastContextHint::None; 768 769 if (I->getOpcode() == LdStOp) 770 return CastContextHint::Normal; 771 772 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 773 if (II->getIntrinsicID() == MaskedOp) 774 return TTI::CastContextHint::Masked; 775 if (II->getIntrinsicID() == GatScatOp) 776 return TTI::CastContextHint::GatherScatter; 777 } 778 779 return TTI::CastContextHint::None; 780 }; 781 782 switch (I->getOpcode()) { 783 case Instruction::ZExt: 784 case Instruction::SExt: 785 case Instruction::FPExt: 786 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 787 Intrinsic::masked_load, Intrinsic::masked_gather); 788 case Instruction::Trunc: 789 case Instruction::FPTrunc: 790 if (I->hasOneUse()) 791 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 792 Intrinsic::masked_store, 793 Intrinsic::masked_scatter); 794 break; 795 default: 796 return CastContextHint::None; 797 } 798 799 return TTI::CastContextHint::None; 800 } 801 802 InstructionCost TargetTransformInfo::getCastInstrCost( 803 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 804 TTI::TargetCostKind CostKind, const Instruction *I) const { 805 assert((I == nullptr || I->getOpcode() == Opcode) && 806 "Opcode should reflect passed instruction."); 807 InstructionCost Cost = 808 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 809 assert(Cost >= 0 && "TTI should not produce negative costs!"); 810 return Cost; 811 } 812 813 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 814 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 815 InstructionCost Cost = 816 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 817 assert(Cost >= 0 && "TTI should not produce negative costs!"); 818 return Cost; 819 } 820 821 InstructionCost TargetTransformInfo::getCFInstrCost( 822 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 823 assert((I == nullptr || I->getOpcode() == Opcode) && 824 "Opcode should reflect passed instruction."); 825 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 826 assert(Cost >= 0 && "TTI should not produce negative costs!"); 827 return Cost; 828 } 829 830 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 831 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 832 TTI::TargetCostKind CostKind, const Instruction *I) const { 833 assert((I == nullptr || I->getOpcode() == Opcode) && 834 "Opcode should reflect passed instruction."); 835 InstructionCost Cost = 836 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 837 assert(Cost >= 0 && "TTI should not produce negative costs!"); 838 return Cost; 839 } 840 841 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 842 Type *Val, 843 unsigned Index) const { 844 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 845 assert(Cost >= 0 && "TTI should not produce negative costs!"); 846 return Cost; 847 } 848 849 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 850 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 851 TTI::TargetCostKind CostKind) { 852 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 853 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 854 assert(Cost >= 0 && "TTI should not produce negative costs!"); 855 return Cost; 856 } 857 858 InstructionCost TargetTransformInfo::getMemoryOpCost( 859 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 860 TTI::TargetCostKind CostKind, const Instruction *I) const { 861 assert((I == nullptr || I->getOpcode() == Opcode) && 862 "Opcode should reflect passed instruction."); 863 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 864 AddressSpace, CostKind, I); 865 assert(Cost >= 0 && "TTI should not produce negative costs!"); 866 return Cost; 867 } 868 869 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 870 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 871 TTI::TargetCostKind CostKind) const { 872 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 873 AddressSpace, CostKind); 874 assert(Cost >= 0 && "TTI should not produce negative costs!"); 875 return Cost; 876 } 877 878 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 879 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 880 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 881 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 882 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 883 assert(Cost >= 0 && "TTI should not produce negative costs!"); 884 return Cost; 885 } 886 887 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 888 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 889 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 890 bool UseMaskForCond, bool UseMaskForGaps) const { 891 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 892 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 893 UseMaskForCond, UseMaskForGaps); 894 assert(Cost >= 0 && "TTI should not produce negative costs!"); 895 return Cost; 896 } 897 898 InstructionCost 899 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 900 TTI::TargetCostKind CostKind) const { 901 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 902 assert(Cost >= 0 && "TTI should not produce negative costs!"); 903 return Cost; 904 } 905 906 InstructionCost 907 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 908 ArrayRef<Type *> Tys, 909 TTI::TargetCostKind CostKind) const { 910 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 911 assert(Cost >= 0 && "TTI should not produce negative costs!"); 912 return Cost; 913 } 914 915 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 916 return TTIImpl->getNumberOfParts(Tp); 917 } 918 919 InstructionCost 920 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 921 const SCEV *Ptr) const { 922 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 923 assert(Cost >= 0 && "TTI should not produce negative costs!"); 924 return Cost; 925 } 926 927 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 928 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 929 assert(Cost >= 0 && "TTI should not produce negative costs!"); 930 return Cost; 931 } 932 933 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 934 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 935 TTI::TargetCostKind CostKind) const { 936 InstructionCost Cost = 937 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 938 assert(Cost >= 0 && "TTI should not produce negative costs!"); 939 return Cost; 940 } 941 942 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 943 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 944 TTI::TargetCostKind CostKind) const { 945 InstructionCost Cost = 946 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 947 assert(Cost >= 0 && "TTI should not produce negative costs!"); 948 return Cost; 949 } 950 951 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 952 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 953 TTI::TargetCostKind CostKind) const { 954 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 955 CostKind); 956 } 957 958 InstructionCost 959 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 960 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 961 } 962 963 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 964 MemIntrinsicInfo &Info) const { 965 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 966 } 967 968 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 969 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 970 } 971 972 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 973 IntrinsicInst *Inst, Type *ExpectedType) const { 974 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 975 } 976 977 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 978 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 979 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, 980 Optional<uint32_t> AtomicElementSize) const { 981 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 982 DestAddrSpace, SrcAlign, DestAlign, 983 AtomicElementSize); 984 } 985 986 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 987 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 988 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 989 unsigned SrcAlign, unsigned DestAlign, 990 Optional<uint32_t> AtomicCpySize) const { 991 TTIImpl->getMemcpyLoopResidualLoweringType( 992 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign, 993 DestAlign, AtomicCpySize); 994 } 995 996 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 997 const Function *Callee) const { 998 return TTIImpl->areInlineCompatible(Caller, Callee); 999 } 1000 1001 bool TargetTransformInfo::areTypesABICompatible( 1002 const Function *Caller, const Function *Callee, 1003 const ArrayRef<Type *> &Types) const { 1004 return TTIImpl->areTypesABICompatible(Caller, Callee, Types); 1005 } 1006 1007 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 1008 Type *Ty) const { 1009 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 1010 } 1011 1012 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 1013 Type *Ty) const { 1014 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 1015 } 1016 1017 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1018 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1019 } 1020 1021 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1022 return TTIImpl->isLegalToVectorizeLoad(LI); 1023 } 1024 1025 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1026 return TTIImpl->isLegalToVectorizeStore(SI); 1027 } 1028 1029 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1030 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1031 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1032 AddrSpace); 1033 } 1034 1035 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1036 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1037 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1038 AddrSpace); 1039 } 1040 1041 bool TargetTransformInfo::isLegalToVectorizeReduction( 1042 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1043 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1044 } 1045 1046 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1047 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1048 } 1049 1050 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1051 unsigned LoadSize, 1052 unsigned ChainSizeInBytes, 1053 VectorType *VecTy) const { 1054 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1055 } 1056 1057 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1058 unsigned StoreSize, 1059 unsigned ChainSizeInBytes, 1060 VectorType *VecTy) const { 1061 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1062 } 1063 1064 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1065 ReductionFlags Flags) const { 1066 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1067 } 1068 1069 bool TargetTransformInfo::preferPredicatedReductionSelect( 1070 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1071 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1072 } 1073 1074 TargetTransformInfo::VPLegalization 1075 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1076 return TTIImpl->getVPLegalizationStrategy(VPI); 1077 } 1078 1079 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1080 return TTIImpl->shouldExpandReduction(II); 1081 } 1082 1083 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1084 return TTIImpl->getGISelRematGlobalCost(); 1085 } 1086 1087 bool TargetTransformInfo::supportsScalableVectors() const { 1088 return TTIImpl->supportsScalableVectors(); 1089 } 1090 1091 bool TargetTransformInfo::enableScalableVectorization() const { 1092 return TTIImpl->enableScalableVectorization(); 1093 } 1094 1095 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType, 1096 Align Alignment) const { 1097 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment); 1098 } 1099 1100 InstructionCost 1101 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1102 return TTIImpl->getInstructionLatency(I); 1103 } 1104 1105 InstructionCost 1106 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1107 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1108 1109 switch (I->getOpcode()) { 1110 case Instruction::GetElementPtr: 1111 case Instruction::Ret: 1112 case Instruction::PHI: 1113 case Instruction::Br: 1114 case Instruction::Add: 1115 case Instruction::FAdd: 1116 case Instruction::Sub: 1117 case Instruction::FSub: 1118 case Instruction::Mul: 1119 case Instruction::FMul: 1120 case Instruction::UDiv: 1121 case Instruction::SDiv: 1122 case Instruction::FDiv: 1123 case Instruction::URem: 1124 case Instruction::SRem: 1125 case Instruction::FRem: 1126 case Instruction::Shl: 1127 case Instruction::LShr: 1128 case Instruction::AShr: 1129 case Instruction::And: 1130 case Instruction::Or: 1131 case Instruction::Xor: 1132 case Instruction::FNeg: 1133 case Instruction::Select: 1134 case Instruction::ICmp: 1135 case Instruction::FCmp: 1136 case Instruction::Store: 1137 case Instruction::Load: 1138 case Instruction::ZExt: 1139 case Instruction::SExt: 1140 case Instruction::FPToUI: 1141 case Instruction::FPToSI: 1142 case Instruction::FPExt: 1143 case Instruction::PtrToInt: 1144 case Instruction::IntToPtr: 1145 case Instruction::SIToFP: 1146 case Instruction::UIToFP: 1147 case Instruction::Trunc: 1148 case Instruction::FPTrunc: 1149 case Instruction::BitCast: 1150 case Instruction::AddrSpaceCast: 1151 case Instruction::ExtractElement: 1152 case Instruction::InsertElement: 1153 case Instruction::ExtractValue: 1154 case Instruction::ShuffleVector: 1155 case Instruction::Call: 1156 case Instruction::Switch: 1157 return getUserCost(I, CostKind); 1158 default: 1159 // We don't have any information on this instruction. 1160 return -1; 1161 } 1162 } 1163 1164 TargetTransformInfo::Concept::~Concept() = default; 1165 1166 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1167 1168 TargetIRAnalysis::TargetIRAnalysis( 1169 std::function<Result(const Function &)> TTICallback) 1170 : TTICallback(std::move(TTICallback)) {} 1171 1172 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1173 FunctionAnalysisManager &) { 1174 return TTICallback(F); 1175 } 1176 1177 AnalysisKey TargetIRAnalysis::Key; 1178 1179 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1180 return Result(F.getParent()->getDataLayout()); 1181 } 1182 1183 // Register the basic pass. 1184 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1185 "Target Transform Information", false, true) 1186 char TargetTransformInfoWrapperPass::ID = 0; 1187 1188 void TargetTransformInfoWrapperPass::anchor() {} 1189 1190 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1191 : ImmutablePass(ID) { 1192 initializeTargetTransformInfoWrapperPassPass( 1193 *PassRegistry::getPassRegistry()); 1194 } 1195 1196 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1197 TargetIRAnalysis TIRA) 1198 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1199 initializeTargetTransformInfoWrapperPassPass( 1200 *PassRegistry::getPassRegistry()); 1201 } 1202 1203 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1204 FunctionAnalysisManager DummyFAM; 1205 TTI = TIRA.run(F, DummyFAM); 1206 return *TTI; 1207 } 1208 1209 ImmutablePass * 1210 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1211 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1212 } 1213