1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/Dominators.h" 15 #include "llvm/IR/Instruction.h" 16 #include "llvm/IR/Instructions.h" 17 #include "llvm/IR/IntrinsicInst.h" 18 #include "llvm/IR/Module.h" 19 #include "llvm/IR/Operator.h" 20 #include "llvm/IR/PatternMatch.h" 21 #include "llvm/InitializePasses.h" 22 #include "llvm/Support/CommandLine.h" 23 #include <utility> 24 25 using namespace llvm; 26 using namespace PatternMatch; 27 28 #define DEBUG_TYPE "tti" 29 30 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 31 cl::Hidden, 32 cl::desc("Recognize reduction patterns.")); 33 34 static cl::opt<unsigned> CacheLineSize( 35 "cache-line-size", cl::init(0), cl::Hidden, 36 cl::desc("Use this to override the target cache line size when " 37 "specified by the user.")); 38 39 namespace { 40 /// No-op implementation of the TTI interface using the utility base 41 /// classes. 42 /// 43 /// This is used when no target specific information is available. 44 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 45 explicit NoTTIImpl(const DataLayout &DL) 46 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 47 }; 48 } // namespace 49 50 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 51 // If the loop has irreducible control flow, it can not be converted to 52 // Hardware loop. 53 LoopBlocksRPO RPOT(L); 54 RPOT.perform(&LI); 55 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 56 return false; 57 return true; 58 } 59 60 IntrinsicCostAttributes::IntrinsicCostAttributes( 61 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 62 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 63 ScalarizationCost(ScalarizationCost) { 64 65 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 66 FMF = FPMO->getFastMathFlags(); 67 68 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 69 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 70 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 71 } 72 73 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 74 ArrayRef<Type *> Tys, 75 FastMathFlags Flags, 76 const IntrinsicInst *I, 77 InstructionCost ScalarCost) 78 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 79 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 80 } 81 82 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 83 ArrayRef<const Value *> Args) 84 : RetTy(Ty), IID(Id) { 85 86 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 87 ParamTys.reserve(Arguments.size()); 88 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 89 ParamTys.push_back(Arguments[Idx]->getType()); 90 } 91 92 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 93 ArrayRef<const Value *> Args, 94 ArrayRef<Type *> Tys, 95 FastMathFlags Flags, 96 const IntrinsicInst *I, 97 InstructionCost ScalarCost) 98 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 99 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 100 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 101 } 102 103 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 104 LoopInfo &LI, DominatorTree &DT, 105 bool ForceNestedLoop, 106 bool ForceHardwareLoopPHI) { 107 SmallVector<BasicBlock *, 4> ExitingBlocks; 108 L->getExitingBlocks(ExitingBlocks); 109 110 for (BasicBlock *BB : ExitingBlocks) { 111 // If we pass the updated counter back through a phi, we need to know 112 // which latch the updated value will be coming from. 113 if (!L->isLoopLatch(BB)) { 114 if (ForceHardwareLoopPHI || CounterInReg) 115 continue; 116 } 117 118 const SCEV *EC = SE.getExitCount(L, BB); 119 if (isa<SCEVCouldNotCompute>(EC)) 120 continue; 121 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 122 if (ConstEC->getValue()->isZero()) 123 continue; 124 } else if (!SE.isLoopInvariant(EC, L)) 125 continue; 126 127 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 128 continue; 129 130 // If this exiting block is contained in a nested loop, it is not eligible 131 // for insertion of the branch-and-decrement since the inner loop would 132 // end up messing up the value in the CTR. 133 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 134 continue; 135 136 // We now have a loop-invariant count of loop iterations (which is not the 137 // constant zero) for which we know that this loop will not exit via this 138 // existing block. 139 140 // We need to make sure that this block will run on every loop iteration. 141 // For this to be true, we must dominate all blocks with backedges. Such 142 // blocks are in-loop predecessors to the header block. 143 bool NotAlways = false; 144 for (BasicBlock *Pred : predecessors(L->getHeader())) { 145 if (!L->contains(Pred)) 146 continue; 147 148 if (!DT.dominates(BB, Pred)) { 149 NotAlways = true; 150 break; 151 } 152 } 153 154 if (NotAlways) 155 continue; 156 157 // Make sure this blocks ends with a conditional branch. 158 Instruction *TI = BB->getTerminator(); 159 if (!TI) 160 continue; 161 162 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 163 if (!BI->isConditional()) 164 continue; 165 166 ExitBranch = BI; 167 } else 168 continue; 169 170 // Note that this block may not be the loop latch block, even if the loop 171 // has a latch block. 172 ExitBlock = BB; 173 ExitCount = EC; 174 break; 175 } 176 177 if (!ExitBlock) 178 return false; 179 return true; 180 } 181 182 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 183 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 184 185 TargetTransformInfo::~TargetTransformInfo() = default; 186 187 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 188 : TTIImpl(std::move(Arg.TTIImpl)) {} 189 190 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 191 TTIImpl = std::move(RHS.TTIImpl); 192 return *this; 193 } 194 195 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 196 return TTIImpl->getInliningThresholdMultiplier(); 197 } 198 199 unsigned 200 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 201 return TTIImpl->adjustInliningThreshold(CB); 202 } 203 204 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 205 return TTIImpl->getInlinerVectorBonusPercent(); 206 } 207 208 InstructionCost 209 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 210 ArrayRef<const Value *> Operands, 211 TTI::TargetCostKind CostKind) const { 212 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 213 } 214 215 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 216 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 217 BlockFrequencyInfo *BFI) const { 218 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 219 } 220 221 InstructionCost 222 TargetTransformInfo::getUserCost(const User *U, 223 ArrayRef<const Value *> Operands, 224 enum TargetCostKind CostKind) const { 225 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 226 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 227 "TTI should not produce negative costs!"); 228 return Cost; 229 } 230 231 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 232 return TTIImpl->getPredictableBranchThreshold(); 233 } 234 235 bool TargetTransformInfo::hasBranchDivergence() const { 236 return TTIImpl->hasBranchDivergence(); 237 } 238 239 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 240 return TTIImpl->useGPUDivergenceAnalysis(); 241 } 242 243 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 244 return TTIImpl->isSourceOfDivergence(V); 245 } 246 247 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 248 return TTIImpl->isAlwaysUniform(V); 249 } 250 251 unsigned TargetTransformInfo::getFlatAddressSpace() const { 252 return TTIImpl->getFlatAddressSpace(); 253 } 254 255 bool TargetTransformInfo::collectFlatAddressOperands( 256 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 257 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 258 } 259 260 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 261 unsigned ToAS) const { 262 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 263 } 264 265 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 266 unsigned AS) const { 267 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 268 } 269 270 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 271 return TTIImpl->getAssumedAddrSpace(V); 272 } 273 274 std::pair<const Value *, unsigned> 275 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 276 return TTIImpl->getPredicatedAddrSpace(V); 277 } 278 279 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 280 IntrinsicInst *II, Value *OldV, Value *NewV) const { 281 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 282 } 283 284 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 285 return TTIImpl->isLoweredToCall(F); 286 } 287 288 bool TargetTransformInfo::isHardwareLoopProfitable( 289 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 290 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 291 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 292 } 293 294 bool TargetTransformInfo::preferPredicateOverEpilogue( 295 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 296 TargetLibraryInfo *TLI, DominatorTree *DT, 297 const LoopAccessInfo *LAI) const { 298 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 299 } 300 301 PredicationStyle TargetTransformInfo::emitGetActiveLaneMask() const { 302 return TTIImpl->emitGetActiveLaneMask(); 303 } 304 305 Optional<Instruction *> 306 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 307 IntrinsicInst &II) const { 308 return TTIImpl->instCombineIntrinsic(IC, II); 309 } 310 311 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 312 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 313 bool &KnownBitsComputed) const { 314 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 315 KnownBitsComputed); 316 } 317 318 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 319 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 320 APInt &UndefElts2, APInt &UndefElts3, 321 std::function<void(Instruction *, unsigned, APInt, APInt &)> 322 SimplifyAndSetOp) const { 323 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 324 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 325 SimplifyAndSetOp); 326 } 327 328 void TargetTransformInfo::getUnrollingPreferences( 329 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 330 OptimizationRemarkEmitter *ORE) const { 331 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 332 } 333 334 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 335 PeelingPreferences &PP) const { 336 return TTIImpl->getPeelingPreferences(L, SE, PP); 337 } 338 339 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 340 return TTIImpl->isLegalAddImmediate(Imm); 341 } 342 343 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 344 return TTIImpl->isLegalICmpImmediate(Imm); 345 } 346 347 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 348 int64_t BaseOffset, 349 bool HasBaseReg, int64_t Scale, 350 unsigned AddrSpace, 351 Instruction *I) const { 352 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 353 Scale, AddrSpace, I); 354 } 355 356 bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1, 357 const LSRCost &C2) const { 358 return TTIImpl->isLSRCostLess(C1, C2); 359 } 360 361 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 362 return TTIImpl->isNumRegsMajorCostOfLSR(); 363 } 364 365 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 366 return TTIImpl->isProfitableLSRChainElement(I); 367 } 368 369 bool TargetTransformInfo::canMacroFuseCmp() const { 370 return TTIImpl->canMacroFuseCmp(); 371 } 372 373 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 374 ScalarEvolution *SE, LoopInfo *LI, 375 DominatorTree *DT, AssumptionCache *AC, 376 TargetLibraryInfo *LibInfo) const { 377 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 378 } 379 380 TTI::AddressingModeKind 381 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 382 ScalarEvolution *SE) const { 383 return TTIImpl->getPreferredAddressingMode(L, SE); 384 } 385 386 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 387 Align Alignment) const { 388 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 389 } 390 391 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 392 Align Alignment) const { 393 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 394 } 395 396 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 397 Align Alignment) const { 398 return TTIImpl->isLegalNTStore(DataType, Alignment); 399 } 400 401 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 402 return TTIImpl->isLegalNTLoad(DataType, Alignment); 403 } 404 405 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy, 406 ElementCount NumElements) const { 407 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements); 408 } 409 410 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 411 Align Alignment) const { 412 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 413 } 414 415 bool TargetTransformInfo::isLegalAltInstr( 416 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, 417 const SmallBitVector &OpcodeMask) const { 418 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask); 419 } 420 421 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 422 Align Alignment) const { 423 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 424 } 425 426 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType, 427 Align Alignment) const { 428 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment); 429 } 430 431 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType, 432 Align Alignment) const { 433 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment); 434 } 435 436 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 437 return TTIImpl->isLegalMaskedCompressStore(DataType); 438 } 439 440 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 441 return TTIImpl->isLegalMaskedExpandLoad(DataType); 442 } 443 444 bool TargetTransformInfo::enableOrderedReductions() const { 445 return TTIImpl->enableOrderedReductions(); 446 } 447 448 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 449 return TTIImpl->hasDivRemOp(DataType, IsSigned); 450 } 451 452 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 453 unsigned AddrSpace) const { 454 return TTIImpl->hasVolatileVariant(I, AddrSpace); 455 } 456 457 bool TargetTransformInfo::prefersVectorizedAddressing() const { 458 return TTIImpl->prefersVectorizedAddressing(); 459 } 460 461 InstructionCost TargetTransformInfo::getScalingFactorCost( 462 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 463 int64_t Scale, unsigned AddrSpace) const { 464 InstructionCost Cost = TTIImpl->getScalingFactorCost( 465 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 466 assert(Cost >= 0 && "TTI should not produce negative costs!"); 467 return Cost; 468 } 469 470 bool TargetTransformInfo::LSRWithInstrQueries() const { 471 return TTIImpl->LSRWithInstrQueries(); 472 } 473 474 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 475 return TTIImpl->isTruncateFree(Ty1, Ty2); 476 } 477 478 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 479 return TTIImpl->isProfitableToHoist(I); 480 } 481 482 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 483 484 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 485 return TTIImpl->isTypeLegal(Ty); 486 } 487 488 unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const { 489 return TTIImpl->getRegUsageForType(Ty); 490 } 491 492 bool TargetTransformInfo::shouldBuildLookupTables() const { 493 return TTIImpl->shouldBuildLookupTables(); 494 } 495 496 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 497 Constant *C) const { 498 return TTIImpl->shouldBuildLookupTablesForConstant(C); 499 } 500 501 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 502 return TTIImpl->shouldBuildRelLookupTables(); 503 } 504 505 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 506 return TTIImpl->useColdCCForColdCall(F); 507 } 508 509 InstructionCost 510 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 511 const APInt &DemandedElts, 512 bool Insert, bool Extract) const { 513 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 514 } 515 516 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 517 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 518 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 519 } 520 521 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 522 return TTIImpl->supportsEfficientVectorElementLoadStore(); 523 } 524 525 bool TargetTransformInfo::supportsTailCalls() const { 526 return TTIImpl->supportsTailCalls(); 527 } 528 529 bool TargetTransformInfo::enableAggressiveInterleaving( 530 bool LoopHasReductions) const { 531 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 532 } 533 534 TargetTransformInfo::MemCmpExpansionOptions 535 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 536 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 537 } 538 539 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 540 return TTIImpl->enableInterleavedAccessVectorization(); 541 } 542 543 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 544 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 545 } 546 547 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 548 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 549 } 550 551 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 552 unsigned BitWidth, 553 unsigned AddressSpace, 554 Align Alignment, 555 bool *Fast) const { 556 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 557 AddressSpace, Alignment, Fast); 558 } 559 560 TargetTransformInfo::PopcntSupportKind 561 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 562 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 563 } 564 565 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 566 return TTIImpl->haveFastSqrt(Ty); 567 } 568 569 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 570 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 571 } 572 573 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 574 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 575 assert(Cost >= 0 && "TTI should not produce negative costs!"); 576 return Cost; 577 } 578 579 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 580 unsigned Idx, 581 const APInt &Imm, 582 Type *Ty) const { 583 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 584 assert(Cost >= 0 && "TTI should not produce negative costs!"); 585 return Cost; 586 } 587 588 InstructionCost 589 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 590 TTI::TargetCostKind CostKind) const { 591 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 592 assert(Cost >= 0 && "TTI should not produce negative costs!"); 593 return Cost; 594 } 595 596 InstructionCost TargetTransformInfo::getIntImmCostInst( 597 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 598 TTI::TargetCostKind CostKind, Instruction *Inst) const { 599 InstructionCost Cost = 600 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 601 assert(Cost >= 0 && "TTI should not produce negative costs!"); 602 return Cost; 603 } 604 605 InstructionCost 606 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 607 const APInt &Imm, Type *Ty, 608 TTI::TargetCostKind CostKind) const { 609 InstructionCost Cost = 610 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 611 assert(Cost >= 0 && "TTI should not produce negative costs!"); 612 return Cost; 613 } 614 615 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 616 return TTIImpl->getNumberOfRegisters(ClassID); 617 } 618 619 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 620 Type *Ty) const { 621 return TTIImpl->getRegisterClassForType(Vector, Ty); 622 } 623 624 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 625 return TTIImpl->getRegisterClassName(ClassID); 626 } 627 628 TypeSize TargetTransformInfo::getRegisterBitWidth( 629 TargetTransformInfo::RegisterKind K) const { 630 return TTIImpl->getRegisterBitWidth(K); 631 } 632 633 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 634 return TTIImpl->getMinVectorRegisterBitWidth(); 635 } 636 637 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 638 return TTIImpl->getMaxVScale(); 639 } 640 641 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 642 return TTIImpl->getVScaleForTuning(); 643 } 644 645 bool TargetTransformInfo::shouldMaximizeVectorBandwidth( 646 TargetTransformInfo::RegisterKind K) const { 647 return TTIImpl->shouldMaximizeVectorBandwidth(K); 648 } 649 650 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 651 bool IsScalable) const { 652 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 653 } 654 655 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 656 unsigned Opcode) const { 657 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 658 } 659 660 unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, 661 Type *ScalarValTy) const { 662 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy); 663 } 664 665 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 666 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 667 return TTIImpl->shouldConsiderAddressTypePromotion( 668 I, AllowPromotionWithoutCommonHeader); 669 } 670 671 unsigned TargetTransformInfo::getCacheLineSize() const { 672 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize 673 : TTIImpl->getCacheLineSize(); 674 } 675 676 llvm::Optional<unsigned> 677 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 678 return TTIImpl->getCacheSize(Level); 679 } 680 681 llvm::Optional<unsigned> 682 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 683 return TTIImpl->getCacheAssociativity(Level); 684 } 685 686 unsigned TargetTransformInfo::getPrefetchDistance() const { 687 return TTIImpl->getPrefetchDistance(); 688 } 689 690 unsigned TargetTransformInfo::getMinPrefetchStride( 691 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 692 unsigned NumPrefetches, bool HasCall) const { 693 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 694 NumPrefetches, HasCall); 695 } 696 697 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 698 return TTIImpl->getMaxPrefetchIterationsAhead(); 699 } 700 701 bool TargetTransformInfo::enableWritePrefetching() const { 702 return TTIImpl->enableWritePrefetching(); 703 } 704 705 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 706 return TTIImpl->getMaxInterleaveFactor(VF); 707 } 708 709 TargetTransformInfo::OperandValueKind 710 TargetTransformInfo::getOperandInfo(const Value *V, 711 OperandValueProperties &OpProps) { 712 OperandValueKind OpInfo = OK_AnyValue; 713 OpProps = OP_None; 714 715 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 716 if (CI->getValue().isPowerOf2()) 717 OpProps = OP_PowerOf2; 718 return OK_UniformConstantValue; 719 } 720 721 // A broadcast shuffle creates a uniform value. 722 // TODO: Add support for non-zero index broadcasts. 723 // TODO: Add support for different source vector width. 724 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 725 if (ShuffleInst->isZeroEltSplat()) 726 OpInfo = OK_UniformValue; 727 728 const Value *Splat = getSplatValue(V); 729 730 // Check for a splat of a constant or for a non uniform vector of constants 731 // and check if the constant(s) are all powers of two. 732 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 733 OpInfo = OK_NonUniformConstantValue; 734 if (Splat) { 735 OpInfo = OK_UniformConstantValue; 736 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 737 if (CI->getValue().isPowerOf2()) 738 OpProps = OP_PowerOf2; 739 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 740 OpProps = OP_PowerOf2; 741 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 742 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 743 if (CI->getValue().isPowerOf2()) 744 continue; 745 OpProps = OP_None; 746 break; 747 } 748 } 749 } 750 751 // Check for a splat of a uniform value. This is not loop aware, so return 752 // true only for the obviously uniform cases (argument, globalvalue) 753 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 754 OpInfo = OK_UniformValue; 755 756 return OpInfo; 757 } 758 759 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 760 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 761 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 762 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 763 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 764 InstructionCost Cost = 765 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 766 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 767 assert(Cost >= 0 && "TTI should not produce negative costs!"); 768 return Cost; 769 } 770 771 InstructionCost TargetTransformInfo::getShuffleCost( 772 ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask, int Index, 773 VectorType *SubTp, ArrayRef<const Value *> Args) const { 774 InstructionCost Cost = 775 TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp, Args); 776 assert(Cost >= 0 && "TTI should not produce negative costs!"); 777 return Cost; 778 } 779 780 TTI::CastContextHint 781 TargetTransformInfo::getCastContextHint(const Instruction *I) { 782 if (!I) 783 return CastContextHint::None; 784 785 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 786 unsigned GatScatOp) { 787 const Instruction *I = dyn_cast<Instruction>(V); 788 if (!I) 789 return CastContextHint::None; 790 791 if (I->getOpcode() == LdStOp) 792 return CastContextHint::Normal; 793 794 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 795 if (II->getIntrinsicID() == MaskedOp) 796 return TTI::CastContextHint::Masked; 797 if (II->getIntrinsicID() == GatScatOp) 798 return TTI::CastContextHint::GatherScatter; 799 } 800 801 return TTI::CastContextHint::None; 802 }; 803 804 switch (I->getOpcode()) { 805 case Instruction::ZExt: 806 case Instruction::SExt: 807 case Instruction::FPExt: 808 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 809 Intrinsic::masked_load, Intrinsic::masked_gather); 810 case Instruction::Trunc: 811 case Instruction::FPTrunc: 812 if (I->hasOneUse()) 813 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 814 Intrinsic::masked_store, 815 Intrinsic::masked_scatter); 816 break; 817 default: 818 return CastContextHint::None; 819 } 820 821 return TTI::CastContextHint::None; 822 } 823 824 InstructionCost TargetTransformInfo::getCastInstrCost( 825 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 826 TTI::TargetCostKind CostKind, const Instruction *I) const { 827 assert((I == nullptr || I->getOpcode() == Opcode) && 828 "Opcode should reflect passed instruction."); 829 InstructionCost Cost = 830 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 831 assert(Cost >= 0 && "TTI should not produce negative costs!"); 832 return Cost; 833 } 834 835 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 836 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 837 InstructionCost Cost = 838 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 839 assert(Cost >= 0 && "TTI should not produce negative costs!"); 840 return Cost; 841 } 842 843 InstructionCost TargetTransformInfo::getCFInstrCost( 844 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 845 assert((I == nullptr || I->getOpcode() == Opcode) && 846 "Opcode should reflect passed instruction."); 847 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 848 assert(Cost >= 0 && "TTI should not produce negative costs!"); 849 return Cost; 850 } 851 852 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 853 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 854 TTI::TargetCostKind CostKind, const Instruction *I) const { 855 assert((I == nullptr || I->getOpcode() == Opcode) && 856 "Opcode should reflect passed instruction."); 857 InstructionCost Cost = 858 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 859 assert(Cost >= 0 && "TTI should not produce negative costs!"); 860 return Cost; 861 } 862 863 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 864 Type *Val, 865 unsigned Index) const { 866 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 867 assert(Cost >= 0 && "TTI should not produce negative costs!"); 868 return Cost; 869 } 870 871 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 872 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 873 TTI::TargetCostKind CostKind) { 874 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 875 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 876 assert(Cost >= 0 && "TTI should not produce negative costs!"); 877 return Cost; 878 } 879 880 InstructionCost TargetTransformInfo::getMemoryOpCost( 881 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 882 TTI::TargetCostKind CostKind, const Instruction *I) const { 883 assert((I == nullptr || I->getOpcode() == Opcode) && 884 "Opcode should reflect passed instruction."); 885 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 886 AddressSpace, CostKind, I); 887 assert(Cost >= 0 && "TTI should not produce negative costs!"); 888 return Cost; 889 } 890 891 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 892 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 893 TTI::TargetCostKind CostKind) const { 894 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 895 AddressSpace, CostKind); 896 assert(Cost >= 0 && "TTI should not produce negative costs!"); 897 return Cost; 898 } 899 900 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 901 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 902 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 903 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 904 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 905 assert(Cost >= 0 && "TTI should not produce negative costs!"); 906 return Cost; 907 } 908 909 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 910 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 911 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 912 bool UseMaskForCond, bool UseMaskForGaps) const { 913 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 914 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 915 UseMaskForCond, UseMaskForGaps); 916 assert(Cost >= 0 && "TTI should not produce negative costs!"); 917 return Cost; 918 } 919 920 InstructionCost 921 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 922 TTI::TargetCostKind CostKind) const { 923 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 924 assert(Cost >= 0 && "TTI should not produce negative costs!"); 925 return Cost; 926 } 927 928 InstructionCost 929 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 930 ArrayRef<Type *> Tys, 931 TTI::TargetCostKind CostKind) const { 932 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 933 assert(Cost >= 0 && "TTI should not produce negative costs!"); 934 return Cost; 935 } 936 937 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 938 return TTIImpl->getNumberOfParts(Tp); 939 } 940 941 InstructionCost 942 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 943 const SCEV *Ptr) const { 944 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 945 assert(Cost >= 0 && "TTI should not produce negative costs!"); 946 return Cost; 947 } 948 949 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 950 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 951 assert(Cost >= 0 && "TTI should not produce negative costs!"); 952 return Cost; 953 } 954 955 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 956 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 957 TTI::TargetCostKind CostKind) const { 958 InstructionCost Cost = 959 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 960 assert(Cost >= 0 && "TTI should not produce negative costs!"); 961 return Cost; 962 } 963 964 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 965 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 966 TTI::TargetCostKind CostKind) const { 967 InstructionCost Cost = 968 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 969 assert(Cost >= 0 && "TTI should not produce negative costs!"); 970 return Cost; 971 } 972 973 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 974 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 975 TTI::TargetCostKind CostKind) const { 976 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 977 CostKind); 978 } 979 980 InstructionCost 981 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 982 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 983 } 984 985 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 986 MemIntrinsicInfo &Info) const { 987 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 988 } 989 990 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 991 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 992 } 993 994 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 995 IntrinsicInst *Inst, Type *ExpectedType) const { 996 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 997 } 998 999 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 1000 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 1001 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, 1002 Optional<uint32_t> AtomicElementSize) const { 1003 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 1004 DestAddrSpace, SrcAlign, DestAlign, 1005 AtomicElementSize); 1006 } 1007 1008 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 1009 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 1010 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 1011 unsigned SrcAlign, unsigned DestAlign, 1012 Optional<uint32_t> AtomicCpySize) const { 1013 TTIImpl->getMemcpyLoopResidualLoweringType( 1014 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign, 1015 DestAlign, AtomicCpySize); 1016 } 1017 1018 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 1019 const Function *Callee) const { 1020 return TTIImpl->areInlineCompatible(Caller, Callee); 1021 } 1022 1023 bool TargetTransformInfo::areTypesABICompatible( 1024 const Function *Caller, const Function *Callee, 1025 const ArrayRef<Type *> &Types) const { 1026 return TTIImpl->areTypesABICompatible(Caller, Callee, Types); 1027 } 1028 1029 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 1030 Type *Ty) const { 1031 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 1032 } 1033 1034 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 1035 Type *Ty) const { 1036 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 1037 } 1038 1039 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1040 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1041 } 1042 1043 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1044 return TTIImpl->isLegalToVectorizeLoad(LI); 1045 } 1046 1047 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1048 return TTIImpl->isLegalToVectorizeStore(SI); 1049 } 1050 1051 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1052 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1053 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1054 AddrSpace); 1055 } 1056 1057 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1058 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1059 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1060 AddrSpace); 1061 } 1062 1063 bool TargetTransformInfo::isLegalToVectorizeReduction( 1064 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1065 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1066 } 1067 1068 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1069 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1070 } 1071 1072 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1073 unsigned LoadSize, 1074 unsigned ChainSizeInBytes, 1075 VectorType *VecTy) const { 1076 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1077 } 1078 1079 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1080 unsigned StoreSize, 1081 unsigned ChainSizeInBytes, 1082 VectorType *VecTy) const { 1083 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1084 } 1085 1086 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1087 ReductionFlags Flags) const { 1088 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1089 } 1090 1091 bool TargetTransformInfo::preferPredicatedReductionSelect( 1092 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1093 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1094 } 1095 1096 TargetTransformInfo::VPLegalization 1097 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1098 return TTIImpl->getVPLegalizationStrategy(VPI); 1099 } 1100 1101 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1102 return TTIImpl->shouldExpandReduction(II); 1103 } 1104 1105 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1106 return TTIImpl->getGISelRematGlobalCost(); 1107 } 1108 1109 bool TargetTransformInfo::supportsScalableVectors() const { 1110 return TTIImpl->supportsScalableVectors(); 1111 } 1112 1113 bool TargetTransformInfo::enableScalableVectorization() const { 1114 return TTIImpl->enableScalableVectorization(); 1115 } 1116 1117 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType, 1118 Align Alignment) const { 1119 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment); 1120 } 1121 1122 InstructionCost 1123 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1124 return TTIImpl->getInstructionLatency(I); 1125 } 1126 1127 InstructionCost 1128 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1129 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1130 1131 switch (I->getOpcode()) { 1132 case Instruction::GetElementPtr: 1133 case Instruction::Ret: 1134 case Instruction::PHI: 1135 case Instruction::Br: 1136 case Instruction::Add: 1137 case Instruction::FAdd: 1138 case Instruction::Sub: 1139 case Instruction::FSub: 1140 case Instruction::Mul: 1141 case Instruction::FMul: 1142 case Instruction::UDiv: 1143 case Instruction::SDiv: 1144 case Instruction::FDiv: 1145 case Instruction::URem: 1146 case Instruction::SRem: 1147 case Instruction::FRem: 1148 case Instruction::Shl: 1149 case Instruction::LShr: 1150 case Instruction::AShr: 1151 case Instruction::And: 1152 case Instruction::Or: 1153 case Instruction::Xor: 1154 case Instruction::FNeg: 1155 case Instruction::Select: 1156 case Instruction::ICmp: 1157 case Instruction::FCmp: 1158 case Instruction::Store: 1159 case Instruction::Load: 1160 case Instruction::ZExt: 1161 case Instruction::SExt: 1162 case Instruction::FPToUI: 1163 case Instruction::FPToSI: 1164 case Instruction::FPExt: 1165 case Instruction::PtrToInt: 1166 case Instruction::IntToPtr: 1167 case Instruction::SIToFP: 1168 case Instruction::UIToFP: 1169 case Instruction::Trunc: 1170 case Instruction::FPTrunc: 1171 case Instruction::BitCast: 1172 case Instruction::AddrSpaceCast: 1173 case Instruction::ExtractElement: 1174 case Instruction::InsertElement: 1175 case Instruction::ExtractValue: 1176 case Instruction::ShuffleVector: 1177 case Instruction::Call: 1178 case Instruction::Switch: 1179 return getUserCost(I, CostKind); 1180 default: 1181 // We don't have any information on this instruction. 1182 return -1; 1183 } 1184 } 1185 1186 TargetTransformInfo::Concept::~Concept() = default; 1187 1188 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1189 1190 TargetIRAnalysis::TargetIRAnalysis( 1191 std::function<Result(const Function &)> TTICallback) 1192 : TTICallback(std::move(TTICallback)) {} 1193 1194 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1195 FunctionAnalysisManager &) { 1196 return TTICallback(F); 1197 } 1198 1199 AnalysisKey TargetIRAnalysis::Key; 1200 1201 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1202 return Result(F.getParent()->getDataLayout()); 1203 } 1204 1205 // Register the basic pass. 1206 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1207 "Target Transform Information", false, true) 1208 char TargetTransformInfoWrapperPass::ID = 0; 1209 1210 void TargetTransformInfoWrapperPass::anchor() {} 1211 1212 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1213 : ImmutablePass(ID) { 1214 initializeTargetTransformInfoWrapperPassPass( 1215 *PassRegistry::getPassRegistry()); 1216 } 1217 1218 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1219 TargetIRAnalysis TIRA) 1220 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1221 initializeTargetTransformInfoWrapperPassPass( 1222 *PassRegistry::getPassRegistry()); 1223 } 1224 1225 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1226 FunctionAnalysisManager DummyFAM; 1227 TTI = TIRA.run(F, DummyFAM); 1228 return *TTI; 1229 } 1230 1231 ImmutablePass * 1232 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1233 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1234 } 1235