1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/Dominators.h" 15 #include "llvm/IR/Instruction.h" 16 #include "llvm/IR/Instructions.h" 17 #include "llvm/IR/IntrinsicInst.h" 18 #include "llvm/IR/Module.h" 19 #include "llvm/IR/Operator.h" 20 #include "llvm/IR/PatternMatch.h" 21 #include "llvm/InitializePasses.h" 22 #include "llvm/Support/CommandLine.h" 23 #include "llvm/Support/ErrorHandling.h" 24 #include <utility> 25 26 using namespace llvm; 27 using namespace PatternMatch; 28 29 #define DEBUG_TYPE "tti" 30 31 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 32 cl::Hidden, 33 cl::desc("Recognize reduction patterns.")); 34 35 namespace { 36 /// No-op implementation of the TTI interface using the utility base 37 /// classes. 38 /// 39 /// This is used when no target specific information is available. 40 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 41 explicit NoTTIImpl(const DataLayout &DL) 42 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 43 }; 44 } // namespace 45 46 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 47 // If the loop has irreducible control flow, it can not be converted to 48 // Hardware loop. 49 LoopBlocksRPO RPOT(L); 50 RPOT.perform(&LI); 51 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 52 return false; 53 return true; 54 } 55 56 IntrinsicCostAttributes::IntrinsicCostAttributes( 57 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 58 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 59 ScalarizationCost(ScalarizationCost) { 60 61 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 62 FMF = FPMO->getFastMathFlags(); 63 64 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 65 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 66 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 67 } 68 69 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 70 ArrayRef<Type *> Tys, 71 FastMathFlags Flags, 72 const IntrinsicInst *I, 73 InstructionCost ScalarCost) 74 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 75 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 76 } 77 78 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 79 ArrayRef<const Value *> Args) 80 : RetTy(Ty), IID(Id) { 81 82 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 83 ParamTys.reserve(Arguments.size()); 84 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 85 ParamTys.push_back(Arguments[Idx]->getType()); 86 } 87 88 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 89 ArrayRef<const Value *> Args, 90 ArrayRef<Type *> Tys, 91 FastMathFlags Flags, 92 const IntrinsicInst *I, 93 InstructionCost ScalarCost) 94 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 95 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 96 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 97 } 98 99 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 100 LoopInfo &LI, DominatorTree &DT, 101 bool ForceNestedLoop, 102 bool ForceHardwareLoopPHI) { 103 SmallVector<BasicBlock *, 4> ExitingBlocks; 104 L->getExitingBlocks(ExitingBlocks); 105 106 for (BasicBlock *BB : ExitingBlocks) { 107 // If we pass the updated counter back through a phi, we need to know 108 // which latch the updated value will be coming from. 109 if (!L->isLoopLatch(BB)) { 110 if (ForceHardwareLoopPHI || CounterInReg) 111 continue; 112 } 113 114 const SCEV *EC = SE.getExitCount(L, BB); 115 if (isa<SCEVCouldNotCompute>(EC)) 116 continue; 117 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 118 if (ConstEC->getValue()->isZero()) 119 continue; 120 } else if (!SE.isLoopInvariant(EC, L)) 121 continue; 122 123 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 124 continue; 125 126 // If this exiting block is contained in a nested loop, it is not eligible 127 // for insertion of the branch-and-decrement since the inner loop would 128 // end up messing up the value in the CTR. 129 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 130 continue; 131 132 // We now have a loop-invariant count of loop iterations (which is not the 133 // constant zero) for which we know that this loop will not exit via this 134 // existing block. 135 136 // We need to make sure that this block will run on every loop iteration. 137 // For this to be true, we must dominate all blocks with backedges. Such 138 // blocks are in-loop predecessors to the header block. 139 bool NotAlways = false; 140 for (BasicBlock *Pred : predecessors(L->getHeader())) { 141 if (!L->contains(Pred)) 142 continue; 143 144 if (!DT.dominates(BB, Pred)) { 145 NotAlways = true; 146 break; 147 } 148 } 149 150 if (NotAlways) 151 continue; 152 153 // Make sure this blocks ends with a conditional branch. 154 Instruction *TI = BB->getTerminator(); 155 if (!TI) 156 continue; 157 158 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 159 if (!BI->isConditional()) 160 continue; 161 162 ExitBranch = BI; 163 } else 164 continue; 165 166 // Note that this block may not be the loop latch block, even if the loop 167 // has a latch block. 168 ExitBlock = BB; 169 ExitCount = EC; 170 break; 171 } 172 173 if (!ExitBlock) 174 return false; 175 return true; 176 } 177 178 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 179 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 180 181 TargetTransformInfo::~TargetTransformInfo() = default; 182 183 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 184 : TTIImpl(std::move(Arg.TTIImpl)) {} 185 186 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 187 TTIImpl = std::move(RHS.TTIImpl); 188 return *this; 189 } 190 191 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 192 return TTIImpl->getInliningThresholdMultiplier(); 193 } 194 195 unsigned 196 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 197 return TTIImpl->adjustInliningThreshold(CB); 198 } 199 200 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 201 return TTIImpl->getInlinerVectorBonusPercent(); 202 } 203 204 InstructionCost 205 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 206 ArrayRef<const Value *> Operands, 207 TTI::TargetCostKind CostKind) const { 208 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 209 } 210 211 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 212 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 213 BlockFrequencyInfo *BFI) const { 214 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 215 } 216 217 InstructionCost 218 TargetTransformInfo::getUserCost(const User *U, 219 ArrayRef<const Value *> Operands, 220 enum TargetCostKind CostKind) const { 221 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 222 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 223 "TTI should not produce negative costs!"); 224 return Cost; 225 } 226 227 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 228 return TTIImpl->getPredictableBranchThreshold(); 229 } 230 231 bool TargetTransformInfo::hasBranchDivergence() const { 232 return TTIImpl->hasBranchDivergence(); 233 } 234 235 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 236 return TTIImpl->useGPUDivergenceAnalysis(); 237 } 238 239 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 240 return TTIImpl->isSourceOfDivergence(V); 241 } 242 243 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 244 return TTIImpl->isAlwaysUniform(V); 245 } 246 247 unsigned TargetTransformInfo::getFlatAddressSpace() const { 248 return TTIImpl->getFlatAddressSpace(); 249 } 250 251 bool TargetTransformInfo::collectFlatAddressOperands( 252 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 253 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 254 } 255 256 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 257 unsigned ToAS) const { 258 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 259 } 260 261 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 262 unsigned AS) const { 263 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 264 } 265 266 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 267 return TTIImpl->getAssumedAddrSpace(V); 268 } 269 270 std::pair<const Value *, unsigned> 271 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 272 return TTIImpl->getPredicatedAddrSpace(V); 273 } 274 275 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 276 IntrinsicInst *II, Value *OldV, Value *NewV) const { 277 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 278 } 279 280 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 281 return TTIImpl->isLoweredToCall(F); 282 } 283 284 bool TargetTransformInfo::isHardwareLoopProfitable( 285 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 286 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 287 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 288 } 289 290 bool TargetTransformInfo::preferPredicateOverEpilogue( 291 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 292 TargetLibraryInfo *TLI, DominatorTree *DT, 293 const LoopAccessInfo *LAI) const { 294 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 295 } 296 297 bool TargetTransformInfo::emitGetActiveLaneMask() const { 298 return TTIImpl->emitGetActiveLaneMask(); 299 } 300 301 Optional<Instruction *> 302 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 303 IntrinsicInst &II) const { 304 return TTIImpl->instCombineIntrinsic(IC, II); 305 } 306 307 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 308 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 309 bool &KnownBitsComputed) const { 310 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 311 KnownBitsComputed); 312 } 313 314 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 315 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 316 APInt &UndefElts2, APInt &UndefElts3, 317 std::function<void(Instruction *, unsigned, APInt, APInt &)> 318 SimplifyAndSetOp) const { 319 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 320 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 321 SimplifyAndSetOp); 322 } 323 324 void TargetTransformInfo::getUnrollingPreferences( 325 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 326 OptimizationRemarkEmitter *ORE) const { 327 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 328 } 329 330 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 331 PeelingPreferences &PP) const { 332 return TTIImpl->getPeelingPreferences(L, SE, PP); 333 } 334 335 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 336 return TTIImpl->isLegalAddImmediate(Imm); 337 } 338 339 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 340 return TTIImpl->isLegalICmpImmediate(Imm); 341 } 342 343 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 344 int64_t BaseOffset, 345 bool HasBaseReg, int64_t Scale, 346 unsigned AddrSpace, 347 Instruction *I) const { 348 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 349 Scale, AddrSpace, I); 350 } 351 352 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const { 353 return TTIImpl->isLSRCostLess(C1, C2); 354 } 355 356 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 357 return TTIImpl->isNumRegsMajorCostOfLSR(); 358 } 359 360 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 361 return TTIImpl->isProfitableLSRChainElement(I); 362 } 363 364 bool TargetTransformInfo::canMacroFuseCmp() const { 365 return TTIImpl->canMacroFuseCmp(); 366 } 367 368 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 369 ScalarEvolution *SE, LoopInfo *LI, 370 DominatorTree *DT, AssumptionCache *AC, 371 TargetLibraryInfo *LibInfo) const { 372 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 373 } 374 375 TTI::AddressingModeKind 376 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 377 ScalarEvolution *SE) const { 378 return TTIImpl->getPreferredAddressingMode(L, SE); 379 } 380 381 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 382 Align Alignment) const { 383 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 384 } 385 386 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 387 Align Alignment) const { 388 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 389 } 390 391 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 392 Align Alignment) const { 393 return TTIImpl->isLegalNTStore(DataType, Alignment); 394 } 395 396 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 397 return TTIImpl->isLegalNTLoad(DataType, Alignment); 398 } 399 400 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 401 Align Alignment) const { 402 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 403 } 404 405 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 406 Align Alignment) const { 407 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 408 } 409 410 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType, 411 Align Alignment) const { 412 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment); 413 } 414 415 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType, 416 Align Alignment) const { 417 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment); 418 } 419 420 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 421 return TTIImpl->isLegalMaskedCompressStore(DataType); 422 } 423 424 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 425 return TTIImpl->isLegalMaskedExpandLoad(DataType); 426 } 427 428 bool TargetTransformInfo::enableOrderedReductions() const { 429 return TTIImpl->enableOrderedReductions(); 430 } 431 432 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 433 return TTIImpl->hasDivRemOp(DataType, IsSigned); 434 } 435 436 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 437 unsigned AddrSpace) const { 438 return TTIImpl->hasVolatileVariant(I, AddrSpace); 439 } 440 441 bool TargetTransformInfo::prefersVectorizedAddressing() const { 442 return TTIImpl->prefersVectorizedAddressing(); 443 } 444 445 InstructionCost TargetTransformInfo::getScalingFactorCost( 446 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 447 int64_t Scale, unsigned AddrSpace) const { 448 InstructionCost Cost = TTIImpl->getScalingFactorCost( 449 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 450 assert(Cost >= 0 && "TTI should not produce negative costs!"); 451 return Cost; 452 } 453 454 bool TargetTransformInfo::LSRWithInstrQueries() const { 455 return TTIImpl->LSRWithInstrQueries(); 456 } 457 458 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 459 return TTIImpl->isTruncateFree(Ty1, Ty2); 460 } 461 462 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 463 return TTIImpl->isProfitableToHoist(I); 464 } 465 466 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 467 468 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 469 return TTIImpl->isTypeLegal(Ty); 470 } 471 472 InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const { 473 return TTIImpl->getRegUsageForType(Ty); 474 } 475 476 bool TargetTransformInfo::shouldBuildLookupTables() const { 477 return TTIImpl->shouldBuildLookupTables(); 478 } 479 480 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 481 Constant *C) const { 482 return TTIImpl->shouldBuildLookupTablesForConstant(C); 483 } 484 485 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 486 return TTIImpl->shouldBuildRelLookupTables(); 487 } 488 489 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 490 return TTIImpl->useColdCCForColdCall(F); 491 } 492 493 InstructionCost 494 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 495 const APInt &DemandedElts, 496 bool Insert, bool Extract) const { 497 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 498 } 499 500 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 501 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 502 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 503 } 504 505 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 506 return TTIImpl->supportsEfficientVectorElementLoadStore(); 507 } 508 509 bool TargetTransformInfo::enableAggressiveInterleaving( 510 bool LoopHasReductions) const { 511 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 512 } 513 514 TargetTransformInfo::MemCmpExpansionOptions 515 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 516 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 517 } 518 519 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 520 return TTIImpl->enableInterleavedAccessVectorization(); 521 } 522 523 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 524 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 525 } 526 527 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 528 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 529 } 530 531 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 532 unsigned BitWidth, 533 unsigned AddressSpace, 534 Align Alignment, 535 bool *Fast) const { 536 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 537 AddressSpace, Alignment, Fast); 538 } 539 540 TargetTransformInfo::PopcntSupportKind 541 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 542 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 543 } 544 545 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 546 return TTIImpl->haveFastSqrt(Ty); 547 } 548 549 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 550 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 551 } 552 553 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 554 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 555 assert(Cost >= 0 && "TTI should not produce negative costs!"); 556 return Cost; 557 } 558 559 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 560 unsigned Idx, 561 const APInt &Imm, 562 Type *Ty) const { 563 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 564 assert(Cost >= 0 && "TTI should not produce negative costs!"); 565 return Cost; 566 } 567 568 InstructionCost 569 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 570 TTI::TargetCostKind CostKind) const { 571 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 572 assert(Cost >= 0 && "TTI should not produce negative costs!"); 573 return Cost; 574 } 575 576 InstructionCost TargetTransformInfo::getIntImmCostInst( 577 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 578 TTI::TargetCostKind CostKind, Instruction *Inst) const { 579 InstructionCost Cost = 580 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 581 assert(Cost >= 0 && "TTI should not produce negative costs!"); 582 return Cost; 583 } 584 585 InstructionCost 586 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 587 const APInt &Imm, Type *Ty, 588 TTI::TargetCostKind CostKind) const { 589 InstructionCost Cost = 590 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 591 assert(Cost >= 0 && "TTI should not produce negative costs!"); 592 return Cost; 593 } 594 595 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 596 return TTIImpl->getNumberOfRegisters(ClassID); 597 } 598 599 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 600 Type *Ty) const { 601 return TTIImpl->getRegisterClassForType(Vector, Ty); 602 } 603 604 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 605 return TTIImpl->getRegisterClassName(ClassID); 606 } 607 608 TypeSize TargetTransformInfo::getRegisterBitWidth( 609 TargetTransformInfo::RegisterKind K) const { 610 return TTIImpl->getRegisterBitWidth(K); 611 } 612 613 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 614 return TTIImpl->getMinVectorRegisterBitWidth(); 615 } 616 617 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 618 return TTIImpl->getMaxVScale(); 619 } 620 621 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 622 return TTIImpl->getVScaleForTuning(); 623 } 624 625 bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const { 626 return TTIImpl->shouldMaximizeVectorBandwidth(); 627 } 628 629 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 630 bool IsScalable) const { 631 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 632 } 633 634 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 635 unsigned Opcode) const { 636 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 637 } 638 639 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 640 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 641 return TTIImpl->shouldConsiderAddressTypePromotion( 642 I, AllowPromotionWithoutCommonHeader); 643 } 644 645 unsigned TargetTransformInfo::getCacheLineSize() const { 646 return TTIImpl->getCacheLineSize(); 647 } 648 649 llvm::Optional<unsigned> 650 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 651 return TTIImpl->getCacheSize(Level); 652 } 653 654 llvm::Optional<unsigned> 655 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 656 return TTIImpl->getCacheAssociativity(Level); 657 } 658 659 unsigned TargetTransformInfo::getPrefetchDistance() const { 660 return TTIImpl->getPrefetchDistance(); 661 } 662 663 unsigned TargetTransformInfo::getMinPrefetchStride( 664 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 665 unsigned NumPrefetches, bool HasCall) const { 666 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 667 NumPrefetches, HasCall); 668 } 669 670 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 671 return TTIImpl->getMaxPrefetchIterationsAhead(); 672 } 673 674 bool TargetTransformInfo::enableWritePrefetching() const { 675 return TTIImpl->enableWritePrefetching(); 676 } 677 678 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 679 return TTIImpl->getMaxInterleaveFactor(VF); 680 } 681 682 TargetTransformInfo::OperandValueKind 683 TargetTransformInfo::getOperandInfo(const Value *V, 684 OperandValueProperties &OpProps) { 685 OperandValueKind OpInfo = OK_AnyValue; 686 OpProps = OP_None; 687 688 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 689 if (CI->getValue().isPowerOf2()) 690 OpProps = OP_PowerOf2; 691 return OK_UniformConstantValue; 692 } 693 694 // A broadcast shuffle creates a uniform value. 695 // TODO: Add support for non-zero index broadcasts. 696 // TODO: Add support for different source vector width. 697 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 698 if (ShuffleInst->isZeroEltSplat()) 699 OpInfo = OK_UniformValue; 700 701 const Value *Splat = getSplatValue(V); 702 703 // Check for a splat of a constant or for a non uniform vector of constants 704 // and check if the constant(s) are all powers of two. 705 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 706 OpInfo = OK_NonUniformConstantValue; 707 if (Splat) { 708 OpInfo = OK_UniformConstantValue; 709 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 710 if (CI->getValue().isPowerOf2()) 711 OpProps = OP_PowerOf2; 712 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 713 OpProps = OP_PowerOf2; 714 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 715 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 716 if (CI->getValue().isPowerOf2()) 717 continue; 718 OpProps = OP_None; 719 break; 720 } 721 } 722 } 723 724 // Check for a splat of a uniform value. This is not loop aware, so return 725 // true only for the obviously uniform cases (argument, globalvalue) 726 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 727 OpInfo = OK_UniformValue; 728 729 return OpInfo; 730 } 731 732 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 733 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 734 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 735 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 736 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 737 InstructionCost Cost = 738 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 739 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 740 assert(Cost >= 0 && "TTI should not produce negative costs!"); 741 return Cost; 742 } 743 744 InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind, 745 VectorType *Ty, 746 ArrayRef<int> Mask, 747 int Index, 748 VectorType *SubTp) const { 749 InstructionCost Cost = TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp); 750 assert(Cost >= 0 && "TTI should not produce negative costs!"); 751 return Cost; 752 } 753 754 TTI::CastContextHint 755 TargetTransformInfo::getCastContextHint(const Instruction *I) { 756 if (!I) 757 return CastContextHint::None; 758 759 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 760 unsigned GatScatOp) { 761 const Instruction *I = dyn_cast<Instruction>(V); 762 if (!I) 763 return CastContextHint::None; 764 765 if (I->getOpcode() == LdStOp) 766 return CastContextHint::Normal; 767 768 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 769 if (II->getIntrinsicID() == MaskedOp) 770 return TTI::CastContextHint::Masked; 771 if (II->getIntrinsicID() == GatScatOp) 772 return TTI::CastContextHint::GatherScatter; 773 } 774 775 return TTI::CastContextHint::None; 776 }; 777 778 switch (I->getOpcode()) { 779 case Instruction::ZExt: 780 case Instruction::SExt: 781 case Instruction::FPExt: 782 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 783 Intrinsic::masked_load, Intrinsic::masked_gather); 784 case Instruction::Trunc: 785 case Instruction::FPTrunc: 786 if (I->hasOneUse()) 787 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 788 Intrinsic::masked_store, 789 Intrinsic::masked_scatter); 790 break; 791 default: 792 return CastContextHint::None; 793 } 794 795 return TTI::CastContextHint::None; 796 } 797 798 InstructionCost TargetTransformInfo::getCastInstrCost( 799 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 800 TTI::TargetCostKind CostKind, const Instruction *I) const { 801 assert((I == nullptr || I->getOpcode() == Opcode) && 802 "Opcode should reflect passed instruction."); 803 InstructionCost Cost = 804 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 805 assert(Cost >= 0 && "TTI should not produce negative costs!"); 806 return Cost; 807 } 808 809 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 810 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 811 InstructionCost Cost = 812 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 813 assert(Cost >= 0 && "TTI should not produce negative costs!"); 814 return Cost; 815 } 816 817 InstructionCost TargetTransformInfo::getCFInstrCost( 818 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 819 assert((I == nullptr || I->getOpcode() == Opcode) && 820 "Opcode should reflect passed instruction."); 821 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 822 assert(Cost >= 0 && "TTI should not produce negative costs!"); 823 return Cost; 824 } 825 826 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 827 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 828 TTI::TargetCostKind CostKind, const Instruction *I) const { 829 assert((I == nullptr || I->getOpcode() == Opcode) && 830 "Opcode should reflect passed instruction."); 831 InstructionCost Cost = 832 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 833 assert(Cost >= 0 && "TTI should not produce negative costs!"); 834 return Cost; 835 } 836 837 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 838 Type *Val, 839 unsigned Index) const { 840 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 841 assert(Cost >= 0 && "TTI should not produce negative costs!"); 842 return Cost; 843 } 844 845 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 846 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 847 TTI::TargetCostKind CostKind) { 848 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 849 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 850 assert(Cost >= 0 && "TTI should not produce negative costs!"); 851 return Cost; 852 } 853 854 InstructionCost TargetTransformInfo::getMemoryOpCost( 855 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 856 TTI::TargetCostKind CostKind, const Instruction *I) const { 857 assert((I == nullptr || I->getOpcode() == Opcode) && 858 "Opcode should reflect passed instruction."); 859 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 860 AddressSpace, CostKind, I); 861 assert(Cost >= 0 && "TTI should not produce negative costs!"); 862 return Cost; 863 } 864 865 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 866 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 867 TTI::TargetCostKind CostKind) const { 868 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 869 AddressSpace, CostKind); 870 assert(Cost >= 0 && "TTI should not produce negative costs!"); 871 return Cost; 872 } 873 874 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 875 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 876 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 877 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 878 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 879 assert(Cost >= 0 && "TTI should not produce negative costs!"); 880 return Cost; 881 } 882 883 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 884 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 885 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 886 bool UseMaskForCond, bool UseMaskForGaps) const { 887 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 888 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 889 UseMaskForCond, UseMaskForGaps); 890 assert(Cost >= 0 && "TTI should not produce negative costs!"); 891 return Cost; 892 } 893 894 InstructionCost 895 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 896 TTI::TargetCostKind CostKind) const { 897 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 898 assert(Cost >= 0 && "TTI should not produce negative costs!"); 899 return Cost; 900 } 901 902 InstructionCost 903 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 904 ArrayRef<Type *> Tys, 905 TTI::TargetCostKind CostKind) const { 906 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 907 assert(Cost >= 0 && "TTI should not produce negative costs!"); 908 return Cost; 909 } 910 911 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 912 return TTIImpl->getNumberOfParts(Tp); 913 } 914 915 InstructionCost 916 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 917 const SCEV *Ptr) const { 918 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 919 assert(Cost >= 0 && "TTI should not produce negative costs!"); 920 return Cost; 921 } 922 923 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 924 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 925 assert(Cost >= 0 && "TTI should not produce negative costs!"); 926 return Cost; 927 } 928 929 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 930 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 931 TTI::TargetCostKind CostKind) const { 932 InstructionCost Cost = 933 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 934 assert(Cost >= 0 && "TTI should not produce negative costs!"); 935 return Cost; 936 } 937 938 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 939 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 940 TTI::TargetCostKind CostKind) const { 941 InstructionCost Cost = 942 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 943 assert(Cost >= 0 && "TTI should not produce negative costs!"); 944 return Cost; 945 } 946 947 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 948 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 949 TTI::TargetCostKind CostKind) const { 950 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 951 CostKind); 952 } 953 954 InstructionCost 955 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 956 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 957 } 958 959 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 960 MemIntrinsicInfo &Info) const { 961 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 962 } 963 964 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 965 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 966 } 967 968 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 969 IntrinsicInst *Inst, Type *ExpectedType) const { 970 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 971 } 972 973 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 974 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 975 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const { 976 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 977 DestAddrSpace, SrcAlign, DestAlign); 978 } 979 980 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 981 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 982 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 983 unsigned SrcAlign, unsigned DestAlign) const { 984 TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes, 985 SrcAddrSpace, DestAddrSpace, 986 SrcAlign, DestAlign); 987 } 988 989 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 990 const Function *Callee) const { 991 return TTIImpl->areInlineCompatible(Caller, Callee); 992 } 993 994 bool TargetTransformInfo::areTypesABICompatible( 995 const Function *Caller, const Function *Callee, 996 const ArrayRef<Type *> &Types) const { 997 return TTIImpl->areTypesABICompatible(Caller, Callee, Types); 998 } 999 1000 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 1001 Type *Ty) const { 1002 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 1003 } 1004 1005 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 1006 Type *Ty) const { 1007 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 1008 } 1009 1010 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1011 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1012 } 1013 1014 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1015 return TTIImpl->isLegalToVectorizeLoad(LI); 1016 } 1017 1018 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1019 return TTIImpl->isLegalToVectorizeStore(SI); 1020 } 1021 1022 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1023 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1024 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1025 AddrSpace); 1026 } 1027 1028 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1029 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1030 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1031 AddrSpace); 1032 } 1033 1034 bool TargetTransformInfo::isLegalToVectorizeReduction( 1035 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1036 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1037 } 1038 1039 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1040 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1041 } 1042 1043 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1044 unsigned LoadSize, 1045 unsigned ChainSizeInBytes, 1046 VectorType *VecTy) const { 1047 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1048 } 1049 1050 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1051 unsigned StoreSize, 1052 unsigned ChainSizeInBytes, 1053 VectorType *VecTy) const { 1054 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1055 } 1056 1057 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1058 ReductionFlags Flags) const { 1059 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1060 } 1061 1062 bool TargetTransformInfo::preferPredicatedReductionSelect( 1063 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1064 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1065 } 1066 1067 TargetTransformInfo::VPLegalization 1068 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1069 return TTIImpl->getVPLegalizationStrategy(VPI); 1070 } 1071 1072 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1073 return TTIImpl->shouldExpandReduction(II); 1074 } 1075 1076 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1077 return TTIImpl->getGISelRematGlobalCost(); 1078 } 1079 1080 bool TargetTransformInfo::supportsScalableVectors() const { 1081 return TTIImpl->supportsScalableVectors(); 1082 } 1083 1084 bool TargetTransformInfo::enableScalableVectorization() const { 1085 return TTIImpl->enableScalableVectorization(); 1086 } 1087 1088 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType, 1089 Align Alignment) const { 1090 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment); 1091 } 1092 1093 InstructionCost 1094 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1095 return TTIImpl->getInstructionLatency(I); 1096 } 1097 1098 InstructionCost 1099 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1100 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1101 1102 switch (I->getOpcode()) { 1103 case Instruction::GetElementPtr: 1104 case Instruction::Ret: 1105 case Instruction::PHI: 1106 case Instruction::Br: 1107 case Instruction::Add: 1108 case Instruction::FAdd: 1109 case Instruction::Sub: 1110 case Instruction::FSub: 1111 case Instruction::Mul: 1112 case Instruction::FMul: 1113 case Instruction::UDiv: 1114 case Instruction::SDiv: 1115 case Instruction::FDiv: 1116 case Instruction::URem: 1117 case Instruction::SRem: 1118 case Instruction::FRem: 1119 case Instruction::Shl: 1120 case Instruction::LShr: 1121 case Instruction::AShr: 1122 case Instruction::And: 1123 case Instruction::Or: 1124 case Instruction::Xor: 1125 case Instruction::FNeg: 1126 case Instruction::Select: 1127 case Instruction::ICmp: 1128 case Instruction::FCmp: 1129 case Instruction::Store: 1130 case Instruction::Load: 1131 case Instruction::ZExt: 1132 case Instruction::SExt: 1133 case Instruction::FPToUI: 1134 case Instruction::FPToSI: 1135 case Instruction::FPExt: 1136 case Instruction::PtrToInt: 1137 case Instruction::IntToPtr: 1138 case Instruction::SIToFP: 1139 case Instruction::UIToFP: 1140 case Instruction::Trunc: 1141 case Instruction::FPTrunc: 1142 case Instruction::BitCast: 1143 case Instruction::AddrSpaceCast: 1144 case Instruction::ExtractElement: 1145 case Instruction::InsertElement: 1146 case Instruction::ExtractValue: 1147 case Instruction::ShuffleVector: 1148 case Instruction::Call: 1149 case Instruction::Switch: 1150 return getUserCost(I, CostKind); 1151 default: 1152 // We don't have any information on this instruction. 1153 return -1; 1154 } 1155 } 1156 1157 TargetTransformInfo::Concept::~Concept() = default; 1158 1159 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1160 1161 TargetIRAnalysis::TargetIRAnalysis( 1162 std::function<Result(const Function &)> TTICallback) 1163 : TTICallback(std::move(TTICallback)) {} 1164 1165 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1166 FunctionAnalysisManager &) { 1167 return TTICallback(F); 1168 } 1169 1170 AnalysisKey TargetIRAnalysis::Key; 1171 1172 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1173 return Result(F.getParent()->getDataLayout()); 1174 } 1175 1176 // Register the basic pass. 1177 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1178 "Target Transform Information", false, true) 1179 char TargetTransformInfoWrapperPass::ID = 0; 1180 1181 void TargetTransformInfoWrapperPass::anchor() {} 1182 1183 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1184 : ImmutablePass(ID) { 1185 initializeTargetTransformInfoWrapperPassPass( 1186 *PassRegistry::getPassRegistry()); 1187 } 1188 1189 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1190 TargetIRAnalysis TIRA) 1191 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1192 initializeTargetTransformInfoWrapperPassPass( 1193 *PassRegistry::getPassRegistry()); 1194 } 1195 1196 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1197 FunctionAnalysisManager DummyFAM; 1198 TTI = TIRA.run(F, DummyFAM); 1199 return *TTI; 1200 } 1201 1202 ImmutablePass * 1203 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1204 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1205 } 1206