1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/Analysis/TargetTransformInfo.h"
11 #include "llvm/Analysis/TargetTransformInfoImpl.h"
12 #include "llvm/IR/CallSite.h"
13 #include "llvm/IR/DataLayout.h"
14 #include "llvm/IR/Instruction.h"
15 #include "llvm/IR/Instructions.h"
16 #include "llvm/IR/IntrinsicInst.h"
17 #include "llvm/IR/Module.h"
18 #include "llvm/IR/Operator.h"
19 #include "llvm/IR/PatternMatch.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include <utility>
23 
24 using namespace llvm;
25 using namespace PatternMatch;
26 
27 #define DEBUG_TYPE "tti"
28 
29 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
30                                      cl::Hidden,
31                                      cl::desc("Recognize reduction patterns."));
32 
33 namespace {
34 /// \brief No-op implementation of the TTI interface using the utility base
35 /// classes.
36 ///
37 /// This is used when no target specific information is available.
38 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
39   explicit NoTTIImpl(const DataLayout &DL)
40       : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
41 };
42 }
43 
44 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
45     : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
46 
47 TargetTransformInfo::~TargetTransformInfo() {}
48 
49 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
50     : TTIImpl(std::move(Arg.TTIImpl)) {}
51 
52 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
53   TTIImpl = std::move(RHS.TTIImpl);
54   return *this;
55 }
56 
57 int TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty,
58                                           Type *OpTy) const {
59   int Cost = TTIImpl->getOperationCost(Opcode, Ty, OpTy);
60   assert(Cost >= 0 && "TTI should not produce negative costs!");
61   return Cost;
62 }
63 
64 int TargetTransformInfo::getCallCost(FunctionType *FTy, int NumArgs) const {
65   int Cost = TTIImpl->getCallCost(FTy, NumArgs);
66   assert(Cost >= 0 && "TTI should not produce negative costs!");
67   return Cost;
68 }
69 
70 int TargetTransformInfo::getCallCost(const Function *F,
71                                      ArrayRef<const Value *> Arguments) const {
72   int Cost = TTIImpl->getCallCost(F, Arguments);
73   assert(Cost >= 0 && "TTI should not produce negative costs!");
74   return Cost;
75 }
76 
77 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
78   return TTIImpl->getInliningThresholdMultiplier();
79 }
80 
81 int TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr,
82                                     ArrayRef<const Value *> Operands) const {
83   return TTIImpl->getGEPCost(PointeeType, Ptr, Operands);
84 }
85 
86 int TargetTransformInfo::getExtCost(const Instruction *I,
87                                     const Value *Src) const {
88   return TTIImpl->getExtCost(I, Src);
89 }
90 
91 int TargetTransformInfo::getIntrinsicCost(
92     Intrinsic::ID IID, Type *RetTy, ArrayRef<const Value *> Arguments) const {
93   int Cost = TTIImpl->getIntrinsicCost(IID, RetTy, Arguments);
94   assert(Cost >= 0 && "TTI should not produce negative costs!");
95   return Cost;
96 }
97 
98 unsigned
99 TargetTransformInfo::getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
100                                                       unsigned &JTSize) const {
101   return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize);
102 }
103 
104 int TargetTransformInfo::getUserCost(const User *U,
105     ArrayRef<const Value *> Operands) const {
106   int Cost = TTIImpl->getUserCost(U, Operands);
107   assert(Cost >= 0 && "TTI should not produce negative costs!");
108   return Cost;
109 }
110 
111 bool TargetTransformInfo::hasBranchDivergence() const {
112   return TTIImpl->hasBranchDivergence();
113 }
114 
115 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
116   return TTIImpl->isSourceOfDivergence(V);
117 }
118 
119 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
120   return TTIImpl->isAlwaysUniform(V);
121 }
122 
123 unsigned TargetTransformInfo::getFlatAddressSpace() const {
124   return TTIImpl->getFlatAddressSpace();
125 }
126 
127 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
128   return TTIImpl->isLoweredToCall(F);
129 }
130 
131 void TargetTransformInfo::getUnrollingPreferences(
132     Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP) const {
133   return TTIImpl->getUnrollingPreferences(L, SE, UP);
134 }
135 
136 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
137   return TTIImpl->isLegalAddImmediate(Imm);
138 }
139 
140 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
141   return TTIImpl->isLegalICmpImmediate(Imm);
142 }
143 
144 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
145                                                 int64_t BaseOffset,
146                                                 bool HasBaseReg,
147                                                 int64_t Scale,
148                                                 unsigned AddrSpace,
149                                                 Instruction *I) const {
150   return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
151                                         Scale, AddrSpace, I);
152 }
153 
154 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const {
155   return TTIImpl->isLSRCostLess(C1, C2);
156 }
157 
158 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType) const {
159   return TTIImpl->isLegalMaskedStore(DataType);
160 }
161 
162 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType) const {
163   return TTIImpl->isLegalMaskedLoad(DataType);
164 }
165 
166 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType) const {
167   return TTIImpl->isLegalMaskedGather(DataType);
168 }
169 
170 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType) const {
171   return TTIImpl->isLegalMaskedScatter(DataType);
172 }
173 
174 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
175   return TTIImpl->hasDivRemOp(DataType, IsSigned);
176 }
177 
178 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
179                                              unsigned AddrSpace) const {
180   return TTIImpl->hasVolatileVariant(I, AddrSpace);
181 }
182 
183 bool TargetTransformInfo::prefersVectorizedAddressing() const {
184   return TTIImpl->prefersVectorizedAddressing();
185 }
186 
187 int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
188                                               int64_t BaseOffset,
189                                               bool HasBaseReg,
190                                               int64_t Scale,
191                                               unsigned AddrSpace) const {
192   int Cost = TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
193                                            Scale, AddrSpace);
194   assert(Cost >= 0 && "TTI should not produce negative costs!");
195   return Cost;
196 }
197 
198 bool TargetTransformInfo::LSRWithInstrQueries() const {
199   return TTIImpl->LSRWithInstrQueries();
200 }
201 
202 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
203   return TTIImpl->isTruncateFree(Ty1, Ty2);
204 }
205 
206 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
207   return TTIImpl->isProfitableToHoist(I);
208 }
209 
210 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
211   return TTIImpl->isTypeLegal(Ty);
212 }
213 
214 unsigned TargetTransformInfo::getJumpBufAlignment() const {
215   return TTIImpl->getJumpBufAlignment();
216 }
217 
218 unsigned TargetTransformInfo::getJumpBufSize() const {
219   return TTIImpl->getJumpBufSize();
220 }
221 
222 bool TargetTransformInfo::shouldBuildLookupTables() const {
223   return TTIImpl->shouldBuildLookupTables();
224 }
225 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(Constant *C) const {
226   return TTIImpl->shouldBuildLookupTablesForConstant(C);
227 }
228 
229 unsigned TargetTransformInfo::
230 getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const {
231   return TTIImpl->getScalarizationOverhead(Ty, Insert, Extract);
232 }
233 
234 unsigned TargetTransformInfo::
235 getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
236                                  unsigned VF) const {
237   return TTIImpl->getOperandsScalarizationOverhead(Args, VF);
238 }
239 
240 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
241   return TTIImpl->supportsEfficientVectorElementLoadStore();
242 }
243 
244 bool TargetTransformInfo::enableAggressiveInterleaving(bool LoopHasReductions) const {
245   return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
246 }
247 
248 const TargetTransformInfo::MemCmpExpansionOptions *
249 TargetTransformInfo::enableMemCmpExpansion(bool IsZeroCmp) const {
250   return TTIImpl->enableMemCmpExpansion(IsZeroCmp);
251 }
252 
253 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
254   return TTIImpl->enableInterleavedAccessVectorization();
255 }
256 
257 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
258   return TTIImpl->isFPVectorizationPotentiallyUnsafe();
259 }
260 
261 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
262                                                          unsigned BitWidth,
263                                                          unsigned AddressSpace,
264                                                          unsigned Alignment,
265                                                          bool *Fast) const {
266   return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
267                                                  Alignment, Fast);
268 }
269 
270 TargetTransformInfo::PopcntSupportKind
271 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
272   return TTIImpl->getPopcntSupport(IntTyWidthInBit);
273 }
274 
275 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
276   return TTIImpl->haveFastSqrt(Ty);
277 }
278 
279 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
280   return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
281 }
282 
283 int TargetTransformInfo::getFPOpCost(Type *Ty) const {
284   int Cost = TTIImpl->getFPOpCost(Ty);
285   assert(Cost >= 0 && "TTI should not produce negative costs!");
286   return Cost;
287 }
288 
289 int TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx,
290                                                const APInt &Imm,
291                                                Type *Ty) const {
292   int Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
293   assert(Cost >= 0 && "TTI should not produce negative costs!");
294   return Cost;
295 }
296 
297 int TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty) const {
298   int Cost = TTIImpl->getIntImmCost(Imm, Ty);
299   assert(Cost >= 0 && "TTI should not produce negative costs!");
300   return Cost;
301 }
302 
303 int TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx,
304                                        const APInt &Imm, Type *Ty) const {
305   int Cost = TTIImpl->getIntImmCost(Opcode, Idx, Imm, Ty);
306   assert(Cost >= 0 && "TTI should not produce negative costs!");
307   return Cost;
308 }
309 
310 int TargetTransformInfo::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
311                                        const APInt &Imm, Type *Ty) const {
312   int Cost = TTIImpl->getIntImmCost(IID, Idx, Imm, Ty);
313   assert(Cost >= 0 && "TTI should not produce negative costs!");
314   return Cost;
315 }
316 
317 unsigned TargetTransformInfo::getNumberOfRegisters(bool Vector) const {
318   return TTIImpl->getNumberOfRegisters(Vector);
319 }
320 
321 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const {
322   return TTIImpl->getRegisterBitWidth(Vector);
323 }
324 
325 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
326   return TTIImpl->getMinVectorRegisterBitWidth();
327 }
328 
329 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
330     const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
331   return TTIImpl->shouldConsiderAddressTypePromotion(
332       I, AllowPromotionWithoutCommonHeader);
333 }
334 
335 unsigned TargetTransformInfo::getCacheLineSize() const {
336   return TTIImpl->getCacheLineSize();
337 }
338 
339 llvm::Optional<unsigned> TargetTransformInfo::getCacheSize(CacheLevel Level)
340   const {
341   return TTIImpl->getCacheSize(Level);
342 }
343 
344 llvm::Optional<unsigned> TargetTransformInfo::getCacheAssociativity(
345   CacheLevel Level) const {
346   return TTIImpl->getCacheAssociativity(Level);
347 }
348 
349 unsigned TargetTransformInfo::getPrefetchDistance() const {
350   return TTIImpl->getPrefetchDistance();
351 }
352 
353 unsigned TargetTransformInfo::getMinPrefetchStride() const {
354   return TTIImpl->getMinPrefetchStride();
355 }
356 
357 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
358   return TTIImpl->getMaxPrefetchIterationsAhead();
359 }
360 
361 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const {
362   return TTIImpl->getMaxInterleaveFactor(VF);
363 }
364 
365 int TargetTransformInfo::getArithmeticInstrCost(
366     unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
367     OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo,
368     OperandValueProperties Opd2PropInfo,
369     ArrayRef<const Value *> Args) const {
370   int Cost = TTIImpl->getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
371                                              Opd1PropInfo, Opd2PropInfo, Args);
372   assert(Cost >= 0 && "TTI should not produce negative costs!");
373   return Cost;
374 }
375 
376 int TargetTransformInfo::getShuffleCost(ShuffleKind Kind, Type *Ty, int Index,
377                                         Type *SubTp) const {
378   int Cost = TTIImpl->getShuffleCost(Kind, Ty, Index, SubTp);
379   assert(Cost >= 0 && "TTI should not produce negative costs!");
380   return Cost;
381 }
382 
383 int TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst,
384                                  Type *Src, const Instruction *I) const {
385   assert ((I == nullptr || I->getOpcode() == Opcode) &&
386           "Opcode should reflect passed instruction.");
387   int Cost = TTIImpl->getCastInstrCost(Opcode, Dst, Src, I);
388   assert(Cost >= 0 && "TTI should not produce negative costs!");
389   return Cost;
390 }
391 
392 int TargetTransformInfo::getExtractWithExtendCost(unsigned Opcode, Type *Dst,
393                                                   VectorType *VecTy,
394                                                   unsigned Index) const {
395   int Cost = TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
396   assert(Cost >= 0 && "TTI should not produce negative costs!");
397   return Cost;
398 }
399 
400 int TargetTransformInfo::getCFInstrCost(unsigned Opcode) const {
401   int Cost = TTIImpl->getCFInstrCost(Opcode);
402   assert(Cost >= 0 && "TTI should not produce negative costs!");
403   return Cost;
404 }
405 
406 int TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
407                                  Type *CondTy, const Instruction *I) const {
408   assert ((I == nullptr || I->getOpcode() == Opcode) &&
409           "Opcode should reflect passed instruction.");
410   int Cost = TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
411   assert(Cost >= 0 && "TTI should not produce negative costs!");
412   return Cost;
413 }
414 
415 int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val,
416                                             unsigned Index) const {
417   int Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index);
418   assert(Cost >= 0 && "TTI should not produce negative costs!");
419   return Cost;
420 }
421 
422 int TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src,
423                                          unsigned Alignment,
424                                          unsigned AddressSpace,
425                                          const Instruction *I) const {
426   assert ((I == nullptr || I->getOpcode() == Opcode) &&
427           "Opcode should reflect passed instruction.");
428   int Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
429   assert(Cost >= 0 && "TTI should not produce negative costs!");
430   return Cost;
431 }
432 
433 int TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
434                                                unsigned Alignment,
435                                                unsigned AddressSpace) const {
436   int Cost =
437       TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
438   assert(Cost >= 0 && "TTI should not produce negative costs!");
439   return Cost;
440 }
441 
442 int TargetTransformInfo::getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
443                                                 Value *Ptr, bool VariableMask,
444                                                 unsigned Alignment) const {
445   int Cost = TTIImpl->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
446                                              Alignment);
447   assert(Cost >= 0 && "TTI should not produce negative costs!");
448   return Cost;
449 }
450 
451 int TargetTransformInfo::getInterleavedMemoryOpCost(
452     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
453     unsigned Alignment, unsigned AddressSpace) const {
454   int Cost = TTIImpl->getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
455                                                  Alignment, AddressSpace);
456   assert(Cost >= 0 && "TTI should not produce negative costs!");
457   return Cost;
458 }
459 
460 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
461                                     ArrayRef<Type *> Tys, FastMathFlags FMF,
462                                     unsigned ScalarizationCostPassed) const {
463   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
464                                             ScalarizationCostPassed);
465   assert(Cost >= 0 && "TTI should not produce negative costs!");
466   return Cost;
467 }
468 
469 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
470            ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) const {
471   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
472   assert(Cost >= 0 && "TTI should not produce negative costs!");
473   return Cost;
474 }
475 
476 int TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
477                                           ArrayRef<Type *> Tys) const {
478   int Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys);
479   assert(Cost >= 0 && "TTI should not produce negative costs!");
480   return Cost;
481 }
482 
483 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
484   return TTIImpl->getNumberOfParts(Tp);
485 }
486 
487 int TargetTransformInfo::getAddressComputationCost(Type *Tp,
488                                                    ScalarEvolution *SE,
489                                                    const SCEV *Ptr) const {
490   int Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
491   assert(Cost >= 0 && "TTI should not produce negative costs!");
492   return Cost;
493 }
494 
495 int TargetTransformInfo::getArithmeticReductionCost(unsigned Opcode, Type *Ty,
496                                                     bool IsPairwiseForm) const {
497   int Cost = TTIImpl->getArithmeticReductionCost(Opcode, Ty, IsPairwiseForm);
498   assert(Cost >= 0 && "TTI should not produce negative costs!");
499   return Cost;
500 }
501 
502 int TargetTransformInfo::getMinMaxReductionCost(Type *Ty, Type *CondTy,
503                                                 bool IsPairwiseForm,
504                                                 bool IsUnsigned) const {
505   int Cost =
506       TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsPairwiseForm, IsUnsigned);
507   assert(Cost >= 0 && "TTI should not produce negative costs!");
508   return Cost;
509 }
510 
511 unsigned
512 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
513   return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
514 }
515 
516 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
517                                              MemIntrinsicInfo &Info) const {
518   return TTIImpl->getTgtMemIntrinsic(Inst, Info);
519 }
520 
521 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
522   return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
523 }
524 
525 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
526     IntrinsicInst *Inst, Type *ExpectedType) const {
527   return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
528 }
529 
530 Type *TargetTransformInfo::getMemcpyLoopLoweringType(LLVMContext &Context,
531                                                      Value *Length,
532                                                      unsigned SrcAlign,
533                                                      unsigned DestAlign) const {
534   return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAlign,
535                                             DestAlign);
536 }
537 
538 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
539     SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
540     unsigned RemainingBytes, unsigned SrcAlign, unsigned DestAlign) const {
541   TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
542                                              SrcAlign, DestAlign);
543 }
544 
545 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
546                                               const Function *Callee) const {
547   return TTIImpl->areInlineCompatible(Caller, Callee);
548 }
549 
550 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
551   return TTIImpl->getLoadStoreVecRegBitWidth(AS);
552 }
553 
554 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
555   return TTIImpl->isLegalToVectorizeLoad(LI);
556 }
557 
558 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
559   return TTIImpl->isLegalToVectorizeStore(SI);
560 }
561 
562 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
563     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
564   return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
565                                               AddrSpace);
566 }
567 
568 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
569     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
570   return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
571                                                AddrSpace);
572 }
573 
574 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
575                                                   unsigned LoadSize,
576                                                   unsigned ChainSizeInBytes,
577                                                   VectorType *VecTy) const {
578   return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
579 }
580 
581 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
582                                                    unsigned StoreSize,
583                                                    unsigned ChainSizeInBytes,
584                                                    VectorType *VecTy) const {
585   return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
586 }
587 
588 bool TargetTransformInfo::useReductionIntrinsic(unsigned Opcode,
589                                                 Type *Ty, ReductionFlags Flags) const {
590   return TTIImpl->useReductionIntrinsic(Opcode, Ty, Flags);
591 }
592 
593 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
594   return TTIImpl->shouldExpandReduction(II);
595 }
596 
597 int TargetTransformInfo::getInstructionLatency(const Instruction *I) const {
598   return TTIImpl->getInstructionLatency(I);
599 }
600 
601 static bool isReverseVectorMask(ArrayRef<int> Mask) {
602   for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i)
603     if (Mask[i] >= 0 && Mask[i] != (int)(MaskSize - 1 - i))
604       return false;
605   return true;
606 }
607 
608 static bool isSingleSourceVectorMask(ArrayRef<int> Mask) {
609   bool Vec0 = false;
610   bool Vec1 = false;
611   for (unsigned i = 0, NumVecElts = Mask.size(); i < NumVecElts; ++i) {
612     if (Mask[i] >= 0) {
613       if ((unsigned)Mask[i] >= NumVecElts)
614         Vec1 = true;
615       else
616         Vec0 = true;
617     }
618   }
619   return !(Vec0 && Vec1);
620 }
621 
622 static bool isZeroEltBroadcastVectorMask(ArrayRef<int> Mask) {
623   for (unsigned i = 0; i < Mask.size(); ++i)
624     if (Mask[i] > 0)
625       return false;
626   return true;
627 }
628 
629 static bool isAlternateVectorMask(ArrayRef<int> Mask) {
630   bool isAlternate = true;
631   unsigned MaskSize = Mask.size();
632 
633   // Example: shufflevector A, B, <0,5,2,7>
634   for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
635     if (Mask[i] < 0)
636       continue;
637     isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i);
638   }
639 
640   if (isAlternate)
641     return true;
642 
643   isAlternate = true;
644   // Example: shufflevector A, B, <4,1,6,3>
645   for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
646     if (Mask[i] < 0)
647       continue;
648     isAlternate = Mask[i] == (int)((i & 1) ? i : MaskSize + i);
649   }
650 
651   return isAlternate;
652 }
653 
654 static TargetTransformInfo::OperandValueKind getOperandInfo(Value *V) {
655   TargetTransformInfo::OperandValueKind OpInfo =
656       TargetTransformInfo::OK_AnyValue;
657 
658   // Check for a splat of a constant or for a non uniform vector of constants.
659   if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
660     OpInfo = TargetTransformInfo::OK_NonUniformConstantValue;
661     if (cast<Constant>(V)->getSplatValue() != nullptr)
662       OpInfo = TargetTransformInfo::OK_UniformConstantValue;
663   }
664 
665   // Check for a splat of a uniform value. This is not loop aware, so return
666   // true only for the obviously uniform cases (argument, globalvalue)
667   const Value *Splat = getSplatValue(V);
668   if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
669     OpInfo = TargetTransformInfo::OK_UniformValue;
670 
671   return OpInfo;
672 }
673 
674 static bool matchPairwiseShuffleMask(ShuffleVectorInst *SI, bool IsLeft,
675                                      unsigned Level) {
676   // We don't need a shuffle if we just want to have element 0 in position 0 of
677   // the vector.
678   if (!SI && Level == 0 && IsLeft)
679     return true;
680   else if (!SI)
681     return false;
682 
683   SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1);
684 
685   // Build a mask of 0, 2, ... (left) or 1, 3, ... (right) depending on whether
686   // we look at the left or right side.
687   for (unsigned i = 0, e = (1 << Level), val = !IsLeft; i != e; ++i, val += 2)
688     Mask[i] = val;
689 
690   SmallVector<int, 16> ActualMask = SI->getShuffleMask();
691   return Mask == ActualMask;
692 }
693 
694 namespace {
695 /// Kind of the reduction data.
696 enum ReductionKind {
697   RK_None,           /// Not a reduction.
698   RK_Arithmetic,     /// Binary reduction data.
699   RK_MinMax,         /// Min/max reduction data.
700   RK_UnsignedMinMax, /// Unsigned min/max reduction data.
701 };
702 /// Contains opcode + LHS/RHS parts of the reduction operations.
703 struct ReductionData {
704   ReductionData() = delete;
705   ReductionData(ReductionKind Kind, unsigned Opcode, Value *LHS, Value *RHS)
706       : Opcode(Opcode), LHS(LHS), RHS(RHS), Kind(Kind) {
707     assert(Kind != RK_None && "expected binary or min/max reduction only.");
708   }
709   unsigned Opcode = 0;
710   Value *LHS = nullptr;
711   Value *RHS = nullptr;
712   ReductionKind Kind = RK_None;
713   bool hasSameData(ReductionData &RD) const {
714     return Kind == RD.Kind && Opcode == RD.Opcode;
715   }
716 };
717 } // namespace
718 
719 static Optional<ReductionData> getReductionData(Instruction *I) {
720   Value *L, *R;
721   if (m_BinOp(m_Value(L), m_Value(R)).match(I))
722     return ReductionData(RK_Arithmetic, I->getOpcode(), L, R);
723   if (auto *SI = dyn_cast<SelectInst>(I)) {
724     if (m_SMin(m_Value(L), m_Value(R)).match(SI) ||
725         m_SMax(m_Value(L), m_Value(R)).match(SI) ||
726         m_OrdFMin(m_Value(L), m_Value(R)).match(SI) ||
727         m_OrdFMax(m_Value(L), m_Value(R)).match(SI) ||
728         m_UnordFMin(m_Value(L), m_Value(R)).match(SI) ||
729         m_UnordFMax(m_Value(L), m_Value(R)).match(SI)) {
730       auto *CI = cast<CmpInst>(SI->getCondition());
731       return ReductionData(RK_MinMax, CI->getOpcode(), L, R);
732     }
733     if (m_UMin(m_Value(L), m_Value(R)).match(SI) ||
734         m_UMax(m_Value(L), m_Value(R)).match(SI)) {
735       auto *CI = cast<CmpInst>(SI->getCondition());
736       return ReductionData(RK_UnsignedMinMax, CI->getOpcode(), L, R);
737     }
738   }
739   return llvm::None;
740 }
741 
742 static ReductionKind matchPairwiseReductionAtLevel(Instruction *I,
743                                                    unsigned Level,
744                                                    unsigned NumLevels) {
745   // Match one level of pairwise operations.
746   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
747   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
748   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
749   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
750   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
751   if (!I)
752     return RK_None;
753 
754   assert(I->getType()->isVectorTy() && "Expecting a vector type");
755 
756   Optional<ReductionData> RD = getReductionData(I);
757   if (!RD)
758     return RK_None;
759 
760   ShuffleVectorInst *LS = dyn_cast<ShuffleVectorInst>(RD->LHS);
761   if (!LS && Level)
762     return RK_None;
763   ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(RD->RHS);
764   if (!RS && Level)
765     return RK_None;
766 
767   // On level 0 we can omit one shufflevector instruction.
768   if (!Level && !RS && !LS)
769     return RK_None;
770 
771   // Shuffle inputs must match.
772   Value *NextLevelOpL = LS ? LS->getOperand(0) : nullptr;
773   Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
774   Value *NextLevelOp = nullptr;
775   if (NextLevelOpR && NextLevelOpL) {
776     // If we have two shuffles their operands must match.
777     if (NextLevelOpL != NextLevelOpR)
778       return RK_None;
779 
780     NextLevelOp = NextLevelOpL;
781   } else if (Level == 0 && (NextLevelOpR || NextLevelOpL)) {
782     // On the first level we can omit the shufflevector <0, undef,...>. So the
783     // input to the other shufflevector <1, undef> must match with one of the
784     // inputs to the current binary operation.
785     // Example:
786     //  %NextLevelOpL = shufflevector %R, <1, undef ...>
787     //  %BinOp        = fadd          %NextLevelOpL, %R
788     if (NextLevelOpL && NextLevelOpL != RD->RHS)
789       return RK_None;
790     else if (NextLevelOpR && NextLevelOpR != RD->LHS)
791       return RK_None;
792 
793     NextLevelOp = NextLevelOpL ? RD->RHS : RD->LHS;
794   } else
795     return RK_None;
796 
797   // Check that the next levels binary operation exists and matches with the
798   // current one.
799   if (Level + 1 != NumLevels) {
800     Optional<ReductionData> NextLevelRD =
801         getReductionData(cast<Instruction>(NextLevelOp));
802     if (!NextLevelRD || !RD->hasSameData(*NextLevelRD))
803       return RK_None;
804   }
805 
806   // Shuffle mask for pairwise operation must match.
807   if (matchPairwiseShuffleMask(LS, /*IsLeft=*/true, Level)) {
808     if (!matchPairwiseShuffleMask(RS, /*IsLeft=*/false, Level))
809       return RK_None;
810   } else if (matchPairwiseShuffleMask(RS, /*IsLeft=*/true, Level)) {
811     if (!matchPairwiseShuffleMask(LS, /*IsLeft=*/false, Level))
812       return RK_None;
813   } else {
814     return RK_None;
815   }
816 
817   if (++Level == NumLevels)
818     return RD->Kind;
819 
820   // Match next level.
821   return matchPairwiseReductionAtLevel(cast<Instruction>(NextLevelOp), Level,
822                                        NumLevels);
823 }
824 
825 static ReductionKind matchPairwiseReduction(const ExtractElementInst *ReduxRoot,
826                                             unsigned &Opcode, Type *&Ty) {
827   if (!EnableReduxCost)
828     return RK_None;
829 
830   // Need to extract the first element.
831   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
832   unsigned Idx = ~0u;
833   if (CI)
834     Idx = CI->getZExtValue();
835   if (Idx != 0)
836     return RK_None;
837 
838   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
839   if (!RdxStart)
840     return RK_None;
841   Optional<ReductionData> RD = getReductionData(RdxStart);
842   if (!RD)
843     return RK_None;
844 
845   Type *VecTy = RdxStart->getType();
846   unsigned NumVecElems = VecTy->getVectorNumElements();
847   if (!isPowerOf2_32(NumVecElems))
848     return RK_None;
849 
850   // We look for a sequence of shuffle,shuffle,add triples like the following
851   // that builds a pairwise reduction tree.
852   //
853   //  (X0, X1, X2, X3)
854   //   (X0 + X1, X2 + X3, undef, undef)
855   //    ((X0 + X1) + (X2 + X3), undef, undef, undef)
856   //
857   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
858   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
859   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
860   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
861   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
862   // %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
863   //       <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
864   // %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
865   //       <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
866   // %bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
867   // %r = extractelement <4 x float> %bin.rdx8, i32 0
868   if (matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)) ==
869       RK_None)
870     return RK_None;
871 
872   Opcode = RD->Opcode;
873   Ty = VecTy;
874 
875   return RD->Kind;
876 }
877 
878 static std::pair<Value *, ShuffleVectorInst *>
879 getShuffleAndOtherOprd(Value *L, Value *R) {
880   ShuffleVectorInst *S = nullptr;
881 
882   if ((S = dyn_cast<ShuffleVectorInst>(L)))
883     return std::make_pair(R, S);
884 
885   S = dyn_cast<ShuffleVectorInst>(R);
886   return std::make_pair(L, S);
887 }
888 
889 static ReductionKind
890 matchVectorSplittingReduction(const ExtractElementInst *ReduxRoot,
891                               unsigned &Opcode, Type *&Ty) {
892   if (!EnableReduxCost)
893     return RK_None;
894 
895   // Need to extract the first element.
896   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
897   unsigned Idx = ~0u;
898   if (CI)
899     Idx = CI->getZExtValue();
900   if (Idx != 0)
901     return RK_None;
902 
903   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
904   if (!RdxStart)
905     return RK_None;
906   Optional<ReductionData> RD = getReductionData(RdxStart);
907   if (!RD)
908     return RK_None;
909 
910   Type *VecTy = ReduxRoot->getOperand(0)->getType();
911   unsigned NumVecElems = VecTy->getVectorNumElements();
912   if (!isPowerOf2_32(NumVecElems))
913     return RK_None;
914 
915   // We look for a sequence of shuffles and adds like the following matching one
916   // fadd, shuffle vector pair at a time.
917   //
918   // %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
919   //                           <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
920   // %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
921   // %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
922   //                          <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
923   // %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
924   // %r = extractelement <4 x float> %bin.rdx8, i32 0
925 
926   unsigned MaskStart = 1;
927   Instruction *RdxOp = RdxStart;
928   SmallVector<int, 32> ShuffleMask(NumVecElems, 0);
929   unsigned NumVecElemsRemain = NumVecElems;
930   while (NumVecElemsRemain - 1) {
931     // Check for the right reduction operation.
932     if (!RdxOp)
933       return RK_None;
934     Optional<ReductionData> RDLevel = getReductionData(RdxOp);
935     if (!RDLevel || !RDLevel->hasSameData(*RD))
936       return RK_None;
937 
938     Value *NextRdxOp;
939     ShuffleVectorInst *Shuffle;
940     std::tie(NextRdxOp, Shuffle) =
941         getShuffleAndOtherOprd(RDLevel->LHS, RDLevel->RHS);
942 
943     // Check the current reduction operation and the shuffle use the same value.
944     if (Shuffle == nullptr)
945       return RK_None;
946     if (Shuffle->getOperand(0) != NextRdxOp)
947       return RK_None;
948 
949     // Check that shuffle masks matches.
950     for (unsigned j = 0; j != MaskStart; ++j)
951       ShuffleMask[j] = MaskStart + j;
952     // Fill the rest of the mask with -1 for undef.
953     std::fill(&ShuffleMask[MaskStart], ShuffleMask.end(), -1);
954 
955     SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
956     if (ShuffleMask != Mask)
957       return RK_None;
958 
959     RdxOp = dyn_cast<Instruction>(NextRdxOp);
960     NumVecElemsRemain /= 2;
961     MaskStart *= 2;
962   }
963 
964   Opcode = RD->Opcode;
965   Ty = VecTy;
966   return RD->Kind;
967 }
968 
969 int TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
970   switch (I->getOpcode()) {
971   case Instruction::GetElementPtr:
972     return getUserCost(I);
973 
974   case Instruction::Ret:
975   case Instruction::PHI:
976   case Instruction::Br: {
977     return getCFInstrCost(I->getOpcode());
978   }
979   case Instruction::Add:
980   case Instruction::FAdd:
981   case Instruction::Sub:
982   case Instruction::FSub:
983   case Instruction::Mul:
984   case Instruction::FMul:
985   case Instruction::UDiv:
986   case Instruction::SDiv:
987   case Instruction::FDiv:
988   case Instruction::URem:
989   case Instruction::SRem:
990   case Instruction::FRem:
991   case Instruction::Shl:
992   case Instruction::LShr:
993   case Instruction::AShr:
994   case Instruction::And:
995   case Instruction::Or:
996   case Instruction::Xor: {
997     TargetTransformInfo::OperandValueKind Op1VK =
998       getOperandInfo(I->getOperand(0));
999     TargetTransformInfo::OperandValueKind Op2VK =
1000       getOperandInfo(I->getOperand(1));
1001     SmallVector<const Value*, 2> Operands(I->operand_values());
1002     return getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK,
1003                                        Op2VK, TargetTransformInfo::OP_None,
1004                                        TargetTransformInfo::OP_None,
1005                                        Operands);
1006   }
1007   case Instruction::Select: {
1008     const SelectInst *SI = cast<SelectInst>(I);
1009     Type *CondTy = SI->getCondition()->getType();
1010     return getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy, I);
1011   }
1012   case Instruction::ICmp:
1013   case Instruction::FCmp: {
1014     Type *ValTy = I->getOperand(0)->getType();
1015     return getCmpSelInstrCost(I->getOpcode(), ValTy, I->getType(), I);
1016   }
1017   case Instruction::Store: {
1018     const StoreInst *SI = cast<StoreInst>(I);
1019     Type *ValTy = SI->getValueOperand()->getType();
1020     return getMemoryOpCost(I->getOpcode(), ValTy,
1021                                 SI->getAlignment(),
1022                                 SI->getPointerAddressSpace(), I);
1023   }
1024   case Instruction::Load: {
1025     const LoadInst *LI = cast<LoadInst>(I);
1026     return getMemoryOpCost(I->getOpcode(), I->getType(),
1027                                 LI->getAlignment(),
1028                                 LI->getPointerAddressSpace(), I);
1029   }
1030   case Instruction::ZExt:
1031   case Instruction::SExt:
1032   case Instruction::FPToUI:
1033   case Instruction::FPToSI:
1034   case Instruction::FPExt:
1035   case Instruction::PtrToInt:
1036   case Instruction::IntToPtr:
1037   case Instruction::SIToFP:
1038   case Instruction::UIToFP:
1039   case Instruction::Trunc:
1040   case Instruction::FPTrunc:
1041   case Instruction::BitCast:
1042   case Instruction::AddrSpaceCast: {
1043     Type *SrcTy = I->getOperand(0)->getType();
1044     return getCastInstrCost(I->getOpcode(), I->getType(), SrcTy, I);
1045   }
1046   case Instruction::ExtractElement: {
1047     const ExtractElementInst * EEI = cast<ExtractElementInst>(I);
1048     ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
1049     unsigned Idx = -1;
1050     if (CI)
1051       Idx = CI->getZExtValue();
1052 
1053     // Try to match a reduction sequence (series of shufflevector and vector
1054     // adds followed by a extractelement).
1055     unsigned ReduxOpCode;
1056     Type *ReduxType;
1057 
1058     switch (matchVectorSplittingReduction(EEI, ReduxOpCode, ReduxType)) {
1059     case RK_Arithmetic:
1060       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1061                                              /*IsPairwiseForm=*/false);
1062     case RK_MinMax:
1063       return getMinMaxReductionCost(
1064           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1065           /*IsPairwiseForm=*/false, /*IsUnsigned=*/false);
1066     case RK_UnsignedMinMax:
1067       return getMinMaxReductionCost(
1068           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1069           /*IsPairwiseForm=*/false, /*IsUnsigned=*/true);
1070     case RK_None:
1071       break;
1072     }
1073 
1074     switch (matchPairwiseReduction(EEI, ReduxOpCode, ReduxType)) {
1075     case RK_Arithmetic:
1076       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1077                                              /*IsPairwiseForm=*/true);
1078     case RK_MinMax:
1079       return getMinMaxReductionCost(
1080           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1081           /*IsPairwiseForm=*/true, /*IsUnsigned=*/false);
1082     case RK_UnsignedMinMax:
1083       return getMinMaxReductionCost(
1084           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1085           /*IsPairwiseForm=*/true, /*IsUnsigned=*/true);
1086     case RK_None:
1087       break;
1088     }
1089 
1090     return getVectorInstrCost(I->getOpcode(),
1091                                    EEI->getOperand(0)->getType(), Idx);
1092   }
1093   case Instruction::InsertElement: {
1094     const InsertElementInst * IE = cast<InsertElementInst>(I);
1095     ConstantInt *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
1096     unsigned Idx = -1;
1097     if (CI)
1098       Idx = CI->getZExtValue();
1099     return getVectorInstrCost(I->getOpcode(),
1100                                    IE->getType(), Idx);
1101   }
1102   case Instruction::ShuffleVector: {
1103     const ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
1104     Type *VecTypOp0 = Shuffle->getOperand(0)->getType();
1105     unsigned NumVecElems = VecTypOp0->getVectorNumElements();
1106     SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
1107 
1108     if (NumVecElems == Mask.size()) {
1109       if (isReverseVectorMask(Mask))
1110         return getShuffleCost(TargetTransformInfo::SK_Reverse, VecTypOp0,
1111                                    0, nullptr);
1112       if (isAlternateVectorMask(Mask))
1113         return getShuffleCost(TargetTransformInfo::SK_Alternate,
1114                                    VecTypOp0, 0, nullptr);
1115 
1116       if (isZeroEltBroadcastVectorMask(Mask))
1117         return getShuffleCost(TargetTransformInfo::SK_Broadcast,
1118                                    VecTypOp0, 0, nullptr);
1119 
1120       if (isSingleSourceVectorMask(Mask))
1121         return getShuffleCost(TargetTransformInfo::SK_PermuteSingleSrc,
1122                                    VecTypOp0, 0, nullptr);
1123 
1124       return getShuffleCost(TargetTransformInfo::SK_PermuteTwoSrc,
1125                                  VecTypOp0, 0, nullptr);
1126     }
1127 
1128     return -1;
1129   }
1130   case Instruction::Call:
1131     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
1132       SmallVector<Value *, 4> Args(II->arg_operands());
1133 
1134       FastMathFlags FMF;
1135       if (auto *FPMO = dyn_cast<FPMathOperator>(II))
1136         FMF = FPMO->getFastMathFlags();
1137 
1138       return getIntrinsicInstrCost(II->getIntrinsicID(), II->getType(),
1139                                         Args, FMF);
1140     }
1141     return -1;
1142   default:
1143     // We don't have any information on this instruction.
1144     return -1;
1145   }
1146 }
1147 
1148 TargetTransformInfo::Concept::~Concept() {}
1149 
1150 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1151 
1152 TargetIRAnalysis::TargetIRAnalysis(
1153     std::function<Result(const Function &)> TTICallback)
1154     : TTICallback(std::move(TTICallback)) {}
1155 
1156 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1157                                                FunctionAnalysisManager &) {
1158   return TTICallback(F);
1159 }
1160 
1161 AnalysisKey TargetIRAnalysis::Key;
1162 
1163 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1164   return Result(F.getParent()->getDataLayout());
1165 }
1166 
1167 // Register the basic pass.
1168 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1169                 "Target Transform Information", false, true)
1170 char TargetTransformInfoWrapperPass::ID = 0;
1171 
1172 void TargetTransformInfoWrapperPass::anchor() {}
1173 
1174 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1175     : ImmutablePass(ID) {
1176   initializeTargetTransformInfoWrapperPassPass(
1177       *PassRegistry::getPassRegistry());
1178 }
1179 
1180 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1181     TargetIRAnalysis TIRA)
1182     : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1183   initializeTargetTransformInfoWrapperPassPass(
1184       *PassRegistry::getPassRegistry());
1185 }
1186 
1187 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1188   FunctionAnalysisManager DummyFAM;
1189   TTI = TIRA.run(F, DummyFAM);
1190   return *TTI;
1191 }
1192 
1193 ImmutablePass *
1194 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1195   return new TargetTransformInfoWrapperPass(std::move(TIRA));
1196 }
1197