1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/Dominators.h" 15 #include "llvm/IR/Instruction.h" 16 #include "llvm/IR/Instructions.h" 17 #include "llvm/IR/IntrinsicInst.h" 18 #include "llvm/IR/Module.h" 19 #include "llvm/IR/Operator.h" 20 #include "llvm/IR/PatternMatch.h" 21 #include "llvm/InitializePasses.h" 22 #include "llvm/Support/CommandLine.h" 23 #include <utility> 24 25 using namespace llvm; 26 using namespace PatternMatch; 27 28 #define DEBUG_TYPE "tti" 29 30 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 31 cl::Hidden, 32 cl::desc("Recognize reduction patterns.")); 33 34 static cl::opt<unsigned> CacheLineSize( 35 "cache-line-size", cl::init(0), cl::Hidden, 36 cl::desc("Use this to override the target cache line size when " 37 "specified by the user.")); 38 39 namespace { 40 /// No-op implementation of the TTI interface using the utility base 41 /// classes. 42 /// 43 /// This is used when no target specific information is available. 44 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 45 explicit NoTTIImpl(const DataLayout &DL) 46 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 47 }; 48 } // namespace 49 50 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 51 // If the loop has irreducible control flow, it can not be converted to 52 // Hardware loop. 53 LoopBlocksRPO RPOT(L); 54 RPOT.perform(&LI); 55 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 56 return false; 57 return true; 58 } 59 60 IntrinsicCostAttributes::IntrinsicCostAttributes( 61 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 62 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 63 ScalarizationCost(ScalarizationCost) { 64 65 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 66 FMF = FPMO->getFastMathFlags(); 67 68 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 69 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 70 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 71 } 72 73 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 74 ArrayRef<Type *> Tys, 75 FastMathFlags Flags, 76 const IntrinsicInst *I, 77 InstructionCost ScalarCost) 78 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 79 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 80 } 81 82 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 83 ArrayRef<const Value *> Args) 84 : RetTy(Ty), IID(Id) { 85 86 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 87 ParamTys.reserve(Arguments.size()); 88 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 89 ParamTys.push_back(Arguments[Idx]->getType()); 90 } 91 92 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 93 ArrayRef<const Value *> Args, 94 ArrayRef<Type *> Tys, 95 FastMathFlags Flags, 96 const IntrinsicInst *I, 97 InstructionCost ScalarCost) 98 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 99 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 100 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 101 } 102 103 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 104 LoopInfo &LI, DominatorTree &DT, 105 bool ForceNestedLoop, 106 bool ForceHardwareLoopPHI) { 107 SmallVector<BasicBlock *, 4> ExitingBlocks; 108 L->getExitingBlocks(ExitingBlocks); 109 110 for (BasicBlock *BB : ExitingBlocks) { 111 // If we pass the updated counter back through a phi, we need to know 112 // which latch the updated value will be coming from. 113 if (!L->isLoopLatch(BB)) { 114 if (ForceHardwareLoopPHI || CounterInReg) 115 continue; 116 } 117 118 const SCEV *EC = SE.getExitCount(L, BB); 119 if (isa<SCEVCouldNotCompute>(EC)) 120 continue; 121 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 122 if (ConstEC->getValue()->isZero()) 123 continue; 124 } else if (!SE.isLoopInvariant(EC, L)) 125 continue; 126 127 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 128 continue; 129 130 // If this exiting block is contained in a nested loop, it is not eligible 131 // for insertion of the branch-and-decrement since the inner loop would 132 // end up messing up the value in the CTR. 133 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 134 continue; 135 136 // We now have a loop-invariant count of loop iterations (which is not the 137 // constant zero) for which we know that this loop will not exit via this 138 // existing block. 139 140 // We need to make sure that this block will run on every loop iteration. 141 // For this to be true, we must dominate all blocks with backedges. Such 142 // blocks are in-loop predecessors to the header block. 143 bool NotAlways = false; 144 for (BasicBlock *Pred : predecessors(L->getHeader())) { 145 if (!L->contains(Pred)) 146 continue; 147 148 if (!DT.dominates(BB, Pred)) { 149 NotAlways = true; 150 break; 151 } 152 } 153 154 if (NotAlways) 155 continue; 156 157 // Make sure this blocks ends with a conditional branch. 158 Instruction *TI = BB->getTerminator(); 159 if (!TI) 160 continue; 161 162 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 163 if (!BI->isConditional()) 164 continue; 165 166 ExitBranch = BI; 167 } else 168 continue; 169 170 // Note that this block may not be the loop latch block, even if the loop 171 // has a latch block. 172 ExitBlock = BB; 173 ExitCount = EC; 174 break; 175 } 176 177 if (!ExitBlock) 178 return false; 179 return true; 180 } 181 182 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 183 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 184 185 TargetTransformInfo::~TargetTransformInfo() = default; 186 187 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 188 : TTIImpl(std::move(Arg.TTIImpl)) {} 189 190 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 191 TTIImpl = std::move(RHS.TTIImpl); 192 return *this; 193 } 194 195 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 196 return TTIImpl->getInliningThresholdMultiplier(); 197 } 198 199 unsigned 200 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 201 return TTIImpl->adjustInliningThreshold(CB); 202 } 203 204 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 205 return TTIImpl->getInlinerVectorBonusPercent(); 206 } 207 208 InstructionCost 209 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 210 ArrayRef<const Value *> Operands, 211 TTI::TargetCostKind CostKind) const { 212 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 213 } 214 215 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 216 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 217 BlockFrequencyInfo *BFI) const { 218 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 219 } 220 221 InstructionCost 222 TargetTransformInfo::getUserCost(const User *U, 223 ArrayRef<const Value *> Operands, 224 enum TargetCostKind CostKind) const { 225 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 226 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 227 "TTI should not produce negative costs!"); 228 return Cost; 229 } 230 231 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 232 return TTIImpl->getPredictableBranchThreshold(); 233 } 234 235 bool TargetTransformInfo::hasBranchDivergence() const { 236 return TTIImpl->hasBranchDivergence(); 237 } 238 239 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 240 return TTIImpl->useGPUDivergenceAnalysis(); 241 } 242 243 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 244 return TTIImpl->isSourceOfDivergence(V); 245 } 246 247 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 248 return TTIImpl->isAlwaysUniform(V); 249 } 250 251 unsigned TargetTransformInfo::getFlatAddressSpace() const { 252 return TTIImpl->getFlatAddressSpace(); 253 } 254 255 bool TargetTransformInfo::collectFlatAddressOperands( 256 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 257 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 258 } 259 260 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 261 unsigned ToAS) const { 262 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 263 } 264 265 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 266 unsigned AS) const { 267 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 268 } 269 270 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 271 return TTIImpl->getAssumedAddrSpace(V); 272 } 273 274 std::pair<const Value *, unsigned> 275 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 276 return TTIImpl->getPredicatedAddrSpace(V); 277 } 278 279 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 280 IntrinsicInst *II, Value *OldV, Value *NewV) const { 281 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 282 } 283 284 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 285 return TTIImpl->isLoweredToCall(F); 286 } 287 288 bool TargetTransformInfo::isHardwareLoopProfitable( 289 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 290 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 291 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 292 } 293 294 bool TargetTransformInfo::preferPredicateOverEpilogue( 295 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 296 TargetLibraryInfo *TLI, DominatorTree *DT, 297 const LoopAccessInfo *LAI) const { 298 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 299 } 300 301 bool TargetTransformInfo::emitGetActiveLaneMask() const { 302 return TTIImpl->emitGetActiveLaneMask(); 303 } 304 305 Optional<Instruction *> 306 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 307 IntrinsicInst &II) const { 308 return TTIImpl->instCombineIntrinsic(IC, II); 309 } 310 311 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 312 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 313 bool &KnownBitsComputed) const { 314 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 315 KnownBitsComputed); 316 } 317 318 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 319 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 320 APInt &UndefElts2, APInt &UndefElts3, 321 std::function<void(Instruction *, unsigned, APInt, APInt &)> 322 SimplifyAndSetOp) const { 323 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 324 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 325 SimplifyAndSetOp); 326 } 327 328 void TargetTransformInfo::getUnrollingPreferences( 329 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 330 OptimizationRemarkEmitter *ORE) const { 331 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 332 } 333 334 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 335 PeelingPreferences &PP) const { 336 return TTIImpl->getPeelingPreferences(L, SE, PP); 337 } 338 339 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 340 return TTIImpl->isLegalAddImmediate(Imm); 341 } 342 343 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 344 return TTIImpl->isLegalICmpImmediate(Imm); 345 } 346 347 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 348 int64_t BaseOffset, 349 bool HasBaseReg, int64_t Scale, 350 unsigned AddrSpace, 351 Instruction *I) const { 352 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 353 Scale, AddrSpace, I); 354 } 355 356 bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1, 357 const LSRCost &C2) const { 358 return TTIImpl->isLSRCostLess(C1, C2); 359 } 360 361 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 362 return TTIImpl->isNumRegsMajorCostOfLSR(); 363 } 364 365 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 366 return TTIImpl->isProfitableLSRChainElement(I); 367 } 368 369 bool TargetTransformInfo::canMacroFuseCmp() const { 370 return TTIImpl->canMacroFuseCmp(); 371 } 372 373 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 374 ScalarEvolution *SE, LoopInfo *LI, 375 DominatorTree *DT, AssumptionCache *AC, 376 TargetLibraryInfo *LibInfo) const { 377 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 378 } 379 380 TTI::AddressingModeKind 381 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 382 ScalarEvolution *SE) const { 383 return TTIImpl->getPreferredAddressingMode(L, SE); 384 } 385 386 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 387 Align Alignment) const { 388 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 389 } 390 391 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 392 Align Alignment) const { 393 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 394 } 395 396 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 397 Align Alignment) const { 398 return TTIImpl->isLegalNTStore(DataType, Alignment); 399 } 400 401 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 402 return TTIImpl->isLegalNTLoad(DataType, Alignment); 403 } 404 405 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy, 406 ElementCount NumElements) const { 407 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements); 408 } 409 410 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 411 Align Alignment) const { 412 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 413 } 414 415 bool TargetTransformInfo::isLegalAltInstr( 416 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1, 417 const SmallBitVector &OpcodeMask) const { 418 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask); 419 } 420 421 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 422 Align Alignment) const { 423 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 424 } 425 426 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType, 427 Align Alignment) const { 428 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment); 429 } 430 431 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType, 432 Align Alignment) const { 433 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment); 434 } 435 436 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 437 return TTIImpl->isLegalMaskedCompressStore(DataType); 438 } 439 440 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 441 return TTIImpl->isLegalMaskedExpandLoad(DataType); 442 } 443 444 bool TargetTransformInfo::enableOrderedReductions() const { 445 return TTIImpl->enableOrderedReductions(); 446 } 447 448 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 449 return TTIImpl->hasDivRemOp(DataType, IsSigned); 450 } 451 452 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 453 unsigned AddrSpace) const { 454 return TTIImpl->hasVolatileVariant(I, AddrSpace); 455 } 456 457 bool TargetTransformInfo::prefersVectorizedAddressing() const { 458 return TTIImpl->prefersVectorizedAddressing(); 459 } 460 461 InstructionCost TargetTransformInfo::getScalingFactorCost( 462 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 463 int64_t Scale, unsigned AddrSpace) const { 464 InstructionCost Cost = TTIImpl->getScalingFactorCost( 465 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 466 assert(Cost >= 0 && "TTI should not produce negative costs!"); 467 return Cost; 468 } 469 470 bool TargetTransformInfo::LSRWithInstrQueries() const { 471 return TTIImpl->LSRWithInstrQueries(); 472 } 473 474 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 475 return TTIImpl->isTruncateFree(Ty1, Ty2); 476 } 477 478 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 479 return TTIImpl->isProfitableToHoist(I); 480 } 481 482 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 483 484 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 485 return TTIImpl->isTypeLegal(Ty); 486 } 487 488 unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const { 489 return TTIImpl->getRegUsageForType(Ty); 490 } 491 492 bool TargetTransformInfo::shouldBuildLookupTables() const { 493 return TTIImpl->shouldBuildLookupTables(); 494 } 495 496 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 497 Constant *C) const { 498 return TTIImpl->shouldBuildLookupTablesForConstant(C); 499 } 500 501 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 502 return TTIImpl->shouldBuildRelLookupTables(); 503 } 504 505 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 506 return TTIImpl->useColdCCForColdCall(F); 507 } 508 509 InstructionCost 510 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 511 const APInt &DemandedElts, 512 bool Insert, bool Extract) const { 513 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 514 } 515 516 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 517 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 518 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 519 } 520 521 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 522 return TTIImpl->supportsEfficientVectorElementLoadStore(); 523 } 524 525 bool TargetTransformInfo::enableAggressiveInterleaving( 526 bool LoopHasReductions) const { 527 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 528 } 529 530 TargetTransformInfo::MemCmpExpansionOptions 531 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 532 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 533 } 534 535 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 536 return TTIImpl->enableInterleavedAccessVectorization(); 537 } 538 539 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 540 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 541 } 542 543 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 544 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 545 } 546 547 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 548 unsigned BitWidth, 549 unsigned AddressSpace, 550 Align Alignment, 551 bool *Fast) const { 552 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 553 AddressSpace, Alignment, Fast); 554 } 555 556 TargetTransformInfo::PopcntSupportKind 557 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 558 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 559 } 560 561 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 562 return TTIImpl->haveFastSqrt(Ty); 563 } 564 565 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 566 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 567 } 568 569 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 570 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 571 assert(Cost >= 0 && "TTI should not produce negative costs!"); 572 return Cost; 573 } 574 575 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 576 unsigned Idx, 577 const APInt &Imm, 578 Type *Ty) const { 579 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 580 assert(Cost >= 0 && "TTI should not produce negative costs!"); 581 return Cost; 582 } 583 584 InstructionCost 585 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 586 TTI::TargetCostKind CostKind) const { 587 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 588 assert(Cost >= 0 && "TTI should not produce negative costs!"); 589 return Cost; 590 } 591 592 InstructionCost TargetTransformInfo::getIntImmCostInst( 593 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 594 TTI::TargetCostKind CostKind, Instruction *Inst) const { 595 InstructionCost Cost = 596 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 597 assert(Cost >= 0 && "TTI should not produce negative costs!"); 598 return Cost; 599 } 600 601 InstructionCost 602 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 603 const APInt &Imm, Type *Ty, 604 TTI::TargetCostKind CostKind) const { 605 InstructionCost Cost = 606 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 607 assert(Cost >= 0 && "TTI should not produce negative costs!"); 608 return Cost; 609 } 610 611 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 612 return TTIImpl->getNumberOfRegisters(ClassID); 613 } 614 615 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 616 Type *Ty) const { 617 return TTIImpl->getRegisterClassForType(Vector, Ty); 618 } 619 620 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 621 return TTIImpl->getRegisterClassName(ClassID); 622 } 623 624 TypeSize TargetTransformInfo::getRegisterBitWidth( 625 TargetTransformInfo::RegisterKind K) const { 626 return TTIImpl->getRegisterBitWidth(K); 627 } 628 629 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 630 return TTIImpl->getMinVectorRegisterBitWidth(); 631 } 632 633 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 634 return TTIImpl->getMaxVScale(); 635 } 636 637 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 638 return TTIImpl->getVScaleForTuning(); 639 } 640 641 bool TargetTransformInfo::shouldMaximizeVectorBandwidth( 642 TargetTransformInfo::RegisterKind K) const { 643 return TTIImpl->shouldMaximizeVectorBandwidth(K); 644 } 645 646 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 647 bool IsScalable) const { 648 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 649 } 650 651 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 652 unsigned Opcode) const { 653 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 654 } 655 656 unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, 657 Type *ScalarValTy) const { 658 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy); 659 } 660 661 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 662 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 663 return TTIImpl->shouldConsiderAddressTypePromotion( 664 I, AllowPromotionWithoutCommonHeader); 665 } 666 667 unsigned TargetTransformInfo::getCacheLineSize() const { 668 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize 669 : TTIImpl->getCacheLineSize(); 670 } 671 672 llvm::Optional<unsigned> 673 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 674 return TTIImpl->getCacheSize(Level); 675 } 676 677 llvm::Optional<unsigned> 678 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 679 return TTIImpl->getCacheAssociativity(Level); 680 } 681 682 unsigned TargetTransformInfo::getPrefetchDistance() const { 683 return TTIImpl->getPrefetchDistance(); 684 } 685 686 unsigned TargetTransformInfo::getMinPrefetchStride( 687 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 688 unsigned NumPrefetches, bool HasCall) const { 689 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 690 NumPrefetches, HasCall); 691 } 692 693 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 694 return TTIImpl->getMaxPrefetchIterationsAhead(); 695 } 696 697 bool TargetTransformInfo::enableWritePrefetching() const { 698 return TTIImpl->enableWritePrefetching(); 699 } 700 701 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 702 return TTIImpl->getMaxInterleaveFactor(VF); 703 } 704 705 TargetTransformInfo::OperandValueKind 706 TargetTransformInfo::getOperandInfo(const Value *V, 707 OperandValueProperties &OpProps) { 708 OperandValueKind OpInfo = OK_AnyValue; 709 OpProps = OP_None; 710 711 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 712 if (CI->getValue().isPowerOf2()) 713 OpProps = OP_PowerOf2; 714 return OK_UniformConstantValue; 715 } 716 717 // A broadcast shuffle creates a uniform value. 718 // TODO: Add support for non-zero index broadcasts. 719 // TODO: Add support for different source vector width. 720 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 721 if (ShuffleInst->isZeroEltSplat()) 722 OpInfo = OK_UniformValue; 723 724 const Value *Splat = getSplatValue(V); 725 726 // Check for a splat of a constant or for a non uniform vector of constants 727 // and check if the constant(s) are all powers of two. 728 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 729 OpInfo = OK_NonUniformConstantValue; 730 if (Splat) { 731 OpInfo = OK_UniformConstantValue; 732 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 733 if (CI->getValue().isPowerOf2()) 734 OpProps = OP_PowerOf2; 735 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 736 OpProps = OP_PowerOf2; 737 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 738 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 739 if (CI->getValue().isPowerOf2()) 740 continue; 741 OpProps = OP_None; 742 break; 743 } 744 } 745 } 746 747 // Check for a splat of a uniform value. This is not loop aware, so return 748 // true only for the obviously uniform cases (argument, globalvalue) 749 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 750 OpInfo = OK_UniformValue; 751 752 return OpInfo; 753 } 754 755 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 756 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 757 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 758 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 759 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 760 InstructionCost Cost = 761 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 762 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 763 assert(Cost >= 0 && "TTI should not produce negative costs!"); 764 return Cost; 765 } 766 767 InstructionCost TargetTransformInfo::getShuffleCost( 768 ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask, int Index, 769 VectorType *SubTp, ArrayRef<const Value *> Args) const { 770 InstructionCost Cost = 771 TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp, Args); 772 assert(Cost >= 0 && "TTI should not produce negative costs!"); 773 return Cost; 774 } 775 776 TTI::CastContextHint 777 TargetTransformInfo::getCastContextHint(const Instruction *I) { 778 if (!I) 779 return CastContextHint::None; 780 781 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 782 unsigned GatScatOp) { 783 const Instruction *I = dyn_cast<Instruction>(V); 784 if (!I) 785 return CastContextHint::None; 786 787 if (I->getOpcode() == LdStOp) 788 return CastContextHint::Normal; 789 790 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 791 if (II->getIntrinsicID() == MaskedOp) 792 return TTI::CastContextHint::Masked; 793 if (II->getIntrinsicID() == GatScatOp) 794 return TTI::CastContextHint::GatherScatter; 795 } 796 797 return TTI::CastContextHint::None; 798 }; 799 800 switch (I->getOpcode()) { 801 case Instruction::ZExt: 802 case Instruction::SExt: 803 case Instruction::FPExt: 804 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 805 Intrinsic::masked_load, Intrinsic::masked_gather); 806 case Instruction::Trunc: 807 case Instruction::FPTrunc: 808 if (I->hasOneUse()) 809 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 810 Intrinsic::masked_store, 811 Intrinsic::masked_scatter); 812 break; 813 default: 814 return CastContextHint::None; 815 } 816 817 return TTI::CastContextHint::None; 818 } 819 820 InstructionCost TargetTransformInfo::getCastInstrCost( 821 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 822 TTI::TargetCostKind CostKind, const Instruction *I) const { 823 assert((I == nullptr || I->getOpcode() == Opcode) && 824 "Opcode should reflect passed instruction."); 825 InstructionCost Cost = 826 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 827 assert(Cost >= 0 && "TTI should not produce negative costs!"); 828 return Cost; 829 } 830 831 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 832 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 833 InstructionCost Cost = 834 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 835 assert(Cost >= 0 && "TTI should not produce negative costs!"); 836 return Cost; 837 } 838 839 InstructionCost TargetTransformInfo::getCFInstrCost( 840 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 841 assert((I == nullptr || I->getOpcode() == Opcode) && 842 "Opcode should reflect passed instruction."); 843 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 844 assert(Cost >= 0 && "TTI should not produce negative costs!"); 845 return Cost; 846 } 847 848 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 849 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 850 TTI::TargetCostKind CostKind, const Instruction *I) const { 851 assert((I == nullptr || I->getOpcode() == Opcode) && 852 "Opcode should reflect passed instruction."); 853 InstructionCost Cost = 854 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 855 assert(Cost >= 0 && "TTI should not produce negative costs!"); 856 return Cost; 857 } 858 859 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 860 Type *Val, 861 unsigned Index) const { 862 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 863 assert(Cost >= 0 && "TTI should not produce negative costs!"); 864 return Cost; 865 } 866 867 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 868 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 869 TTI::TargetCostKind CostKind) { 870 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 871 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 872 assert(Cost >= 0 && "TTI should not produce negative costs!"); 873 return Cost; 874 } 875 876 InstructionCost TargetTransformInfo::getMemoryOpCost( 877 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 878 TTI::TargetCostKind CostKind, const Instruction *I) const { 879 assert((I == nullptr || I->getOpcode() == Opcode) && 880 "Opcode should reflect passed instruction."); 881 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 882 AddressSpace, CostKind, I); 883 assert(Cost >= 0 && "TTI should not produce negative costs!"); 884 return Cost; 885 } 886 887 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 888 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 889 TTI::TargetCostKind CostKind) const { 890 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 891 AddressSpace, CostKind); 892 assert(Cost >= 0 && "TTI should not produce negative costs!"); 893 return Cost; 894 } 895 896 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 897 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 898 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 899 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 900 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 901 assert(Cost >= 0 && "TTI should not produce negative costs!"); 902 return Cost; 903 } 904 905 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 906 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 907 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 908 bool UseMaskForCond, bool UseMaskForGaps) const { 909 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 910 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 911 UseMaskForCond, UseMaskForGaps); 912 assert(Cost >= 0 && "TTI should not produce negative costs!"); 913 return Cost; 914 } 915 916 InstructionCost 917 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 918 TTI::TargetCostKind CostKind) const { 919 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 920 assert(Cost >= 0 && "TTI should not produce negative costs!"); 921 return Cost; 922 } 923 924 InstructionCost 925 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 926 ArrayRef<Type *> Tys, 927 TTI::TargetCostKind CostKind) const { 928 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 929 assert(Cost >= 0 && "TTI should not produce negative costs!"); 930 return Cost; 931 } 932 933 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 934 return TTIImpl->getNumberOfParts(Tp); 935 } 936 937 InstructionCost 938 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 939 const SCEV *Ptr) const { 940 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 941 assert(Cost >= 0 && "TTI should not produce negative costs!"); 942 return Cost; 943 } 944 945 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 946 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 947 assert(Cost >= 0 && "TTI should not produce negative costs!"); 948 return Cost; 949 } 950 951 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 952 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 953 TTI::TargetCostKind CostKind) const { 954 InstructionCost Cost = 955 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 956 assert(Cost >= 0 && "TTI should not produce negative costs!"); 957 return Cost; 958 } 959 960 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 961 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 962 TTI::TargetCostKind CostKind) const { 963 InstructionCost Cost = 964 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 965 assert(Cost >= 0 && "TTI should not produce negative costs!"); 966 return Cost; 967 } 968 969 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 970 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 971 TTI::TargetCostKind CostKind) const { 972 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 973 CostKind); 974 } 975 976 InstructionCost 977 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 978 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 979 } 980 981 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 982 MemIntrinsicInfo &Info) const { 983 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 984 } 985 986 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 987 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 988 } 989 990 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 991 IntrinsicInst *Inst, Type *ExpectedType) const { 992 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 993 } 994 995 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 996 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 997 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign, 998 Optional<uint32_t> AtomicElementSize) const { 999 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 1000 DestAddrSpace, SrcAlign, DestAlign, 1001 AtomicElementSize); 1002 } 1003 1004 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 1005 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 1006 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 1007 unsigned SrcAlign, unsigned DestAlign, 1008 Optional<uint32_t> AtomicCpySize) const { 1009 TTIImpl->getMemcpyLoopResidualLoweringType( 1010 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign, 1011 DestAlign, AtomicCpySize); 1012 } 1013 1014 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 1015 const Function *Callee) const { 1016 return TTIImpl->areInlineCompatible(Caller, Callee); 1017 } 1018 1019 bool TargetTransformInfo::areTypesABICompatible( 1020 const Function *Caller, const Function *Callee, 1021 const ArrayRef<Type *> &Types) const { 1022 return TTIImpl->areTypesABICompatible(Caller, Callee, Types); 1023 } 1024 1025 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 1026 Type *Ty) const { 1027 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 1028 } 1029 1030 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 1031 Type *Ty) const { 1032 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 1033 } 1034 1035 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1036 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1037 } 1038 1039 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1040 return TTIImpl->isLegalToVectorizeLoad(LI); 1041 } 1042 1043 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1044 return TTIImpl->isLegalToVectorizeStore(SI); 1045 } 1046 1047 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1048 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1049 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1050 AddrSpace); 1051 } 1052 1053 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1054 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1055 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1056 AddrSpace); 1057 } 1058 1059 bool TargetTransformInfo::isLegalToVectorizeReduction( 1060 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1061 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1062 } 1063 1064 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1065 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1066 } 1067 1068 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1069 unsigned LoadSize, 1070 unsigned ChainSizeInBytes, 1071 VectorType *VecTy) const { 1072 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1073 } 1074 1075 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1076 unsigned StoreSize, 1077 unsigned ChainSizeInBytes, 1078 VectorType *VecTy) const { 1079 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1080 } 1081 1082 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1083 ReductionFlags Flags) const { 1084 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1085 } 1086 1087 bool TargetTransformInfo::preferPredicatedReductionSelect( 1088 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1089 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1090 } 1091 1092 TargetTransformInfo::VPLegalization 1093 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1094 return TTIImpl->getVPLegalizationStrategy(VPI); 1095 } 1096 1097 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1098 return TTIImpl->shouldExpandReduction(II); 1099 } 1100 1101 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1102 return TTIImpl->getGISelRematGlobalCost(); 1103 } 1104 1105 bool TargetTransformInfo::supportsScalableVectors() const { 1106 return TTIImpl->supportsScalableVectors(); 1107 } 1108 1109 bool TargetTransformInfo::enableScalableVectorization() const { 1110 return TTIImpl->enableScalableVectorization(); 1111 } 1112 1113 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType, 1114 Align Alignment) const { 1115 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment); 1116 } 1117 1118 InstructionCost 1119 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1120 return TTIImpl->getInstructionLatency(I); 1121 } 1122 1123 InstructionCost 1124 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1125 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1126 1127 switch (I->getOpcode()) { 1128 case Instruction::GetElementPtr: 1129 case Instruction::Ret: 1130 case Instruction::PHI: 1131 case Instruction::Br: 1132 case Instruction::Add: 1133 case Instruction::FAdd: 1134 case Instruction::Sub: 1135 case Instruction::FSub: 1136 case Instruction::Mul: 1137 case Instruction::FMul: 1138 case Instruction::UDiv: 1139 case Instruction::SDiv: 1140 case Instruction::FDiv: 1141 case Instruction::URem: 1142 case Instruction::SRem: 1143 case Instruction::FRem: 1144 case Instruction::Shl: 1145 case Instruction::LShr: 1146 case Instruction::AShr: 1147 case Instruction::And: 1148 case Instruction::Or: 1149 case Instruction::Xor: 1150 case Instruction::FNeg: 1151 case Instruction::Select: 1152 case Instruction::ICmp: 1153 case Instruction::FCmp: 1154 case Instruction::Store: 1155 case Instruction::Load: 1156 case Instruction::ZExt: 1157 case Instruction::SExt: 1158 case Instruction::FPToUI: 1159 case Instruction::FPToSI: 1160 case Instruction::FPExt: 1161 case Instruction::PtrToInt: 1162 case Instruction::IntToPtr: 1163 case Instruction::SIToFP: 1164 case Instruction::UIToFP: 1165 case Instruction::Trunc: 1166 case Instruction::FPTrunc: 1167 case Instruction::BitCast: 1168 case Instruction::AddrSpaceCast: 1169 case Instruction::ExtractElement: 1170 case Instruction::InsertElement: 1171 case Instruction::ExtractValue: 1172 case Instruction::ShuffleVector: 1173 case Instruction::Call: 1174 case Instruction::Switch: 1175 return getUserCost(I, CostKind); 1176 default: 1177 // We don't have any information on this instruction. 1178 return -1; 1179 } 1180 } 1181 1182 TargetTransformInfo::Concept::~Concept() = default; 1183 1184 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1185 1186 TargetIRAnalysis::TargetIRAnalysis( 1187 std::function<Result(const Function &)> TTICallback) 1188 : TTICallback(std::move(TTICallback)) {} 1189 1190 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1191 FunctionAnalysisManager &) { 1192 return TTICallback(F); 1193 } 1194 1195 AnalysisKey TargetIRAnalysis::Key; 1196 1197 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1198 return Result(F.getParent()->getDataLayout()); 1199 } 1200 1201 // Register the basic pass. 1202 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1203 "Target Transform Information", false, true) 1204 char TargetTransformInfoWrapperPass::ID = 0; 1205 1206 void TargetTransformInfoWrapperPass::anchor() {} 1207 1208 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1209 : ImmutablePass(ID) { 1210 initializeTargetTransformInfoWrapperPassPass( 1211 *PassRegistry::getPassRegistry()); 1212 } 1213 1214 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1215 TargetIRAnalysis TIRA) 1216 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1217 initializeTargetTransformInfoWrapperPassPass( 1218 *PassRegistry::getPassRegistry()); 1219 } 1220 1221 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1222 FunctionAnalysisManager DummyFAM; 1223 TTI = TIRA.run(F, DummyFAM); 1224 return *TTI; 1225 } 1226 1227 ImmutablePass * 1228 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1229 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1230 } 1231