1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/DataLayout.h" 15 #include "llvm/IR/Dominators.h" 16 #include "llvm/IR/Instruction.h" 17 #include "llvm/IR/Instructions.h" 18 #include "llvm/IR/IntrinsicInst.h" 19 #include "llvm/IR/Module.h" 20 #include "llvm/IR/Operator.h" 21 #include "llvm/IR/PatternMatch.h" 22 #include "llvm/InitializePasses.h" 23 #include "llvm/Support/CommandLine.h" 24 #include "llvm/Support/ErrorHandling.h" 25 #include <utility> 26 27 using namespace llvm; 28 using namespace PatternMatch; 29 30 #define DEBUG_TYPE "tti" 31 32 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 33 cl::Hidden, 34 cl::desc("Recognize reduction patterns.")); 35 36 namespace { 37 /// No-op implementation of the TTI interface using the utility base 38 /// classes. 39 /// 40 /// This is used when no target specific information is available. 41 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 42 explicit NoTTIImpl(const DataLayout &DL) 43 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 44 }; 45 } // namespace 46 47 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 48 // If the loop has irreducible control flow, it can not be converted to 49 // Hardware loop. 50 LoopBlocksRPO RPOT(L); 51 RPOT.perform(&LI); 52 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 53 return false; 54 return true; 55 } 56 57 IntrinsicCostAttributes::IntrinsicCostAttributes( 58 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 59 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 60 ScalarizationCost(ScalarizationCost) { 61 62 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 63 FMF = FPMO->getFastMathFlags(); 64 65 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 66 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 67 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 68 } 69 70 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 71 ArrayRef<Type *> Tys, 72 FastMathFlags Flags, 73 const IntrinsicInst *I, 74 InstructionCost ScalarCost) 75 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 76 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 77 } 78 79 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 80 ArrayRef<const Value *> Args) 81 : RetTy(Ty), IID(Id) { 82 83 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 84 ParamTys.reserve(Arguments.size()); 85 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 86 ParamTys.push_back(Arguments[Idx]->getType()); 87 } 88 89 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 90 ArrayRef<const Value *> Args, 91 ArrayRef<Type *> Tys, 92 FastMathFlags Flags, 93 const IntrinsicInst *I, 94 InstructionCost ScalarCost) 95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 96 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 97 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 98 } 99 100 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 101 LoopInfo &LI, DominatorTree &DT, 102 bool ForceNestedLoop, 103 bool ForceHardwareLoopPHI) { 104 SmallVector<BasicBlock *, 4> ExitingBlocks; 105 L->getExitingBlocks(ExitingBlocks); 106 107 for (BasicBlock *BB : ExitingBlocks) { 108 // If we pass the updated counter back through a phi, we need to know 109 // which latch the updated value will be coming from. 110 if (!L->isLoopLatch(BB)) { 111 if (ForceHardwareLoopPHI || CounterInReg) 112 continue; 113 } 114 115 const SCEV *EC = SE.getExitCount(L, BB); 116 if (isa<SCEVCouldNotCompute>(EC)) 117 continue; 118 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 119 if (ConstEC->getValue()->isZero()) 120 continue; 121 } else if (!SE.isLoopInvariant(EC, L)) 122 continue; 123 124 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 125 continue; 126 127 // If this exiting block is contained in a nested loop, it is not eligible 128 // for insertion of the branch-and-decrement since the inner loop would 129 // end up messing up the value in the CTR. 130 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 131 continue; 132 133 // We now have a loop-invariant count of loop iterations (which is not the 134 // constant zero) for which we know that this loop will not exit via this 135 // existing block. 136 137 // We need to make sure that this block will run on every loop iteration. 138 // For this to be true, we must dominate all blocks with backedges. Such 139 // blocks are in-loop predecessors to the header block. 140 bool NotAlways = false; 141 for (BasicBlock *Pred : predecessors(L->getHeader())) { 142 if (!L->contains(Pred)) 143 continue; 144 145 if (!DT.dominates(BB, Pred)) { 146 NotAlways = true; 147 break; 148 } 149 } 150 151 if (NotAlways) 152 continue; 153 154 // Make sure this blocks ends with a conditional branch. 155 Instruction *TI = BB->getTerminator(); 156 if (!TI) 157 continue; 158 159 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 160 if (!BI->isConditional()) 161 continue; 162 163 ExitBranch = BI; 164 } else 165 continue; 166 167 // Note that this block may not be the loop latch block, even if the loop 168 // has a latch block. 169 ExitBlock = BB; 170 TripCount = SE.getAddExpr(EC, SE.getOne(EC->getType())); 171 172 if (!EC->getType()->isPointerTy() && EC->getType() != CountType) 173 TripCount = SE.getZeroExtendExpr(TripCount, CountType); 174 175 break; 176 } 177 178 if (!ExitBlock) 179 return false; 180 return true; 181 } 182 183 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 184 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 185 186 TargetTransformInfo::~TargetTransformInfo() {} 187 188 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 189 : TTIImpl(std::move(Arg.TTIImpl)) {} 190 191 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 192 TTIImpl = std::move(RHS.TTIImpl); 193 return *this; 194 } 195 196 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 197 return TTIImpl->getInliningThresholdMultiplier(); 198 } 199 200 unsigned 201 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 202 return TTIImpl->adjustInliningThreshold(CB); 203 } 204 205 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 206 return TTIImpl->getInlinerVectorBonusPercent(); 207 } 208 209 InstructionCost 210 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 211 ArrayRef<const Value *> Operands, 212 TTI::TargetCostKind CostKind) const { 213 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 214 } 215 216 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 217 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 218 BlockFrequencyInfo *BFI) const { 219 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 220 } 221 222 InstructionCost 223 TargetTransformInfo::getUserCost(const User *U, 224 ArrayRef<const Value *> Operands, 225 enum TargetCostKind CostKind) const { 226 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 227 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 228 "TTI should not produce negative costs!"); 229 return Cost; 230 } 231 232 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 233 return TTIImpl->getPredictableBranchThreshold(); 234 } 235 236 bool TargetTransformInfo::hasBranchDivergence() const { 237 return TTIImpl->hasBranchDivergence(); 238 } 239 240 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 241 return TTIImpl->useGPUDivergenceAnalysis(); 242 } 243 244 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 245 return TTIImpl->isSourceOfDivergence(V); 246 } 247 248 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 249 return TTIImpl->isAlwaysUniform(V); 250 } 251 252 unsigned TargetTransformInfo::getFlatAddressSpace() const { 253 return TTIImpl->getFlatAddressSpace(); 254 } 255 256 bool TargetTransformInfo::collectFlatAddressOperands( 257 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 258 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 259 } 260 261 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 262 unsigned ToAS) const { 263 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 264 } 265 266 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 267 return TTIImpl->getAssumedAddrSpace(V); 268 } 269 270 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 271 IntrinsicInst *II, Value *OldV, Value *NewV) const { 272 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 273 } 274 275 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 276 return TTIImpl->isLoweredToCall(F); 277 } 278 279 bool TargetTransformInfo::isHardwareLoopProfitable( 280 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 281 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 282 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 283 } 284 285 bool TargetTransformInfo::preferPredicateOverEpilogue( 286 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 287 TargetLibraryInfo *TLI, DominatorTree *DT, 288 const LoopAccessInfo *LAI) const { 289 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 290 } 291 292 bool TargetTransformInfo::emitGetActiveLaneMask() const { 293 return TTIImpl->emitGetActiveLaneMask(); 294 } 295 296 Optional<Instruction *> 297 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 298 IntrinsicInst &II) const { 299 return TTIImpl->instCombineIntrinsic(IC, II); 300 } 301 302 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 303 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 304 bool &KnownBitsComputed) const { 305 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 306 KnownBitsComputed); 307 } 308 309 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 310 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 311 APInt &UndefElts2, APInt &UndefElts3, 312 std::function<void(Instruction *, unsigned, APInt, APInt &)> 313 SimplifyAndSetOp) const { 314 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 315 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 316 SimplifyAndSetOp); 317 } 318 319 void TargetTransformInfo::getUnrollingPreferences( 320 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 321 OptimizationRemarkEmitter *ORE) const { 322 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 323 } 324 325 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 326 PeelingPreferences &PP) const { 327 return TTIImpl->getPeelingPreferences(L, SE, PP); 328 } 329 330 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 331 return TTIImpl->isLegalAddImmediate(Imm); 332 } 333 334 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 335 return TTIImpl->isLegalICmpImmediate(Imm); 336 } 337 338 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 339 int64_t BaseOffset, 340 bool HasBaseReg, int64_t Scale, 341 unsigned AddrSpace, 342 Instruction *I) const { 343 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 344 Scale, AddrSpace, I); 345 } 346 347 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const { 348 return TTIImpl->isLSRCostLess(C1, C2); 349 } 350 351 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 352 return TTIImpl->isNumRegsMajorCostOfLSR(); 353 } 354 355 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 356 return TTIImpl->isProfitableLSRChainElement(I); 357 } 358 359 bool TargetTransformInfo::canMacroFuseCmp() const { 360 return TTIImpl->canMacroFuseCmp(); 361 } 362 363 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 364 ScalarEvolution *SE, LoopInfo *LI, 365 DominatorTree *DT, AssumptionCache *AC, 366 TargetLibraryInfo *LibInfo) const { 367 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 368 } 369 370 TTI::AddressingModeKind 371 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 372 ScalarEvolution *SE) const { 373 return TTIImpl->getPreferredAddressingMode(L, SE); 374 } 375 376 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 377 Align Alignment) const { 378 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 379 } 380 381 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 382 Align Alignment) const { 383 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 384 } 385 386 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 387 Align Alignment) const { 388 return TTIImpl->isLegalNTStore(DataType, Alignment); 389 } 390 391 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 392 return TTIImpl->isLegalNTLoad(DataType, Alignment); 393 } 394 395 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 396 Align Alignment) const { 397 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 398 } 399 400 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 401 Align Alignment) const { 402 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 403 } 404 405 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 406 return TTIImpl->isLegalMaskedCompressStore(DataType); 407 } 408 409 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 410 return TTIImpl->isLegalMaskedExpandLoad(DataType); 411 } 412 413 bool TargetTransformInfo::enableOrderedReductions() const { 414 return TTIImpl->enableOrderedReductions(); 415 } 416 417 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 418 return TTIImpl->hasDivRemOp(DataType, IsSigned); 419 } 420 421 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 422 unsigned AddrSpace) const { 423 return TTIImpl->hasVolatileVariant(I, AddrSpace); 424 } 425 426 bool TargetTransformInfo::prefersVectorizedAddressing() const { 427 return TTIImpl->prefersVectorizedAddressing(); 428 } 429 430 InstructionCost TargetTransformInfo::getScalingFactorCost( 431 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 432 int64_t Scale, unsigned AddrSpace) const { 433 InstructionCost Cost = TTIImpl->getScalingFactorCost( 434 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 435 assert(Cost >= 0 && "TTI should not produce negative costs!"); 436 return Cost; 437 } 438 439 bool TargetTransformInfo::LSRWithInstrQueries() const { 440 return TTIImpl->LSRWithInstrQueries(); 441 } 442 443 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 444 return TTIImpl->isTruncateFree(Ty1, Ty2); 445 } 446 447 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 448 return TTIImpl->isProfitableToHoist(I); 449 } 450 451 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 452 453 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 454 return TTIImpl->isTypeLegal(Ty); 455 } 456 457 InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const { 458 return TTIImpl->getRegUsageForType(Ty); 459 } 460 461 bool TargetTransformInfo::shouldBuildLookupTables() const { 462 return TTIImpl->shouldBuildLookupTables(); 463 } 464 465 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 466 Constant *C) const { 467 return TTIImpl->shouldBuildLookupTablesForConstant(C); 468 } 469 470 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 471 return TTIImpl->shouldBuildRelLookupTables(); 472 } 473 474 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 475 return TTIImpl->useColdCCForColdCall(F); 476 } 477 478 InstructionCost 479 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 480 const APInt &DemandedElts, 481 bool Insert, bool Extract) const { 482 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 483 } 484 485 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 486 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 487 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 488 } 489 490 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 491 return TTIImpl->supportsEfficientVectorElementLoadStore(); 492 } 493 494 bool TargetTransformInfo::enableAggressiveInterleaving( 495 bool LoopHasReductions) const { 496 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 497 } 498 499 TargetTransformInfo::MemCmpExpansionOptions 500 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 501 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 502 } 503 504 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 505 return TTIImpl->enableInterleavedAccessVectorization(); 506 } 507 508 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 509 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 510 } 511 512 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 513 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 514 } 515 516 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 517 unsigned BitWidth, 518 unsigned AddressSpace, 519 Align Alignment, 520 bool *Fast) const { 521 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 522 AddressSpace, Alignment, Fast); 523 } 524 525 TargetTransformInfo::PopcntSupportKind 526 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 527 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 528 } 529 530 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 531 return TTIImpl->haveFastSqrt(Ty); 532 } 533 534 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 535 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 536 } 537 538 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 539 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 540 assert(Cost >= 0 && "TTI should not produce negative costs!"); 541 return Cost; 542 } 543 544 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 545 unsigned Idx, 546 const APInt &Imm, 547 Type *Ty) const { 548 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 549 assert(Cost >= 0 && "TTI should not produce negative costs!"); 550 return Cost; 551 } 552 553 InstructionCost 554 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 555 TTI::TargetCostKind CostKind) const { 556 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 557 assert(Cost >= 0 && "TTI should not produce negative costs!"); 558 return Cost; 559 } 560 561 InstructionCost TargetTransformInfo::getIntImmCostInst( 562 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 563 TTI::TargetCostKind CostKind, Instruction *Inst) const { 564 InstructionCost Cost = 565 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 566 assert(Cost >= 0 && "TTI should not produce negative costs!"); 567 return Cost; 568 } 569 570 InstructionCost 571 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 572 const APInt &Imm, Type *Ty, 573 TTI::TargetCostKind CostKind) const { 574 InstructionCost Cost = 575 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 576 assert(Cost >= 0 && "TTI should not produce negative costs!"); 577 return Cost; 578 } 579 580 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 581 return TTIImpl->getNumberOfRegisters(ClassID); 582 } 583 584 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 585 Type *Ty) const { 586 return TTIImpl->getRegisterClassForType(Vector, Ty); 587 } 588 589 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 590 return TTIImpl->getRegisterClassName(ClassID); 591 } 592 593 TypeSize TargetTransformInfo::getRegisterBitWidth( 594 TargetTransformInfo::RegisterKind K) const { 595 return TTIImpl->getRegisterBitWidth(K); 596 } 597 598 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 599 return TTIImpl->getMinVectorRegisterBitWidth(); 600 } 601 602 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 603 return TTIImpl->getMaxVScale(); 604 } 605 606 bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const { 607 return TTIImpl->shouldMaximizeVectorBandwidth(); 608 } 609 610 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 611 bool IsScalable) const { 612 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 613 } 614 615 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 616 unsigned Opcode) const { 617 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 618 } 619 620 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 621 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 622 return TTIImpl->shouldConsiderAddressTypePromotion( 623 I, AllowPromotionWithoutCommonHeader); 624 } 625 626 unsigned TargetTransformInfo::getCacheLineSize() const { 627 return TTIImpl->getCacheLineSize(); 628 } 629 630 llvm::Optional<unsigned> 631 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 632 return TTIImpl->getCacheSize(Level); 633 } 634 635 llvm::Optional<unsigned> 636 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 637 return TTIImpl->getCacheAssociativity(Level); 638 } 639 640 unsigned TargetTransformInfo::getPrefetchDistance() const { 641 return TTIImpl->getPrefetchDistance(); 642 } 643 644 unsigned TargetTransformInfo::getMinPrefetchStride( 645 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 646 unsigned NumPrefetches, bool HasCall) const { 647 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 648 NumPrefetches, HasCall); 649 } 650 651 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 652 return TTIImpl->getMaxPrefetchIterationsAhead(); 653 } 654 655 bool TargetTransformInfo::enableWritePrefetching() const { 656 return TTIImpl->enableWritePrefetching(); 657 } 658 659 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 660 return TTIImpl->getMaxInterleaveFactor(VF); 661 } 662 663 TargetTransformInfo::OperandValueKind 664 TargetTransformInfo::getOperandInfo(const Value *V, 665 OperandValueProperties &OpProps) { 666 OperandValueKind OpInfo = OK_AnyValue; 667 OpProps = OP_None; 668 669 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 670 if (CI->getValue().isPowerOf2()) 671 OpProps = OP_PowerOf2; 672 return OK_UniformConstantValue; 673 } 674 675 // A broadcast shuffle creates a uniform value. 676 // TODO: Add support for non-zero index broadcasts. 677 // TODO: Add support for different source vector width. 678 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 679 if (ShuffleInst->isZeroEltSplat()) 680 OpInfo = OK_UniformValue; 681 682 const Value *Splat = getSplatValue(V); 683 684 // Check for a splat of a constant or for a non uniform vector of constants 685 // and check if the constant(s) are all powers of two. 686 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 687 OpInfo = OK_NonUniformConstantValue; 688 if (Splat) { 689 OpInfo = OK_UniformConstantValue; 690 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 691 if (CI->getValue().isPowerOf2()) 692 OpProps = OP_PowerOf2; 693 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 694 OpProps = OP_PowerOf2; 695 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 696 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 697 if (CI->getValue().isPowerOf2()) 698 continue; 699 OpProps = OP_None; 700 break; 701 } 702 } 703 } 704 705 // Check for a splat of a uniform value. This is not loop aware, so return 706 // true only for the obviously uniform cases (argument, globalvalue) 707 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 708 OpInfo = OK_UniformValue; 709 710 return OpInfo; 711 } 712 713 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 714 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 715 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 716 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 717 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 718 InstructionCost Cost = 719 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 720 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 721 assert(Cost >= 0 && "TTI should not produce negative costs!"); 722 return Cost; 723 } 724 725 InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind, 726 VectorType *Ty, 727 ArrayRef<int> Mask, 728 int Index, 729 VectorType *SubTp) const { 730 InstructionCost Cost = TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp); 731 assert(Cost >= 0 && "TTI should not produce negative costs!"); 732 return Cost; 733 } 734 735 TTI::CastContextHint 736 TargetTransformInfo::getCastContextHint(const Instruction *I) { 737 if (!I) 738 return CastContextHint::None; 739 740 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 741 unsigned GatScatOp) { 742 const Instruction *I = dyn_cast<Instruction>(V); 743 if (!I) 744 return CastContextHint::None; 745 746 if (I->getOpcode() == LdStOp) 747 return CastContextHint::Normal; 748 749 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 750 if (II->getIntrinsicID() == MaskedOp) 751 return TTI::CastContextHint::Masked; 752 if (II->getIntrinsicID() == GatScatOp) 753 return TTI::CastContextHint::GatherScatter; 754 } 755 756 return TTI::CastContextHint::None; 757 }; 758 759 switch (I->getOpcode()) { 760 case Instruction::ZExt: 761 case Instruction::SExt: 762 case Instruction::FPExt: 763 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 764 Intrinsic::masked_load, Intrinsic::masked_gather); 765 case Instruction::Trunc: 766 case Instruction::FPTrunc: 767 if (I->hasOneUse()) 768 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 769 Intrinsic::masked_store, 770 Intrinsic::masked_scatter); 771 break; 772 default: 773 return CastContextHint::None; 774 } 775 776 return TTI::CastContextHint::None; 777 } 778 779 InstructionCost TargetTransformInfo::getCastInstrCost( 780 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 781 TTI::TargetCostKind CostKind, const Instruction *I) const { 782 assert((I == nullptr || I->getOpcode() == Opcode) && 783 "Opcode should reflect passed instruction."); 784 InstructionCost Cost = 785 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 786 assert(Cost >= 0 && "TTI should not produce negative costs!"); 787 return Cost; 788 } 789 790 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 791 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 792 InstructionCost Cost = 793 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 794 assert(Cost >= 0 && "TTI should not produce negative costs!"); 795 return Cost; 796 } 797 798 InstructionCost TargetTransformInfo::getCFInstrCost( 799 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 800 assert((I == nullptr || I->getOpcode() == Opcode) && 801 "Opcode should reflect passed instruction."); 802 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 803 assert(Cost >= 0 && "TTI should not produce negative costs!"); 804 return Cost; 805 } 806 807 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 808 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 809 TTI::TargetCostKind CostKind, const Instruction *I) const { 810 assert((I == nullptr || I->getOpcode() == Opcode) && 811 "Opcode should reflect passed instruction."); 812 InstructionCost Cost = 813 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 814 assert(Cost >= 0 && "TTI should not produce negative costs!"); 815 return Cost; 816 } 817 818 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 819 Type *Val, 820 unsigned Index) const { 821 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 822 assert(Cost >= 0 && "TTI should not produce negative costs!"); 823 return Cost; 824 } 825 826 InstructionCost TargetTransformInfo::getMemoryOpCost( 827 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 828 TTI::TargetCostKind CostKind, const Instruction *I) const { 829 assert((I == nullptr || I->getOpcode() == Opcode) && 830 "Opcode should reflect passed instruction."); 831 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 832 AddressSpace, CostKind, I); 833 assert(Cost >= 0 && "TTI should not produce negative costs!"); 834 return Cost; 835 } 836 837 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 838 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 839 TTI::TargetCostKind CostKind) const { 840 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 841 AddressSpace, CostKind); 842 assert(Cost >= 0 && "TTI should not produce negative costs!"); 843 return Cost; 844 } 845 846 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 847 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 848 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 849 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 850 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 851 assert(Cost >= 0 && "TTI should not produce negative costs!"); 852 return Cost; 853 } 854 855 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 856 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 857 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 858 bool UseMaskForCond, bool UseMaskForGaps) const { 859 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 860 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 861 UseMaskForCond, UseMaskForGaps); 862 assert(Cost >= 0 && "TTI should not produce negative costs!"); 863 return Cost; 864 } 865 866 InstructionCost 867 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 868 TTI::TargetCostKind CostKind) const { 869 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 870 assert(Cost >= 0 && "TTI should not produce negative costs!"); 871 return Cost; 872 } 873 874 InstructionCost 875 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 876 ArrayRef<Type *> Tys, 877 TTI::TargetCostKind CostKind) const { 878 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 879 assert(Cost >= 0 && "TTI should not produce negative costs!"); 880 return Cost; 881 } 882 883 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 884 return TTIImpl->getNumberOfParts(Tp); 885 } 886 887 InstructionCost 888 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 889 const SCEV *Ptr) const { 890 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 891 assert(Cost >= 0 && "TTI should not produce negative costs!"); 892 return Cost; 893 } 894 895 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 896 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 897 assert(Cost >= 0 && "TTI should not produce negative costs!"); 898 return Cost; 899 } 900 901 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 902 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 903 TTI::TargetCostKind CostKind) const { 904 InstructionCost Cost = 905 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 906 assert(Cost >= 0 && "TTI should not produce negative costs!"); 907 return Cost; 908 } 909 910 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 911 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 912 TTI::TargetCostKind CostKind) const { 913 InstructionCost Cost = 914 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 915 assert(Cost >= 0 && "TTI should not produce negative costs!"); 916 return Cost; 917 } 918 919 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 920 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 921 TTI::TargetCostKind CostKind) const { 922 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 923 CostKind); 924 } 925 926 InstructionCost 927 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 928 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 929 } 930 931 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 932 MemIntrinsicInfo &Info) const { 933 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 934 } 935 936 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 937 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 938 } 939 940 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 941 IntrinsicInst *Inst, Type *ExpectedType) const { 942 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 943 } 944 945 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 946 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 947 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const { 948 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 949 DestAddrSpace, SrcAlign, DestAlign); 950 } 951 952 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 953 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 954 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 955 unsigned SrcAlign, unsigned DestAlign) const { 956 TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes, 957 SrcAddrSpace, DestAddrSpace, 958 SrcAlign, DestAlign); 959 } 960 961 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 962 const Function *Callee) const { 963 return TTIImpl->areInlineCompatible(Caller, Callee); 964 } 965 966 bool TargetTransformInfo::areFunctionArgsABICompatible( 967 const Function *Caller, const Function *Callee, 968 SmallPtrSetImpl<Argument *> &Args) const { 969 return TTIImpl->areFunctionArgsABICompatible(Caller, Callee, Args); 970 } 971 972 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 973 Type *Ty) const { 974 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 975 } 976 977 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 978 Type *Ty) const { 979 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 980 } 981 982 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 983 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 984 } 985 986 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 987 return TTIImpl->isLegalToVectorizeLoad(LI); 988 } 989 990 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 991 return TTIImpl->isLegalToVectorizeStore(SI); 992 } 993 994 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 995 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 996 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 997 AddrSpace); 998 } 999 1000 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1001 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1002 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1003 AddrSpace); 1004 } 1005 1006 bool TargetTransformInfo::isLegalToVectorizeReduction( 1007 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1008 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1009 } 1010 1011 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1012 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1013 } 1014 1015 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1016 unsigned LoadSize, 1017 unsigned ChainSizeInBytes, 1018 VectorType *VecTy) const { 1019 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1020 } 1021 1022 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1023 unsigned StoreSize, 1024 unsigned ChainSizeInBytes, 1025 VectorType *VecTy) const { 1026 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1027 } 1028 1029 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1030 ReductionFlags Flags) const { 1031 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1032 } 1033 1034 bool TargetTransformInfo::preferPredicatedReductionSelect( 1035 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1036 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1037 } 1038 1039 TargetTransformInfo::VPLegalization 1040 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1041 return TTIImpl->getVPLegalizationStrategy(VPI); 1042 } 1043 1044 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1045 return TTIImpl->shouldExpandReduction(II); 1046 } 1047 1048 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1049 return TTIImpl->getGISelRematGlobalCost(); 1050 } 1051 1052 bool TargetTransformInfo::supportsScalableVectors() const { 1053 return TTIImpl->supportsScalableVectors(); 1054 } 1055 1056 bool TargetTransformInfo::hasActiveVectorLength() const { 1057 return TTIImpl->hasActiveVectorLength(); 1058 } 1059 1060 InstructionCost 1061 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1062 return TTIImpl->getInstructionLatency(I); 1063 } 1064 1065 InstructionCost 1066 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1067 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1068 1069 switch (I->getOpcode()) { 1070 case Instruction::GetElementPtr: 1071 case Instruction::Ret: 1072 case Instruction::PHI: 1073 case Instruction::Br: 1074 case Instruction::Add: 1075 case Instruction::FAdd: 1076 case Instruction::Sub: 1077 case Instruction::FSub: 1078 case Instruction::Mul: 1079 case Instruction::FMul: 1080 case Instruction::UDiv: 1081 case Instruction::SDiv: 1082 case Instruction::FDiv: 1083 case Instruction::URem: 1084 case Instruction::SRem: 1085 case Instruction::FRem: 1086 case Instruction::Shl: 1087 case Instruction::LShr: 1088 case Instruction::AShr: 1089 case Instruction::And: 1090 case Instruction::Or: 1091 case Instruction::Xor: 1092 case Instruction::FNeg: 1093 case Instruction::Select: 1094 case Instruction::ICmp: 1095 case Instruction::FCmp: 1096 case Instruction::Store: 1097 case Instruction::Load: 1098 case Instruction::ZExt: 1099 case Instruction::SExt: 1100 case Instruction::FPToUI: 1101 case Instruction::FPToSI: 1102 case Instruction::FPExt: 1103 case Instruction::PtrToInt: 1104 case Instruction::IntToPtr: 1105 case Instruction::SIToFP: 1106 case Instruction::UIToFP: 1107 case Instruction::Trunc: 1108 case Instruction::FPTrunc: 1109 case Instruction::BitCast: 1110 case Instruction::AddrSpaceCast: 1111 case Instruction::ExtractElement: 1112 case Instruction::InsertElement: 1113 case Instruction::ExtractValue: 1114 case Instruction::ShuffleVector: 1115 case Instruction::Call: 1116 case Instruction::Switch: 1117 return getUserCost(I, CostKind); 1118 default: 1119 // We don't have any information on this instruction. 1120 return -1; 1121 } 1122 } 1123 1124 TargetTransformInfo::Concept::~Concept() {} 1125 1126 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1127 1128 TargetIRAnalysis::TargetIRAnalysis( 1129 std::function<Result(const Function &)> TTICallback) 1130 : TTICallback(std::move(TTICallback)) {} 1131 1132 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1133 FunctionAnalysisManager &) { 1134 return TTICallback(F); 1135 } 1136 1137 AnalysisKey TargetIRAnalysis::Key; 1138 1139 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1140 return Result(F.getParent()->getDataLayout()); 1141 } 1142 1143 // Register the basic pass. 1144 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1145 "Target Transform Information", false, true) 1146 char TargetTransformInfoWrapperPass::ID = 0; 1147 1148 void TargetTransformInfoWrapperPass::anchor() {} 1149 1150 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1151 : ImmutablePass(ID) { 1152 initializeTargetTransformInfoWrapperPassPass( 1153 *PassRegistry::getPassRegistry()); 1154 } 1155 1156 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1157 TargetIRAnalysis TIRA) 1158 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1159 initializeTargetTransformInfoWrapperPassPass( 1160 *PassRegistry::getPassRegistry()); 1161 } 1162 1163 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1164 FunctionAnalysisManager DummyFAM; 1165 TTI = TIRA.run(F, DummyFAM); 1166 return *TTI; 1167 } 1168 1169 ImmutablePass * 1170 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1171 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1172 } 1173