1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/Analysis/TargetTransformInfo.h"
11 #include "llvm/Analysis/TargetTransformInfoImpl.h"
12 #include "llvm/IR/CallSite.h"
13 #include "llvm/IR/DataLayout.h"
14 #include "llvm/IR/Instruction.h"
15 #include "llvm/IR/Instructions.h"
16 #include "llvm/IR/IntrinsicInst.h"
17 #include "llvm/IR/Module.h"
18 #include "llvm/IR/Operator.h"
19 #include "llvm/IR/PatternMatch.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include <utility>
23 
24 using namespace llvm;
25 using namespace PatternMatch;
26 
27 #define DEBUG_TYPE "tti"
28 
29 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
30                                      cl::Hidden,
31                                      cl::desc("Recognize reduction patterns."));
32 
33 namespace {
34 /// \brief No-op implementation of the TTI interface using the utility base
35 /// classes.
36 ///
37 /// This is used when no target specific information is available.
38 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
39   explicit NoTTIImpl(const DataLayout &DL)
40       : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
41 };
42 }
43 
44 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
45     : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
46 
47 TargetTransformInfo::~TargetTransformInfo() {}
48 
49 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
50     : TTIImpl(std::move(Arg.TTIImpl)) {}
51 
52 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
53   TTIImpl = std::move(RHS.TTIImpl);
54   return *this;
55 }
56 
57 int TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty,
58                                           Type *OpTy) const {
59   int Cost = TTIImpl->getOperationCost(Opcode, Ty, OpTy);
60   assert(Cost >= 0 && "TTI should not produce negative costs!");
61   return Cost;
62 }
63 
64 int TargetTransformInfo::getCallCost(FunctionType *FTy, int NumArgs) const {
65   int Cost = TTIImpl->getCallCost(FTy, NumArgs);
66   assert(Cost >= 0 && "TTI should not produce negative costs!");
67   return Cost;
68 }
69 
70 int TargetTransformInfo::getCallCost(const Function *F,
71                                      ArrayRef<const Value *> Arguments) const {
72   int Cost = TTIImpl->getCallCost(F, Arguments);
73   assert(Cost >= 0 && "TTI should not produce negative costs!");
74   return Cost;
75 }
76 
77 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
78   return TTIImpl->getInliningThresholdMultiplier();
79 }
80 
81 int TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr,
82                                     ArrayRef<const Value *> Operands) const {
83   return TTIImpl->getGEPCost(PointeeType, Ptr, Operands);
84 }
85 
86 int TargetTransformInfo::getExtCost(const Instruction *I,
87                                     const Value *Src) const {
88   return TTIImpl->getExtCost(I, Src);
89 }
90 
91 int TargetTransformInfo::getIntrinsicCost(
92     Intrinsic::ID IID, Type *RetTy, ArrayRef<const Value *> Arguments) const {
93   int Cost = TTIImpl->getIntrinsicCost(IID, RetTy, Arguments);
94   assert(Cost >= 0 && "TTI should not produce negative costs!");
95   return Cost;
96 }
97 
98 unsigned
99 TargetTransformInfo::getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
100                                                       unsigned &JTSize) const {
101   return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize);
102 }
103 
104 int TargetTransformInfo::getUserCost(const User *U,
105     ArrayRef<const Value *> Operands) const {
106   int Cost = TTIImpl->getUserCost(U, Operands);
107   assert(Cost >= 0 && "TTI should not produce negative costs!");
108   return Cost;
109 }
110 
111 bool TargetTransformInfo::hasBranchDivergence() const {
112   return TTIImpl->hasBranchDivergence();
113 }
114 
115 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
116   return TTIImpl->isSourceOfDivergence(V);
117 }
118 
119 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
120   return TTIImpl->isAlwaysUniform(V);
121 }
122 
123 unsigned TargetTransformInfo::getFlatAddressSpace() const {
124   return TTIImpl->getFlatAddressSpace();
125 }
126 
127 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
128   return TTIImpl->isLoweredToCall(F);
129 }
130 
131 void TargetTransformInfo::getUnrollingPreferences(
132     Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP) const {
133   return TTIImpl->getUnrollingPreferences(L, SE, UP);
134 }
135 
136 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
137   return TTIImpl->isLegalAddImmediate(Imm);
138 }
139 
140 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
141   return TTIImpl->isLegalICmpImmediate(Imm);
142 }
143 
144 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
145                                                 int64_t BaseOffset,
146                                                 bool HasBaseReg,
147                                                 int64_t Scale,
148                                                 unsigned AddrSpace,
149                                                 Instruction *I) const {
150   return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
151                                         Scale, AddrSpace, I);
152 }
153 
154 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const {
155   return TTIImpl->isLSRCostLess(C1, C2);
156 }
157 
158 bool TargetTransformInfo::canMacroFuseCmp() const {
159   return TTIImpl->canMacroFuseCmp();
160 }
161 
162 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType) const {
163   return TTIImpl->isLegalMaskedStore(DataType);
164 }
165 
166 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType) const {
167   return TTIImpl->isLegalMaskedLoad(DataType);
168 }
169 
170 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType) const {
171   return TTIImpl->isLegalMaskedGather(DataType);
172 }
173 
174 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType) const {
175   return TTIImpl->isLegalMaskedScatter(DataType);
176 }
177 
178 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
179   return TTIImpl->hasDivRemOp(DataType, IsSigned);
180 }
181 
182 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
183                                              unsigned AddrSpace) const {
184   return TTIImpl->hasVolatileVariant(I, AddrSpace);
185 }
186 
187 bool TargetTransformInfo::prefersVectorizedAddressing() const {
188   return TTIImpl->prefersVectorizedAddressing();
189 }
190 
191 int TargetTransformInfo::getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
192                                               int64_t BaseOffset,
193                                               bool HasBaseReg,
194                                               int64_t Scale,
195                                               unsigned AddrSpace) const {
196   int Cost = TTIImpl->getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
197                                            Scale, AddrSpace);
198   assert(Cost >= 0 && "TTI should not produce negative costs!");
199   return Cost;
200 }
201 
202 bool TargetTransformInfo::LSRWithInstrQueries() const {
203   return TTIImpl->LSRWithInstrQueries();
204 }
205 
206 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
207   return TTIImpl->isTruncateFree(Ty1, Ty2);
208 }
209 
210 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
211   return TTIImpl->isProfitableToHoist(I);
212 }
213 
214 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
215   return TTIImpl->isTypeLegal(Ty);
216 }
217 
218 unsigned TargetTransformInfo::getJumpBufAlignment() const {
219   return TTIImpl->getJumpBufAlignment();
220 }
221 
222 unsigned TargetTransformInfo::getJumpBufSize() const {
223   return TTIImpl->getJumpBufSize();
224 }
225 
226 bool TargetTransformInfo::shouldBuildLookupTables() const {
227   return TTIImpl->shouldBuildLookupTables();
228 }
229 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(Constant *C) const {
230   return TTIImpl->shouldBuildLookupTablesForConstant(C);
231 }
232 
233 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
234   return TTIImpl->useColdCCForColdCall(F);
235 }
236 
237 unsigned TargetTransformInfo::
238 getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const {
239   return TTIImpl->getScalarizationOverhead(Ty, Insert, Extract);
240 }
241 
242 unsigned TargetTransformInfo::
243 getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
244                                  unsigned VF) const {
245   return TTIImpl->getOperandsScalarizationOverhead(Args, VF);
246 }
247 
248 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
249   return TTIImpl->supportsEfficientVectorElementLoadStore();
250 }
251 
252 bool TargetTransformInfo::enableAggressiveInterleaving(bool LoopHasReductions) const {
253   return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
254 }
255 
256 const TargetTransformInfo::MemCmpExpansionOptions *
257 TargetTransformInfo::enableMemCmpExpansion(bool IsZeroCmp) const {
258   return TTIImpl->enableMemCmpExpansion(IsZeroCmp);
259 }
260 
261 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
262   return TTIImpl->enableInterleavedAccessVectorization();
263 }
264 
265 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
266   return TTIImpl->isFPVectorizationPotentiallyUnsafe();
267 }
268 
269 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
270                                                          unsigned BitWidth,
271                                                          unsigned AddressSpace,
272                                                          unsigned Alignment,
273                                                          bool *Fast) const {
274   return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
275                                                  Alignment, Fast);
276 }
277 
278 TargetTransformInfo::PopcntSupportKind
279 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
280   return TTIImpl->getPopcntSupport(IntTyWidthInBit);
281 }
282 
283 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
284   return TTIImpl->haveFastSqrt(Ty);
285 }
286 
287 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
288   return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
289 }
290 
291 int TargetTransformInfo::getFPOpCost(Type *Ty) const {
292   int Cost = TTIImpl->getFPOpCost(Ty);
293   assert(Cost >= 0 && "TTI should not produce negative costs!");
294   return Cost;
295 }
296 
297 int TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx,
298                                                const APInt &Imm,
299                                                Type *Ty) const {
300   int Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
301   assert(Cost >= 0 && "TTI should not produce negative costs!");
302   return Cost;
303 }
304 
305 int TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty) const {
306   int Cost = TTIImpl->getIntImmCost(Imm, Ty);
307   assert(Cost >= 0 && "TTI should not produce negative costs!");
308   return Cost;
309 }
310 
311 int TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx,
312                                        const APInt &Imm, Type *Ty) const {
313   int Cost = TTIImpl->getIntImmCost(Opcode, Idx, Imm, Ty);
314   assert(Cost >= 0 && "TTI should not produce negative costs!");
315   return Cost;
316 }
317 
318 int TargetTransformInfo::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
319                                        const APInt &Imm, Type *Ty) const {
320   int Cost = TTIImpl->getIntImmCost(IID, Idx, Imm, Ty);
321   assert(Cost >= 0 && "TTI should not produce negative costs!");
322   return Cost;
323 }
324 
325 unsigned TargetTransformInfo::getNumberOfRegisters(bool Vector) const {
326   return TTIImpl->getNumberOfRegisters(Vector);
327 }
328 
329 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const {
330   return TTIImpl->getRegisterBitWidth(Vector);
331 }
332 
333 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
334   return TTIImpl->getMinVectorRegisterBitWidth();
335 }
336 
337 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
338     const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
339   return TTIImpl->shouldConsiderAddressTypePromotion(
340       I, AllowPromotionWithoutCommonHeader);
341 }
342 
343 unsigned TargetTransformInfo::getCacheLineSize() const {
344   return TTIImpl->getCacheLineSize();
345 }
346 
347 llvm::Optional<unsigned> TargetTransformInfo::getCacheSize(CacheLevel Level)
348   const {
349   return TTIImpl->getCacheSize(Level);
350 }
351 
352 llvm::Optional<unsigned> TargetTransformInfo::getCacheAssociativity(
353   CacheLevel Level) const {
354   return TTIImpl->getCacheAssociativity(Level);
355 }
356 
357 unsigned TargetTransformInfo::getPrefetchDistance() const {
358   return TTIImpl->getPrefetchDistance();
359 }
360 
361 unsigned TargetTransformInfo::getMinPrefetchStride() const {
362   return TTIImpl->getMinPrefetchStride();
363 }
364 
365 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
366   return TTIImpl->getMaxPrefetchIterationsAhead();
367 }
368 
369 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const {
370   return TTIImpl->getMaxInterleaveFactor(VF);
371 }
372 
373 int TargetTransformInfo::getArithmeticInstrCost(
374     unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
375     OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo,
376     OperandValueProperties Opd2PropInfo,
377     ArrayRef<const Value *> Args) const {
378   int Cost = TTIImpl->getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
379                                              Opd1PropInfo, Opd2PropInfo, Args);
380   assert(Cost >= 0 && "TTI should not produce negative costs!");
381   return Cost;
382 }
383 
384 int TargetTransformInfo::getShuffleCost(ShuffleKind Kind, Type *Ty, int Index,
385                                         Type *SubTp) const {
386   int Cost = TTIImpl->getShuffleCost(Kind, Ty, Index, SubTp);
387   assert(Cost >= 0 && "TTI should not produce negative costs!");
388   return Cost;
389 }
390 
391 int TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst,
392                                  Type *Src, const Instruction *I) const {
393   assert ((I == nullptr || I->getOpcode() == Opcode) &&
394           "Opcode should reflect passed instruction.");
395   int Cost = TTIImpl->getCastInstrCost(Opcode, Dst, Src, I);
396   assert(Cost >= 0 && "TTI should not produce negative costs!");
397   return Cost;
398 }
399 
400 int TargetTransformInfo::getExtractWithExtendCost(unsigned Opcode, Type *Dst,
401                                                   VectorType *VecTy,
402                                                   unsigned Index) const {
403   int Cost = TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
404   assert(Cost >= 0 && "TTI should not produce negative costs!");
405   return Cost;
406 }
407 
408 int TargetTransformInfo::getCFInstrCost(unsigned Opcode) const {
409   int Cost = TTIImpl->getCFInstrCost(Opcode);
410   assert(Cost >= 0 && "TTI should not produce negative costs!");
411   return Cost;
412 }
413 
414 int TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
415                                  Type *CondTy, const Instruction *I) const {
416   assert ((I == nullptr || I->getOpcode() == Opcode) &&
417           "Opcode should reflect passed instruction.");
418   int Cost = TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
419   assert(Cost >= 0 && "TTI should not produce negative costs!");
420   return Cost;
421 }
422 
423 int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val,
424                                             unsigned Index) const {
425   int Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index);
426   assert(Cost >= 0 && "TTI should not produce negative costs!");
427   return Cost;
428 }
429 
430 int TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src,
431                                          unsigned Alignment,
432                                          unsigned AddressSpace,
433                                          const Instruction *I) const {
434   assert ((I == nullptr || I->getOpcode() == Opcode) &&
435           "Opcode should reflect passed instruction.");
436   int Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
437   assert(Cost >= 0 && "TTI should not produce negative costs!");
438   return Cost;
439 }
440 
441 int TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
442                                                unsigned Alignment,
443                                                unsigned AddressSpace) const {
444   int Cost =
445       TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
446   assert(Cost >= 0 && "TTI should not produce negative costs!");
447   return Cost;
448 }
449 
450 int TargetTransformInfo::getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
451                                                 Value *Ptr, bool VariableMask,
452                                                 unsigned Alignment) const {
453   int Cost = TTIImpl->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
454                                              Alignment);
455   assert(Cost >= 0 && "TTI should not produce negative costs!");
456   return Cost;
457 }
458 
459 int TargetTransformInfo::getInterleavedMemoryOpCost(
460     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
461     unsigned Alignment, unsigned AddressSpace) const {
462   int Cost = TTIImpl->getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
463                                                  Alignment, AddressSpace);
464   assert(Cost >= 0 && "TTI should not produce negative costs!");
465   return Cost;
466 }
467 
468 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
469                                     ArrayRef<Type *> Tys, FastMathFlags FMF,
470                                     unsigned ScalarizationCostPassed) const {
471   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
472                                             ScalarizationCostPassed);
473   assert(Cost >= 0 && "TTI should not produce negative costs!");
474   return Cost;
475 }
476 
477 int TargetTransformInfo::getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
478            ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) const {
479   int Cost = TTIImpl->getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
480   assert(Cost >= 0 && "TTI should not produce negative costs!");
481   return Cost;
482 }
483 
484 int TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
485                                           ArrayRef<Type *> Tys) const {
486   int Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys);
487   assert(Cost >= 0 && "TTI should not produce negative costs!");
488   return Cost;
489 }
490 
491 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
492   return TTIImpl->getNumberOfParts(Tp);
493 }
494 
495 int TargetTransformInfo::getAddressComputationCost(Type *Tp,
496                                                    ScalarEvolution *SE,
497                                                    const SCEV *Ptr) const {
498   int Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
499   assert(Cost >= 0 && "TTI should not produce negative costs!");
500   return Cost;
501 }
502 
503 int TargetTransformInfo::getArithmeticReductionCost(unsigned Opcode, Type *Ty,
504                                                     bool IsPairwiseForm) const {
505   int Cost = TTIImpl->getArithmeticReductionCost(Opcode, Ty, IsPairwiseForm);
506   assert(Cost >= 0 && "TTI should not produce negative costs!");
507   return Cost;
508 }
509 
510 int TargetTransformInfo::getMinMaxReductionCost(Type *Ty, Type *CondTy,
511                                                 bool IsPairwiseForm,
512                                                 bool IsUnsigned) const {
513   int Cost =
514       TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsPairwiseForm, IsUnsigned);
515   assert(Cost >= 0 && "TTI should not produce negative costs!");
516   return Cost;
517 }
518 
519 unsigned
520 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
521   return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
522 }
523 
524 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
525                                              MemIntrinsicInfo &Info) const {
526   return TTIImpl->getTgtMemIntrinsic(Inst, Info);
527 }
528 
529 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
530   return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
531 }
532 
533 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
534     IntrinsicInst *Inst, Type *ExpectedType) const {
535   return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
536 }
537 
538 Type *TargetTransformInfo::getMemcpyLoopLoweringType(LLVMContext &Context,
539                                                      Value *Length,
540                                                      unsigned SrcAlign,
541                                                      unsigned DestAlign) const {
542   return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAlign,
543                                             DestAlign);
544 }
545 
546 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
547     SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
548     unsigned RemainingBytes, unsigned SrcAlign, unsigned DestAlign) const {
549   TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
550                                              SrcAlign, DestAlign);
551 }
552 
553 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
554                                               const Function *Callee) const {
555   return TTIImpl->areInlineCompatible(Caller, Callee);
556 }
557 
558 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
559   return TTIImpl->getLoadStoreVecRegBitWidth(AS);
560 }
561 
562 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
563   return TTIImpl->isLegalToVectorizeLoad(LI);
564 }
565 
566 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
567   return TTIImpl->isLegalToVectorizeStore(SI);
568 }
569 
570 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
571     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
572   return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
573                                               AddrSpace);
574 }
575 
576 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
577     unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const {
578   return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
579                                                AddrSpace);
580 }
581 
582 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
583                                                   unsigned LoadSize,
584                                                   unsigned ChainSizeInBytes,
585                                                   VectorType *VecTy) const {
586   return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
587 }
588 
589 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
590                                                    unsigned StoreSize,
591                                                    unsigned ChainSizeInBytes,
592                                                    VectorType *VecTy) const {
593   return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
594 }
595 
596 bool TargetTransformInfo::useReductionIntrinsic(unsigned Opcode,
597                                                 Type *Ty, ReductionFlags Flags) const {
598   return TTIImpl->useReductionIntrinsic(Opcode, Ty, Flags);
599 }
600 
601 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
602   return TTIImpl->shouldExpandReduction(II);
603 }
604 
605 int TargetTransformInfo::getInstructionLatency(const Instruction *I) const {
606   return TTIImpl->getInstructionLatency(I);
607 }
608 
609 static bool isReverseVectorMask(ArrayRef<int> Mask) {
610   for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i)
611     if (Mask[i] >= 0 && Mask[i] != (int)(MaskSize - 1 - i))
612       return false;
613   return true;
614 }
615 
616 static bool isSingleSourceVectorMask(ArrayRef<int> Mask) {
617   bool Vec0 = false;
618   bool Vec1 = false;
619   for (unsigned i = 0, NumVecElts = Mask.size(); i < NumVecElts; ++i) {
620     if (Mask[i] >= 0) {
621       if ((unsigned)Mask[i] >= NumVecElts)
622         Vec1 = true;
623       else
624         Vec0 = true;
625     }
626   }
627   return !(Vec0 && Vec1);
628 }
629 
630 static bool isZeroEltBroadcastVectorMask(ArrayRef<int> Mask) {
631   for (unsigned i = 0; i < Mask.size(); ++i)
632     if (Mask[i] > 0)
633       return false;
634   return true;
635 }
636 
637 static bool isAlternateVectorMask(ArrayRef<int> Mask) {
638   bool isAlternate = true;
639   unsigned MaskSize = Mask.size();
640 
641   // Example: shufflevector A, B, <0,5,2,7>
642   for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
643     if (Mask[i] < 0)
644       continue;
645     isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i);
646   }
647 
648   if (isAlternate)
649     return true;
650 
651   isAlternate = true;
652   // Example: shufflevector A, B, <4,1,6,3>
653   for (unsigned i = 0; i < MaskSize && isAlternate; ++i) {
654     if (Mask[i] < 0)
655       continue;
656     isAlternate = Mask[i] == (int)((i & 1) ? i : MaskSize + i);
657   }
658 
659   return isAlternate;
660 }
661 
662 static TargetTransformInfo::OperandValueKind getOperandInfo(Value *V) {
663   TargetTransformInfo::OperandValueKind OpInfo =
664       TargetTransformInfo::OK_AnyValue;
665 
666   // Check for a splat of a constant or for a non uniform vector of constants.
667   if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
668     OpInfo = TargetTransformInfo::OK_NonUniformConstantValue;
669     if (cast<Constant>(V)->getSplatValue() != nullptr)
670       OpInfo = TargetTransformInfo::OK_UniformConstantValue;
671   }
672 
673   // Check for a splat of a uniform value. This is not loop aware, so return
674   // true only for the obviously uniform cases (argument, globalvalue)
675   const Value *Splat = getSplatValue(V);
676   if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
677     OpInfo = TargetTransformInfo::OK_UniformValue;
678 
679   return OpInfo;
680 }
681 
682 static bool matchPairwiseShuffleMask(ShuffleVectorInst *SI, bool IsLeft,
683                                      unsigned Level) {
684   // We don't need a shuffle if we just want to have element 0 in position 0 of
685   // the vector.
686   if (!SI && Level == 0 && IsLeft)
687     return true;
688   else if (!SI)
689     return false;
690 
691   SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1);
692 
693   // Build a mask of 0, 2, ... (left) or 1, 3, ... (right) depending on whether
694   // we look at the left or right side.
695   for (unsigned i = 0, e = (1 << Level), val = !IsLeft; i != e; ++i, val += 2)
696     Mask[i] = val;
697 
698   SmallVector<int, 16> ActualMask = SI->getShuffleMask();
699   return Mask == ActualMask;
700 }
701 
702 namespace {
703 /// Kind of the reduction data.
704 enum ReductionKind {
705   RK_None,           /// Not a reduction.
706   RK_Arithmetic,     /// Binary reduction data.
707   RK_MinMax,         /// Min/max reduction data.
708   RK_UnsignedMinMax, /// Unsigned min/max reduction data.
709 };
710 /// Contains opcode + LHS/RHS parts of the reduction operations.
711 struct ReductionData {
712   ReductionData() = delete;
713   ReductionData(ReductionKind Kind, unsigned Opcode, Value *LHS, Value *RHS)
714       : Opcode(Opcode), LHS(LHS), RHS(RHS), Kind(Kind) {
715     assert(Kind != RK_None && "expected binary or min/max reduction only.");
716   }
717   unsigned Opcode = 0;
718   Value *LHS = nullptr;
719   Value *RHS = nullptr;
720   ReductionKind Kind = RK_None;
721   bool hasSameData(ReductionData &RD) const {
722     return Kind == RD.Kind && Opcode == RD.Opcode;
723   }
724 };
725 } // namespace
726 
727 static Optional<ReductionData> getReductionData(Instruction *I) {
728   Value *L, *R;
729   if (m_BinOp(m_Value(L), m_Value(R)).match(I))
730     return ReductionData(RK_Arithmetic, I->getOpcode(), L, R);
731   if (auto *SI = dyn_cast<SelectInst>(I)) {
732     if (m_SMin(m_Value(L), m_Value(R)).match(SI) ||
733         m_SMax(m_Value(L), m_Value(R)).match(SI) ||
734         m_OrdFMin(m_Value(L), m_Value(R)).match(SI) ||
735         m_OrdFMax(m_Value(L), m_Value(R)).match(SI) ||
736         m_UnordFMin(m_Value(L), m_Value(R)).match(SI) ||
737         m_UnordFMax(m_Value(L), m_Value(R)).match(SI)) {
738       auto *CI = cast<CmpInst>(SI->getCondition());
739       return ReductionData(RK_MinMax, CI->getOpcode(), L, R);
740     }
741     if (m_UMin(m_Value(L), m_Value(R)).match(SI) ||
742         m_UMax(m_Value(L), m_Value(R)).match(SI)) {
743       auto *CI = cast<CmpInst>(SI->getCondition());
744       return ReductionData(RK_UnsignedMinMax, CI->getOpcode(), L, R);
745     }
746   }
747   return llvm::None;
748 }
749 
750 static ReductionKind matchPairwiseReductionAtLevel(Instruction *I,
751                                                    unsigned Level,
752                                                    unsigned NumLevels) {
753   // Match one level of pairwise operations.
754   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
755   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
756   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
757   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
758   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
759   if (!I)
760     return RK_None;
761 
762   assert(I->getType()->isVectorTy() && "Expecting a vector type");
763 
764   Optional<ReductionData> RD = getReductionData(I);
765   if (!RD)
766     return RK_None;
767 
768   ShuffleVectorInst *LS = dyn_cast<ShuffleVectorInst>(RD->LHS);
769   if (!LS && Level)
770     return RK_None;
771   ShuffleVectorInst *RS = dyn_cast<ShuffleVectorInst>(RD->RHS);
772   if (!RS && Level)
773     return RK_None;
774 
775   // On level 0 we can omit one shufflevector instruction.
776   if (!Level && !RS && !LS)
777     return RK_None;
778 
779   // Shuffle inputs must match.
780   Value *NextLevelOpL = LS ? LS->getOperand(0) : nullptr;
781   Value *NextLevelOpR = RS ? RS->getOperand(0) : nullptr;
782   Value *NextLevelOp = nullptr;
783   if (NextLevelOpR && NextLevelOpL) {
784     // If we have two shuffles their operands must match.
785     if (NextLevelOpL != NextLevelOpR)
786       return RK_None;
787 
788     NextLevelOp = NextLevelOpL;
789   } else if (Level == 0 && (NextLevelOpR || NextLevelOpL)) {
790     // On the first level we can omit the shufflevector <0, undef,...>. So the
791     // input to the other shufflevector <1, undef> must match with one of the
792     // inputs to the current binary operation.
793     // Example:
794     //  %NextLevelOpL = shufflevector %R, <1, undef ...>
795     //  %BinOp        = fadd          %NextLevelOpL, %R
796     if (NextLevelOpL && NextLevelOpL != RD->RHS)
797       return RK_None;
798     else if (NextLevelOpR && NextLevelOpR != RD->LHS)
799       return RK_None;
800 
801     NextLevelOp = NextLevelOpL ? RD->RHS : RD->LHS;
802   } else
803     return RK_None;
804 
805   // Check that the next levels binary operation exists and matches with the
806   // current one.
807   if (Level + 1 != NumLevels) {
808     Optional<ReductionData> NextLevelRD =
809         getReductionData(cast<Instruction>(NextLevelOp));
810     if (!NextLevelRD || !RD->hasSameData(*NextLevelRD))
811       return RK_None;
812   }
813 
814   // Shuffle mask for pairwise operation must match.
815   if (matchPairwiseShuffleMask(LS, /*IsLeft=*/true, Level)) {
816     if (!matchPairwiseShuffleMask(RS, /*IsLeft=*/false, Level))
817       return RK_None;
818   } else if (matchPairwiseShuffleMask(RS, /*IsLeft=*/true, Level)) {
819     if (!matchPairwiseShuffleMask(LS, /*IsLeft=*/false, Level))
820       return RK_None;
821   } else {
822     return RK_None;
823   }
824 
825   if (++Level == NumLevels)
826     return RD->Kind;
827 
828   // Match next level.
829   return matchPairwiseReductionAtLevel(cast<Instruction>(NextLevelOp), Level,
830                                        NumLevels);
831 }
832 
833 static ReductionKind matchPairwiseReduction(const ExtractElementInst *ReduxRoot,
834                                             unsigned &Opcode, Type *&Ty) {
835   if (!EnableReduxCost)
836     return RK_None;
837 
838   // Need to extract the first element.
839   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
840   unsigned Idx = ~0u;
841   if (CI)
842     Idx = CI->getZExtValue();
843   if (Idx != 0)
844     return RK_None;
845 
846   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
847   if (!RdxStart)
848     return RK_None;
849   Optional<ReductionData> RD = getReductionData(RdxStart);
850   if (!RD)
851     return RK_None;
852 
853   Type *VecTy = RdxStart->getType();
854   unsigned NumVecElems = VecTy->getVectorNumElements();
855   if (!isPowerOf2_32(NumVecElems))
856     return RK_None;
857 
858   // We look for a sequence of shuffle,shuffle,add triples like the following
859   // that builds a pairwise reduction tree.
860   //
861   //  (X0, X1, X2, X3)
862   //   (X0 + X1, X2 + X3, undef, undef)
863   //    ((X0 + X1) + (X2 + X3), undef, undef, undef)
864   //
865   // %rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
866   //       <4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
867   // %rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
868   //       <4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
869   // %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
870   // %rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
871   //       <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
872   // %rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
873   //       <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
874   // %bin.rdx8 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
875   // %r = extractelement <4 x float> %bin.rdx8, i32 0
876   if (matchPairwiseReductionAtLevel(RdxStart, 0, Log2_32(NumVecElems)) ==
877       RK_None)
878     return RK_None;
879 
880   Opcode = RD->Opcode;
881   Ty = VecTy;
882 
883   return RD->Kind;
884 }
885 
886 static std::pair<Value *, ShuffleVectorInst *>
887 getShuffleAndOtherOprd(Value *L, Value *R) {
888   ShuffleVectorInst *S = nullptr;
889 
890   if ((S = dyn_cast<ShuffleVectorInst>(L)))
891     return std::make_pair(R, S);
892 
893   S = dyn_cast<ShuffleVectorInst>(R);
894   return std::make_pair(L, S);
895 }
896 
897 static ReductionKind
898 matchVectorSplittingReduction(const ExtractElementInst *ReduxRoot,
899                               unsigned &Opcode, Type *&Ty) {
900   if (!EnableReduxCost)
901     return RK_None;
902 
903   // Need to extract the first element.
904   ConstantInt *CI = dyn_cast<ConstantInt>(ReduxRoot->getOperand(1));
905   unsigned Idx = ~0u;
906   if (CI)
907     Idx = CI->getZExtValue();
908   if (Idx != 0)
909     return RK_None;
910 
911   auto *RdxStart = dyn_cast<Instruction>(ReduxRoot->getOperand(0));
912   if (!RdxStart)
913     return RK_None;
914   Optional<ReductionData> RD = getReductionData(RdxStart);
915   if (!RD)
916     return RK_None;
917 
918   Type *VecTy = ReduxRoot->getOperand(0)->getType();
919   unsigned NumVecElems = VecTy->getVectorNumElements();
920   if (!isPowerOf2_32(NumVecElems))
921     return RK_None;
922 
923   // We look for a sequence of shuffles and adds like the following matching one
924   // fadd, shuffle vector pair at a time.
925   //
926   // %rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
927   //                           <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
928   // %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
929   // %rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
930   //                          <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
931   // %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
932   // %r = extractelement <4 x float> %bin.rdx8, i32 0
933 
934   unsigned MaskStart = 1;
935   Instruction *RdxOp = RdxStart;
936   SmallVector<int, 32> ShuffleMask(NumVecElems, 0);
937   unsigned NumVecElemsRemain = NumVecElems;
938   while (NumVecElemsRemain - 1) {
939     // Check for the right reduction operation.
940     if (!RdxOp)
941       return RK_None;
942     Optional<ReductionData> RDLevel = getReductionData(RdxOp);
943     if (!RDLevel || !RDLevel->hasSameData(*RD))
944       return RK_None;
945 
946     Value *NextRdxOp;
947     ShuffleVectorInst *Shuffle;
948     std::tie(NextRdxOp, Shuffle) =
949         getShuffleAndOtherOprd(RDLevel->LHS, RDLevel->RHS);
950 
951     // Check the current reduction operation and the shuffle use the same value.
952     if (Shuffle == nullptr)
953       return RK_None;
954     if (Shuffle->getOperand(0) != NextRdxOp)
955       return RK_None;
956 
957     // Check that shuffle masks matches.
958     for (unsigned j = 0; j != MaskStart; ++j)
959       ShuffleMask[j] = MaskStart + j;
960     // Fill the rest of the mask with -1 for undef.
961     std::fill(&ShuffleMask[MaskStart], ShuffleMask.end(), -1);
962 
963     SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
964     if (ShuffleMask != Mask)
965       return RK_None;
966 
967     RdxOp = dyn_cast<Instruction>(NextRdxOp);
968     NumVecElemsRemain /= 2;
969     MaskStart *= 2;
970   }
971 
972   Opcode = RD->Opcode;
973   Ty = VecTy;
974   return RD->Kind;
975 }
976 
977 int TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
978   switch (I->getOpcode()) {
979   case Instruction::GetElementPtr:
980     return getUserCost(I);
981 
982   case Instruction::Ret:
983   case Instruction::PHI:
984   case Instruction::Br: {
985     return getCFInstrCost(I->getOpcode());
986   }
987   case Instruction::Add:
988   case Instruction::FAdd:
989   case Instruction::Sub:
990   case Instruction::FSub:
991   case Instruction::Mul:
992   case Instruction::FMul:
993   case Instruction::UDiv:
994   case Instruction::SDiv:
995   case Instruction::FDiv:
996   case Instruction::URem:
997   case Instruction::SRem:
998   case Instruction::FRem:
999   case Instruction::Shl:
1000   case Instruction::LShr:
1001   case Instruction::AShr:
1002   case Instruction::And:
1003   case Instruction::Or:
1004   case Instruction::Xor: {
1005     TargetTransformInfo::OperandValueKind Op1VK =
1006       getOperandInfo(I->getOperand(0));
1007     TargetTransformInfo::OperandValueKind Op2VK =
1008       getOperandInfo(I->getOperand(1));
1009     SmallVector<const Value*, 2> Operands(I->operand_values());
1010     return getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK,
1011                                        Op2VK, TargetTransformInfo::OP_None,
1012                                        TargetTransformInfo::OP_None,
1013                                        Operands);
1014   }
1015   case Instruction::Select: {
1016     const SelectInst *SI = cast<SelectInst>(I);
1017     Type *CondTy = SI->getCondition()->getType();
1018     return getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy, I);
1019   }
1020   case Instruction::ICmp:
1021   case Instruction::FCmp: {
1022     Type *ValTy = I->getOperand(0)->getType();
1023     return getCmpSelInstrCost(I->getOpcode(), ValTy, I->getType(), I);
1024   }
1025   case Instruction::Store: {
1026     const StoreInst *SI = cast<StoreInst>(I);
1027     Type *ValTy = SI->getValueOperand()->getType();
1028     return getMemoryOpCost(I->getOpcode(), ValTy,
1029                                 SI->getAlignment(),
1030                                 SI->getPointerAddressSpace(), I);
1031   }
1032   case Instruction::Load: {
1033     const LoadInst *LI = cast<LoadInst>(I);
1034     return getMemoryOpCost(I->getOpcode(), I->getType(),
1035                                 LI->getAlignment(),
1036                                 LI->getPointerAddressSpace(), I);
1037   }
1038   case Instruction::ZExt:
1039   case Instruction::SExt:
1040   case Instruction::FPToUI:
1041   case Instruction::FPToSI:
1042   case Instruction::FPExt:
1043   case Instruction::PtrToInt:
1044   case Instruction::IntToPtr:
1045   case Instruction::SIToFP:
1046   case Instruction::UIToFP:
1047   case Instruction::Trunc:
1048   case Instruction::FPTrunc:
1049   case Instruction::BitCast:
1050   case Instruction::AddrSpaceCast: {
1051     Type *SrcTy = I->getOperand(0)->getType();
1052     return getCastInstrCost(I->getOpcode(), I->getType(), SrcTy, I);
1053   }
1054   case Instruction::ExtractElement: {
1055     const ExtractElementInst * EEI = cast<ExtractElementInst>(I);
1056     ConstantInt *CI = dyn_cast<ConstantInt>(I->getOperand(1));
1057     unsigned Idx = -1;
1058     if (CI)
1059       Idx = CI->getZExtValue();
1060 
1061     // Try to match a reduction sequence (series of shufflevector and vector
1062     // adds followed by a extractelement).
1063     unsigned ReduxOpCode;
1064     Type *ReduxType;
1065 
1066     switch (matchVectorSplittingReduction(EEI, ReduxOpCode, ReduxType)) {
1067     case RK_Arithmetic:
1068       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1069                                              /*IsPairwiseForm=*/false);
1070     case RK_MinMax:
1071       return getMinMaxReductionCost(
1072           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1073           /*IsPairwiseForm=*/false, /*IsUnsigned=*/false);
1074     case RK_UnsignedMinMax:
1075       return getMinMaxReductionCost(
1076           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1077           /*IsPairwiseForm=*/false, /*IsUnsigned=*/true);
1078     case RK_None:
1079       break;
1080     }
1081 
1082     switch (matchPairwiseReduction(EEI, ReduxOpCode, ReduxType)) {
1083     case RK_Arithmetic:
1084       return getArithmeticReductionCost(ReduxOpCode, ReduxType,
1085                                              /*IsPairwiseForm=*/true);
1086     case RK_MinMax:
1087       return getMinMaxReductionCost(
1088           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1089           /*IsPairwiseForm=*/true, /*IsUnsigned=*/false);
1090     case RK_UnsignedMinMax:
1091       return getMinMaxReductionCost(
1092           ReduxType, CmpInst::makeCmpResultType(ReduxType),
1093           /*IsPairwiseForm=*/true, /*IsUnsigned=*/true);
1094     case RK_None:
1095       break;
1096     }
1097 
1098     return getVectorInstrCost(I->getOpcode(),
1099                                    EEI->getOperand(0)->getType(), Idx);
1100   }
1101   case Instruction::InsertElement: {
1102     const InsertElementInst * IE = cast<InsertElementInst>(I);
1103     ConstantInt *CI = dyn_cast<ConstantInt>(IE->getOperand(2));
1104     unsigned Idx = -1;
1105     if (CI)
1106       Idx = CI->getZExtValue();
1107     return getVectorInstrCost(I->getOpcode(),
1108                                    IE->getType(), Idx);
1109   }
1110   case Instruction::ShuffleVector: {
1111     const ShuffleVectorInst *Shuffle = cast<ShuffleVectorInst>(I);
1112     Type *VecTypOp0 = Shuffle->getOperand(0)->getType();
1113     unsigned NumVecElems = VecTypOp0->getVectorNumElements();
1114     SmallVector<int, 16> Mask = Shuffle->getShuffleMask();
1115 
1116     if (NumVecElems == Mask.size()) {
1117       if (isReverseVectorMask(Mask))
1118         return getShuffleCost(TargetTransformInfo::SK_Reverse, VecTypOp0,
1119                                    0, nullptr);
1120       if (isAlternateVectorMask(Mask))
1121         return getShuffleCost(TargetTransformInfo::SK_Alternate,
1122                                    VecTypOp0, 0, nullptr);
1123 
1124       if (isZeroEltBroadcastVectorMask(Mask))
1125         return getShuffleCost(TargetTransformInfo::SK_Broadcast,
1126                                    VecTypOp0, 0, nullptr);
1127 
1128       if (isSingleSourceVectorMask(Mask))
1129         return getShuffleCost(TargetTransformInfo::SK_PermuteSingleSrc,
1130                                    VecTypOp0, 0, nullptr);
1131 
1132       return getShuffleCost(TargetTransformInfo::SK_PermuteTwoSrc,
1133                                  VecTypOp0, 0, nullptr);
1134     }
1135 
1136     return -1;
1137   }
1138   case Instruction::Call:
1139     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
1140       SmallVector<Value *, 4> Args(II->arg_operands());
1141 
1142       FastMathFlags FMF;
1143       if (auto *FPMO = dyn_cast<FPMathOperator>(II))
1144         FMF = FPMO->getFastMathFlags();
1145 
1146       return getIntrinsicInstrCost(II->getIntrinsicID(), II->getType(),
1147                                         Args, FMF);
1148     }
1149     return -1;
1150   default:
1151     // We don't have any information on this instruction.
1152     return -1;
1153   }
1154 }
1155 
1156 TargetTransformInfo::Concept::~Concept() {}
1157 
1158 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1159 
1160 TargetIRAnalysis::TargetIRAnalysis(
1161     std::function<Result(const Function &)> TTICallback)
1162     : TTICallback(std::move(TTICallback)) {}
1163 
1164 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1165                                                FunctionAnalysisManager &) {
1166   return TTICallback(F);
1167 }
1168 
1169 AnalysisKey TargetIRAnalysis::Key;
1170 
1171 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1172   return Result(F.getParent()->getDataLayout());
1173 }
1174 
1175 // Register the basic pass.
1176 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1177                 "Target Transform Information", false, true)
1178 char TargetTransformInfoWrapperPass::ID = 0;
1179 
1180 void TargetTransformInfoWrapperPass::anchor() {}
1181 
1182 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1183     : ImmutablePass(ID) {
1184   initializeTargetTransformInfoWrapperPassPass(
1185       *PassRegistry::getPassRegistry());
1186 }
1187 
1188 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1189     TargetIRAnalysis TIRA)
1190     : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1191   initializeTargetTransformInfoWrapperPassPass(
1192       *PassRegistry::getPassRegistry());
1193 }
1194 
1195 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1196   FunctionAnalysisManager DummyFAM;
1197   TTI = TIRA.run(F, DummyFAM);
1198   return *TTI;
1199 }
1200 
1201 ImmutablePass *
1202 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1203   return new TargetTransformInfoWrapperPass(std::move(TIRA));
1204 }
1205