1 //=- llvm/CodeGen/DFAPacketizer.h - DFA Packetizer for VLIW ---*- C++ -*-=====// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // This class implements a deterministic finite automaton (DFA) based 10 // packetizing mechanism for VLIW architectures. It provides APIs to 11 // determine whether there exists a legal mapping of instructions to 12 // functional unit assignments in a packet. The DFA is auto-generated from 13 // the target's Schedule.td file. 14 // 15 // A DFA consists of 3 major elements: states, inputs, and transitions. For 16 // the packetizing mechanism, the input is the set of instruction classes for 17 // a target. The state models all possible combinations of functional unit 18 // consumption for a given set of instructions in a packet. A transition 19 // models the addition of an instruction to a packet. In the DFA constructed 20 // by this class, if an instruction can be added to a packet, then a valid 21 // transition exists from the corresponding state. Invalid transitions 22 // indicate that the instruction cannot be added to the current packet. 23 // 24 //===----------------------------------------------------------------------===// 25 26 #ifndef LLVM_CODEGEN_DFAPACKETIZER_H 27 #define LLVM_CODEGEN_DFAPACKETIZER_H 28 29 #include "llvm/ADT/DenseMap.h" 30 #include "llvm/CodeGen/MachineBasicBlock.h" 31 #include <map> 32 33 namespace llvm { 34 35 class MCInstrDesc; 36 class MachineInstr; 37 class MachineLoopInfo; 38 class MachineDominatorTree; 39 class InstrItineraryData; 40 class DefaultVLIWScheduler; 41 class SUnit; 42 43 // -------------------------------------------------------------------- 44 // Definitions shared between DFAPacketizer.cpp and DFAPacketizerEmitter.cpp 45 46 // DFA_MAX_RESTERMS * DFA_MAX_RESOURCES must fit within sizeof DFAInput. 47 // This is verified in DFAPacketizer.cpp:DFAPacketizer::DFAPacketizer. 48 // 49 // e.g. terms x resource bit combinations that fit in uint32_t: 50 // 4 terms x 8 bits = 32 bits 51 // 3 terms x 10 bits = 30 bits 52 // 2 terms x 16 bits = 32 bits 53 // 54 // e.g. terms x resource bit combinations that fit in uint64_t: 55 // 8 terms x 8 bits = 64 bits 56 // 7 terms x 9 bits = 63 bits 57 // 6 terms x 10 bits = 60 bits 58 // 5 terms x 12 bits = 60 bits 59 // 4 terms x 16 bits = 64 bits <--- current 60 // 3 terms x 21 bits = 63 bits 61 // 2 terms x 32 bits = 64 bits 62 // 63 #define DFA_MAX_RESTERMS 4 // The max # of AND'ed resource terms. 64 #define DFA_MAX_RESOURCES 16 // The max # of resource bits in one term. 65 66 typedef uint64_t DFAInput; 67 typedef int64_t DFAStateInput; 68 #define DFA_TBLTYPE "int64_t" // For generating DFAStateInputTable. 69 // -------------------------------------------------------------------- 70 71 class DFAPacketizer { 72 private: 73 typedef std::pair<unsigned, DFAInput> UnsignPair; 74 75 const InstrItineraryData *InstrItins; 76 int CurrentState; 77 const DFAStateInput (*DFAStateInputTable)[2]; 78 const unsigned *DFAStateEntryTable; 79 80 // CachedTable is a map from <FromState, Input> to ToState. 81 DenseMap<UnsignPair, unsigned> CachedTable; 82 83 // Read the DFA transition table and update CachedTable. 84 void ReadTable(unsigned state); 85 86 public: 87 DFAPacketizer(const InstrItineraryData *I, const DFAStateInput (*SIT)[2], 88 const unsigned *SET); 89 90 // Reset the current state to make all resources available. 91 void clearResources() { 92 CurrentState = 0; 93 } 94 95 // Return the DFAInput for an instruction class. 96 DFAInput getInsnInput(unsigned InsnClass); 97 98 // Return the DFAInput for an instruction class input vector. 99 static DFAInput getInsnInput(const std::vector<unsigned> &InsnClass); 100 101 // Check if the resources occupied by a MCInstrDesc are available in 102 // the current state. 103 bool canReserveResources(const llvm::MCInstrDesc *MID); 104 105 // Reserve the resources occupied by a MCInstrDesc and change the current 106 // state to reflect that change. 107 void reserveResources(const llvm::MCInstrDesc *MID); 108 109 // Check if the resources occupied by a machine instruction are available 110 // in the current state. 111 bool canReserveResources(llvm::MachineInstr *MI); 112 113 // Reserve the resources occupied by a machine instruction and change the 114 // current state to reflect that change. 115 void reserveResources(llvm::MachineInstr *MI); 116 117 const InstrItineraryData *getInstrItins() const { return InstrItins; } 118 }; 119 120 121 // VLIWPacketizerList implements a simple VLIW packetizer using DFA. The 122 // packetizer works on machine basic blocks. For each instruction I in BB, 123 // the packetizer consults the DFA to see if machine resources are available 124 // to execute I. If so, the packetizer checks if I depends on any instruction 125 // in the current packet. If no dependency is found, I is added to current 126 // packet and the machine resource is marked as taken. If any dependency is 127 // found, a target API call is made to prune the dependence. 128 class VLIWPacketizerList { 129 protected: 130 MachineFunction &MF; 131 const TargetInstrInfo *TII; 132 AliasAnalysis *AA; 133 134 // The VLIW Scheduler. 135 DefaultVLIWScheduler *VLIWScheduler; 136 // Vector of instructions assigned to the current packet. 137 std::vector<MachineInstr*> CurrentPacketMIs; 138 // DFA resource tracker. 139 DFAPacketizer *ResourceTracker; 140 // Map: MI -> SU. 141 std::map<MachineInstr*, SUnit*> MIToSUnit; 142 143 public: 144 // The AliasAnalysis parameter can be nullptr. 145 VLIWPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI, 146 AliasAnalysis *AA); 147 148 virtual ~VLIWPacketizerList(); 149 150 // Implement this API in the backend to bundle instructions. 151 void PacketizeMIs(MachineBasicBlock *MBB, 152 MachineBasicBlock::iterator BeginItr, 153 MachineBasicBlock::iterator EndItr); 154 155 // Return the ResourceTracker. 156 DFAPacketizer *getResourceTracker() {return ResourceTracker;} 157 158 // addToPacket - Add MI to the current packet. 159 virtual MachineBasicBlock::iterator addToPacket(MachineInstr *MI) { 160 MachineBasicBlock::iterator MII = MI; 161 CurrentPacketMIs.push_back(MI); 162 ResourceTracker->reserveResources(MI); 163 return MII; 164 } 165 166 // End the current packet and reset the state of the packetizer. 167 // Overriding this function allows the target-specific packetizer 168 // to perform custom finalization. 169 virtual void endPacket(MachineBasicBlock *MBB, MachineInstr *MI); 170 171 // Perform initialization before packetizing an instruction. This 172 // function is supposed to be overrided by the target dependent packetizer. 173 virtual void initPacketizerState() {} 174 175 // Check if the given instruction I should be ignored by the packetizer. 176 virtual bool ignorePseudoInstruction(const MachineInstr *I, 177 const MachineBasicBlock *MBB) { 178 return false; 179 } 180 181 // Return true if instruction MI can not be packetized with any other 182 // instruction, which means that MI itself is a packet. 183 virtual bool isSoloInstruction(const MachineInstr *MI) { 184 return true; 185 } 186 187 // Check if the packetizer should try to add the given instruction to 188 // the current packet. One reasons for which it may not be desirable 189 // to include an instruction in the current packet could be that it 190 // would cause a stall. 191 // If this function returns "false", the current packet will be ended, 192 // and the instruction will be added to the next packet. 193 virtual bool shouldAddToPacket(const MachineInstr *MI) { 194 return true; 195 } 196 197 // Check if it is legal to packetize SUI and SUJ together. 198 virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) { 199 return false; 200 } 201 202 // Check if it is legal to prune dependece between SUI and SUJ. 203 virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) { 204 return false; 205 } 206 }; 207 208 } // namespace llvm 209 210 #endif 211