1 2.. _gmir-opcodes: 3 4Generic Opcodes 5=============== 6 7.. contents:: 8 :local: 9 10.. note:: 11 12 This documentation does not yet fully account for vectors. Many of the 13 scalar/integer/floating-point operations can also take vectors. 14 15Constants 16--------- 17 18G_IMPLICIT_DEF 19^^^^^^^^^^^^^^ 20 21An undefined value. 22 23.. code-block:: none 24 25 %0:_(s32) = G_IMPLICIT_DEF 26 27G_CONSTANT 28^^^^^^^^^^ 29 30An integer constant. 31 32.. code-block:: none 33 34 %0:_(s32) = G_CONSTANT i32 1 35 36G_FCONSTANT 37^^^^^^^^^^^ 38 39A floating point constant. 40 41.. code-block:: none 42 43 %0:_(s32) = G_FCONSTANT float 1.0 44 45G_FRAME_INDEX 46^^^^^^^^^^^^^ 47 48The address of an object in the stack frame. 49 50.. code-block:: none 51 52 %1:_(p0) = G_FRAME_INDEX %stack.0.ptr0 53 54G_GLOBAL_VALUE 55^^^^^^^^^^^^^^ 56 57The address of a global value. 58 59.. code-block:: none 60 61 %0(p0) = G_GLOBAL_VALUE @var_local 62 63G_BLOCK_ADDR 64^^^^^^^^^^^^ 65 66The address of a basic block. 67 68.. code-block:: none 69 70 %0:_(p0) = G_BLOCK_ADDR blockaddress(@test_blockaddress, %ir-block.block) 71 72Integer Extension and Truncation 73-------------------------------- 74 75G_ANYEXT 76^^^^^^^^ 77 78Extend the underlying scalar type of an operation, leaving the high bits 79unspecified. 80 81.. code-block:: none 82 83 %1:_(s32) = G_ANYEXT %0:_(s16) 84 85G_SEXT 86^^^^^^ 87 88Sign extend the underlying scalar type of an operation, copying the sign bit 89into the newly-created space. 90 91.. code-block:: none 92 93 %1:_(s32) = G_SEXT %0:_(s16) 94 95G_SEXT_INREG 96^^^^^^^^^^^^ 97 98Sign extend the value from an arbitrary bit position, copying the sign bit 99into all bits above it. This is equivalent to a shl + ashr pair with an 100appropriate shift amount. $sz is an immediate (MachineOperand::isImm() 101returns true) to allow targets to have some bitwidths legal and others 102lowered. This opcode is particularly useful if the target has sign-extension 103instructions that are cheaper than the constituent shifts as the optimizer is 104able to make decisions on whether it's better to hang on to the G_SEXT_INREG 105or to lower it and optimize the individual shifts. 106 107.. code-block:: none 108 109 %1:_(s32) = G_SEXT_INREG %0:_(s32), 16 110 111G_ZEXT 112^^^^^^ 113 114Zero extend the underlying scalar type of an operation, putting zero bits 115into the newly-created space. 116 117.. code-block:: none 118 119 %1:_(s32) = G_ZEXT %0:_(s16) 120 121G_TRUNC 122^^^^^^^ 123 124Truncate the underlying scalar type of an operation. This is equivalent to 125G_EXTRACT for scalar types, but acts elementwise on vectors. 126 127.. code-block:: none 128 129 %1:_(s16) = G_TRUNC %0:_(s32) 130 131Type Conversions 132---------------- 133 134G_INTTOPTR 135^^^^^^^^^^ 136 137Convert an integer to a pointer. 138 139.. code-block:: none 140 141 %1:_(p0) = G_INTTOPTR %0:_(s32) 142 143G_PTRTOINT 144^^^^^^^^^^ 145 146Convert a pointer to an integer. 147 148.. code-block:: none 149 150 %1:_(s32) = G_PTRTOINT %0:_(p0) 151 152G_BITCAST 153^^^^^^^^^ 154 155Reinterpret a value as a new type. This is usually done without changing any 156bits but this is not always the case due a sublety in the definition of the 157:ref:`LLVM-IR Bitcast Instruction <i_bitcast>`. 158 159.. code-block:: none 160 161 %1:_(s64) = G_BITCAST %0:_(<2 x s32>) 162 163G_ADDRSPACE_CAST 164^^^^^^^^^^^^^^^^ 165 166Convert a pointer to an address space to a pointer to another address space. 167 168.. code-block:: none 169 170 %1:_(p1) = G_ADDRSPACE_CAST %0:_(p0) 171 172.. caution:: 173 174 :ref:`i_addrspacecast` doesn't mention what happens if the cast is simply 175 invalid (i.e. if the address spaces are disjoint). 176 177Scalar Operations 178----------------- 179 180G_EXTRACT 181^^^^^^^^^ 182 183Extract a register of the specified size, starting from the block given by 184index. This will almost certainly be mapped to sub-register COPYs after 185register banks have been selected. 186 187G_INSERT 188^^^^^^^^ 189 190Insert a smaller register into a larger one at the specified bit-index. 191 192G_MERGE_VALUES 193^^^^^^^^^^^^^^ 194 195Concatenate multiple registers of the same size into a wider register. 196The input operands are always ordered from lowest bits to highest: 197 198.. code-block:: none 199 200 %0:(s32) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8), 201 %bits_16_23:(s8), %bits_24_31:(s8) 202 203G_UNMERGE_VALUES 204^^^^^^^^^^^^^^^^ 205 206Extract multiple registers of the specified size, starting from blocks given by 207indexes. This will almost certainly be mapped to sub-register COPYs after 208register banks have been selected. 209The output operands are always ordered from lowest bits to highest: 210 211.. code-block:: none 212 213 %bits_0_7:(s8), %bits_8_15:(s8), 214 %bits_16_23:(s8), %bits_24_31:(s8) = G_UNMERGE_VALUES %0:(s32) 215 216G_BSWAP 217^^^^^^^ 218 219Reverse the order of the bytes in a scalar. 220 221.. code-block:: none 222 223 %1:_(s32) = G_BSWAP %0:_(s32) 224 225G_BITREVERSE 226^^^^^^^^^^^^ 227 228Reverse the order of the bits in a scalar. 229 230.. code-block:: none 231 232 %1:_(s32) = G_BITREVERSE %0:_(s32) 233 234Integer Operations 235------------------- 236 237G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SDIV, G_UDIV, G_SREM, G_UREM 238^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 239 240These each perform their respective integer arithmetic on a scalar. 241 242.. code-block:: none 243 244 %2:_(s32) = G_ADD %0:_(s32), %1:_(s32) 245 246G_SADDSAT, G_UADDSAT, G_SSUBSAT, G_USUBSAT 247^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 248 249Signed and unsigned addition and subtraction with saturation. 250 251.. code-block:: none 252 253 %2:_(s32) = G_SADDSAT %0:_(s32), %1:_(s32) 254 255G_SHL, G_LSHR, G_ASHR 256^^^^^^^^^^^^^^^^^^^^^ 257 258Shift the bits of a scalar left or right inserting zeros (sign-bit for G_ASHR). 259 260G_ICMP 261^^^^^^ 262 263Perform integer comparison producing non-zero (true) or zero (false). It's 264target specific whether a true value is 1, ~0U, or some other non-zero value. 265 266G_SELECT 267^^^^^^^^ 268 269Select between two values depending on a zero/non-zero value. 270 271.. code-block:: none 272 273 %5:_(s32) = G_SELECT %4(s1), %6, %2 274 275G_PTR_ADD 276^^^^^^^^^ 277 278Add a scalar offset in addressible units to a pointer. Addressible units are 279typically bytes but this may vary between targets. 280 281.. code-block:: none 282 283 %1:_(p0) = G_PTR_ADD %0:_(p0), %1:_(s32) 284 285.. caution:: 286 287 There are currently no in-tree targets that use this with addressable units 288 not equal to 8 bit. 289 290G_PTR_MASK 291^^^^^^^^^^ 292 293Zero the least significant N bits of a pointer. 294 295.. code-block:: none 296 297 %1:_(p0) = G_PTR_MASK %0, 3 298 299G_SMIN, G_SMAX, G_UMIN, G_UMAX 300^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 301 302Take the minimum/maximum of two values. 303 304.. code-block:: none 305 306 %5:_(s32) = G_SMIN %6, %2 307 308G_UADDO, G_SADDO, G_USUBO, G_SSUBO, G_SMULO, G_UMULO 309^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 310 311Perform the requested arithmetic and produce a carry output in addition to the 312normal result. 313 314.. code-block:: none 315 316 %3:_(s32), %4:_(s1) = G_UADDO %0, %1 317 318G_UADDE, G_SADDE, G_USUBE, G_SSUBE 319^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 320 321Perform the requested arithmetic and consume a carry input in addition to the 322normal input. Also produce a carry output in addition to the normal result. 323 324.. code-block:: none 325 326 %4:_(s32), %5:_(s1) = G_UADDE %0, %1, %3:_(s1) 327 328G_UMULH, G_SMULH 329^^^^^^^^^^^^^^^^ 330 331Multiply two numbers at twice the incoming bit width (signed) and return 332the high half of the result. 333 334.. code-block:: none 335 336 %3:_(s32) = G_UMULH %0, %1 337 338G_CTLZ, G_CTTZ, G_CTPOP 339^^^^^^^^^^^^^^^^^^^^^^^ 340 341Count leading zeros, trailing zeros, or number of set bits. 342 343.. code-block:: none 344 345 %2:_(s33) = G_CTLZ_ZERO_UNDEF %1 346 %2:_(s33) = G_CTTZ_ZERO_UNDEF %1 347 %2:_(s33) = G_CTPOP %1 348 349G_CTLZ_ZERO_UNDEF, G_CTTZ_ZERO_UNDEF 350^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 351 352Count leading zeros or trailing zeros. If the value is zero then the result is 353undefined. 354 355.. code-block:: none 356 357 %2:_(s33) = G_CTLZ_ZERO_UNDEF %1 358 %2:_(s33) = G_CTTZ_ZERO_UNDEF %1 359 360Floating Point Operations 361------------------------- 362 363G_FCMP 364^^^^^^ 365 366Perform floating point comparison producing non-zero (true) or zero 367(false). It's target specific whether a true value is 1, ~0U, or some other 368non-zero value. 369 370G_FNEG 371^^^^^^ 372 373Floating point negation. 374 375G_FPEXT 376^^^^^^^ 377 378Convert a floating point value to a larger type. 379 380G_FPTRUNC 381^^^^^^^^^ 382 383Convert a floating point value to a narrower type. 384 385G_FPTOSI, G_FPTOUI, G_SITOFP, G_UITOFP 386^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 387 388Convert between integer and floating point. 389 390G_FABS 391^^^^^^ 392 393Take the absolute value of a floating point value. 394 395G_FCOPYSIGN 396^^^^^^^^^^^ 397 398Copy the value of the first operand, replacing the sign bit with that of the 399second operand. 400 401G_FCANONICALIZE 402^^^^^^^^^^^^^^^ 403 404See :ref:`i_intr_llvm_canonicalize`. 405 406G_FMINNUM 407^^^^^^^^^ 408 409Perform floating-point minimum on two values. 410 411In the case where a single input is a NaN (either signaling or quiet), 412the non-NaN input is returned. 413 414The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0. 415 416G_FMAXNUM 417^^^^^^^^^ 418 419Perform floating-point maximum on two values. 420 421In the case where a single input is a NaN (either signaling or quiet), 422the non-NaN input is returned. 423 424The return value of (FMAXNUM 0.0, -0.0) could be either 0.0 or -0.0. 425 426G_FMINNUM_IEEE 427^^^^^^^^^^^^^^ 428 429Perform floating-point minimum on two values, following the IEEE-754 2008 430definition. This differs from FMINNUM in the handling of signaling NaNs. If one 431input is a signaling NaN, returns a quiet NaN. 432 433G_FMAXNUM_IEEE 434^^^^^^^^^^^^^^ 435 436Perform floating-point maximum on two values, following the IEEE-754 2008 437definition. This differs from FMAXNUM in the handling of signaling NaNs. If one 438input is a signaling NaN, returns a quiet NaN. 439 440G_FMINIMUM 441^^^^^^^^^^ 442 443NaN-propagating minimum that also treat -0.0 as less than 0.0. While 444FMINNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM follows IEEE 754-2018 445draft semantics. 446 447G_FMAXIMUM 448^^^^^^^^^^ 449 450NaN-propagating maximum that also treat -0.0 as less than 0.0. While 451FMAXNUM_IEEE follow IEEE 754-2008 semantics, FMAXIMUM follows IEEE 754-2018 452draft semantics. 453 454G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FREM 455^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 456 457Perform the specified floating point arithmetic. 458 459G_FMA 460^^^^^ 461 462Perform a fused multiply add (i.e. without the intermediate rounding step). 463 464G_FMAD 465^^^^^^ 466 467Perform a non-fused multiply add (i.e. with the intermediate rounding step). 468 469G_FPOW 470^^^^^^ 471 472Raise the first operand to the power of the second. 473 474G_FEXP, G_FEXP2 475^^^^^^^^^^^^^^^ 476 477Calculate the base-e or base-2 exponential of a value 478 479G_FLOG, G_FLOG2, G_FLOG10 480^^^^^^^^^^^^^^^^^^^^^^^^^ 481 482Calculate the base-e, base-2, or base-10 respectively. 483 484G_FCEIL, G_FCOS, G_FSIN, G_FSQRT, G_FFLOOR, G_FRINT, G_FNEARBYINT 485^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 486 487These correspond to the standard C functions of the same name. 488 489G_INTRINSIC_TRUNC 490^^^^^^^^^^^^^^^^^ 491 492Returns the operand rounded to the nearest integer not larger in magnitude than the operand. 493 494G_INTRINSIC_ROUND 495^^^^^^^^^^^^^^^^^ 496 497Returns the operand rounded to the nearest integer. 498 499Vector Specific Operations 500-------------------------- 501 502G_CONCAT_VECTORS 503^^^^^^^^^^^^^^^^ 504 505Concatenate two vectors to form a longer vector. 506 507G_BUILD_VECTOR, G_BUILD_VECTOR_TRUNC 508^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 509 510Create a vector from multiple scalar registers. No implicit 511conversion is performed (i.e. the result element type must be the 512same as all source operands) 513 514The _TRUNC version truncates the larger operand types to fit the 515destination vector elt type. 516 517G_INSERT_VECTOR_ELT 518^^^^^^^^^^^^^^^^^^^ 519 520Insert an element into a vector 521 522G_EXTRACT_VECTOR_ELT 523^^^^^^^^^^^^^^^^^^^^ 524 525Extract an element from a vector 526 527G_SHUFFLE_VECTOR 528^^^^^^^^^^^^^^^^ 529 530Concatenate two vectors and shuffle the elements according to the mask operand. 531The mask operand should be an IR Constant which exactly matches the 532corresponding mask for the IR shufflevector instruction. 533 534Memory Operations 535----------------- 536 537G_LOAD, G_SEXTLOAD, G_ZEXTLOAD 538^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 539 540Generic load. Expects a MachineMemOperand in addition to explicit 541operands. If the result size is larger than the memory size, the 542high bits are undefined, sign-extended, or zero-extended respectively. 543 544Only G_LOAD is valid if the result is a vector type. If the result is larger 545than the memory size, the high elements are undefined (i.e. this is not a 546per-element, vector anyextload) 547 548G_INDEXED_LOAD 549^^^^^^^^^^^^^^ 550 551Generic indexed load. Combines a GEP with a load. $newaddr is set to $base + $offset. 552If $am is 0 (post-indexed), then the value is loaded from $base; if $am is 1 (pre-indexed) 553then the value is loaded from $newaddr. 554 555G_INDEXED_SEXTLOAD 556^^^^^^^^^^^^^^^^^^ 557 558Same as G_INDEXED_LOAD except that the load performed is sign-extending, as with G_SEXTLOAD. 559 560G_INDEXED_ZEXTLOAD 561^^^^^^^^^^^^^^^^^^ 562 563Same as G_INDEXED_LOAD except that the load performed is zero-extending, as with G_ZEXTLOAD. 564 565G_STORE 566^^^^^^^ 567 568Generic store. Expects a MachineMemOperand in addition to explicit operands. 569 570G_INDEXED_STORE 571^^^^^^^^^^^^^^^ 572 573Combines a store with a GEP. See description of G_INDEXED_LOAD for indexing behaviour. 574 575G_ATOMIC_CMPXCHG_WITH_SUCCESS 576^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 577 578Generic atomic cmpxchg with internal success check. Expects a 579MachineMemOperand in addition to explicit operands. 580 581G_ATOMIC_CMPXCHG 582^^^^^^^^^^^^^^^^ 583 584Generic atomic cmpxchg. Expects a MachineMemOperand in addition to explicit 585operands. 586 587G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD, G_ATOMICRMW_SUB, G_ATOMICRMW_AND, G_ATOMICRMW_NAND, G_ATOMICRMW_OR, G_ATOMICRMW_XOR, G_ATOMICRMW_MAX, G_ATOMICRMW_MIN, G_ATOMICRMW_UMAX, G_ATOMICRMW_UMIN, G_ATOMICRMW_FADD, G_ATOMICRMW_FSUB 588^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 589 590Generic atomicrmw. Expects a MachineMemOperand in addition to explicit 591operands. 592 593G_FENCE 594^^^^^^^ 595 596.. caution:: 597 598 I couldn't find any documentation on this at the time of writing. 599 600Control Flow 601------------ 602 603G_PHI 604^^^^^ 605 606Implement the φ node in the SSA graph representing the function. 607 608.. code-block:: none 609 610 %1(s8) = G_PHI %7(s8), %bb.0, %3(s8), %bb.1 611 612G_BR 613^^^^ 614 615Unconditional branch 616 617G_BRCOND 618^^^^^^^^ 619 620Conditional branch 621 622G_BRINDIRECT 623^^^^^^^^^^^^ 624 625Indirect branch 626 627G_BRJT 628^^^^^^ 629 630Indirect branch to jump table entry 631 632G_JUMP_TABLE 633^^^^^^^^^^^^ 634 635.. caution:: 636 637 I found no documentation for this instruction at the time of writing. 638 639G_INTRINSIC, G_INTRINSIC_W_SIDE_EFFECTS 640^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 641 642Call an intrinsic 643 644The _W_SIDE_EFFECTS version is considered to have unknown side-effects and 645as such cannot be reordered across other side-effecting instructions. 646 647.. note:: 648 649 Unlike SelectionDAG, there is no _VOID variant. Both of these are permitted 650 to have zero, one, or multiple results. 651 652Variadic Arguments 653------------------ 654 655G_VASTART 656^^^^^^^^^ 657 658.. caution:: 659 660 I found no documentation for this instruction at the time of writing. 661 662G_VAARG 663^^^^^^^ 664 665.. caution:: 666 667 I found no documentation for this instruction at the time of writing. 668 669Other Operations 670---------------- 671 672G_DYN_STACKALLOC 673^^^^^^^^^^^^^^^^ 674 675Dynamically realigns the stack pointer to the specified size and alignment. 676An alignment value of `0` or `1` mean no specific alignment. 677 678.. code-block:: none 679 680 %8:_(p0) = G_DYN_STACKALLOC %7(s64), 32 681