1 //===-- RegisterContextFreeBSDTests.cpp -----------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 // clang-format off 10 #include <sys/types.h> 11 #include <machine/reg.h> 12 #if defined(__arm__) 13 #include <machine/vfp.h> 14 #endif 15 // clang-format on 16 17 #include "gmock/gmock.h" 18 #include "gtest/gtest.h" 19 20 #include "Plugins/Process/Utility/RegisterContextFreeBSD_i386.h" 21 #include "Plugins/Process/Utility/RegisterContextFreeBSD_mips64.h" 22 #include "Plugins/Process/Utility/RegisterContextFreeBSD_powerpc.h" 23 #include "Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.h" 24 #include "Plugins/Process/Utility/RegisterContextPOSIX_powerpc.h" 25 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm.h" 26 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h" 27 #include "Plugins/Process/Utility/lldb-arm-register-enums.h" 28 #include "Plugins/Process/Utility/lldb-arm64-register-enums.h" 29 #include "Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h" 30 #include "Plugins/Process/Utility/lldb-x86-register-enums.h" 31 32 using namespace lldb; 33 using namespace lldb_private; 34 35 std::pair<size_t, size_t> GetRegParams(RegisterInfoInterface &ctx, 36 uint32_t reg) { 37 const RegisterInfo &info = ctx.GetRegisterInfo()[reg]; 38 return {info.byte_offset, info.byte_size}; 39 } 40 41 #define EXPECT_OFF(regname, offset, size) \ 42 EXPECT_THAT(GetRegParams(reg_ctx, lldb_##regname), \ 43 ::testing::Pair(offset + base_offset, size)) 44 45 #if defined(__x86_64__) 46 47 #define EXPECT_GPR_X86_64(regname) \ 48 EXPECT_THAT( \ 49 GetRegParams(reg_ctx, lldb_##regname##_x86_64), \ 50 ::testing::Pair(offsetof(reg, r_##regname), sizeof(reg::r_##regname))) 51 #define EXPECT_DBR_X86_64(num) \ 52 EXPECT_OFF(dr##num##_x86_64, offsetof(dbreg, dr[num]), sizeof(dbreg::dr[num])) 53 54 TEST(RegisterContextFreeBSDTest, x86_64) { 55 ArchSpec arch{"x86_64-unknown-freebsd"}; 56 RegisterContextFreeBSD_x86_64 reg_ctx{arch}; 57 58 EXPECT_GPR_X86_64(r15); 59 EXPECT_GPR_X86_64(r14); 60 EXPECT_GPR_X86_64(r13); 61 EXPECT_GPR_X86_64(r12); 62 EXPECT_GPR_X86_64(r11); 63 EXPECT_GPR_X86_64(r10); 64 EXPECT_GPR_X86_64(r9); 65 EXPECT_GPR_X86_64(r8); 66 EXPECT_GPR_X86_64(rdi); 67 EXPECT_GPR_X86_64(rsi); 68 EXPECT_GPR_X86_64(rbp); 69 EXPECT_GPR_X86_64(rbx); 70 EXPECT_GPR_X86_64(rdx); 71 EXPECT_GPR_X86_64(rcx); 72 EXPECT_GPR_X86_64(rax); 73 EXPECT_GPR_X86_64(fs); 74 EXPECT_GPR_X86_64(gs); 75 EXPECT_GPR_X86_64(es); 76 EXPECT_GPR_X86_64(ds); 77 EXPECT_GPR_X86_64(rip); 78 EXPECT_GPR_X86_64(cs); 79 EXPECT_GPR_X86_64(rflags); 80 EXPECT_GPR_X86_64(rsp); 81 EXPECT_GPR_X86_64(ss); 82 83 // fctrl is the first FPR field, it is used to determine offset of the whole 84 // FPR struct 85 size_t base_offset = reg_ctx.GetRegisterInfo()[lldb_fctrl_x86_64].byte_offset; 86 87 // assert against FXSAVE struct 88 EXPECT_OFF(fctrl_x86_64, 0x00, 2); 89 EXPECT_OFF(fstat_x86_64, 0x02, 2); 90 // TODO: This is a known bug, abridged ftag should is 8 bits in length. 91 EXPECT_OFF(ftag_x86_64, 0x04, 2); 92 EXPECT_OFF(fop_x86_64, 0x06, 2); 93 // NB: Technically fiseg/foseg are 16-bit long and the higher 16 bits 94 // are reserved. However, LLDB defines them to be 32-bit long for backwards 95 // compatibility, as they were used to reconstruct FIP/FDP before explicit 96 // register entries for them were added. Also, this is still how GDB does it. 97 EXPECT_OFF(fioff_x86_64, 0x08, 4); 98 EXPECT_OFF(fiseg_x86_64, 0x0C, 4); 99 EXPECT_OFF(fip_x86_64, 0x08, 8); 100 EXPECT_OFF(fooff_x86_64, 0x10, 4); 101 EXPECT_OFF(foseg_x86_64, 0x14, 4); 102 EXPECT_OFF(fdp_x86_64, 0x10, 8); 103 EXPECT_OFF(mxcsr_x86_64, 0x18, 4); 104 EXPECT_OFF(mxcsrmask_x86_64, 0x1C, 4); 105 EXPECT_OFF(st0_x86_64, 0x20, 10); 106 EXPECT_OFF(st1_x86_64, 0x30, 10); 107 EXPECT_OFF(st2_x86_64, 0x40, 10); 108 EXPECT_OFF(st3_x86_64, 0x50, 10); 109 EXPECT_OFF(st4_x86_64, 0x60, 10); 110 EXPECT_OFF(st5_x86_64, 0x70, 10); 111 EXPECT_OFF(st6_x86_64, 0x80, 10); 112 EXPECT_OFF(st7_x86_64, 0x90, 10); 113 EXPECT_OFF(mm0_x86_64, 0x20, 8); 114 EXPECT_OFF(mm1_x86_64, 0x30, 8); 115 EXPECT_OFF(mm2_x86_64, 0x40, 8); 116 EXPECT_OFF(mm3_x86_64, 0x50, 8); 117 EXPECT_OFF(mm4_x86_64, 0x60, 8); 118 EXPECT_OFF(mm5_x86_64, 0x70, 8); 119 EXPECT_OFF(mm6_x86_64, 0x80, 8); 120 EXPECT_OFF(mm7_x86_64, 0x90, 8); 121 EXPECT_OFF(xmm0_x86_64, 0xA0, 16); 122 EXPECT_OFF(xmm1_x86_64, 0xB0, 16); 123 EXPECT_OFF(xmm2_x86_64, 0xC0, 16); 124 EXPECT_OFF(xmm3_x86_64, 0xD0, 16); 125 EXPECT_OFF(xmm4_x86_64, 0xE0, 16); 126 EXPECT_OFF(xmm5_x86_64, 0xF0, 16); 127 EXPECT_OFF(xmm6_x86_64, 0x100, 16); 128 EXPECT_OFF(xmm7_x86_64, 0x110, 16); 129 EXPECT_OFF(xmm8_x86_64, 0x120, 16); 130 EXPECT_OFF(xmm9_x86_64, 0x130, 16); 131 EXPECT_OFF(xmm10_x86_64, 0x140, 16); 132 EXPECT_OFF(xmm11_x86_64, 0x150, 16); 133 EXPECT_OFF(xmm12_x86_64, 0x160, 16); 134 EXPECT_OFF(xmm13_x86_64, 0x170, 16); 135 EXPECT_OFF(xmm14_x86_64, 0x180, 16); 136 EXPECT_OFF(xmm15_x86_64, 0x190, 16); 137 138 base_offset = reg_ctx.GetRegisterInfo()[lldb_dr0_x86_64].byte_offset; 139 EXPECT_DBR_X86_64(0); 140 EXPECT_DBR_X86_64(1); 141 EXPECT_DBR_X86_64(2); 142 EXPECT_DBR_X86_64(3); 143 EXPECT_DBR_X86_64(4); 144 EXPECT_DBR_X86_64(5); 145 EXPECT_DBR_X86_64(6); 146 EXPECT_DBR_X86_64(7); 147 } 148 149 #endif // defined(__x86_64__) 150 151 #if defined(__i386__) || defined(__x86_64__) 152 153 #define EXPECT_GPR_I386(regname) \ 154 EXPECT_THAT(GetRegParams(reg_ctx, lldb_##regname##_i386), \ 155 ::testing::Pair(offsetof(native_i386_regs, r_##regname), \ 156 sizeof(native_i386_regs::r_##regname))) 157 #define EXPECT_DBR_I386(num) \ 158 EXPECT_OFF(dr##num##_i386, offsetof(native_i386_dbregs, dr[num]), \ 159 sizeof(native_i386_dbregs::dr[num])) 160 161 TEST(RegisterContextFreeBSDTest, i386) { 162 ArchSpec arch{"i686-unknown-freebsd"}; 163 RegisterContextFreeBSD_i386 reg_ctx{arch}; 164 165 #if defined(__i386__) 166 using native_i386_regs = ::reg; 167 using native_i386_dbregs = ::dbreg; 168 #else 169 using native_i386_regs = ::reg32; 170 using native_i386_dbregs = ::dbreg32; 171 #endif 172 173 EXPECT_GPR_I386(fs); 174 EXPECT_GPR_I386(es); 175 EXPECT_GPR_I386(ds); 176 EXPECT_GPR_I386(edi); 177 EXPECT_GPR_I386(esi); 178 EXPECT_GPR_I386(ebp); 179 EXPECT_GPR_I386(ebx); 180 EXPECT_GPR_I386(edx); 181 EXPECT_GPR_I386(ecx); 182 EXPECT_GPR_I386(eax); 183 EXPECT_GPR_I386(eip); 184 EXPECT_GPR_I386(cs); 185 EXPECT_GPR_I386(eflags); 186 EXPECT_GPR_I386(esp); 187 EXPECT_GPR_I386(ss); 188 EXPECT_GPR_I386(gs); 189 190 // fctrl is the first FPR field, it is used to determine offset of the whole 191 // FPR struct 192 size_t base_offset = reg_ctx.GetRegisterInfo()[lldb_fctrl_i386].byte_offset; 193 194 // assert against FXSAVE struct 195 EXPECT_OFF(fctrl_i386, 0x00, 2); 196 EXPECT_OFF(fstat_i386, 0x02, 2); 197 // TODO: This is a known bug, abridged ftag should is 8 bits in length. 198 EXPECT_OFF(ftag_i386, 0x04, 2); 199 EXPECT_OFF(fop_i386, 0x06, 2); 200 // NB: Technically fiseg/foseg are 16-bit long and the higher 16 bits 201 // are reserved. However, we use them to access/recombine 64-bit FIP/FDP. 202 EXPECT_OFF(fioff_i386, 0x08, 4); 203 EXPECT_OFF(fiseg_i386, 0x0C, 4); 204 EXPECT_OFF(fooff_i386, 0x10, 4); 205 EXPECT_OFF(foseg_i386, 0x14, 4); 206 EXPECT_OFF(mxcsr_i386, 0x18, 4); 207 EXPECT_OFF(mxcsrmask_i386, 0x1C, 4); 208 EXPECT_OFF(st0_i386, 0x20, 10); 209 EXPECT_OFF(st1_i386, 0x30, 10); 210 EXPECT_OFF(st2_i386, 0x40, 10); 211 EXPECT_OFF(st3_i386, 0x50, 10); 212 EXPECT_OFF(st4_i386, 0x60, 10); 213 EXPECT_OFF(st5_i386, 0x70, 10); 214 EXPECT_OFF(st6_i386, 0x80, 10); 215 EXPECT_OFF(st7_i386, 0x90, 10); 216 EXPECT_OFF(mm0_i386, 0x20, 8); 217 EXPECT_OFF(mm1_i386, 0x30, 8); 218 EXPECT_OFF(mm2_i386, 0x40, 8); 219 EXPECT_OFF(mm3_i386, 0x50, 8); 220 EXPECT_OFF(mm4_i386, 0x60, 8); 221 EXPECT_OFF(mm5_i386, 0x70, 8); 222 EXPECT_OFF(mm6_i386, 0x80, 8); 223 EXPECT_OFF(mm7_i386, 0x90, 8); 224 EXPECT_OFF(xmm0_i386, 0xA0, 16); 225 EXPECT_OFF(xmm1_i386, 0xB0, 16); 226 EXPECT_OFF(xmm2_i386, 0xC0, 16); 227 EXPECT_OFF(xmm3_i386, 0xD0, 16); 228 EXPECT_OFF(xmm4_i386, 0xE0, 16); 229 EXPECT_OFF(xmm5_i386, 0xF0, 16); 230 EXPECT_OFF(xmm6_i386, 0x100, 16); 231 EXPECT_OFF(xmm7_i386, 0x110, 16); 232 233 base_offset = reg_ctx.GetRegisterInfo()[lldb_dr0_i386].byte_offset; 234 EXPECT_DBR_I386(0); 235 EXPECT_DBR_I386(1); 236 EXPECT_DBR_I386(2); 237 EXPECT_DBR_I386(3); 238 EXPECT_DBR_I386(4); 239 EXPECT_DBR_I386(5); 240 EXPECT_DBR_I386(6); 241 EXPECT_DBR_I386(7); 242 } 243 244 #endif // defined(__i386__) || defined(__x86_64__) 245 246 #if defined(__arm__) 247 248 #define EXPECT_GPR_ARM(lldb_reg, fbsd_reg) \ 249 EXPECT_THAT(GetRegParams(reg_ctx, gpr_##lldb_reg##_arm), \ 250 ::testing::Pair(offsetof(reg, fbsd_reg), sizeof(reg::fbsd_reg))) 251 #define EXPECT_FPU_ARM(lldb_reg, fbsd_reg) \ 252 EXPECT_THAT(GetRegParams(reg_ctx, fpu_##lldb_reg##_arm), \ 253 ::testing::Pair(offsetof(vfp_state, fbsd_reg) + base_offset, \ 254 sizeof(vfp_state::fbsd_reg))) 255 256 TEST(RegisterContextFreeBSDTest, arm) { 257 ArchSpec arch{"arm-unknown-freebsd"}; 258 RegisterInfoPOSIX_arm reg_ctx{arch}; 259 260 EXPECT_GPR_ARM(r0, r[0]); 261 EXPECT_GPR_ARM(r1, r[1]); 262 EXPECT_GPR_ARM(r2, r[2]); 263 EXPECT_GPR_ARM(r3, r[3]); 264 EXPECT_GPR_ARM(r4, r[4]); 265 EXPECT_GPR_ARM(r5, r[5]); 266 EXPECT_GPR_ARM(r6, r[6]); 267 EXPECT_GPR_ARM(r7, r[7]); 268 EXPECT_GPR_ARM(r8, r[8]); 269 EXPECT_GPR_ARM(r9, r[9]); 270 EXPECT_GPR_ARM(r10, r[10]); 271 EXPECT_GPR_ARM(r11, r[11]); 272 EXPECT_GPR_ARM(r12, r[12]); 273 EXPECT_GPR_ARM(sp, r_sp); 274 EXPECT_GPR_ARM(lr, r_lr); 275 EXPECT_GPR_ARM(pc, r_pc); 276 EXPECT_GPR_ARM(cpsr, r_cpsr); 277 278 size_t base_offset = reg_ctx.GetRegisterInfo()[fpu_d0_arm].byte_offset; 279 280 EXPECT_FPU_ARM(d0, reg[0]); 281 EXPECT_FPU_ARM(d1, reg[1]); 282 EXPECT_FPU_ARM(d2, reg[2]); 283 EXPECT_FPU_ARM(d3, reg[3]); 284 EXPECT_FPU_ARM(d4, reg[4]); 285 EXPECT_FPU_ARM(d5, reg[5]); 286 EXPECT_FPU_ARM(d6, reg[6]); 287 EXPECT_FPU_ARM(d7, reg[7]); 288 EXPECT_FPU_ARM(d8, reg[8]); 289 EXPECT_FPU_ARM(d9, reg[9]); 290 EXPECT_FPU_ARM(d10, reg[10]); 291 EXPECT_FPU_ARM(d11, reg[11]); 292 EXPECT_FPU_ARM(d12, reg[12]); 293 EXPECT_FPU_ARM(d13, reg[13]); 294 EXPECT_FPU_ARM(d14, reg[14]); 295 EXPECT_FPU_ARM(d15, reg[15]); 296 EXPECT_FPU_ARM(d16, reg[16]); 297 EXPECT_FPU_ARM(d17, reg[17]); 298 EXPECT_FPU_ARM(d18, reg[18]); 299 EXPECT_FPU_ARM(d19, reg[19]); 300 EXPECT_FPU_ARM(d20, reg[20]); 301 EXPECT_FPU_ARM(d21, reg[21]); 302 EXPECT_FPU_ARM(d22, reg[22]); 303 EXPECT_FPU_ARM(d23, reg[23]); 304 EXPECT_FPU_ARM(d24, reg[24]); 305 EXPECT_FPU_ARM(d25, reg[25]); 306 EXPECT_FPU_ARM(d26, reg[26]); 307 EXPECT_FPU_ARM(d27, reg[27]); 308 EXPECT_FPU_ARM(d28, reg[28]); 309 EXPECT_FPU_ARM(d29, reg[29]); 310 EXPECT_FPU_ARM(d30, reg[30]); 311 EXPECT_FPU_ARM(d31, reg[31]); 312 EXPECT_FPU_ARM(fpscr, fpscr); 313 } 314 315 #endif // defined(__arm__) 316 317 #if defined(__aarch64__) 318 319 #define EXPECT_GPR_ARM64(lldb_reg, fbsd_reg) \ 320 EXPECT_THAT(GetRegParams(reg_ctx, gpr_##lldb_reg##_arm64), \ 321 ::testing::Pair(offsetof(reg, fbsd_reg), sizeof(reg::fbsd_reg))) 322 #define EXPECT_FPU_ARM64(lldb_reg, fbsd_reg) \ 323 EXPECT_THAT(GetRegParams(reg_ctx, fpu_##lldb_reg##_arm64), \ 324 ::testing::Pair(offsetof(fpreg, fbsd_reg) + base_offset, \ 325 sizeof(fpreg::fbsd_reg))) 326 327 TEST(RegisterContextFreeBSDTest, arm64) { 328 Flags opt_regsets = RegisterInfoPOSIX_arm64::eRegsetMaskDefault; 329 ArchSpec arch{"aarch64-unknown-freebsd"}; 330 RegisterInfoPOSIX_arm64 reg_ctx{arch, opt_regsets}; 331 332 EXPECT_GPR_ARM64(x0, x[0]); 333 EXPECT_GPR_ARM64(x1, x[1]); 334 EXPECT_GPR_ARM64(x2, x[2]); 335 EXPECT_GPR_ARM64(x3, x[3]); 336 EXPECT_GPR_ARM64(x4, x[4]); 337 EXPECT_GPR_ARM64(x5, x[5]); 338 EXPECT_GPR_ARM64(x6, x[6]); 339 EXPECT_GPR_ARM64(x7, x[7]); 340 EXPECT_GPR_ARM64(x8, x[8]); 341 EXPECT_GPR_ARM64(x9, x[9]); 342 EXPECT_GPR_ARM64(x10, x[10]); 343 EXPECT_GPR_ARM64(x11, x[11]); 344 EXPECT_GPR_ARM64(x12, x[12]); 345 EXPECT_GPR_ARM64(x13, x[13]); 346 EXPECT_GPR_ARM64(x14, x[14]); 347 EXPECT_GPR_ARM64(x15, x[15]); 348 EXPECT_GPR_ARM64(x16, x[16]); 349 EXPECT_GPR_ARM64(x17, x[17]); 350 EXPECT_GPR_ARM64(x18, x[18]); 351 EXPECT_GPR_ARM64(x19, x[19]); 352 EXPECT_GPR_ARM64(x20, x[20]); 353 EXPECT_GPR_ARM64(x21, x[21]); 354 EXPECT_GPR_ARM64(x22, x[22]); 355 EXPECT_GPR_ARM64(x23, x[23]); 356 EXPECT_GPR_ARM64(x24, x[24]); 357 EXPECT_GPR_ARM64(x25, x[25]); 358 EXPECT_GPR_ARM64(x26, x[26]); 359 EXPECT_GPR_ARM64(x27, x[27]); 360 EXPECT_GPR_ARM64(x28, x[28]); 361 EXPECT_GPR_ARM64(fp, x[29]); 362 EXPECT_GPR_ARM64(lr, lr); 363 EXPECT_GPR_ARM64(sp, sp); 364 EXPECT_GPR_ARM64(pc, elr); 365 EXPECT_GPR_ARM64(cpsr, spsr); 366 367 size_t base_offset = reg_ctx.GetRegisterInfo()[fpu_v0_arm64].byte_offset; 368 369 EXPECT_FPU_ARM64(v0, fp_q[0]); 370 EXPECT_FPU_ARM64(v1, fp_q[1]); 371 EXPECT_FPU_ARM64(v2, fp_q[2]); 372 EXPECT_FPU_ARM64(v3, fp_q[3]); 373 EXPECT_FPU_ARM64(v4, fp_q[4]); 374 EXPECT_FPU_ARM64(v5, fp_q[5]); 375 EXPECT_FPU_ARM64(v6, fp_q[6]); 376 EXPECT_FPU_ARM64(v7, fp_q[7]); 377 EXPECT_FPU_ARM64(v8, fp_q[8]); 378 EXPECT_FPU_ARM64(v9, fp_q[9]); 379 EXPECT_FPU_ARM64(v10, fp_q[10]); 380 EXPECT_FPU_ARM64(v11, fp_q[11]); 381 EXPECT_FPU_ARM64(v12, fp_q[12]); 382 EXPECT_FPU_ARM64(v13, fp_q[13]); 383 EXPECT_FPU_ARM64(v14, fp_q[14]); 384 EXPECT_FPU_ARM64(v15, fp_q[15]); 385 EXPECT_FPU_ARM64(v16, fp_q[16]); 386 EXPECT_FPU_ARM64(v17, fp_q[17]); 387 EXPECT_FPU_ARM64(v18, fp_q[18]); 388 EXPECT_FPU_ARM64(v19, fp_q[19]); 389 EXPECT_FPU_ARM64(v20, fp_q[20]); 390 EXPECT_FPU_ARM64(v21, fp_q[21]); 391 EXPECT_FPU_ARM64(v22, fp_q[22]); 392 EXPECT_FPU_ARM64(v23, fp_q[23]); 393 EXPECT_FPU_ARM64(v24, fp_q[24]); 394 EXPECT_FPU_ARM64(v25, fp_q[25]); 395 EXPECT_FPU_ARM64(v26, fp_q[26]); 396 EXPECT_FPU_ARM64(v27, fp_q[27]); 397 EXPECT_FPU_ARM64(v28, fp_q[28]); 398 EXPECT_FPU_ARM64(v29, fp_q[29]); 399 EXPECT_FPU_ARM64(v30, fp_q[30]); 400 EXPECT_FPU_ARM64(v31, fp_q[31]); 401 EXPECT_FPU_ARM64(fpsr, fp_sr); 402 EXPECT_FPU_ARM64(fpcr, fp_cr); 403 } 404 405 #endif // defined(__aarch64__) 406 407 #if defined(__mips64__) 408 409 #define EXPECT_GPR_MIPS64(lldb_reg, fbsd_regno) \ 410 EXPECT_THAT(GetRegParams(reg_ctx, gpr_##lldb_reg##_mips64), \ 411 ::testing::Pair(offsetof(reg, r_regs[fbsd_regno]), \ 412 sizeof(reg::r_regs[fbsd_regno]))) 413 #define EXPECT_FPU_MIPS64(lldb_reg, fbsd_regno) \ 414 EXPECT_THAT( \ 415 GetRegParams(reg_ctx, fpr_##lldb_reg##_mips64), \ 416 ::testing::Pair(offsetof(fpreg, r_regs[fbsd_regno]) + base_offset, \ 417 sizeof(fpreg::r_regs[fbsd_regno]))) 418 419 TEST(RegisterContextFreeBSDTest, mips64) { 420 ArchSpec arch{"mips64-unknown-freebsd"}; 421 RegisterContextFreeBSD_mips64 reg_ctx{arch}; 422 423 // we can not use aliases from <machine/regnum.h> because macros defined 424 // there are not namespaced and collide a lot, e.g. 'A1' 425 426 EXPECT_GPR_MIPS64(zero, 0); 427 EXPECT_GPR_MIPS64(r1, 1); 428 EXPECT_GPR_MIPS64(r2, 2); 429 EXPECT_GPR_MIPS64(r3, 3); 430 EXPECT_GPR_MIPS64(r4, 4); 431 EXPECT_GPR_MIPS64(r5, 5); 432 EXPECT_GPR_MIPS64(r6, 6); 433 EXPECT_GPR_MIPS64(r7, 7); 434 EXPECT_GPR_MIPS64(r8, 8); 435 EXPECT_GPR_MIPS64(r9, 9); 436 EXPECT_GPR_MIPS64(r10, 10); 437 EXPECT_GPR_MIPS64(r11, 11); 438 EXPECT_GPR_MIPS64(r12, 12); 439 EXPECT_GPR_MIPS64(r13, 13); 440 EXPECT_GPR_MIPS64(r14, 14); 441 EXPECT_GPR_MIPS64(r15, 15); 442 EXPECT_GPR_MIPS64(r16, 16); 443 EXPECT_GPR_MIPS64(r17, 17); 444 EXPECT_GPR_MIPS64(r18, 18); 445 EXPECT_GPR_MIPS64(r19, 19); 446 EXPECT_GPR_MIPS64(r20, 20); 447 EXPECT_GPR_MIPS64(r21, 21); 448 EXPECT_GPR_MIPS64(r22, 22); 449 EXPECT_GPR_MIPS64(r23, 23); 450 EXPECT_GPR_MIPS64(r24, 24); 451 EXPECT_GPR_MIPS64(r25, 25); 452 EXPECT_GPR_MIPS64(r26, 26); 453 EXPECT_GPR_MIPS64(r27, 27); 454 EXPECT_GPR_MIPS64(gp, 28); 455 EXPECT_GPR_MIPS64(sp, 29); 456 EXPECT_GPR_MIPS64(r30, 30); 457 EXPECT_GPR_MIPS64(ra, 31); 458 EXPECT_GPR_MIPS64(sr, 32); 459 EXPECT_GPR_MIPS64(mullo, 33); 460 EXPECT_GPR_MIPS64(mulhi, 34); 461 EXPECT_GPR_MIPS64(badvaddr, 35); 462 EXPECT_GPR_MIPS64(cause, 36); 463 EXPECT_GPR_MIPS64(pc, 37); 464 EXPECT_GPR_MIPS64(ic, 38); 465 EXPECT_GPR_MIPS64(dummy, 39); 466 467 size_t base_offset = reg_ctx.GetRegisterInfo()[fpr_f0_mips64].byte_offset; 468 469 EXPECT_FPU_MIPS64(f0, 0); 470 } 471 472 #endif // defined(__mips64__) 473 474 #if defined(__powerpc__) 475 476 #define EXPECT_GPR_PPC(lldb_reg, fbsd_reg) \ 477 EXPECT_THAT(GetRegParams(reg_ctx, gpr_##lldb_reg##_powerpc), \ 478 ::testing::Pair(offsetof(reg, fbsd_reg), sizeof(reg::fbsd_reg))) 479 #define EXPECT_FPU_PPC(lldb_reg, fbsd_reg) \ 480 EXPECT_THAT(GetRegParams(reg_ctx, fpr_##lldb_reg##_powerpc), \ 481 ::testing::Pair(offsetof(fpreg, fbsd_reg) + base_offset, \ 482 sizeof(fpreg::fbsd_reg))) 483 484 TEST(RegisterContextFreeBSDTest, powerpc32) { 485 ArchSpec arch{"powerpc-unknown-freebsd"}; 486 RegisterContextFreeBSD_powerpc32 reg_ctx{arch}; 487 488 EXPECT_GPR_PPC(r0, fixreg[0]); 489 EXPECT_GPR_PPC(r1, fixreg[1]); 490 EXPECT_GPR_PPC(r2, fixreg[2]); 491 EXPECT_GPR_PPC(r3, fixreg[3]); 492 EXPECT_GPR_PPC(r4, fixreg[4]); 493 EXPECT_GPR_PPC(r5, fixreg[5]); 494 EXPECT_GPR_PPC(r6, fixreg[6]); 495 EXPECT_GPR_PPC(r7, fixreg[7]); 496 EXPECT_GPR_PPC(r8, fixreg[8]); 497 EXPECT_GPR_PPC(r9, fixreg[9]); 498 EXPECT_GPR_PPC(r10, fixreg[10]); 499 EXPECT_GPR_PPC(r11, fixreg[11]); 500 EXPECT_GPR_PPC(r12, fixreg[12]); 501 EXPECT_GPR_PPC(r13, fixreg[13]); 502 EXPECT_GPR_PPC(r14, fixreg[14]); 503 EXPECT_GPR_PPC(r15, fixreg[15]); 504 EXPECT_GPR_PPC(r16, fixreg[16]); 505 EXPECT_GPR_PPC(r17, fixreg[17]); 506 EXPECT_GPR_PPC(r18, fixreg[18]); 507 EXPECT_GPR_PPC(r19, fixreg[19]); 508 EXPECT_GPR_PPC(r20, fixreg[20]); 509 EXPECT_GPR_PPC(r21, fixreg[21]); 510 EXPECT_GPR_PPC(r22, fixreg[22]); 511 EXPECT_GPR_PPC(r23, fixreg[23]); 512 EXPECT_GPR_PPC(r24, fixreg[24]); 513 EXPECT_GPR_PPC(r25, fixreg[25]); 514 EXPECT_GPR_PPC(r26, fixreg[26]); 515 EXPECT_GPR_PPC(r27, fixreg[27]); 516 EXPECT_GPR_PPC(r28, fixreg[28]); 517 EXPECT_GPR_PPC(r29, fixreg[29]); 518 EXPECT_GPR_PPC(r30, fixreg[30]); 519 EXPECT_GPR_PPC(r31, fixreg[31]); 520 EXPECT_GPR_PPC(lr, lr); 521 EXPECT_GPR_PPC(cr, cr); 522 EXPECT_GPR_PPC(xer, xer); 523 EXPECT_GPR_PPC(ctr, ctr); 524 EXPECT_GPR_PPC(pc, pc); 525 526 size_t base_offset = reg_ctx.GetRegisterInfo()[fpr_f0_powerpc].byte_offset; 527 528 EXPECT_FPU_PPC(f0, fpreg[0]); 529 EXPECT_FPU_PPC(f1, fpreg[1]); 530 EXPECT_FPU_PPC(f2, fpreg[2]); 531 EXPECT_FPU_PPC(f3, fpreg[3]); 532 EXPECT_FPU_PPC(f4, fpreg[4]); 533 EXPECT_FPU_PPC(f5, fpreg[5]); 534 EXPECT_FPU_PPC(f6, fpreg[6]); 535 EXPECT_FPU_PPC(f7, fpreg[7]); 536 EXPECT_FPU_PPC(f8, fpreg[8]); 537 EXPECT_FPU_PPC(f9, fpreg[9]); 538 EXPECT_FPU_PPC(f10, fpreg[10]); 539 EXPECT_FPU_PPC(f11, fpreg[11]); 540 EXPECT_FPU_PPC(f12, fpreg[12]); 541 EXPECT_FPU_PPC(f13, fpreg[13]); 542 EXPECT_FPU_PPC(f14, fpreg[14]); 543 EXPECT_FPU_PPC(f15, fpreg[15]); 544 EXPECT_FPU_PPC(f16, fpreg[16]); 545 EXPECT_FPU_PPC(f17, fpreg[17]); 546 EXPECT_FPU_PPC(f18, fpreg[18]); 547 EXPECT_FPU_PPC(f19, fpreg[19]); 548 EXPECT_FPU_PPC(f20, fpreg[20]); 549 EXPECT_FPU_PPC(f21, fpreg[21]); 550 EXPECT_FPU_PPC(f22, fpreg[22]); 551 EXPECT_FPU_PPC(f23, fpreg[23]); 552 EXPECT_FPU_PPC(f24, fpreg[24]); 553 EXPECT_FPU_PPC(f25, fpreg[25]); 554 EXPECT_FPU_PPC(f26, fpreg[26]); 555 EXPECT_FPU_PPC(f27, fpreg[27]); 556 EXPECT_FPU_PPC(f28, fpreg[28]); 557 EXPECT_FPU_PPC(f29, fpreg[29]); 558 EXPECT_FPU_PPC(f30, fpreg[30]); 559 EXPECT_FPU_PPC(f31, fpreg[31]); 560 EXPECT_FPU_PPC(fpscr, fpscr); 561 } 562 563 #endif // defined(__powerpc__) 564