1 //===-- TestArmv7Disassembly.cpp ------------------------------------------===// 2 3 // 4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 5 // See https://llvm.org/LICENSE.txt for license information. 6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "gtest/gtest.h" 11 12 #include "lldb/Core/Address.h" 13 #include "lldb/Core/Disassembler.h" 14 #include "lldb/Utility/ArchSpec.h" 15 #include "lldb/Target/ExecutionContext.h" 16 17 #include "Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h" 18 #include "llvm/Support/TargetSelect.h" 19 20 using namespace lldb; 21 using namespace lldb_private; 22 23 class TestArmv7Disassembly : public testing::Test { 24 public: 25 static void SetUpTestCase(); 26 static void TearDownTestCase(); 27 28 // virtual void SetUp() override { } 29 // virtual void TearDown() override { } 30 31 protected: 32 }; 33 34 void TestArmv7Disassembly::SetUpTestCase() { 35 llvm::InitializeAllTargets(); 36 llvm::InitializeAllAsmPrinters(); 37 llvm::InitializeAllTargetMCs(); 38 llvm::InitializeAllDisassemblers(); 39 DisassemblerLLVMC::Initialize(); 40 } 41 42 void TestArmv7Disassembly::TearDownTestCase() { 43 DisassemblerLLVMC::Terminate(); 44 } 45 46 TEST_F(TestArmv7Disassembly, TestCortexFPDisass) { 47 ArchSpec arch("armv7em--"); 48 49 const unsigned num_of_instructions = 3; 50 uint8_t data[] = { 51 0x00, 0xee, 0x10, 0x2a, // 0xee002a10 : vmov s0, r2 52 0xb8, 0xee, 0xc0, 0x0b, // 0xeeb80bc0 : vcvt.f64.s32 d0, s0 53 0xb6, 0xee, 0x00, 0x0a, // 0xeeb60a00 : vmov.f32 s0, #5.000000e-01 54 }; 55 56 // these can be disassembled by hand with llvm-mc, e.g. 57 // 58 // 0x00, 0xee, 0x10, 0x2a, // 0xee002a10 : vmov s0, r2 59 // 60 // echo 0x00 0xee 0x10 0x2a | llvm-mc -arch thumb -disassemble -mattr=+fp-armv8 61 // vmov s0, r2 62 63 DisassemblerSP disass_sp; 64 Address start_addr(0x100); 65 disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr, 66 &data, sizeof (data), num_of_instructions, false); 67 68 // If we failed to get a disassembler, we can assume it is because 69 // the llvm we linked against was not built with the ARM target, 70 // and we should skip these tests without marking anything as failing. 71 72 if (disass_sp) { 73 const InstructionList inst_list (disass_sp->GetInstructionList()); 74 EXPECT_EQ (num_of_instructions, inst_list.GetSize()); 75 76 InstructionSP inst_sp; 77 const char *mnemonic; 78 ExecutionContext exe_ctx (nullptr, nullptr, nullptr); 79 inst_sp = inst_list.GetInstructionAtIndex (0); 80 mnemonic = inst_sp->GetMnemonic(&exe_ctx); 81 ASSERT_STREQ ("vmov", mnemonic); 82 83 inst_sp = inst_list.GetInstructionAtIndex (1); 84 mnemonic = inst_sp->GetMnemonic(&exe_ctx); 85 ASSERT_STREQ ("vcvt.f64.s32", mnemonic); 86 87 inst_sp = inst_list.GetInstructionAtIndex (2); 88 mnemonic = inst_sp->GetMnemonic(&exe_ctx); 89 ASSERT_STREQ ("vmov.f32", mnemonic); 90 } 91 } 92