1 //===-- TestArm64Disassembly.cpp ------------------------------------------===//
2 
3 //
4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // See https://llvm.org/LICENSE.txt for license information.
6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "gtest/gtest.h"
11 
12 #include "lldb/Core/Address.h"
13 #include "lldb/Core/Disassembler.h"
14 #include "lldb/Utility/ArchSpec.h"
15 #include "lldb/Target/ExecutionContext.h"
16 
17 #include "Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h"
18 #include "llvm/Support/TargetSelect.h"
19 
20 using namespace lldb;
21 using namespace lldb_private;
22 
23 class TestArm64Disassembly : public testing::Test {
24 public:
25   static void SetUpTestCase();
26   static void TearDownTestCase();
27 
28   //  virtual void SetUp() override { }
29   //  virtual void TearDown() override { }
30 
31 protected:
32 };
33 
34 void TestArm64Disassembly::SetUpTestCase() {
35   llvm::InitializeAllTargets();
36   llvm::InitializeAllAsmPrinters();
37   llvm::InitializeAllTargetMCs();
38   llvm::InitializeAllDisassemblers();
39   DisassemblerLLVMC::Initialize();
40 }
41 
42 void TestArm64Disassembly::TearDownTestCase() {
43   DisassemblerLLVMC::Terminate();
44 }
45 
46 TEST_F(TestArm64Disassembly, TestArmv81Instruction) {
47   ArchSpec arch("arm64-apple-ios");
48 
49   const unsigned num_of_instructions = 2;
50   uint8_t data[] = {
51       0xff, 0x43, 0x00, 0xd1, // 0xd10043ff :  sub    sp, sp, #0x10
52       0x62, 0x7c, 0xa1, 0xc8, // 0xc8a17c62 :  cas    x1, x2, [x3] (cas defined in ARM v8.1 & newer)
53   };
54 
55   DisassemblerSP disass_sp;
56   Address start_addr(0x100);
57   disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr,
58                                  &data, sizeof (data), num_of_instructions, false);
59 
60   // If we failed to get a disassembler, we can assume it is because
61   // the llvm we linked against was not built with the ARM target,
62   // and we should skip these tests without marking anything as failing.
63 
64   if (disass_sp) {
65     const InstructionList inst_list (disass_sp->GetInstructionList());
66     EXPECT_EQ (num_of_instructions, inst_list.GetSize());
67 
68     InstructionSP inst_sp;
69     const char *mnemonic;
70     ExecutionContext exe_ctx (nullptr, nullptr, nullptr);
71     inst_sp = inst_list.GetInstructionAtIndex (0);
72     mnemonic = inst_sp->GetMnemonic(&exe_ctx);
73     ASSERT_STREQ ("sub", mnemonic);
74 
75     inst_sp = inst_list.GetInstructionAtIndex (1);
76     mnemonic = inst_sp->GetMnemonic(&exe_ctx);
77     ASSERT_STREQ ("cas", mnemonic);
78   }
79 }
80